ISO121 [TI]

±10V 输入、精密电压检测隔离式放大器;


型号：	ISO121
厂家：	TEXAS INSTRUMENTS
描述：	±10V 输入、精密电压检测隔离式放大器放大器
文件：	总18页 (文件大小：296K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ISO120

ISO121

Precision Low Cost

ISOLATION AMPLIFIER

FEATURES

APPLICATIONS

● 100% TESTED FOR PARTIAL DISCHARGE

● INDUSTRIAL PROCESS CONTROL: Trans-

ducer Isolator for Thermocouples, RTDs,

Pressure Bridges, and Flow Meters, 4mA

to 20mA Loop Isolation

● ISO120: Rated 1500Vrms

● ISO121: Rated 3500Vrms

● HIGH IMR: 115dB at 60Hz

● GROUND LOOP ELIMINATION

● MOTOR AND SCR CONTROL

● POWER MONITORING

● USER CONTROL OF CARRIER

FREQUENCY

● LOW NONLINEARITY: ±0.01% max

● BIPOLAR OPERATION: V_O= ±10V

● 0.3"-WIDE 24-PIN HERMETIC DIP, ISO120

● SYNCHRONIZATION CAPABILITY

● ANALYTICAL MEASUREMENTS

● BIOMEDICAL MEASUREMENTS

● DATA ACQUISITION

● TEST EQUIPMENT

● WIDE TEMP RANGE: –55°C to +125°C

(ISO120)

DESCRIPTION

The ISO120 and ISO121 are precision isolation ampli-

fiers incorporating a novel duty cycle modulation-

demodulation technique. The signal is transmitted

digitally across a 2pF differential capacitive barrier.

With digital modulation the barrier characteristics do

not affect signal integrity, which results in excellent

reliability and good high frequency transient immu-

nity across the barrier. Both the amplifier and barrier

capacitors are housed in a hermetic DIP. The ISO120

and ISO121 differ only in package size and isolation

voltage rating.

Isolation Barrier

C_1H

C_1L

C_2H

C_2L

Sense

V_IN

V_OUT

Signal

Com 1

Signal

Com 2

Ext Osc

+V_S1

–V_S2

These amplifiers are easy to use. No external compo-

nents are required for 60kHz bandwidth. With the

addition of two external capacitors, precision specifi-

cations of 0.01% max nonlinearity and 150µV/°C max

V_OSdrift are guaranteed with 6kHz bandwidth. A

power supply range of ±4.5V to ±18V and low quies-

cent current make these amplifiers ideal for a wide

range of applications.

Gnd 1

–V_S1

Gnd 2

+V_S2

International Airport Industrial Park

•

Mailing Address: PO Box 11400

Cable: BBRCORP

•

Tucson, AZ 85734

•

Street Address: 6730 S. Tucson Blvd.

•

Tucson, AZ 85706

Tel: (520) 746-1111 Twx: 910-952-1111

•

Telex: 066-6491

•

FAX: (520) 889-1510

•

Immediate Product Info: (800) 548-6132

PDS-820D

Printed in U.S.A. March, 1992

SBOS158

SPECIFICATIONS

ELECTRICAL

At T_A= +25°C: V_S1= V_S2= ±15V: and R_L= 2kΩ, unless otherwise noted.

ISO120BG, ISO121BG

ISO120G, ISO120SG⁽⁴⁾, ISO121G

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

ISOLATION

Voltage Rated Continuous ISO120: AC 60Hz

T_MINto T_MAX

1500

2121

3500

4950

2500

5600

Vrms

VDC

Vrms

VDC

Vrms

Ω || pF

µArms

ISO121: AC 60Hz

T_MINto T_MAX

100% Test (AC 60Hz): ISO120

1s; Partial Discharge ≤ 5pC

1500Vrms

ISO121

Isolation Mode Rejection ISO 120: AC 60Hz

115

160

115

160

10¹⁴|| 2

0.18

ISO121: AC60Hz

3500Vrms

Barrier Impedance

Leakage Current

V_ISO= 240Vrms, 60Hz

0.5

GAIN⁽⁴⁾

V_O= ±10V

Nominal Gain

Gain Error

Gain vs Temperature

Nonlinearity

Nominal Gain

Gain Error

Gain vs Temperature

Nonlinearity

C₁= C₂= 1000pF

±0.04

±5

±0.005

±0.04

±40

±0.02

V/V

±0.1

±20

±0.01

±0.05

±10

±0.01

±0.05

±40

±0.04

±0.25

±40

±0.05

%FSR

ppm/°C

%FSR

V/V

%FSR

ppm/°C

%FSR

C₁= C₂= 0

±0.25

±0.1

±0.25

±0.1

INPUT OFFSET VOLTAGE⁽⁴⁾

Initial Offset

vs Temperature

Initial Offset

C₁= C₂= 1000pF

C₁= C₂= 0

±5

±100

±25

±150

±100

±10

±150

±40

±50

±400

±100

µV/°C

vs Temperature

Initial Offset

±250

±500

µV/°C

vs Supply

±V_S1or ±V_S2= ±4.5V to ±18V

±2

mV/V

Noise

µV/√Hz

INPUT

Voltage Range⁽¹⁾

Resistance

±10

±15

200

kΩ

OUTPUT

Voltage Range

Current Drive

Capacitive Load Drive

Ripple Voltage⁽²⁾

±10

±5

±12.5

±15

0.1

µF

mVp-p

FREQUENCY RESPONSE

Small Signal Bandwith

C₁= C₂= 0

C₁= C₂= 1000pF

kHz

V/µs

Slew Rate

Settling Time

0.1%

0.01%

V_O= ±10V

C₂= 100pF

C₁= C₂= 1000pF

50% Output Overload,

C₁= C₂= 0

350

150

µs

Overload Recovery Time⁽³⁾

POWER SUPPLIES

Rated Voltage

Voltage Range

Quiescent Current: V_S1

V_S2

±4.5

±18

±5.5

±6.5

±4.0

±5.0

TEMPERATURE RANGE

Specification: BG and G

SG⁽⁴⁾

Operating

Storage

–25

–55

–65

125

150

–25

–55

°C

125

150

°C

θ_JA: ISO120

°C/W

ISO121

*Specifications same as ISO120BG, ISO121BG.

NOTE: (1) Input voltage range = ±10V for V_S1, V_S2=±4.5VDC to ±18VDC. (2) Ripple frequency is at carrier frequency. (3) Overload recovery is approximately three times

the settling time for other values of C₂. (4) The SG-grade is specified –55°C to +125°C; performance of the SG in the –25°C to +85°C temperature range is the same

as the BG-grade.

ISO120/121

ABSOLUTE MAXIMUM RATINGS

CONNECTION DIAGRAM

Supply Voltage (any supply) ............................................................... 18V

V_IN, Sense Voltage .......................................................................... ±100V

External Oscillator Input .................................................................... ±25V

Signal Common 1 to Ground 1 ........................................................... ±1V

Signal Common 2 to Ground 2 ........................................................... ±1V

Continuous Isolation Voltage: ISO120 ...................................... 1500Vrms

ISO121....................................... 3500Vrms

V_ISO, dv/dt ...................................................................................... 20kV/µs

Junction Temperature ...................................................................... 150°C

Storage Temperature..................................................... –65°C to +150°C

Lead Temperature (soldering, 10s) ............................................... +300°C

Output Short Duration ......................................... Continuous to Common

(1)

C_1H1/1

24/40 Gnd 1

23/39 V_IN

C_1L

+V_S1

–V_S1

2/2

3/3

4/4

22/38 Ext Osc

21/37 Com 1

PACKAGE INFORMATION⁽¹⁾

Com 2 9/17

V_OUT10/18

16/24 –V_S2

15/23 +V_S2

14/22 C_2L

13/21 C_2H

PACKAGE DRAWING

MODEL

PACKAGE

NUMBER

ISO120G

ISO120BG

ISO120SG

24-Pin DIP

225

Sense 11/19

Gnd 2 12/20

ISO121G

ISO121BG

40-Pin DIP

206

NOTE: (1) First pin number is for ISO120.

Second pin number is for ISO121.

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix D of Burr-Brown IC Data Book.

ORDERING INFORMATION

TEMPERATURE

MODEL

RANGE

ISO120G

ISO120BG

ISO120SG

ISO121G

ISO121BG

–25°C to 85°C

–55C to 125°C

–25°C to 85°C

ELECTROSTATIC

DISCHARGE SENSITIVITY

Electrostatic discharge can cause damage ranging from per-

formancedegradationtocompletedevicefailure.Burr-Brown

Corporationrecommendsthatallintegratedcircuitsbehandled

and stored using appropriate ESD protection methods.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

ISO120/121

TYPICAL PERFORMANCE CURVES

T_A= +25°C; V_S1= V_S2= ±15V; and R_L= 2kΩ, unless otherwise noted.

ISOLATION MODE VOLTAGE

vs FREQUENCY ISO120

ISOLATION MODE VOLTAGE

vs FREQUENCY ISO121

Max DC Rating

2.1k

Max AC

Rating

Max AC

Rating

Degraded

Performance

100

Typical

Performance

Typical

Performance

100

10k

100k

10M

100M

100

10k

100k

10M

100M

100k

Frequency (Hz)

BANDWIDTH vs C₂

PHASE SHIFT vs C₂

100nF

10nF

100

C₂= 1000pF

C₂= 0

1000pF

0.1

10k

100

10k

100k

–3dB Frequency (Hz)

Frequency (Hz)

ISOLATION LEAKAGE CURRENT

vs FREQUENCY

PSRR vs FREQUENCY

100mA

10mA

1mA

3500 Vrms

1500 Vrms

+V_S1, +V_S2

100µA

10µA

–V_S1, –V_S2

240 Vrms

1µA

0.1µA

100

10k

100k

100

10k

100k

Frequency (Hz)

ISO120/121

TYPICAL PERFORMANCE CURVES (CONT)

T_A= +25°C; V_S1= V_S2= ±15V; and R_L= 2kΩ, unless otherwise noted.

IMR vs FREQUENCY

160

SIGNAL RESPONSE vs CARRIER FREQUENCY

–20dB/dec (for comparison only)

140

120

100

–20

–40

100

10k

100k

f_C

2f_C

3f_C

f_IN(Hz)

Frequency (Hz)

_OUT(Hz)

f_c/2

f_C/2

SYNCHRONIZATION RANGE at 25°C

±4Vp SINE WAVE INPUT TO EXT OSC

NOISE vs SMALL SIGNAL BANDWIDTH

10nF

Typical

Free Run

Frequency

C₂= C₁*

1000pF

C₂= 2C₁

*C₁≤ 5000pF

0.1f_–3dB

0.2f_–3dB

0.5f_–3dB

f_–3dB

10k

100k

₂≥ C₁

Normalized Frequency

Frequency (Hz)

SINE RESPONSE

(f = 20kHz, C₂= 0)

SINE RESPONSE

(f = 2kHz, C₂= 0)

+10

–10

100

500

1000

Time (µs)

FPO

BLEED

TO EDGE

OF BOX

ISO120/121

TYPICAL PERFORMANCE CURVES (CONT)

T_A= +25°C; V_S1= V_S2= ±15V; and R_L= 2kΩ, unless otherwise noted.

STEP RESPONSE

+10

–10

+10

–10

100

250

500

Time (µs)

THEORY OF OPERATION

The ISO120 and ISO121 isolation amplifiers comprise input

and output sections galvanically isolated by matched 1pF

capacitors built into the ceramic barrier. The input is duty-

cycle modulated and transmitted digitally across the barrier.

The output section receives the modulated signal, converts it

back to an analog voltage and removes the ripple component

inherent in the demodulation. The input and output sections

are laser-trimmed for exceptional matching of circuitry com-

mon to both input and output sections.

SYNCHRONIZED MODE

A unique feature of the ISO120 and ISO121 is the ability to

synchronize the modulator to an external signal source. This

capability is useful in eliminating trouble-some beat fre-

quencies in multi-channel systems and in rejecting AC

signals and their harmonics. To use this feature, external

capacitors are connected at C₁and C₂(Figure 1) to change

the free-running carrier frequency. An external signal is

applied to the Ext Osc pin. This signal forces the current

source to switch at the frequency of the external signal. If

V_INis zero, and the external source has a 50% duty cycle,

operation proceeds as described above, except that the switch-

ing frequency is that of the external source. If the external

signal has a duty cycle other than 50%, its average value is

not zero. At start-up, the current source does not switch until

the integrator establishes an output equal to the average DC

value of the external signal. At this point, the external signal

is able to trigger the current source, producing a triangular

waveform, symmetrical about the new DC value, at the

output of A1. For V_IN= 0, this waveform has a 50% duty

cycle. As V_INvaries, the waveform retains its DC offset, but

varies in duty cycle to maintain charge balance around A1.

Operation of the demodulator is the same as outlined above.

FREE-RUNNING MODE

An input amplifier (A1, Figure1) integrates the difference

between the input current (V_IN/200kΩ) and a switched

±100µA current source. This current source is implemented

by a switchable 200µA source and a fixed 100µA current

sink. To understand the basic operation of the input section,

assume that V_IN= 0. The integrator will ramp in one

direction until the comparator threshold is exceeded. The

comparator and sense amp will force the current source to

switch; the resultant signal is a triangular waveform with a

50% duty cycle. If V_INchanges, the duty cycle of the

integrator will change to keep the average DC value at the

output of A1 near zero volts. This action converts the input

voltage to a duty-cycle modulated triangular waveform at

the output of A1 near zero volts. This action converts the

input voltage to a duty-cycle modulated triangular wave-

form at the output of A1 with a frequency determined by the

internal 150pF capacitor. The comparator generates a fast

rise time square wave that is simultaneously fed back to keep

A1 in charge balance and also across the barrier to a

differential sense amplifier with high common-mode rejec-

tion characteristics. The sense amplifier drives a switched

current source surrounding A2. The output stage balances

the duty-cycle modulated current against the feedback cur-

rent through the 200kΩ feedback resistor, resulting in an

average value at the Sense pin equal to V_IN. The sample and

hold amplifiers in the output feedback loop serve to remove

undesired ripple voltages inherent in the demodulation process.

Synchronizing to a Sine

or Triangle Wave External Clock

The ideal external clock signal for the ISO120/121 is a ±4V

sine wave or ±4V, 50% duty-cycle triangle wave. The ext osc

pin of the ISO120/121 can be driven directly with a ±3V to

±5V sine or 25% to 75% duty-cycle triangle wave and the ISO

amp's internal modulator/demodulator circuitry will synchro-

nize to the signal.

Synchronizing to signals below 400kHz requires the addition

of two external capacitors to the ISO120/121. Connect one

capacitor in parallel with the internal modulator capacitor and

connect the other capacitor in parallel with the internal de-

modulator capacitor as shown in Figure 1.

ISO120/121

(1)

C₁

C₂

Isolation Barrier

C_1H

C_1L

C_2L

C_2H

200µA

1pF

Sense

100µA

Sense

150pF

200kΩ

30kΩ

200kΩ

Sense

V_OUT

V_IN

100µA

Signal

Com 1

Ext

Signal

Com 2

16kΩ

S/H

G = 1 G = 6

S/H

Osc

16kΩ

50pF

+V_S1Gnd 1 –V_S1

+V_S2Gnd 2 –V_S2

NOTE: (1) Optional. See text.

FIGURE 1. Block Diagram.

The value of the external modulator capacitor, C₁, depends on

the frequency of the external clock signal. Table I lists

recommended values.

Synchronizing to a 400kHz to 700kHz

Square-Wave External Clock

At frequencies above 400kHz, an internal clamp and filter

provides signal conditioning so that a square-wave signal can

be used to directly drive the ISO120/121. A square-wave

external clock signal can be used to directly drive the ISO120/

121 ext osc pin if: the signal is in the 400kHz to 700kHz

frequency range with a 25% to 75% duty cycle, and ±3V to

±20V level. Details of the internal clamp and filter circuitry

are shown in Figure 1.

C₁, C₂ISO120/121

EXTERNAL CLOCK

FREQUENCY RANGE

MODULATOR, DEMODULATOR

EXTERNAL CAPACITOR

400kHz to 700kHz

200kHz to 400kHz

100kHz to 200kHz

50kHz to 100kHz

20kHz to 50kHz

10kHz to 20kHz

5kHz to 10kHz

none

500pF

1000pF

2200pF

4700pF

0.01µF

0.022µF

Synchronizing to a 10% to 90%

Duty-cycle External Clock

TABLE I. Recommended ISO120/121 External Modulator/

Demodulator Capacitor Values vs External Clock

Frequency.

With the addition of the signal conditioning circuit shown in

Figure 2, any 10% to 90% duty-cycle square-wave signal can

be used to drive the ISO120/121 ext osc pin. With the values

shown, the circuit can be driven by a 4Vp-p TTL signal. For

a higher or lower voltage input, increase or decrease the 1kΩ

resistor, R_X, proportionally. e.g. for a ±4V square wave

(8Vp-p) R_Xshould be increased to 2kΩ.

The value of the external demodulator capacitor, C₂, depends

on the value of the external modulator capacitor. To assure

stability, C₂must be greater than 0.8 • C₁. A larger value for

C₂will decrease bandwidth and improve stability:

The value of C_Xused in the Figure 2 circuit depends on the

frequency of the external clock signal. Table II shows recom-

mended capacitor values.

1. 2

≈

−3 dB

200kΩ 150 pF + C

(

)

Note: For external clock frequencies below 400kHz, external

modulator/demodulator capacitors are required on the

ISO120/121 as before.

Where:

f_–3dB≈ –3dB bandwidth of ISO amp with external C₂(Hz)

C₂= External demodulator capacitor (f)

For example, with C₂= 0.01µF, the f_–3dBbandwidth of the

ISO120/121 is approximately 600Hz.

ISO120/121

connected directly to V_OUTor may be connected to a remote

load to eliminate errors due to IR drops. Pins are provided

for use of external integrator capacitors. The C_1Hand C_2H

pins are connected to the integrator summing junctions and

are therefore particularly sensitive to external pickup. This

sensitivity will most often appear as degraded IMR or PSR

performance. AC or DC currents coupled into these pins

results in V_ERROR= I_ERRORX 200kΩ at the output. Guarding

of these pins to their respective Signal Common, or C_1Land

C_2Lis strongly recommended. For similar reasons, long

traces or physically large capacitors are not desirable. If

wound-foil capacitors are used, the outside foil should be

connected to C_1Land C_2L, respectively.

10kΩ

C_X

R_X

1µF

Sq Wave In

1kΩ

OPA602

Triangle Out

to ISO120/121

Ext Osc

FIGURE 2. Square Wave to Triangle Wave Signal Condi-

tioner for Driving ISO120/121 Ext Osc Pin.

Optional Gain and Offset Adjustments

EXTERNAL CLOCK

Rated gain accuracy and offset performance can be achieved

with no external adjustments, but the circuit of Figure 4a

may be used to provide a gain trim of ±0.5% for values

shown; greater range may be provided by increasing the size

of R₁and R₂. Every 2kΩ increase in R₁will give an

additional 1% adjustment range, with R₂≥ 2R₁. If safety or

convenience dictates location of the adjustment potenti-

ometer on the other side of the barrier from the position

shown in Figure 4a, the positions of R₁and R₂may be

reversed. Gains greater than one may be obtained by using

the circuit of Figure 4b. Note that the effect of input offset

errors will be multiplied at the output in proportion to the

increase in gain. Also, the small-signal bandwidth will be

decreased in inverse proportion to the increase in gain. In

most instances, a precision gain block at the input of the

isolation amplifier will provide better overall performance.

FREQUENCY RANGE

C_X

400kHz to 700kHz

200kHz to 400kHz

100kHz to 200kHz

50kHz to 100kHz

20kHz to 50kHz

10kHz to 20kHz

5kHz to 10kHz

30pF

180pF

680pF

1800pF

3300pF

0.01µF

0.022µF

TABLE II. Recommended C_XValues vs Frequency for

Figure 2 Circuit.

BASIC OPERATION

Signal and Power Connections

Figure 3 shows proper power and signal connections. Each

power supply pin should be bypassed with 1µF tantalum

capacitor located as close to the amplifier as possible. All

ground connections should be run independently to a com-

mon point if possible. Signal Common on both input and

output sections provide a high-impedance point for sensing

signal ground in noisy applications. Signal Common must

have a path to ground for bias current return and should be

maintained within ±1V of Gnd. The output sense pin may be

Figure 5 shows a method for trimming V_OSof the ISO120

and ISO121. This circuit may be applied to either Signal

Com (input or output) as desired for safety or convenience.

With the values shown, ±15V supplies and unity gain, the

circuit will provide ±150mV adjustment range and 0.25mV

(1)

C₁

Guard

Isolation Barrier

(1)

C₂

C_1H

C_1L

V_IN

Guard

C_2L

Sense

V_OUT

C_2H

R_L

–V_S2

–

+V_S2

Signal

Com1

Gnd 2

Signal

Com 2

+1µF

1µF

–V_S1

–

Gnd1

+V_S1

Ext⁽²⁾

Osc

+1µF

NOTE: (1) Optional. See text. (2) Ground if not used.

FIGURE 3. Power and Signal Connections.

ISO120/121

resolution with a typical trim potentiometer. The output will

have some sensitivity to power supply variations. For a

±100mV trim, power supply sensitivity is 8mV/V at the

output.

output are not significant under these circumstances unless

the input signal contains significant components above

250kHz.

There are two ways to use these characteristics. One is to

move the carrier frequency low enough that the troublesome

signal components are attenuated to an acceptable level as

shown in Signal Response vs Carrier Frequency. This in

effect limits the bandwidth of the amplifier. The Synchroni-

zation Range performance curve shows the relationship

between carrier frequency and the value of C₁. To maintain

stability, C₂must also be connected and must be equal to or

larger in value than C₁. C₂may be further increased in value

for additional attenuation of the undesired signal compo-

nents and provides the additional benefit of reducing the

residual carrier ripple at the output. See the Bandwidth vs C₂

performance curve.

R₂

R₁

2kΩ

1kΩ

V_IN

V_OUT

Sense

GND1

FIGURE 4a. Gain Adjust.

R₁|| R₂

V_IN

When periodic noise from external sources such as system

clocks and DC/DC converters are a problem, ISO120 and

ISO121 can be used to reject this noise. The amplifier can be

synchronized to an external frequency source, f_EXT, placing

the amplifier response curve at one of the frequency and

amplitude nulls indicated in the Signal Response vs Carrier

Frequency performance curve. For proper synchronization,

choose C₁as shown in the Synchronization Range perfor-

mance curve. Remember that C₂≥ C₁is a necessary condi-

tion for stability of the isolation amplifier. This curve shows

the range of lock at the fundamental frequency for a 4V

sinusoidal signal source. The applications section shows the

ISO120 and ISO121 synchronized to isolation power sup-

plies, while Figure 6 shows circuitry with opto-isolation

suitable for driving the Ext Osc input from TTL levels.

Sense

V_OUT

GND1

R₁

R₂

R₁

Gain = 1 +

(_R)

200k

FIGURE 4b. Gain Setting.

+V_S1or +V_S2

Signal Com 1

1MΩ

100kΩ

Signal Com 2

10kΩ

–V_S1or –V_S2

+5V

200Ω

+15V

2.5kΩ

C₂

FIGURE 5. V_OSAdjust.

Ext Osc on

ISO120 (pin 22)

2.5kΩ

10kΩ

CARRIER FREQUENCY CONSIDERATIONS

C₁

As previously discussed, the ISO120 and ISO121 amplifiers

transmit the signal across the iso-barrier by a duty-cycle

modulation technique. This system works like any linear

amplifier for input signals having frequencies below one

half the carrier frequency, f_C. For signal frequencies above

f_C/2, the behavior becomes more complex. The Signal Re-

sponse vs Carrier Frequency performance curve describes

this behavior graphically. The upper curve illustrates the

response for input signals varying from DC to f_C/2. At input

frequencies at or above f_C/2, the device generates an output

signal component that varies in both amplitude and fre-

quency, as shown by the lower curve. The lower horizontal

scale shows the periodic variation in the frequency of the

output component. Note that at the carrier frequency and its

harmonics, both the frequency and amplitude of the re-

sponse go the zero. These characteristics can be exploited in

certain applications. It should be noted that when C₁is zero,

the carrier frequency is nominally 500kHz and the –3dB

point of the amplifier is 60kHz. Spurious signals at the

TTL

f_IN

140E-6

6N136

C₁

– 350pF

( )

f_IN

C₂= 10 X C₁, with a minimum 10nF

FIGURE 6. Synchronization with Isolated Drive Circuit for

Ext Osc Pin.

ISOLATION MODE VOLTAGE

Isolation mode voltage (IMV) is the voltage appearing be-

tween isolated grounds Gnd 1 and Gnd 2. IMV can induce

error at the output as indicated by the plots of IMV vs

Frequency. It should be noted that if the IMV frequency

exceeds f_C/2, the output will display spurious outputs in a

manner similar to that described above, and the amplifier

response will be identical to that shown in the Signal Re-

sponse vs Carrier Frequency performance curve. This occurs

ISO120/121

because IMV-induced errors behave like input-referred error

signals. To predict the total IMR, divide the isolation voltage

by the IMR shown in IMR vs Frequency performance curve

and compute the amplifier response to this input-referred

error signal from the data given in the Signal Response vs

Carrier Frequency performance curve. Due to effects of very

high-frequency signals, typical IMV performance can be

achieved only when dV/dT of the isolation mode voltage

falls below 1000V/µs. For convenience, this is plotted in the

typical performance curves for the ISO120 and ISO121 as a

function of voltage and frequency for sinusoidal voltages.

When dV/dT exceeds 1000V/µs but falls below 20kV/µs,

performance may be degraded. At rates of change above

20kV/µs, the amplifier may be damaged, but the barrier

retains its full integrity. Lowering the power supply voltages

below ±15V may decrease the dV/dT to 500V/µs for typical

performance, but the maximum dV/dT of 20kV/µs remains

unchanged.

effectively shorting itself out. This action redistributes elec-

trical charge within the dielectric and is known as partial

discharge. If, as is the case with AC, the applied voltage

gradient across the device continues to rise, another partial

discharge cycle begins. The importance of this phenomenon

is that, if the discharge does not occur, the insulation system

retains its integrity. If the discharge begins, and is allowed

to continue, the action of the ions and electrons within the

defect will eventually degrade any organic insulation system

in which they occur. The measurement of partial discharge

is still useful in rating the devices and providing quality

control of the manufacturing process. Since the ISO120 and

ISO121 do not use organic insulation, partial discharge is

non-destructive.

The inception voltage for these voids tends to be constant, so

that the measurement of total charge being redistributed

within the dielectric is a very good indicator of the size of

the voids and their likelihood of becoming an incipient

failure. The bulk inception voltage, on the other hand, varies

with the insulation system, and the number of ionization

defects and directly establishes the absolute maximum volt-

age (transient) that can be applied across the test device

before destructive partial discharge can begin. Measuring

the bulk extinction voltage provides a lower, more conserva-

tive voltage from which to derive a safe continuous rating.

In production, measuring at a level somewhat below the

expected inception voltage and then derating by a factor

related to expectations about system transients is an

accepted practice.

Leakage current is determined solely by the impedance of

the 2pF barrier capacitance and is plotted in the Isolation

Leakage Current vs Frequency curve.

ISOLATION VOLTAGE RATINGS

Because a long-term test is impractical in a manufacturing

situation, the generally accepted practice is to perform a

production test at a higher voltage for some shorter time. The

relationship between actual test voltage and the continuous

derated maximum specification is an important one. Histori-

cally, Burr-Brown has chosen a deliberately conservative

one: V_TEST= (2 X ACrms continuous rating) + 1000V for 10

seconds, followed by a test at rated ACrms voltage for one

minute. This choice was appropriate for conditions where

system transients are not well defined.

Partial Discharge Testing

Not only does this test method provide far more qualitative

information about stress-withstand levels than did previous

stress tests, but it provides quantitative measurements from

which quality assurance and control measures can be based.

Tests similar to this test have been used by some manufac-

turers, such as those of high-voltage power distribution

equipment, for some time, but they employed a simple

measurement of RF noise to detect ionization. This method

was not quantitative with regard to energy of the discharge,

and was not sensitive enough for small components such as

isolation amplifiers. Now, however, manufacturers of HV

test equipment have developed means to quantify partial

discharge. VDE, the national standards group in Germany

and an acknowledged leader in high-voltage test standards,

has developed a standard test method to apply this powerful

technique. Use of partial discharge testing is an improved

method for measuring the integrity of an isolation barrier.

Recent improvements in high-voltage stress testing have

produced a more meaningful test for determining maximum

permissible voltage ratings, and Burr-Brown has chosen to

apply this new technology in the manufacture and testing of

the ISO120 and ISO121.

Partial Discharge

When an insulation defect such as a void occurs within an

insulation system, the defect will display localized corona or

ionization during exposure to high-voltage stress. This ion-

ization requires a higher applied voltage to start the dis-

charge and lower voltage to maintain it or extinguish it once

started. The higher start voltage is known as the inception

voltage, while the extinction voltage is that level of voltage

stress at which the discharge ceases. Just as the total insula-

tion system has an inception voltage, so do the individual

voids. A voltage will build up across a void until its incep-

tion voltage is reached, at which point the void will ionize,

To accommodate poorly-defined transients, the part under

test is exposed to voltage that is 1.6 times the continuous-

rated voltage and must display ≤5pC partial discharge level

in a 100% production test.

ISO120/121

APPLICATIONS

The ISO120 and ISO121 isolation amplifiers are used in

2. Accurate isolation of signals from severe ground noise

three categories of applications:

and,

3. Fault protection from high voltages in analog measure-

ments.

1. Accurate isolation of signals from high voltage ground

potentials,

Figures 7 through 12 show a variety of Application Circuits.

APPLICATION CIRCUITS

20µH

+15V

0.3µF

PWS740-2

10µF

T_O

0.3µF

+V_IN

PWS740-1

PWS740-3

0.3µF

T_O

20kΩ

To other

channels

+15V

20pF

1.0µF

I_L= 0-20mA

_L≤ 600Ω

–V_S1

1.0µF

–15V

1.0µF

0-5V

VN2222

ISO120

1/4W

250Ω

0.1%

+15V

20kΩ

System Uses:

1 - Oscillator/Driver

8 - Transformers

8 - Bridges

8 - ISO120s

6.2V

400mW

8 - Transistors VN2222

8 - Zener Diodes, 6.2V, 400mW, 20%

Not all components shown.

–15V

FIGURE 7. Eight-channel Isolated 0-20mA Loop Driver.

ISO120/121

3θ Y-Connected Power Transformer

+V_S2

–V_S1

+V_S1

–V_S2

120Vrms

100A

4 15 16

200kΩ

C₁

ISO

120

V_OUT

0.005 Power Resistor

0.001µF

INA110

–

200kΩ

–V_SI

C₂

C₁= 1000pF

C₂= 1000pF

Differential input accurately senses power resistor voltage.

Two resistors protect INA110 from open power resistor.

High frequency spike reject filter has f_CO= 400Hz.

FIGURE 8. Isolated Powerline Monitor.

5MΩ

5.00V

Calibration Signal

1mV

1kΩ

+V_S1

C₁

Calibration

Left Arm

1/2W

300kΩ

+V_S1

C₂

50kΩ

0.0082⁽¹⁾

500pF

NE2H⁽²⁾

ISO

121

–V_S1

+V_S1

INA102

200pF

Calibration

–

1/2W

300kΩ

+V_S2

–V_S2

0.0082

50kΩ

–V_S1

+V_S1

–V_S1

500pF

NE2H

–V_S1

Right Arm

Right Leg

+V_S1

1/2W

300kΩ

180kΩ

20kΩ

Gain = 1000

OPA121

29 PWS

726A

–V_S1

NE2H

20pF

–V_S1

20µH

0.3

NOTE: (1) All capacitor values in µF unless otherwise

noted. Diodes are IN4148. (2) NE2H: Neon bulb, max

striking voltage 95V_AC

+V_S2

FIGURE 9. Right-Leg Driven ECG Amplifier (with defibrillator protection and calibration).

ISO120/121

10kΩ

5kΩ

e₁

V =

e₁=12V

e₂=12V

9, 12

ISO

120

–V

Charge/Discharge Control

Control

Section

+V –V

e₄₉=12V

e₅₀=12V

5kΩ

25kΩ

ISO

120

10kΩ

9, 12

–V

10kΩ

INA105

25kΩ

e₅₀

V =

FIGURE 10. Battery Monitor for a 600V Battery Power System.

1mA

+V_S= 15V on PWS740

R_S

XTR101

150Ω

0.01µF

R_L

250Ω

RTD

(PT100)

250Ω

INA105

R₁

100Ω

V_OUT

ISO

120

R₂

2.5kΩ

2mA

Sync

Gnd

–V_S= –15V

NOTE: Some ISO120 connections left out for clarity.

on PWS740

FIGURE 11. Isolated 4-20mA Instrument Loop. (RTD shown).

ISO120/121

ISO

120

ISO

120

V_IN1

V_IN2

V_OUT1

V_OUT2

V–

V+

V–

V+

Ext Osc

–V_S1

–V_S2

+V_S1

+V_S2

0.3µF

20pF

Gnd1

Gnd2

20kΩ

PWS740-3

V+

PWS740-2

Up to 6

channels

PWS740-1

20µH

10µF

0.3µF

FIGURE 12. Synchronized-Multichannel Isolation System.

ISO120/121

PACKAGE OPTION ADDENDUM

www.ti.com

7-Oct-2021

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

ISO120BG

ISO120G

NRND

ACTIVE

CDIP SB

JVA

JVD

RoHS & Green

Call TI

N / A for Pkg Type

ISO120BG

ISO120G

ISO120SG

ISO121BG

ISO120SG

ISO121BG

Call TI

-55 to 125

ISO121G

ACTIVE

CDIP SB

JVD

RoHS & Green

Call TI

N / A for Pkg Type

ISO121G

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

7-Oct-2021

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jan-2022

TUBE

*All dimensions are nominal

Device

Package Name Package Type

Pins

SPQ

L (mm)

W (mm)

T (µm)

B (mm)

ISO120BG

ISO120G

ISO120SG

ISO121BG

ISO121G

JVA

JVD

CDIP SB

506.98

508

15.24

22.05

12290

13080

508

Pack Materials-Page 1

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ISO121 [TI]

相关型号：

ISO1211

ISO1211D

ISO1211DR

ISO1212

ISO1212DBQ

ISO1212DBQR

ISO121BG

ISO121BG

ISO121BG

ISO121BG-BI

ISO121G

ISO121G