ISO7640FC [TI]

Low Power Triple and Quad Channels Digital Isolators; 低功耗三核和四通道数字隔离器


型号：	ISO7640FC
厂家：	TEXAS INSTRUMENTS
描述：	Low Power Triple and Quad Channels Digital Isolators 低功耗三核和四通道数字隔离器
文件：	总31页 (文件大小：1454K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ISO7631FM, ISO7631FC

ISO7640FC, ISO7641FC

www.ti.com

SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

Low Power Triple and Quad Channels Digital Isolators

Check for Samples: ISO7631FM, ISO7631FC, ISO7640FC, ISO7641FC

FEATURES

APPLICATIONS

•

Signaling Rate: 150 Mbps (M-Grade), 25 Mbps

(C-Grade)

•

Optocoupler Replacement in:

–

Industrial Fieldbus

Robust Design with Integrated Noise Filter

(C-Grade)

–

Profibus

Modbus

DeviceNet^TMData Buses

Low Power Consumption, Typical I_CCper

Channel (3.3V Supplies):

–

Servo Control Interface

Motor Control

–

ISO7631FM: 2 mA at 10 Mbps

ISO7631FC: 1.5 mA at 10 Mbps

ISO7640FC: 1.1 mA at 10 Mbps

ISO7641FC: 1.3 mA at 10 Mbps

Power Supplies

Battery Packs

•

Extremely low I_{CC_disable}(C-Grade)

SAFETY AND REGULATORY

APPROVALS

Low Propagation Delay: 7 ns Typical (M-

Grade)

•

2500 V_RMSfor 1 Minute per UL 1577 (approved)

•

Output Defaults to Low-state in Fail-safe Mode

Wide Temperature Range: –40°C to 125°C

50 KV/µs Transient Immunity, Typical

Long Life with SiO₂Isolation barrier

4000 V_PKVDE Rating for DIN EN 60747-5-2

(VDE 0884 Rev. 2), 1414 V_PKWorking Voltage

(approved)

•

CSA Component Acceptance Notice

5A(approved)

Operates From 2.7V (M-Grade), 3.3 V and 5 V

Supply and Logic Levels

•

Wide Body SOIC-16 Package

DESCRIPTION

ISO7631F, ISO7640F and ISO7641F provide galvanic isolation up to 4 KV_PKper VDE. ISO7631F has 3 channels

with two forward and one reverse direction channels. ISO7640F and ISO7641F are quad channel isolators;

ISO7640F has four forward and ISO7641F has three forward and one reverse direction channels. Suffix F

indicates that output defaults to Low-state in fail-safe conditions (see Table 1). M-Grade devices are high speed

isolators capable of 150 Mbps data rate with fast propagation delays whereas C-Grade devices can run up to 25

Mbps data rate with low power consumption and integrated filters for noise-prone applications. C-Grade devices

are recommended for lower speed applications where input noise pulses of less than 6 ns duration need to be

suppressed or lower power consumption is critical.

ISO7640

ISO7641

ISO7631

V_CC1

V_CC2

V_CC1

V_CC2

V_CC1

V_CC2

GND2

OUTA

OUTB

OUTC

IND

GND2

OUTA

OUTB

INC

GND1

GND2

OUTA

OUTB

OUTC

OUTD

GND1

INA

GND1

INA

INB

INC

INB

INC

OUTC

OUTD

EN1

IND

EN1

EN2

GND1

GND2

GND1

GND2

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

ISO7631FM, ISO7631FC

ISO7640FC, ISO7641FC

SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

DESCRIPTION CONTINUED

Each isolation channel has a logic input and output buffer separated by a silicon dioxide (SiO₂) insulation barrier.

Used in conjunction with isolated power supplies, these devices prevent noise currents on a data bus or other

circuits from entering the local ground and interfering with or damaging sensitive circuitry. The devices have TTL

input thresholds and can operate from 2.7 V (M-Grade), 3.3 V and 5 V supplies. All inputs are 5 V tolerant when

supplied from 3.3 V or 2.7 V supplies.

PIN DESCRIPTIONS

I/O

DESCRIPTION

NAME ISO7640 ISO7641 ISO7631

INA

Input, channel A

Input, channel B

Input, channel C

Input, channel D

Output, channel A

Output, channel B

Output, channel C

Output, channel D

INB

INC

IND

OUTA

OUTB

OUTC

OUTD

Enables (when input is High or Open) or Disables (when input is Low) OUTA, OUTB,

OUTC and OUTD of ISO7640

Enables (when input is High or Open) or Disables (when input is Low) OUTD of

ISO7641 and OUTC of ISO7631

EN1

Enables (when input is High or Open) or Disables (when input is Low) OUTA, OUTB,

and OUTC of ISO7641

Enables (when input is High or Open) or Disables (when input is Low) OUTA and

OUTB of ISO7631

EN2

V_CC1

V_CC2

GND1

GND2

2,8

9,15

–

Power supply, V_CC1

Power supply, V_CC2

2,8

9,15

2,8

Ground connection for V_CC1

Ground connection for V_CC2

No Connect pins are floating with no internal connection

9,15

6,11

Table 1. FUNCTION TABLE⁽¹⁾

INPUT

V_CC

OUTPUT

V_CC

INPUT

(INx)

OUTPUT ENABLE

(ENx)

OUTPUT

(OUTx)

H or Open

Open

H or Open

Undetermined

(1) PU = Powered Up(V_CC≥ 2.7 V); PD = Powered Down (V_CC≤ 2.1 V); X = Irrelevant; H = High Level; L

= Low Level; Z = High Impedance

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ISO7631FM, ISO7631FC

ISO7640FC, ISO7641FC

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

AVAILABLE OPTIONS

RATED

ISOLATION

INPUT

THRESHOLD

DATA RATE

and FILTER

CHANNEL

DIRECTION

MARKED

ORDERING

NUMBER

PRODUCT

PACKAGE

ISO7631FMDW (rail)

ISO7631FMDWR (reel)

ISO7631FCDW (rail)

ISO7631FCDWR (reel)

ISO7640FCDW (rail)

ISO7640FCDWR (reel)

150 Mbps,

No Noise Filter

2 Forward,

1 Reverse

ISO7631FM

ISO7631FC

2 Forward,

1 Reverse

ISO7631FC

ISO7640FC⁽¹⁾

ISO7641FC

1.5 V TTL

(CMOS

Compatible)

25 Mbps,

Integrated Noise

Filter

4 Forward,

0 Reverse

4 KV_PK

2.5 KV_RMS

DW-16

ISO7640FC

ISO7641FC

(2)

ISO7641FCDW (rail)

3 Forward,

1 Reverse

ISO7641FCDWR (reel)

(1) Product Preview

(2) See the Regulatory Information table for detailed isolation ratings.

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ISO7631FM, ISO7631FC

ISO7640FC, ISO7641FC

SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

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UNIT

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

VALUE

MIN MAX

PARAMETER

Supply voltage⁽²⁾

Voltage

V_CC1, V_CC2

–0.5

INx, OUTx, ENx

Output Current, I_O

±15

±4

Human Body Model

ESDA, JEDEC JS-001-2012

JEDEC JESD22-C101E

JEDEC JESD22-A115-A

Field-Induced Charged Device

Model

Electrostatic discharge

All pins

±1.5

Machine Model

±200

150

Maximum junction temperature, T_J

Storage temperature, T_STG

°C

-65

150

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GND1 or GND2) and are peak

voltage values.

RECOMMENDED OPERATING CONDITIONS

PARAMETER

MIN

2.7

TYP

MAX

5.5

UNIT

M-Grade

C-Grade

Supply voltage

V_CC1, V_CC2

5.5

High-level output current

Low-level output current

High-level input voltage

Low-level input voltage

I_OH

I_OL

V_IH

V_IL

-4

V_CC

0.8

M-Grade: ≥3V-Operation

M-Grade: <3V-Operation

C-Grade: ≥3V-Operation

M-Grade: ≥3V-Operation

M-Grade: <3V-Operation

C-Grade: ≥3V-Operation

6.67

Input pulse duration

Signaling rate

t_ui

150

100

1 / t_ui

Mbps

Junction temperature

Ambient temperature

T_J

-40

136

125

°C

T_A

THERMAL INFORMATION

ISO76xx

THERMAL METRIC⁽¹⁾

UNITS

DW (16 Pins)

θ_JA

Junction-to-ambient thermal resistance

Junction-to-case(top) thermal resistance

θ_JC(top)

θ_JB

Junction-to-board thermal resistance

°C/W

ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case(bottom) thermal resistance

9.4

n/a

ψ_JB

θ_JC(bottom)

V_CC1= V_CC2= 5.5V, T_J= 150°C, C_L= 15pF

P_D

Maximum Device Power Dissipation

399

Input a 75 MHz 50% duty cycle square wave

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

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ISO7640FC, ISO7641FC

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

ELECTRICAL CHARACTERISTICS

V_CC1and V_CC2at 5 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F, ISO7640F, ISO7641F

M-Grade

C-Grade

PARAMETER

TEST CONDITIONS

I_OH= –4 mA; see Figure 1

MIN

V_CCx⁽¹⁾– 0.8

V_CCx⁽¹⁾– 0.1

TYP MAX

MIN

V_CCx⁽¹⁾– 0.8

V_CCx⁽¹⁾– 0.1

TYP

MAX UNIT

4.8

4.7

V_OH

High-level output voltage

Low-level output voltage

I_OH= –20 μA; see Figure 1

I_OL= 4 mA; see Figure 1

I_OL= 20 μA; see Figure 1

0.2

0.4

0.1

0.3

0.5

0.1

V_OL

V_I(HYS)Input threshold voltage

hysteresis

450

I_IH

I_IL

High-level input current

Low-level input current

V_IH= V_CCat INx or ENx

V_IL= 0 V at INx or ENx

μA

-10

Common-mode transient

immunity

CMTI

V_I= V_CCor 0 V; see Figure 4

kV/μs

(1) V_CCxis the supply voltage, V_CC1or V_CC2, for the output channel that is being measured.

SWITCHING CHARACTERISTICS

V_CC1and V_CC2at 5 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F, ISO7640F, ISO7641F

M-Grade

C-Grade

TYP

PARAMETER

TEST CONDITIONS

See Figure 1

MIN

TYP MAX

MIN

MAX UNIT

t_PLH, t_PHL

PWD⁽¹⁾

Propagation delay time

3.5

10.5

Pulse width distortion |t_PHL– t_PLH

Same-direction Channels

(2)

t_sk(o)

Channel-to-channel output skew time

Opposite-direction Channels

(3)

t_sk(pp)

Part-to-part skew time

Output signal rise time

Output signal fall time

4.5

t_r

t_f

1.6

2.8

2.9

See Figure 1

Disable Propagation Delay, high-to-high

impedance output

t_PHZ

t_PLZ

t_PZH

t_PZL

t_fs

Disable Propagation Delay, low-to-high

impedance output

See Figure 2

See Figure 3

Enable Propagation Delay, high

impedance-to-high output

11000 22000⁽⁴⁾

Enable Propagation Delay, high

impedance-to-low output

Fail-safe output delay time from input

data or power loss

9.5

μs

(1) Also known as Pulse Skew.

(2) t_sk(o)is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3) t_sk(pp)is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

(4) The enable signal rate for C-grade devices should be ≤ 45 Kbps.

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ISO7640FC, ISO7641FC

SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

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SUPPLY CURRENT

V_CC1and V_CC2at 5 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F

PARAMETER

I_CC1

M-Grade

MIN TYP MAX

C-Grade

MIN TYP MAX UNIT

TEST CONDITIONS

EN1 = EN2 = 0 V

2.5

3.7

2.6

3.8

3.3

4.9

4.5

6.8

5.4

4.1

5.5

4.5

6.6

1.1

1.5

1.8

2.6

2.7

3.9

4.1

5.9

1.9

2.6

2.7

3.9

3.7

5.3

5.4

7.8

Disable

I_CC2

I_CC1

DC to 1 Mbps

10 Mbps

I_CC2

I_CC1

DC Signal: V_I= V_CCor 0 V

AC Signal: All channels switching with square

wave clock input; C_L= 15 pF

I_CC2

I_CC1

25 Mbps

I_CC2

I_CC1

19.5

150 Mbps

Not Applicable

I_CC2

ISO7640F

I_CC1

C-Grade

0.6

1.2

2.6

1.3

4.6

Disable

EN = 0 V

I_CC2

1.3

I_CC1

0.7

DC to 1 Mbps

10 Mbps

I_CC2

DC Signal: V_I= V_CCor 0 V,

AC Signal: All channels switching with square

wave clock input; C_L= 15 pF

I_CC1

1.3

I_CC2

5.2

I_CC1

2.5

3.6

25 Mbps

I_CC2

8.5

ISO7641F

I_CC1

C-Grade

1.2

2.1

2.6

2.8

4.2

Disable

EN1 = EN2 = 0 V

I_CC2

1.6

I_CC1

1.8

DC to 1 Mbps

10 Mbps

I_CC2

3.1

DC Signal: V_I= V_CCor 0 V,

AC Signal: All channels switching with square

wave clock input; C_L= 15 pF

I_CC1

I_CC2

4.9

6.1

I_CC1

4.8

25 Mbps

I_CC2

7.7

9.5

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ISO7631FM, ISO7631FC

ISO7640FC, ISO7641FC

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

ELECTRICAL CHARACTERISTICS

V_CC1at 5 V ± 10% and V_CC2at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F, ISO7640F, ISO7641F

M-Grade

C-Grade

PARAMETER

TEST CONDITIONS

MIN

TYP

4.8

MAX

MIN

TYP

4.7

2.9

MAX UNIT

I_OH= –4 mA; see OUTx on V_CC1(5V) side

V_CC1– 0.8

V_CC2- 0.4

V_CC1– 0.1

V_CC2– 0.1

V_CC1– 0.8

V_CC2- 0.6

V_CC1– 0.1

V_CC2– 0.1

Figure 1

OUTx on V_CC2(3.3V) side

High-level output

voltage

V_OH

I_OH= –20 μA;

see Figure 1

OUTx on V_CC1(5V) side

OUTx on V_CC2(3.3V) side

3.3

0.2

3.3

0.3

I_OL= 4 mA; see Figure 1

0.4

0.1

0.5

0.1

Low-level output

voltage

V_OL

I_OL= 20 μA; see Figure 1

V_I(HYS)

Input threshold voltage

hysteresis

430

I_IH

I_IL

High-level input current V_IH= V_CCat INx or ENx

Low-level input current V_IL= 0 V at INx or ENx

μA

-10

Common-mode

CMTI

V_I= V_CCor 0 V; see Figure 4

transient immunity

kV/μs

SWITCHING CHARACTERISTICS

V_CC1at 5 V ± 10% and V_CC2at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F, ISO7640F, ISO7641F

M-Grade

C-Grade

PARAMETER

TEST CONDITIONS

See Figure 1

MIN

TYP MAX

MIN

TYP

MAX UNIT

t_PLH, t_PHL

PWD⁽¹⁾

Propagation delay time

Pulse width distortion |t_PHL– t_PLH

3.5

Same-direction Channels

2.5

3.5

4.5

5.5

(2)

t_sk(o)

Channel-to-channel output skew time

Opposite-direction Channels

(3)

t_sk(pp)

Part-to-part skew time

Output signal rise time

Output signal fall time

t_r

t_f

3.6

3.3

See Figure 1

1.2

Disable Propagation Delay, high-to-

high impedance output

t_PHZ

t_PLZ

t_PZH

t_PZL

t_fs

6.5

5.5

9.5

Disable Propagation Delay, low-to-

high impedance output

See Figure 2

See Figure 3

Enable Propagation Delay, high

impedance-to-high output

11000

22000⁽⁴⁾

Enable Propagation Delay, high

impedance-to-low output

Fail-safe output delay time from input

data or power loss

8.5

μs

(1) Also known as Pulse Skew.

(2) t_sk(o)is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3) t_sk(pp)is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

(4) The enable signal rate for C-grade devices should be ≤ 45 Kbps.

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ISO7631FM, ISO7631FC

ISO7640FC, ISO7641FC

SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

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SUPPLY CURRENT

V_CC1at 5 V ± 10% and V_CC2at 3.3V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F

M-Grade

TYP

2.5

C-Grade

TYP

1.1

PARAMETER

TEST CONDITIONS

EN1 = EN2 = 0 V

MIN

MAX

MIN

MAX

UNIT

I_CC1

1.9

1.3

2.7

2.6

3.7

3.5

5.4

Disable

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

2.7

3.7

4.1

3.8

4.5

4.6

0.7

2.6

1.8

DC to 1 Mbps

10 Mbps

2.8

1.8

3.3

2.7

DC Signal: V_I= V_CCor 0 V

AC Signal: All channels switching with square wave

clock input; C_L= 15 pF

3.5

2.6

4.5

4.1

25 Mbps

4.7

5.9

19.5

3.8

150 Mbps

Not Applicable

14.6

ISO7640F

C-Grade

0.6

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

1.2

1.1

1.3

3.2

Disable

EN = 0 V

0.6

0.7

DC to 1 Mbps

10 Mbps

2.1

DC Signal: V_I= V_CCor 0 V,

AC Signal: All channels switching with square wave

clock input; C_L= 15 pF

1.3

3.6

4.7

3.6

2.5

25 Mbps

5.7

ISO7641F

C-Grade

1.2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

2.1

1.3

2.8

2.9

Disable

EN1 = EN2 = 0 V

0.8

1.8

DC to 1 Mbps

10 Mbps

DC Signal: V_I= V_CCor 0 V,

AC Signal: All channels switching with square wave

clock input; C_L= 15 pF

3.2

4.1

4.8

25 Mbps

5.1

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

ELECTRICAL CHARACTERISTICS

V_CC1at 3.3V ± 10% and V_CC2at 5V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F, ISO7640F, ISO7641F

M-Grade

C-Grade

PARAMETER

TEST CONDITIONS

OUTx on V_CC1(3.3 V) side

MIN TYP MAX

MIN TYP MAX UNIT

I_OH= –4 mA; see

Figure 1

V_CC1–0.4

V_CC2–0.8

V_CC1–0.1

V_CC2–0.1

4.8

3.3

V_CC1-0.6

V_CC2–0.8

V_CC1–0.1

V_CC2–0.1

2.9

4.7

3.3

OUTx on V_CC2(5 V) side

OUTx on V_CC1(3.3 V) side

OUTx on V_CC2(5 V) side

V_OH

High-level output voltage

Low-level output voltage

I_OH= –20 μA; see

Figure 1

I_OL= 4 mA; see Figure 1

0.2

0.4

0.1

0.3

0.5

0.1

V_OL

I_OL= 20 μA; see Figure 1

V_I(HYS)

Input threshold voltage

hysteresis

430

I_IH

I_IL

High-level input current

Low-level input current

V_IH= V_CCat INx or ENx

V_IL= 0 V at INx or ENx

μA

-10

Common-mode transient

immunity

CMTI

V_I= V_CCor 0 V; see Figure 4

kV/μs

SWITCHING CHARACTERISTICS

V_CC1at 3.3 V ± 10% and V_CC2at 5 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F, ISO7640F, ISO7641F

M-Grade

C-Grade

PARAMETER

TEST CONDITIONS

See Figure 1

MIN

TYP MAX

MIN

TYP

MAX UNIT

t_PLH, t_PHL

PWD⁽¹⁾

Propagation delay time

7.5

12.5

18.5

Pulse width distortion |t_PHL– t_PLH

2.5

Same-direction Channels

2.5

3.5

4.5

5.5

(2)

t_sk(o)

Channel-to-channel output skew time

Opposite-direction Channels

(3)

t_sk(pp)

Part-to-part skew time

Output signal rise time

Output signal fall time

t_r

t_f

1.7

1.1

2.9

See Figure 1

Disable Propagation Delay, high-to-high

impedance output

t_PHZ

t_PLZ

t_PZH

t_PZL

t_fs

5.5

4.5

9.5

Disable Propagation Delay, low-to-high

impedance output

See Figure 2

See Figure 3

Enable Propagation Delay, high

impedance-to-high output

11000 22000⁽⁴⁾

Enable Propagation Delay, high

impedance-to-low output

Fail-safe output delay time from input data

or power loss

7.5

μs

(1) Also known as Pulse Skew.

(2) t_sk(o)is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3) t_sk(pp)is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

(4) The enable signal rate for C-grade devices should be ≤ 45 Kbps.

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SUPPLY CURRENT

V_CC1at 3.3V ± 10% and V_CC2at 5V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F

M-Grade

C-Grade

PARAMETER

TEST CONDITIONS

EN1 = EN2 = 0 V

MIN TYP MAX

MIN TYP MAX UNIT

I_CC1

1.8

3.7

1.9

3.8

2.4

4.9

3.2

6.8

9.3

2.8

5.4

2.9

5.5

3.4

6.6

4.2

0.6

1.5

1.2

2.6

1.8

3.9

2.7

5.9

1.1

2.6

1.8

3.9

2.6

5.3

3.6

7.8

Disable

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

DC to 1 Mbps

10 Mbps

DC Signal: V_I= V_CCor 0 V

AC Signal: All channels switching with square wave clock

input; C_L= 15 pF

25 Mbps

12.5

150 Mbps

Not Applicable

ISO7640F

C-Grade

0.35

1.3

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

0.7

2.6

0.8

4.6

1.2

Disable

EN = 0 V

0.4

DC to 1 Mbps

10 Mbps

DC Signal: V_I= V_CCor 0 V,

AC Signal: All channels switching with square wave clock

input; C_L= 15 pF

0.7

5.2

1.5

2.2

25 Mbps

8.5

ISO7641F

C-Grade

0.7

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

1.1

2.6

1.9

4.2

2.8

6.1

Disable

EN1 = EN2 = 0 V

1.6

1.2

DC to 1 Mbps

10 Mbps

3.1

DC Signal: V_I= V_CCor 0 V,

AC Signal: All channels switching with square wave clock

input; C_L= 15 pF

4.9

3.1

25 Mbps

7.7

9.5

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

ELECTRICAL CHARACTERISTICS

V_CC1and V_CC2at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F, ISO7640F, ISO7641F

M-Grade

C-Grade

PARAMETER

TEST CONDITIONS

I_OH= –4 mA; see Figure 1

MIN

V_CCx⁽¹⁾– 0.4

V_CCx⁽¹⁾– 0.1

TYP MAX

MIN

V_CCx⁽¹⁾– 0.6

V_CCx⁽¹⁾– 0.1

TYP MAX UNIT

3.3

0.2

2.9

3.3

0.3

High-level output

voltage

V_OH

I_OH= –20 μA; see Figure 1

I_OL= 4 mA; see Figure 1

I_OL= 20 μA; see Figure 1

0.4

0.1

0.5

0.1

V_OL

Low-level output voltage

V_I(HYS)Input threshold voltage

hysteresis

425

I_IH

I_IL

High-level input current

Low-level input current

V_IH= V_CCat INx or ENx

V_IL= 0 V at INx or ENx

μA

-10

Common-mode transient

immunity

CMTI

V_I= V_CCor 0 V; see Figure 4

kV/μs

(1) V_CCxis the supply voltage, V_CC1or V_CC2, for the output channel that is being measured.

SWITCHING CHARACTERISTICS

V_CC1and V_CC2at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F, ISO7640F, ISO7641F

M-Grade

C-Grade

PARAMETER

TEST CONDITIONS

See Figure 1

MIN

TYP MAX

MIN

TYP

MAX UNIT

t_PLH, t_PHL

PWD⁽¹⁾

Propagation delay time

8.5

Pulse width distortion |t_PHL– t_PLH

Same-direction Channels

(2)

t_sk(o)

Channel-to-channel output skew time

Opposite-direction Channels

(3)

t_sk(pp)

Part-to-part skew time

Output signal rise time

Output signal fall time

6.5

t_r

t_f

3.7

3.4

See Figure 1

1.3

Disable Propagation Delay, high-to-high

impedance output

t_PHZ

t_PLZ

t_PZH

t_PZL

t_fs

6.5

5.5

9.2

Disable Propagation Delay, low-to-high

impedance output

See Figure 2

See Figure 3

Enable Propagation Delay, high

impedance-to-high output

11000 22000⁽⁴⁾

Enable Propagation Delay, high

impedance-to-low output

Fail-safe output delay time from input

data or power loss

7.5

μs

(1) Also known as Pulse Skew.

(2) t_sk(o)is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3) t_sk(pp)is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

(4) The enable signal rate for C-grade devices should be ≤ 45 Kbps.

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SUPPLY CURRENT

V_CC1and V_CC2at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

ISO7631F

M-Grade

TYP

1.8

C-Grade

MIN TYP MAX UNIT

PARAMETER

TEST CONDITIONS

EN1 = EN2 = 0 V

MIN

MAX

2.8

3.7

2.9

3.8

3.4

4.6

4.2

5.9

12.5

I_CC1

0.6

0.7

1.2

1.8

2.6

2.7

3.8

1.1

1.3

1.8

2.6

3.5

3.6

Disable

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

2.7

1.9

DC to 1 Mbps

10 Mbps

2.8

2.4

DC Signal: V_I= V_CCor 0 V

AC Signal: All channels switching with square wave clock

input; C_L= 15 pF

3.5

3.2

25 Mbps

4.7

9.3

150 Mbps

Not Applicable

14.6

ISO7640F

C-Grade

0.35

0.6

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

0.7

1.1

0.8

3.2

1.2

4.7

2.2

Disable

EN = 0 V

0.4

DC to 1 Mbps

10 Mbps

2.1

DC Signal: V_I= V_CCor 0 V,

AC Signal: All channels switching with square wave clock

input; C_L= 15 pF

0.7

3.6

1.5

25 Mbps

5.7

ISO7641F

C-Grade

0.7

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

1.1

1.3

1.9

2.9

2.8

4.1

Disable

EN1 = EN2 = 0 V

0.8

1.2

DC to 1 Mbps

10 Mbps

DC Signal: V_I= V_CCor 0 V,

AC Signal: All channels switching with square wave clock input; C_L= 15 pF

3.2

3.1

25 Mbps

5.1

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

ELECTRICAL CHARACTERISTICS

V_CC1and V_CC2at 2.7 V⁽¹⁾(over recommended operating conditions unless otherwise noted)

ISO7631F

M-Grade

PARAMETER

TEST CONDITIONS

I_OH= –4 mA; see Figure 1

MIN

V_CC⁽²⁾– 0.5

V_CC⁽²⁾– 0.1

TYP MAX

UNIT

2.4

2.7

0.2

V_OH

High-level output voltage

I_OH= –20 μA; see Figure 1

I_OL= 4 mA; see Figure 1

I_OL= 20 μA; see Figure 1

0.4

0.1

V_OL

Low-level output voltage

V_I(HYS)

I_IH

Input threshold voltage hysteresis

High-level input current

350

V_IH= V_CCat INx or ENx

V_IL= 0 V at INx or ENx

V_I= V_CCor 0 V; see Figure 4

μA

I_IL

Low-level input current

-10

CMTI

Common-mode transient immunity

kV/μs

(1) Only M-Grade devices are recommended for operation down to 2.7 V supplies. For 2.7 V-operation, max data rate is 100 Mbps.

(2) V_CCxis the supply voltage, V_CC1or V_CC2, for the output channel that is being measured.

SWITCHING CHARACTERISTICS

V_CC1and V_CC2at 2.7 V (over recommended operating conditions unless otherwise noted)

ISO7631F

M-Grade

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

2.5

UNIT

t_PLH, t_PHL

PWD⁽¹⁾

Propagation delay time

Pulse width distortion |t_PHL– t_PLH

See Figure 1

Same-direction Channels

(2)

t_sk(o)

Channel-to-channel output skew time

Opposite-direction Channels

(3)

t_sk(pp)

Part-to-part skew time

Output signal rise time

Output signal fall time

t_r

t_f

2.3

1.8

See Figure 1

Disable Propagation Delay, high-to-high

impedance output

t_PHZ

t_PLZ

t_PZH

t_PZL

t_fs

Disable Propagation Delay, low-to-high

impedance output

See Figure 2

See Figure 3

Enable Propagation Delay, high impedance-to-

high output

Enable Propagation Delay, high impedance-to-

low output

Fail-safe output delay time from input data or

power loss

8.5

μs

(1) Also known as Pulse Skew.

(2) t_sk(o)is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3) t_sk(pp)is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

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SUPPLY CURRENT

V_CC1and V_CC2at 2.7 V (over recommended operating conditions unless otherwise noted)

ISO7631F

M-Grade

MIN TYP MAX UNIT

PARAMETER

TEST CONDITIONS

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

I_CC1

I_CC2

1.5

2.2

1.6

2.3

2.4

3.2

2.5

3.2

2.9

3.9

3.7

4.9

6.8

Disable

EN1 = EN2 = 0 V

DC to 1 Mbps

10 Mbps

DC Signal: V_I= V_CCor 0 V

AC Signal: All channels switching with square wave clock input; C_L

15 pF

2.7

3.9

5.7

8.6

25 Mbps

100 Mbps

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

PARAMETER MEASUREMENT INFORMATION

CC1

OUT

0 V

PHL

Input

PLH

Generator

NOTE A

50 W

90%

10%

50%

NOTE

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t_r≤ 3

ns, t_f≤ 3ns, Z_O= 50 Ω. At the input, 50 Ω resistor is required to terminate Input Generator signal. It is not needed in

actual application.

B. C_L= 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 1. Switching Characteristics Test Circuit and Voltage Waveforms

R = 1 kW

±1%

0 V

OUT

PLZ

PZL

0.5 V

50%

NOTE

Input

Generator

NOTE A

50 W

OUT

0 V

PZH

R = 1 kW

±1%

NOTE

50%

Input

Generator

NOTE A

0.5 V

50 W

0 V

PHZ

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 10 kHz, 50% duty cycle,

t_r≤ 3 ns, t_f≤ 3 ns, Z_O= 50 Ω.

B. C_L= 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 2. Enable/Disable Propagation Delay Time Test Circuit and Waveform

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PARAMETER MEASUREMENT INFORMATION (continued)

2.7 V

0 V

OUT

IN = V

50%

fs low

NOTE A

A. C_L= 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 3. Failsafe Delay Time Test Circuit and Voltage Waveforms

CC1

CC2

C = 0.1 mF 1ꢀ

Pass/Fail Criterion –

the output must

remain stable.

OUT

NOTE A

or V

GND1

GND2

TEST

A. C_L= 15 pF and includes instrumentation and fixture capacitance within ±20%.

Figure 4. Common-Mode Transient Immunity Test Circuit

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

DEVICE INFORMATION

IEC INSULATION AND SAFETY-RELATED SPECIFICATIONS FOR DW-16 PACKAGE

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

L(I01)

Minimum air gap (Clearance)

Shortest terminal to terminal distance through air

8.3

Minimum external tracking

(Creepage)

Shortest terminal to terminal distance across the

package surface

L(I02)⁽¹⁾

8.1

≥400

0.014

Tracking resistance (Comparative

Tracking Index)

CTI

DIN IEC 60112 / VDE 0303 Part 1

Distance through the insulation

Minimum Internal Gap (Internal

Clearance)

V_IO= 500 V, T_A< 100°C

>10¹²

>10¹¹

Isolation resistance, Input to

Output

(2)

R_IO

V_IO= 500 V, 100°C ≤ T_A≤ max

V_I= 0.4 sin (2πft), f = 1MHz

Barrier capacitance, Input to

Output

(2)

C_IO

C_I⁽³⁾

Input capacitance

V_I= V_CC/2 + 0.4 sin (2πft), f = 1MHz, V_CC= 5 V

(1) Per JEDEC package dimensions.

(2) All pins on each side of the barrier tied together creating a two-terminal device.

(3) Measured from input pin to ground.

spacer

NOTE

Creepage and clearance requirements should be applied according to the specific

equipment isolation standards of an application. Care should be taken to maintain the

creepage and clearance distance of a board design to ensure that the mounting pads of

the isolator on the printed circuit board do not reduce this distance.

Creepage and clearance on a printed circuit board become equal according to the

measurement techniques shown in the Isolation Glossary. Techniques such as inserting

grooves and/or ribs on a printed circuit board are used to help increase these

specifications.

Table 2. DIN EN 60747-5-2 (VDE 0884 TEIL 2) INSULATION CHARACTERISTICS⁽¹⁾

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

SPECIFICATION

UNIT

V_IORM

Maximum working insulation voltage

1414

V_PEAK

After Input/Output safety test subgroup 2/3,

V_PR= V_IORMx 1.2, t = 10 s,

Partial discharge < 5 pC

1697

2262

2652

4000

Method a, After environmental tests subgroup 1,

V_PR= V_IORMx 1.6, t = 10 s,

Partial Discharge < 5 pC

V_PR

Input-to-output test voltage

V_PEAK

Method b1, 100% Production test

V_PR= V_IORMx 1.875, t = 1 s

Partial discharge < 5 pC

V_TEST= V_IOTM

t = 60 sec (Qualification)

t = 1 sec (100% Production)

V_IOTM

R_S

Maximum transient overvoltage

V_PEAK

Insulation resistance

Pollution degree

V_IO= 500 V at T_S

>10⁹

Ω

(1) Climatic Classification 40/125/21

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Table 3. IEC 60664-1 RATINGS TABLE

PARAMETER

Basic Isolation Group

TEST CONDITIONS

SPECIFICATION

Material Group

Rated mains voltage ≤ 300 V_RMS

Rated mains voltage ≤ 600 V_RMS

Rated mains voltage ≤ 1000 V_RMS

I–IV

I–III

I–II

Installation classification

REGULATORY INFORMATION

VDE

CSA

Certified according to DIN EN 60747-5-2 Approved under CSA Component

Acceptance Notice #5A

Recognized under 1577 Component Recognition

Program

Basic Insulation

Maximum Transient Overvoltage, 4000

V_PK

(1)

4000 V_PKInsulation

Single Protection, 2500 V_RMS

Maximum Working Voltage, 1414 V_PK

File Number: 40016131

File Number: 220991

File Number: E181974

(1) Production tested ≥ 3000 V_RMSfor 1 second in accordance with UL 1577.

IEC SAFETY LIMITING VALUES

Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.

A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate

sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system

failures.

PARAMETER

TEST CONDITIONS

MIN TYP MAX UNIT

θ_JA= 72 °C/W, V_I= 5.5V, T_J= 150°C, T_A= 25°C

θ_JA= 72 °C/W, V_I= 3.6V, T_J= 150°C, T_A= 25°C

θ_JA= 72 °C/W, V_I= 2.7V, T_J= 150°C, T_A= 25°C

316

Safety input, output, or supply

current

I_S

DW-16

482

643

150

°C

T_SMaximum case temperature

The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum

ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the

application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the

Thermal Information table is that of a device installed on a High-K Test Board for Leaded Surface Mount

Packages. The power is the recommended maximum input voltage times the current. The junction temperature is

then the ambient temperature plus the power times the junction-to-air thermal resistance.

700

600

V_CC1= V_CC2= 2.7V

500

V_CC1= V_CC2= 3.6V

400

300

V_CC1= V_CC2= 5.5V

200

100

150

200

Case Temperature - ^oC

Figure 5. DW-16 θ_JCThermal Derating Curve per IEC 60747-5-2

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

APPLICATION INFORMATION

2 mm

CC1

max. from

CC2

CC1

ISO7640

0.1 mF

GND1

GND2

OUTA

OUTB

OUTC

OUTD

INA

INB

INC

IND

GND 2

GND1

2 mm

CC1

max. from

CC2

CC1

ISO7641

0.1 mF

GND1

GND2

OUTA

OUTB

OUTC

IND

INA

INB

INC

OUTD

EN2

EN1

GND 2

GND1

2 mm

CC1

max. from

CC2

CC1

ISO7631

0.1 mF

GND1

GND2

OUTA

OUTB

INC

INA

INB

OUTD

EN2

EN1

GND 2

GND1

Figure 6. Typical ISO7640, ISO7641 and ISO7631 Application Circuit

Note: For detailed layout recommendations, see Application Note SLLA284, Digital Isolator Design Guide.

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TYPICAL SUPPLY CURRENT EQUATIONS

(Calculated based on room temperature and typical Silicon process)

ISO7631FM:

At V_CC1= V_CC2= 3.3V

I_CC1= 1.8072 + 0.0244 x f + 0.0016 x f x C_L

I_CC2= 2.4625 + 0.0252 x f + 0.0033 x f x C_L

At V_CC1= V_CC2= 5V

I_CC1= 2.3183 + 0.04 x f + 0.0025 x f x C_L

I_CC2= 3.2582 + 0.0403 x f + 0.0049 x f x C_L

ISO7631FC:

At V_CC1= V_CC2= 3.3V

I_CC1= 1.1762 + 0.0325 x f + 0.0017 x f x C_L

I_CC2= 1.5285 + 0.0299 x f + 0.0033 x f x C_L

At V_CC1= V_CC2= 5V

I_CC1= 1.6001 + 0.0528 x f + 0.0025 x f x C_L

I_CC2= 2.2032 + 0.0475 x f + 0.005 x f x C_L

ISO7640FC:

At V_CC1= V_CC2= 3.3V

I_CC1= 0.3209 + 0.0488 x f

I_CC2= 1.9699 + 0.0385 x f + 0.0066 x f x C_L

At VCC1 = VCC2 = 5V

I_CC1= 0.5038 + 0.0812 x f

I_CC2= 2.6117 + 0.0603 x f + 0.0101 x f x C_L

ISO7641FC:

At V_CC1= V_CC2= 3.3V

I_CC1= 1.2162 + 0.0462 x f + 0.0017 x f x C_L

I_CC2= 1.8054 + 0.0411 x f + 0.005 x f x C_L

At V_CC1= V_CC2= 5V

I_CC1= 1.6583 + 0.0757 x f + 0.0025 x f x C_L

I_CC2= 2.5008 + 0.0655 x f + 0.0076 x f x C_L

I_CC1and I_CC2are typical supply currents measured in mA; f is data rate measured in Mbps; C_Lis the capacitive

load on each channel measured in pF.

Enable

Input

Output

1 MW

8 W

500 W

OUT

13 W

1 MW

Figure 7. Device I/O Schematics

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

TYPICAL CHARACTERISTICS

I_CC1at 3.3 V

I_CC1at 5 V

I_CC2at 3.3 V

I_CC2at 5 V

I_CC1at 3.3 V

I_CC1at 5 V

I_CC2at 3.3 V

I_CC2at 5 V

T_A= 25°C

C_L= 15 pF

T_A= 25°C

C_L= 15 pF

100

120

140

160

100

120

140

160

Data Rate (Mbps)

G200

G201

Figure 8. ISO7631FM Supply Current Per Channel

vs Data Rate

Figure 9. ISO7631FM Supply Current For All Channels

vs Data Rate

2.5

I_CC1at 3.3 V

I_CC1at 5 V

I_CC2at 3.3 V

I_CC2at 5 V

I_CC1at 3.3 V

I_CC1at 5 V

I_CC2at 3.3 V

I_CC2at 5 V

1.5

0.5

T_A= 25°C

C_L= 15 pF

T_A= 25°C

C_L= 15 pF

Data Rate (Mbps)

G202

G203

Figure 10. ISO7631FC Supply Current Per Channel

vs Data Rate

Figure 11. ISO7631FC Supply Current For All Channels

vs Data Rate

2.5

I_CC1at 3.3 V

I_CC1at 5 V

I_CC2at 3.3 V

I_CC2at 5 V

I_CC1at 3.3 V

I_CC1at 5 V

I_CC2at 3.3 V

I_CC2at 5 V

1.5

T_A= 25°C

C_L= 15 pF

T_A= 25°C

C_L= 15 pF

0.5

Data Rate (Mbps)

G100

G101

Figure 12. ISO7640FC Supply Current Per Channel

vs Data Rate

Figure 13. ISO7640FC Supply Current For All Channels

vs Data Rate

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ISO7631FM, ISO7631FC

ISO7640FC, ISO7641FC

SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

www.ti.com

TYPICAL CHARACTERISTICS (continued)

2.5

I_CC1at 3.3 V

I_CC1at 5 V

I_CC2at 3.3 V

I_CC2at 5 V

T_A= 25°C

C_L= 15 pF

I_CC1at 3.3 V

I_CC1at 5 V

I_CC2at 3.3 V

I_CC2at 5 V

1.5

0.5

T_A= 25°C

C_L= 15 pF

Data Rate (Mbps)

G102

G103

Figure 14. ISO7641FC Supply Current Per Channel

vs Data Rate

Figure 15. ISO7641FC Supply Current For All Channels

vs Data Rate

V_CC= 5 V

V_CC= 3.3 V

T_A= 25°C

V_CC= 3.3 V

V_CC= 5 V

T_A= 25°C

−70

−60

−50

−40

−30

−20

−10

High−Level Output Current (mA)

Low−Level Output Current (mA)

G005

G006

Figure 16. M-Grade High-Level Output Voltage

vs High-Level Output Current

Figure 17. M-Grade Low-Level Output Voltage

vs Low-Level Output Current

V_CC= 3.3 V

V_CC= 5 V

T_A= 25°C

V_CC= 3.3 V

V_CC= 5 V

T_A= 25°C

−30

−25

−20

−15

−10

−5

High−Level Output Current (mA)

Low−Level Output Current (mA)

G104

G105

Figure 18. C-Grade High-Level Output Voltage

vs High-Level Output Current

Figure 19. C-Grade Low-Level Output Voltage

vs Low-Level Output Current

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ISO7640FC, ISO7641FC

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SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

TYPICAL CHARACTERISTICS (continued)

2.52

t_PLHat 3.3 V

t_PHLat 3.3 V

t_PHLat 5 V

t_PLHat 5 V

2.5

2.48

2.46

2.44

2.42

2.4

V_CCRising

V_CCFalling

2.38

2.36

C_L= 15 pF

110 135 150

−40

−20

100

120

−15

Free−Air Temperature (°C)

G007

G008

Figure 20. V_CCUndervoltage Threshold

vs Free Air Temperature

Figure 21. M-Grade Propagation Delay Time

vs Free Air Temperature

t_PLHat 3.3 V

t_PHLat 3.3 V

t_PLHat 5 V

t_PHLat 5 V

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

T_A= 25°C

C_L= 15 pF

All Channels Switching

V_CC= 5 V

V_CC= 3.3 V

C_L= 15 pF

100 120 140

Typ Jitter on output pin shown

−40 −20

80 100 120 140 160 180

Data Rate (Mbps)

Free−Air Temperature (°C)

G106

G009

Figure 22. C-Grade Propagation Delay Time

vs Free Air Temperature

Figure 23. M-Grade Output Jitter vs Data Rate

1.4

1.2

0.8

0.6

0.4

T_A= 25°C

C_L= 15 pF

0.2

V_CC= 3.3 V

V_CC= 5 V

All Channels Switching

Typ Jitter on output pin shown

Data Rate (Mbps)

G107

Figure 24. C-Grade Output Jitter vs Data Rate

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ISO7640FC, ISO7641FC

SLLSEC3A –SEPTEMBER 2012–REVISED SEPTEMBER 2012

www.ti.com

TYPICAL CHARACTERISTICS (continued)

T_A= 25^oC, C_L= 15 pF

V_CC1= V_CC2= 5 V

Pattern: NRZ 2¹⁶-1

T_A= 25^oC, C_L= 15 pF

V_CC1= V_CC2= 3.3 V

Pattern: NRZ 2¹⁶-1

Figure 25. M-Grade Typical Eye Diagram at 150 Mbps,

Figure 26. M-Grade Typical Eye Diagram at 150 Mbps,

5 V Operation

3.3 V Operation

Figure 27. C-Grade Typical Eye Diagram at 25 Mbps, 5 V

Operation

Figure 28. C-Grade Typical Eye Diagram at 25 Mbps, 3.3 V

Operation

spacer

REVISION HISTORY

Changes from Original (September 2012) to Revision A

Page

•

Changed Description text From: "applications where input noise pulses of less than 10 ns duration..."

To:"applications where input noise pulses of less than 6 ns duration..." .............................................................................. 1

Changed Input PU in the Function table From: Z To: 'Undetermined .................................................................................. 2

Added note "Product Preview" to ISO7640FC ..................................................................................................................... 3

•

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PACKAGE OPTION ADDENDUM

www.ti.com

26-Nov-2012

PACKAGING INFORMATION

Orderable Device

ISO7631FCDW

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Samples

Drawing

(1)

(2)

(3)

(Requires Login)

ACTIVE

SOIC

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-3-260C-168 HR

ISO7631FCDWR

Green (RoHS

& no Sb/Br)

ISO7631FMDW

Green (RoHS

& no Sb/Br)

ISO7631FMDWR

2000

Green (RoHS

& no Sb/Br)

ISO7641FCDW

Green (RoHS

& no Sb/Br)

ISO7641FCDWR

2000

Green (RoHS

& no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

26-Nov-2012

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

22-Dec-2012

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

ISO7631FCDWR

ISO7631FMDWR

ISO7641FCDWR

SOIC

2000

330.0

16.4

10.75 10.7

2.7

12.0

16.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

22-Dec-2012

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

ISO7631FCDWR

ISO7631FMDWR

ISO7641FCDWR

SOIC

2000

367.0

38.0

Pack Materials-Page 2

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