JL101ABCA [TI]
LM101AJAN Operational Amplifiers; LM101AJAN运算放大器
| 型号： | JL101ABCA |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LM101AJAN Operational Amplifiers |
| 文件： | 总24页 (文件大小：1014K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM101AJAN
LM101AJAN Operational Amplifiers
Literature Number: SNOSAJ8
January 2006
LM101AJAN
Operational Amplifiers
General Description
The LM101A is a general purpose operational amplifier
which features improved performance over industry stan-
dards such as the LM709. Advanced processing techniques
make possible an order of magnitude reduction in input
currents, and a redesign of the biasing circuitry reduces the
temperature drift of input current. Improved specifications
include:
tion. For example, in low frequency circuits it can be
overcompensated for increased stability margin. Or the
compensation can be optimized to give more than a
factor of ten improvement in high frequency performance
for most applications.
In addition, the device provides better accuracy and
lower noise in high impedance circuitry. The low input
currents also make it particularly well suited for long
interval integrators or timers, sample and hold circuits
and low frequency waveform generators. Further, replac-
ing circuits where matched transistor pairs buffer the
inputs of conventional IC op amps, it can give lower offset
voltage and a drift at a lower cost.
•
•
•
•
•
Offset voltage 3 mV maximum over temperature
Input current 100 nA maximum over temperature
Offset current 20 nA maximum over temperature
Guaranteed drift characteristics
Offsets guaranteed over entire common mode and sup-
ply voltage ranges
Features
n Offset voltage 3 mV maximum over temperature
n Input current 100 nA maximum over temperature
n Offset current 20 nA maximum over temperature
n Guaranteed drift characteristics
•
Slew rate of 10V/µs as a summing amplifier
This amplifier offers many features which make its appli-
cation nearly foolproof: overload protection on the input
and output, no latch-up when the common mode range is
exceeded, and freedom from oscillations and compensa-
tion with a single 30 pF capacitor. It has advantages over
internally compensated amplifiers in that the frequency
compensation can be tailored to the particular applica-
n Offsets guaranteed over entire common mode and
supply voltage ranges
n Slew rate of 10 V/µS as a summing amplifier
Ordering Information
NS Part Number
JL101ABGA
JL101ABPA
JL101ABHA
JL101ABCA
JL101ASGA
JL101ASPA
SMD Part Number
NS Package Number
Package Description
8LD Metal Can
8LD CERDIP
JM38510/10103BGA
JM38510/10103BPA
JM38510/10103BHA
JM38510/10103BCA
JM38510/10103SGA
JM38510/10103SPA
H08C
J08A
W10A
J14A
H08C
J08A
10LD CERPACK
14LD CERDIP
8LD Metal Can
8LD CERDIP
© 2006 National Semiconductor Corporation
DS201296
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Schematic (Note 8)
20129601
Connection Diagrams
(Top View)
(Top View)
Metal Can Package
Dual-In-Line Package
20129604
See NS Package Number J08A
20129602
Note: Pin 4 connected to case.
See NS Package Number H08C
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2
Connection Diagrams (Continued)
(Top View)
(Top View)
Dual-In-Line Package
Ceramic Flatpack Package
20129640
See NS Package Number W10A
20129603
See NS Package Number J14A
Fast AC/DC Converter
20129633
Note 1: Feedforward compensation can be used to make a fast full wave rectifier without a filter.
3
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Absolute Maximum Ratings (Note 2)
Supply Voltage
22V
30V
Differential Input Voltage
Input Voltage (Note 3)
Output Short Circuit Duration
Operating Ambient Temp. Range
TJ Max
15V
Continuous
−55˚C ≤ TA ≤ +125˚C
150˚C
Power Dissipation at TA = 25˚C (Note 4)
H-Package
(Still Air)
750 mW
(500 LF / Min Air Flow)
J8-Package
1,200 mW
(Still Air)
1,000 mW
1,500 mW
(500 LF / Min Air Flow)
J14-Package
(Still Air)
1,200mW
2,000mW
(500 LF / Min Air Flow)
W-Package
(Still Air)
500mW
800mW
(500 LF / Min Air Flow)
Thermal Resistance
θJA
H-Package
(Still Air)
165˚C/W
89˚C/W
(500 LF / Min Air Flow)
J8-Package
(Still Air)
128˚C/W
75˚C/W
(500 LF / Min Air Flow)
J14-Package
(Still Air)
98˚C/W
59˚C/W
(500 LF / Min Air Flow)
W-Package
(Still Air)
233˚C/W
155˚C/W
(500 LF / Min Air Flow)
θJC (Typical)
H-Package
39˚C/W
26˚C/W
J8-Package
J14-Package
24˚C/W
W-Package
26˚C/W
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD Tolerance (Note 5)
−65˚C ≤ TA ≤ +150˚C
300˚C
3000V
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4
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Static tests at
Temp (˚C)
25
1
2
Static tests at
125
-55
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
25
5
125
-55
6
7
25
8A
8B
9
125
-55
25
10
11
125
-55
LM101A
JAN Electrical Characteristics
DC Parameters
The following conditions apply to all parameters, unless otherwise specified
VCC
=
20V, VCM = 0V, RS = 50Ω
Symbol
Parameters
Conditions
Sub-
groups
1
Notes
Min Max
Unit
VIO
Input Offset Voltage
Input Offset Current
Input Bias Current
+VCC = 35V, -VCC = -5V,
VCM = -15V
-2.0 +2.0
-3.0 +3.0
-2.0 +2.0
-3.0 +3.0
-2.0 +2.0
-3.0 +3.0
-2.0 +2.0
-3.0 +3.0
mV
mV
mV
mV
mV
mV
mV
mV
nA
2, 3
1
+VCC = 5V, -VCC = -35V,
VCM = +15V
2, 3
1
VCM = 0V
2, 3
1
+VCC = 5V, -VCC = -5V,
VCM = 0V
2, 3
1, 2
3
IIO
+VCC = 35V, -VCC = -5V,
-10
-20
-10
-20
-10
-20
-10
-20
-0.1
-0.1
-0.1
-0.1
-0.1
-0.1
-0.1
-0.1
-50
+10
+20
+10
+20
+10
+20
+10
+20
75
VCM = -15V, RS = 100KΩ
nA
+VCC = 5V, -VCC = -35V,
nA
1, 2
3
VCM = +15V, RS = 100KΩ
nA
VCM = 0V, RS = 100KΩ
nA
1, 2
3
nA
+VCC = 5V, -VCC = -5V,
nA
1, 2
3
VCM = 0V, RS = 100KΩ
nA
IIB
+VCC = 35V, -VCC = -5V,
nA
1, 2
3
VCM = -15V, RS = 100KΩ
100
75
nA
+VCC = 5V, -VCC = -35V,
nA
1, 2
3
VCM = +15V, RS = 100KΩ
100
75
nA
VCM = 0V, RS = 100KΩ
nA
1, 2
3
100
75
nA
+VCC = 5V, -VCC = -5V,
nA
1, 2
3
VCM = 0V, RS = 100KΩ
100
+50
nA
+PSRR
-PSRR
Power Supply Rejection Ratio
Power Supply Rejection Ratio
+VCC = 10V, -VCC = -20V
+VCC = 20V, -VCC = -10V
µV/V
µV/V
µV/V
µV/V
1
-100 +100
-50 +50
-100 +100
2, 3
1
2, 3
5
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LM101A
JAN Electrical Characteristics (Continued)
DC Parameters (Continued)
The following conditions apply to all parameters, unless otherwise specified
VCC
=
20V, VCM = 0V, RS = 50Ω
Symbol
CMRR
+VIO Adj
-VIO Adj
+IOS
Parameters
Conditions
Sub-
groups
Notes
Min Max
Unit
dB
Common Mode Rejection Ratio VCC
=
=
35V to 5V,
15V
80
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
VCM
Adjustment for Input Offset
Voltage
4.0
-4.0
-60
+60
mV
mV
mA
mA
Adjustment for Input Offset
Voltage
Output Short Circuit Current
Output Short Circuit Current
Power Supply Current
+VCC = 15V, -VCC = -15V,
t ≤ 25mS, VCM = -15V
-IOS
+VCC = 15V, -VCC = -15V,
t ≤ 25mS, VCM = +15V
+VCC = 15V, -VCC = -15V
ICC
3.0
2.32
3.5
mA
1
2
mA
mA
3
∆VIO / ∆T
∆ IIO / ∆T
-AVS
Temperature Coefficient of
Input Offset Voltage
-55˚C ≤ TA ≤ +25˚C
+25˚C ≤ TA ≤ +125˚C
-55˚C ≤ TA ≤ +25˚C
+25˚C ≤ TA ≤ +125˚C
RL = 2KΩ, VO = -15V
(Note 6)
(Note 6)
(Note 6)
(Note 6)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
-18
-15
+18
+15
µV/˚C
µV/˚C
pA/˚C
pA/˚C
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
2
3
Temperature Coefficient of
Input Offset Current
-200 +200
2
-100 +100
3
Large Signal (Open Loop)
Voltage Gain
50
25
50
25
50
25
50
25
4
5, 6
4
RL = 10KΩ, VO = -15V
RL = 2KΩ, VO = +15V
RL = 10KΩ, VO = +15V
5, 6
4
+AVS
Large Signal (Open Loop)
Voltage Gain
5, 6
4
5, 6
AVS
Large Signal (Open Loop)
Voltage Gain
VCC
=
=
5V, RL = 2KΩ,
2V
5V, RL = 10KΩ,
2V
(Note 7)
(Note 7)
10
10
V/mV
V/mV
4, 5, 6
4, 5, 6
VO
=
VCC
VO
=
+VOP
-VOP
Output Voltage Swing
Output Voltage Swing
RL = 10KΩ, VCM = -20V
RL = 2KΩ, VCM = -20V
RL = 10KΩ, VCM = 20V
RL = 2KΩ, VCM = 20V
+16
+15
-16
-15
V
V
V
V
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
AC Parameters
The following conditions apply to all parameters, unless otherwise specified
VCC
=
20V, VCM = 0V, RS = 50Ω
Symbol
Parameter
Conditions
Sub-
groups
Notes
Min Max
Units
+SR
-SR
Slew Rate
AV = 1, VI = -5V to +5V
AV = 1, VI = +5V to -5V
AV = 1, VI = 50mV
0.3
0.3
800
25
V/µS
V/µS
nS
7
7
7
7
7
Slew Rate
TRTR
TROS
NIBB
NIPC
Rise Time
Overshoot
AV = 1, VI = 50mV
%
Noise Broadband
Noise Popcorn
BW = 10Hz to 5KHz, RS = 0Ω
BW = 10Hz to 5KHz,
RS = 100KΩ
15
µVRMS
80
µVPK
7
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6
LM101A
JAN Electrical Characteristics (Continued)
DC Parameters:
Drift Values
The following conditions apply to all parameters, unless otherwise specified
VCC 20V, VCM = 0V, RS = 50Ω
Delta calculations performed on JAN S devices at group B, Subgroup 5 only.
=
Symbol
Parameter
Conditions
Sub-
groups
Notes
Min Max
Units
VIO
IIB
Input Offset Voltage
Input Bias Current
VCM = 0V
-0.5
-7.5
0.5
7.5
mV
nA
1
1
VCM = 0V, RS = 100KΩ
Notes
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is
intended to be functional, but do no guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 3: For supply voltages less than 15V, the absolute maximum input voltage is equal to the supply voltage.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
(maximum junction temperature), θ (package junction
JA
Jmax
to ambient thermal resistance), and T (ambient temperature). The maximum allowable power dissipation at any temperature is P
= (T
− T ) / θ or the
A
Dmax
Jmax A JA
number given in the Absolute Maximum Ratings, whichever is lower.
Note 5: Human body model, 100 pF discharged through 1.5 kΩ.
Note 6: Calculated parameter
Note 7: Datalog reading of K = V/mV.
Note 8: Pin connections shown are for 8-pin packages.
7
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Typical Performance Characteristics LM101A
Input Voltage Range
Output Swing
20129642
20129641
Voltage Gain
20129643
Supply Current
Voltage Gain
20129647
20129648
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8
Typical Performance Characteristics LM101A (Continued)
Input Current,
Maximum Power Dissipation
LM101A
20129649
20129650
Current Limiting
Input Noise Voltage
20129651
20129652
Input Noise Current
Common Mode Rejection
20129653
20129654
9
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Typical Performance Characteristics LM101A (Continued)
Closed Loop Output
Impedance
Power Supply Rejection
20129655
20129656
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10
Typical Performance Characteristics for Various Compensation Circuits
(Note 8)
Single Pole Compensation
Two Pole Compensation
20129608
20129612
C = 30 pF
S
C = 30 pF
S
C2 = 10 C1
Open Loop Frequency
Response
Feedforward Compensation
20129616
20129609
f = 3 MHz
o
Open Loop Frequency
Response
Open Loop Frequency
Response
20129617
20129613
11
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Typical Performance Characteristics for Various Compensation Circuits
(Note 8) (Continued)
Large Signal Frequency
Response
Large Signal Frequency
Response
20129610
20129618
20129615
20129614
20129611
20129619
Large Signal Frequency
Response
Voltage Follower Pulse
Response
Voltage Follower Pulse
Response
Inverter Pulse Response
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12
Typical Applications (Note 8)
Inverting Amplifier
with Balancing Circuit
Variable Capacitance Multiplier
20129620
20129623
†
May be zero or equal to parallel combination of R1 and R2 for minimum
offset.
Simulated Inductor
Sine Wave Oscillator
20129621
L . R1 R2 C1
R
R
= R2
= R1
S
P
Fast Inverting Amplifier
with High Input Impedance
20129624
f
o
= 10 kHz
Integrator with Bias Current Compensation
20129622
20129625
*Adjust for zero integrator drift. Current drift typically 0.1 nA/˚C over −55˚C
to +125˚C temperature range.
13
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Application Hints (Note 8)
Protecting Against Gross
Fault Conditions
20129626
*Protects input
†
‡
Protects output
Protects output — not needed when R4 is used.
Compensating for Stray Input Capacitances
or Large Feedback Resistor
20129627
Isolating Large Capacitive Loads
20129628
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14
Although the LM101A is designed for trouble free operation,
experience has indicated that it is wise to observe certain
precautions given below to protect the devices from abnor-
mal operating conditions. It might be pointed out that the
advice given here is applicable to practically any IC op amp,
although the exact reason why may differ with different de-
vices.
Typical Applications (Note 8)
Standard Compensation and
Offset Balancing Circuit
When driving either input from a low-impedance source, a
limiting resistor should be placed in series with the input lead
to limit the peak instantaneous output current of the source
to something less than 100 mA. This is especially important
when the inputs go outside a piece of equipment where they
could accidentally be connected to high voltage sources.
Large capacitors on the input (greater than 0.1 µF) should be
treated as a low source impedance and isolated with a
resistor. Low impedance sources do not cause a problem
unless their output voltage exceeds the supply voltage. How-
ever, the supplies go to zero when they are turned off, so the
isolation is usually needed.
The output circuitry is protected against damage from shorts
to ground. However, when the amplifier output is connected
to a test point, it should be isolated by a limiting resistor, as
test points frequently get shorted to bad places. Further,
when the amplifier drives a load external to the equipment, it
is also advisable to use some sort of limiting resistance to
preclude mishaps.
20129629
Fast Voltage Follower
Precautions should be taken to insure that the power sup-
plies for the integrated circuit never become
reversed—even under transient conditions. With reverse
voltages greater than 1V, the IC will conduct excessive cur-
rent, fusing internal aluminum interconnects. If there is a
possibility of this happening, clamp diodes with a high peak
current rating should be installed on the supply lines. Rever-
sal of the voltage between V+ and V− will always cause a
problem, although reversals with respect to ground may also
give difficulties in many circuits.
The minimum values given for the frequency compensation
capacitor are stable only for source resistances less than
10 kΩ, stray capacitances on the summing junction less than
5 pF and capacitive loads smaller than 100 pF. If any of
these conditions are not met, it becomes necessary to over-
compensate the amplifier with a larger compensation capaci-
tor. Alternately, lead capacitors can be used in the feedback
network to negate the effect of stray capacitance and large
feedback resistors or an RC network can be added to isolate
capacitive loads.
20129631
Power Bandwidth: 15 kHz
Slew Rate: 1V/µs
Fast Summing Amplifier
Although the LM101A is relatively unaffected by supply by-
passing, this cannot be ignored altogether. Generally it is
necessary to bypass the supplies to ground at least once on
every circuit card, and more bypass points may be required
if more than five amplifiers are used. When feed-forward
compensation is employed, however, it is advisable to by-
pass the supply leads of each amplifier with low inductance
capacitors because of the higher frequencies involved.
20129630
Power Bandwidth: 250 kHz
Small Signal Bandwiidth: 3.5 MHz
Slew Rate: 10V/µs
15
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Typical Applications (Note 8) (Continued)
Bilateral Current Source
20129632
R3 = R4 + R5
R1 = R2
Fast AC/DC Converter (Note 9)
20129633
Note 9: Feedforward compensation can be used to make a fast full wave rectifier without a filter.
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16
Typical Applications (Note 8) (Continued)
Instrumentation Amplifier
20129634
R1 = R4; R2 = R3
†
*, Matching determines CMRR.
Voltage Comparator for Driving RTL Logic or High
Current Driver
Integrator with Bias Current Compensation
20129637
20129635
*Adjust for zero integrator drift. Current drift typically 0.1 nA/˚C over 0˚C to
+70˚C temperature range.
17
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Typical Applications (Note 8) (Continued)
Low Frequency Square Wave Generator
20129636
Voltage Comparator for Driving
DTL or TTL Integrated Circuits
Low Drift Sample and Hold
20129639
20129638
*Polycarbonate-dielectric capacitor
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18
Revision History Section
Date
Revision
Section
Originator
Changes
Released
01/05/06
A
New Release to corporate format
L. Lytle
1 MDS datasheets converted into one Corp.
datasheet format. MJLM101A-X Rev 1A0
datasheet will be archived.
19
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Physical Dimensions inches (millimeters) unless otherwise noted
Metal Can Package (H)
NS Package Number H08C
Ceramic Dual-In-Line Package (J)
NS Package Number J08A
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20
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Ceramic Dual-In-Line Package (J)
NS Package Number J14A
Ceramic Flatpack Package (W)
NS Package Number W10A
21
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Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Audio
Applications
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
www.ti.com/industrial
www.ti.com/medical
www.ti.com/security
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
Medical
Security
Logic
Space, Avionics and Defense www.ti.com/space-avionics-defense
Transportation and Automotive www.ti.com/automotive
Power Mgmt
Microcontrollers
RFID
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Video and Imaging
www.ti.com/video
OMAP Mobile Processors www.ti.com/omap
Wireless Connectivity www.ti.com/wirelessconnectivity
TI E2E Community Home Page
e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated
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