LM25010Q1MHX/NOPB [TI]
汽车级 6-42V 宽输入电压、1A 恒定导通时间非同步降压稳压器 | PWP | 14 | -40 to 125;
| 型号： | LM25010Q1MHX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车级 6-42V 宽输入电压、1A 恒定导通时间非同步降压稳压器 | PWP | 14 | -40 to 125 开关 光电二极管 稳压器 |
| 文件： | 总34页 (文件大小：906K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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LM25010, LM25010-Q1
SNVS419E –DECEMBER 2005–REVISED MAY 2016
LM25010, LM25010-Q1 42-V, 1-A Step-Down Switching Regulator
1 Features
2 Applications
1
•
LM25010-Q1 Qualified for Automotive
Applications
•
•
•
Non-Isolated Telecommunications Regulators
Secondary Side Post Regulators
Automotive Electronics
•
AEC-Q100 Qualified With the Following Results:
–
Device Temperature Grade 1: –40°C to 125°C
Ambient Operating Temperature Range
3 Description
The LM25010 features all the functions needed to
–
Device Temperature Grade 0: –40°C to 150°C
Ambient Operating Temperature Range
implement
a
low-cost, efficient, buck regulator
capable of supplying in excess of 1-A load current.
This high voltage regulator integrates an N-Channel
Buck Switch, and is available in thermally enhanced
10-pin WSON and 14-pin HTSSOP packages. The
constant ON-time regulation scheme requires no loop
compensation resulting in fast load transient
response and simplified circuit implementation. The
operating frequency remains constant with line and
load variations due to the inverse relationship
between the input voltage and the ON-time. The
valley current limit detection is set at 1.25 A.
Additional features include: VCC undervoltage
lockout, thermal shutdown, gate drive undervoltage
lockout, and maximum duty cycle limiter.
–
–
Device HBM ESD Classification Level 2
Device CDM ESD Classification Level C5
•
•
•
•
•
•
•
•
Wide 6-V to 42-V Input Voltage Range
Valley Current Limiting at 1.25 A
Programmable Switching Frequency Up To 1 MHz
Integrated N-Channel Buck Switch
Integrated High Voltage Bias Regulator
No Loop Compensation Required
Ultra-Fast Transient Response
Nearly Constant Operating Frequency With Line
and Load Variations
•
•
•
•
Adjustable Output Voltage
2.5 V, ±2% Feedback Reference
Programmable Soft Start
Thermal Shutdown
Device Information(1)
PART NUMBER
PACKAGE
WSON (10)
HTSSOP (14)
BODY SIZE (NOM)
4.00 mm × 4.00 mm
4.40 mm × 5.00 mm
LM25010x
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Basic Step-Down Regulator
6V - 42V
Input
VCC
VIN
C3
C1
R
ON
LM25010
BST
SW
C4
L1
RON/SD
V
OUT
SHUTDOWN
D1
R1
R2
R3
SS
ISEN
FB
C2
C6
RTN
SGND
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM25010, LM25010-Q1
SNVS419E –DECEMBER 2005–REVISED MAY 2016
www.ti.com
Table of Contents
7.3 Feature Description................................................... 8
7.4 Device Functional Modes........................................ 12
Application and Implementation ........................ 13
8.1 Application Information............................................ 13
8.2 Typical Application .................................................. 13
8.3 Do's and Don'ts....................................................... 19
Power Supply Recommendations...................... 20
1
2
3
4
5
6
Features.................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Revision History..................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings: LM25010 ............................................ 4
6.3 ESD Ratings: LM25010-Q1, LM25010-Q0 ............... 4
6.4 Recommended Operating Ratings............................ 4
6.5 Thermal Information.................................................. 5
6.6 Electrical Characteristics........................................... 5
6.7 Switching Characteristics.......................................... 6
6.8 Typical Characteristics.............................................. 7
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
8
9
10 Layout................................................................... 20
10.1 Layout Guidelines ................................................. 20
10.2 Layout Example .................................................... 21
11 Device and Documentation Support ................. 22
11.1 Related Links ........................................................ 22
11.2 Community Resources.......................................... 22
11.3 Trademarks........................................................... 22
11.4 Electrostatic Discharge Caution............................ 22
11.5 Glossary................................................................ 22
7
12 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (February 2013) to Revision E
Page
•
Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes section,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section....................................... 1
Changes from Revision C (February 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................. 1
2
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SNVS419E –DECEMBER 2005–REVISED MAY 2016
5 Pin Configuration and Functions
DPR Package
10-Pin WSON
Top View
PWP Package
14-Pin HTSSOP
Top View
NC
SW
1
2
3
4
5
6
7
14
13
12
11
10
9
NC
SW
1
2
3
4
5
10
9
VIN
VIN
VCC
BST
VCC
ExposedPad
BST
I
ꢀ
ꢀ
8
R
ꢀ/SD
SEN
ON
ExposedPad
I
ꢀ
ꢀ
R
ꢀ/SD
S
7
SS
FB
SEN
ON
GND
RTN
S
SS
FB
NC
6
GND
RTN
NC
8
Pin Functions
PIN
I/O
DESCRIPTION
NAME
WSON
HTSSOP
Boost pin for bootstrap capacitor. Connect a capacitor from SW to the BST pin. The
capacitor is charged from VCC through an internal diode during the buck switch OFF-time.
BST
2
3
I
—
I
Exposed metal pad on the underside of the device. It is recommended to connect this pad
to the PC board ground plane to aid in heat dissipation.
EP
FB
—
6
—
9
Voltage feedback input from the regulated output. Input to both the regulation and
overvoltage comparators. The FB pin regulation level is 2.5 V.
Current sense. During the buck switch OFF-time, the inductor current flows through the
internal sense resistor, and out of the ISEN pin to the free-wheeling diode. The current limit
comparator keeps the buck switch off if the ISEN current exceeds 1.25 A (typical).
ISEN
NC
3
4
I
—
8
1, 7, 8, 14
—
I
No internal connection. Can be connected to ground plane to improve heat dissipation.
ON-time control and shutdown. An external resistor from VIN to the RON/SD pin sets the
buck switch ON-time. Grounding this pin shuts down the regulator.
RON/SD
RTN
11
6
5
—
—
Ground return for all internal circuitry other than the current sense resistor.
Current sense ground. Recirculating current flows into this pin to the current sense
resistor.
SGND
4
5
Soft start. An internal 11.5-µA current source charges the SS pin capacitor to 2.5 V to
softstart the reference input of the regulation comparator.
SS
7
1
10
2
I
Switching node. Internally connected to the buck switch source. Connect to the inductor,
free-wheeling diode, and bootstrap capacitor.
SW
O
Output of the bias regulator. The voltage at VCC is nominally equal to VIN for VIN < 8.9 V,
and regulated at 7 V for VIN > 8.9 V. Connect a 0.47-µF, or larger capacitor from VCC to
ground, as close as possible to the pins. An external voltage can be applied to this pin to
reduce internal dissipation if VIN is greater than 8.9 V. MOSFET body diodes clamp VCC
VCC
VIN
9
12
13
I
I
to VIN if VCC > VIN
.
Input supply. Nominal input range is 6 V to 42 V. Input bypass capacitors should be
located as close as possible to the VIN and RTN pins.
10
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SNVS419E –DECEMBER 2005–REVISED MAY 2016
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
MAX
UNIT
V
VIN to RTN
45
59
BST to RTN
V
SW to RTN (steady state)
BST to VCC
–1.5
45
V
V
BST to SW
14
V
VCC to RTN
–0.3
–0.3
–0.3
14
V
SGND to RTN
0.3
4
V
SS to RTN
V
VIN to SW
45
V
All other inputs to RTN
Lead temperature (soldering, 4 s)(2)
Junction temperature, TJ (LM25010, Q1,Q0)
Storage temperature, Tstg
–0.3
7
V
260
150
150
°C
°C
°C
–40
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Ratings. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) For detailed information on soldering plastic HTSSOP and WSON packages, see Mechanical, Packaging, and Orderable Information.
6.2 ESD Ratings: LM25010
VALUE
±2000
±750
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings: LM25010-Q1, LM25010-Q0
VALUE
UNIT
Human-body model (HBM), per AEC Q100-002(1)(2)
Charged-device model (CDM), per AEC Q100-011(3)
±2000
±750
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(2) Level listed above is the passing level per ANSI/ESDA/JEDEC JS-001. JEDEC document JEP155 states that 500 V HBM allows safe
manufacturing with a standard ESD control process.
(3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250 V CDM allows safe
manufacturing with a standard ESD control process.
6.4 Recommended Operating Ratings
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
42
UNIT
V
VIN
Input voltage
6
IO
Output current
1
A
Ext-VCC
External bias voltage
8
–40
–40
13
V
LM25010
125
150
°C
°C
TJ
Junction temperature
LM25010-Q1, LM25010-Q0
4
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SNVS419E –DECEMBER 2005–REVISED MAY 2016
6.5 Thermal Information
LM25010, LM25010-Q1
THERMAL METRIC(1)
DPR (WSON)
PWP (HTSSOP)
UNIT
10 PINS
36
14 PINS
41.1
26.5
22.5
0.7
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
31.9
13.2
0.3
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
13.5
3
22.2
3.3
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.6 Electrical Characteristics
Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C, VIN = 24 V, and
RON = 200 kΩ (unless otherwise noted).(1)(2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VCC REGULATOR
VCCReg
VCC regulated output
6.6
7
7.4
V
ICC = 0 mA, FS ≤ 200 kHz,
6 V ≤ VIN ≤ 8.5 V
VIN - VCC
100
mV
VCC bypass threshold
VCC bypass hysteresis
VIN increasing
VIN decreasing
VIN = 6 V
8.9
260
55
V
mV
VCC output impedance
(0 mA ≤ ICC ≤ 5 mA)
VIN = 8 V
50
Ω
VIN = 24 V
0.21
15
VCC current limit
VIN = 24 V, VCC = 0 V
VCC increasing
VCC decreasing
100-mV overdrive
Non-switching, FB = 3 V
RON/SD = 0 V
mA
V
UVLOVCC VCC undervoltage lockout threshold
UVLOVCC hysteresis
5.25
180
3
mV
µs
UVLOVCC filter delay
IIN operating current
645
90
920
170
µA
µA
IIN shutdown current
SOFTSTART PIN
ISS
CURRENT LIMIT
ILIM Threshold
Internal current source
8
1
11.5
15
µA
Current out of ISEN
1.25
130
150
1.5
A
Resistance from ISEN to SGND
Response time
mΩ
ns
ON TIMER, RON/SD PIN
Shutdown threshold
Threshold hysteresis
REGULATION AND OVER-VOLTAGE COMPARATORS (FB PIN)
Voltage at RON/SD rising
0.3
0.7
40
1.05
2.55
V
mV
TJ ≤ 125°C
TJ ≤ 150°C
2.445
2.435
2.5
VREF
FB regulation threshold
V
FB overvoltage threshold
FB bias current
2.9
1
V
nA
(1) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and
applying statistical process control.
(2) The junction temperature (TJ in °C) is calculated from the ambient temperature (TA in °C) and power dissipation (PD in Watts) as follows:
TJ = TA + (PD × RθJA) where RθJA (in °C/W) is the package thermal impedance provided in Thermal Information
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Electrical Characteristics (continued)
Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C, VIN = 24 V, and
RON = 200 kΩ (unless otherwise noted).(1)(2)
PARAMETER
THERMAL SHUTDOWN
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TSD
Thermal shutdown temperature
Thermal shutdown hysteresis
175
20
°C
°C
6.7 Switching Characteristics
Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C, and VIN = 24 V
(unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TJ ≤ 125°C
TJ ≤ 150°C
MIN
TYP
MAX
0.8
UNIT
0.35
RDS(ON)
Buck switch
fSW = 200 mA
Ω
0.85
4
UVLOGD Gate drive UVLO
UVLOGD hysteresis
OFF TIMER
VBST - VSW increasing
1.7
3
V
400
mV
tOFF
Minimum OFF-time
260
ns
ON TIMER
tON – 1
tON – 2
ON-time
ON-time
VIN = 10 V, RON = 200 kΩ
VIN = 42 V, RON = 200 kΩ
2.1
2.75
695
3.4
µs
ns
500
890
(1) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations while
applying statistical process control.
Figure 1. Start-Up Sequence
6
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SNVS419E –DECEMBER 2005–REVISED MAY 2016
6.8 Typical Characteristics
at TA = 25°C (unless otherwise noted)
8
7
6
5
4
3
2
1
0
10
8.0
6.0
4.0
2.0
0
V
= 8V
IN
V
= 24V
IN
V
= 9V
= 6V
IN
V
IN
V
UVLO
CC
I
= 0 mA
CC
7
V
Externally Loaded
= 400 kHz
CC
F
S
0
1
2
3
4
5
6
8
9
10
0
3
6
9
12
15
I
(mA)
CC
V
(V)
IN
Figure 2. VCC vs VIN
Figure 3. VCC vs ICC
100
10
10
9
8
7
6
5
4
3
2
1
0
F
S
= 700 kHz
F
= 400 kHz
= 80 kHz
S
R
ON
= 500k
300k
100k
1.0
0.1
F
S
V
= 24V
13
IN
7
8
9
10
11
12
14
6
12
18
24
30
36
42
EXTERNALLY APPLIED V
(V)
CC
V
(V)
IN
Figure 4. ICC vs Externally Applied VCC
Figure 5. ON-Time vs VIN and RON
100
0
3.0
900
800
700
600
500
400
300
200
100
0
R
= 50k
ON
2.0
1.0
0
300k
FB = 3V
500k
R
/SD = 0V
ON
6
12
18
24
(V)
30
36
42
6
12
18
24
30
36
42
V
IN
V
(V)
IN
Figure 7. IIN vs VIN
Figure 6. Voltage at RON/SD Pin
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7 Detailed Description
7.1 Overview
The LM25010 step-down switching regulator features all the functions needed to implement a low cost, efficient
buck DC-DC converter capable of supplying in excess of 1 A to the load. This high voltage regulator integrates
an N-Channel buck switch, with an easy to implement constant ON-time controller. It is available in the thermally
enhanced WSON and HTSSOP packages. The regulator compares the feedback voltage to a 2.5-V reference to
control the buck switch, and provides a switch ON-time which varies inversely with VIN. This feature results in the
operating frequency remaining relatively constant with load and input voltage variations. The switching frequency
can range from less than 100 kHz to 1 MHz. The regulator requires no loop compensation resulting in very fast
load transient response. The valley current limit circuit holds the buck switch off until the free-wheeling inductor
current falls below the current limit threshold, nominally set at 1.25 A.
The LM25010 can be applied in numerous applications to efficiently step-down higher DC voltages. Features
include: thermal shutdown, VCC undervoltage lockout, gate drive undervoltage lockout, and maximum duty cycle
limit.
7.2 Functional Block Diagram
7V BIAS
REGULATOR
LM25010
Input
VIN
6V-42V
C5
VCC
BST
V
SENSE
IN
V
THERMAL
SHUTDOWN
CC
C3
C1
UVL
Q2
BYPASS
SWITCH
SD
Gate Drive
UVLO
V
GND
IN
C4
R
260 ns
OFF TIMER
START
ON
ON TIMER
START
ON
COMPLETE
Q1
0.7V
LEVEL
SHIFT
R
L1
COMPLETE
RON/SD
DRIVER
SW
Shutdown
Input
D1
CURRENT LIMIT
COMPARATOR
Driver
V
OUT
ISEN
LOGIC
R
CL
R
SENSE
2.5V
11.5 mA
-
62.5 mV
+
(optional)
50 mW
SGND
FB
SS
R1
R2
R3
C2
2.9V
C6
OVER-VOLTAGE
COMPARATOR
RTN
REGULATION
COMPARATOR
GND
Copyright © 2016, Texas Instruments Incorporated
7.3 Feature Description
7.3.1 Control Circuit Overview
The LM25010 employs a control scheme based on a comparator and a one-shot ON timer, with the output
voltage feedback (FB) compared to an internal reference (2.5 V). If the FB voltage is below the reference the
buck switch is turned on for a time period determined by the input voltage and a programming resistor (RON).
Following the ON-time the switch remains off for a fixed 260-ns OFF-time, or until the FB voltage falls below the
reference, whichever is longer. The buck switch then turns on for another ON-time period. Referring to the
Functional Block Diagram, the output voltage is set by R1 and R2. The regulated output voltage is calculated
with Equation 1.
VOUT = 2.5 V × (R1 + R2) / R2
(1)
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Feature Description (continued)
The LM25010 requires a minimum of 25-mV of ripple voltage at the FB pin for stable fixed-frequency operation. If
the output capacitor’s ESR is insufficient, additional series resistance may be required (R3 in the Functional
Block Diagram).
The LM25010 operates in continuous conduction mode at heavy load currents, and discontinuous conduction
mode at light load currents. In continuous conduction mode current always flows through the inductor, never
decaying to zero during the OFF-time. In this mode the operating frequency remains relatively constant with load
and line variations. The minimum load current for continuous conduction mode is one-half the inductor’s ripple
current amplitude. Calculate the operating frequency in the continuous conduction mode with Equation 2.
VOUT x (VIN œ 1.4V)
FS
=
1.18 x 10-10 x (RON + 1.4 kW) x VIN
(2)
The buck switch duty cycle is equal to Equation 3.
VOUT
VIN
tON
DC =
= tON x FS =
tON + tOFF
(3)
Under light load conditions, the LM25010 operates in discontinuous conduction mode, with zero current flowing
through the inductor for a portion of the OFF-time. The operating frequency is always lower than that of the
continuous conduction mode, and the switching frequency varies with load current. Conversion efficiency is
maintained at a relatively high level at light loads because the switching losses diminish as the power delivered
to the load is reduced. Calculate the approximate discontinuous mode operating frequency with Equation 4.
VOUT2 x L1 x 1.4 x 1020
FS
=
2
RL x RON
where
•
RL = the load resistance
(4)
7.3.2 Start-Up Regulator (VCC
)
A high voltage bias regulator is integrated within the LM25010. The input pin (VIN) can be connected directly to
line voltages between 6 V and 42 V. Referring to the Functional Block Diagram and the graph of VCC vs VIN,
when VIN is between 6 V and the bypass threshold (nominally 8.9 V), the bypass switch (Q2) is on, and VCC
tracks VIN within 100 mV to 150 mV. The bypass switch on-resistance is approximately 50 Ω, with inherent
current limiting at approximately 100 mA. When VIN is above the bypass threshold, Q2 is turned off, and VCC is
regulated at 7 V. The VCC regulator output current is limited at approximately 15 mA. When the LM25010 is
shutdown using the RON/SD pin, the VCC bypass switch is shut off, regardless of the voltage at VIN.
When VIN exceeds the bypass threshold, the time required for Q2 to shut off is approximately 2 µs to 3 µs. The
capacitor at VCC (C3) must be a minimum of 0.47 µF to prevent the voltage at VCC from rising above its
absolute maximum rating in response to a step input applied at VIN. C3 must be located as close as possible to
the LM25010 pins.
In applications with a relatively high input voltage, power dissipation in the bias regulator is a concern. An
auxiliary voltage of between 7.5 V and 14 V can be diode connected to the VCC pin (D2 in Figure 8) to shut off
the VCC regulator, reducing internal power dissipation. The current required into the VCC pin is shown in the
Typical Performance Characteristics. Internally a diode connects VCC to VIN requiring that the auxiliary voltage
be less than VIN.
The turn-on sequence is shown in Figure 1. When VCC exceeds the undervoltage lockout threshold (UVLO) of
5.25 V (t1 in Figure 1), the buck switch is enabled, and the SS pin is released to allow the softstart capacitor (C6)
to charge up. The output voltage VOUT is regulated at a reduced level which increases to the desired value as the
softstart voltage increases (t2 in Figure 1).
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Feature Description (continued)
VCC
BST
C3
C4
L1
LM25010
D2
SW
VOUT
D1
R1
R2
R3
C2
ISEN
SGND
FB
Figure 8. Self-Biased Configuration
7.3.3 Regulation Comparator
The feedback voltage at the FB pin is compared to the voltage at the SS pin (2.5 V, ±2%). In normal operation an
ON-time period is initiated when the voltage at FB falls below 2.5 V. The buck switch conducts for the ON-time
programmed by RON, causing the FB voltage to rise above 2.5 V. After the ON-time period the buck switch
remains off until the FB voltage falls below 2.5 V. Input bias current at the FB pin is less than 5 nA over
temperature.
7.3.4 Overvoltage Comparator
The feedback voltage at FB is compared to an internal 2.9 V reference. If the voltage at FB rises above 2.9 V the
ON-time is immediately terminated. This condition can occur if the input voltage, or the output load, changes
suddenly. The buck switch remains off until the voltage at FB falls below 2.5 V.
7.3.5 ON-Time Control
The ON-time of the internal buck switch is determined by the RON resistor and the input voltage (VIN), and is
calculated with Equation 5.
1.18 x 10-10 x (RON + 1.4k)
+ 67 ns
tON
=
(VIN - 1.4V)
(5)
The RON resistor can be determined from the desired ON-time by re-arranging Equation 5 to Equation 6.
(tON - 67 ns) x (VIN - 1.4V)
- 1.4 kW
RON
=
1.18 x 10-10
(6)
To set a specific continuous conduction mode switching frequency (Fs), the RON resistor is determined from
Equation 7.
VOUT x (VIN - 1.4V)
VIN x FS x 1.18 x 10-10
- 1.4 kW
RON
=
(7)
In high frequency applications the minimum value for tON is limited by the maximum duty cycle required for
regulation and the minimum OFF-time of the LM25010 (260 ns, ±15%). The fixed OFF-time limits the maximum
duty cycle achievable with a low voltage at VIN. The minimum allowed ON-time to regulate the desired VOUT at
the minimum VIN is determined from Equation 8.
VOUT x 300 ns
tON(min)
=
(VIN(min) œ VOUT
)
(8)
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Feature Description (continued)
7.3.6 Current Limit
Current limit detection occurs during the OFF-time by monitoring the recirculating current through the internal
current sense resistor (RSENSE). The detection threshold is 1.25 A, ±0.25 A. Referring to the Functional Block
Diagram, if the current into SGND during the OFF-time exceeds the threshold level the current limit comparator
delays the start of the next ON-time period. The next ON-time starts when the current into SGND is below the
threshold and the voltage at FB is below 2.5 V. Figure 9 illustrates the inductor current waveform during normal
operation and during current limit. The output current IO is the average of the inductor ripple current waveform.
The Low Load Current waveform illustrates continuous conduction mode operation with peak and valley inductor
currents below the current limit threshold. When the load current is increased (High Load Current), the ripple
waveform maintains the same amplitude and frequency since the current falls below the current limit threshold at
the valley of the ripple waveform. Note the average current in the High Load Current portion of Figure 9 is above
the current limit threshold. Since the current reduces below the threshold in the normal OFF-time each cycle, the
start of each ON-time is not delayed, and the circuit’s output voltage is regulated at the correct value. When the
load current is further increased such that the lower peak would be above the threshold, the OFF-time is
lengthened to allow the current to decrease to the threshold before the next ON-time begins (Current Limited
portion of Figure 9). Both VOUT and the switching frequency are reduced as the circuit operates in a constant
current mode. The load current (IOCL) is equal to the current limit threshold plus half the ripple current (ΔI/2). The
ripple amplitude (ΔI) is calculated from Equation 9.
(VIN - VOUT) x tON
DI =
L1
(9)
The current limit threshold can be increased by connecting an external resistor (RCL) between SGND and ISEN.
RCL typically is less than 1 Ω, and the calculation of its value is explained in Application and Implementation. If
the current limit threshold is increased by adding RCL, the maximum continuous load current should not exceed
1.5 A, and the peak current out of the SW pin should not exceed 2 A.
I
PK
I
OCL
Current Limit
Threshold
Io
DI
High Load Current
Current Limited
Low Load Current
Normal Operation
Figure 9. Inductor Current - Current Limit Operation
7.3.7 Soft Start
The soft-start feature allows the regulator to gradually reach a steady-state operating point, thereby reducing
start-up stresses and current surges. At turnon, while VCC is below the undervoltage threshold (t1 in Figure 1),
the SS pin is internally grounded, and VOUT is held at 0 V. When VCC exceeds the undervoltage threshold
(UVLO) an internal 11.5-µA current source charges the external capacitor (C6) at the SS pin to 2.5 V (t2 in
Figure 1). The increasing SS voltage at the non-inverting input of the regulation comparator gradually increases
the output voltage from zero to the desired value. The soft-start feature keeps the load inductor current from
reaching the current limit threshold during start-up, thereby reducing inrush currents.
An internal switch grounds the SS pin if VCC is below the undervoltage lockout threshold, or if the circuit is
shutdown using the RON/SD pin.
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Feature Description (continued)
7.3.8 N-Channel Buck Switch and Driver
The LM25010 integrates an N-Channel buck switch and associated floating high voltage gate driver. The peak
current through the buck switch should not exceed 2A, and the load current should not exceed 1.5A. The gate
driver circuit is powered by the external bootstrap capacitor between BST and SW (C4), which is recharged each
OFF-time from VCC through the internal high voltage diode. The minimum OFF-time, nominally 260 ns, ensures
sufficient time during each cycle to recharge the bootstrap capacitor. A 0.022 µF ceramic capacitor is
recommended for C4.
7.3.9 Thermal Shutdown
The LM25010 should be operated below the maximum operating junction temperature rating. If the junction
temperature increases during a fault or abnormal operating condition, the internal Thermal Shutdown circuit
activates typically at 175°C. The Thermal Shutdown circuit reduces power dissipation by disabling the buck
switch and the ON timer. This feature helps prevent catastrophic failures from accidental device overheating.
When the junction temperature reduces below approximately 155°C (20°C typical hysteresis), normal operation
resumes.
7.4 Device Functional Modes
7.4.1 Shutdown
The LM25010 can be remotely shut down by forcing the RON/SD pin below 0.7 V with a switch or open drain
device. See Figure 10. In the shutdown mode the SS pin is internally grounded, the ON-time one-shot is
disabled, the input current at VIN is reduced, and the VCC bypass switch is turned off. The VCC regulator is not
disabled in the shutdown mode. Releasing the RON/SD pin allows normal operation to resume. The nominal
voltage at RON/SD is shown in Figure 6. When switching the RON/SD pin, the transition time should be faster
than one to two cycles of the regulator’s nominal switching frequency.
VIN
Input
Voltage
LM25010
R
ON
RON/SD
STOP
RUN
Figure 10. Shutdown Implementation
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM25010 is a non-synchronous buck regulator converter designed to operate over a wide input voltage and
output current range. Spreadsheet-based calculator tools, available on the TI product website at Quick-Start
Calculator, can be used to design a single output non-synchronous buck converter.
Alternatively, online WEBENCH® software is available to create a complete buck design and generate the bill of
materials, estimated efficiency, solution size, and cost of the complete solution.
8.2 Typical Application
The final circuit is shown in Figure 11, and its performance is shown in Figure 16 and Figure 17. Current limit
measured approximately 1.3 A.
6 - 40V
Input
VIN
VCC
13
C5
0.1 mF
12
C3
0.47 mF
C1
4.4 mF
LM25010
R
ON
BST
3
200k
0.022 mF
C4
L1 100 mH
RON/SD
11
SW
2
5V
V
OUT
D1
SS
10
ISEN
4
R1
1.0k
R3
1.5
C6
0.022 mF
FB
9
SGND
5
C2
22 mF
R2
1.0k
6
RTN
GND
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Figure 11. LM25010 Example Circuit
8.2.1 Design Requirements
Table 1 lists the operating parameters for Figure 11.
Table 1. Design Parameters
PARAMETER
Input voltage
Output voltage
Load current
Soft-start time
EXAMPLE VALUE
6 V to 40 V
5 V
200 mA to 1 A
5 ms
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8.2.2 Detailed Design Procedure
The procedure for calculating the external components is illustrated with a design example. Configure the circuit
in Figure 11 according to the components listed in Table 2.
Table 2. List of Components for LM25010 Example Circuit
ITEM
C1
DESCRIPTION
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Schottky diode
Inductor
VALUE
(2) 2.2 µF, 50 V
22 µF, 16 V
0.47 µF, 16 V
0.022 µF, 16 V
0.1 µF, 50 V
60 V, 2 A
100 µH
C2
C3
C4, C6
C5
D1
L1
R1
Resistor
1 kΩ
R2
Resistor
1 kΩ
R3
Resistor
1.5 Ω
RON
U1
Resistor
200 kΩ
LM25010
—
8.2.2.1 Component Selection
8.2.2.1.1 R1 and R2
These resistors set the output voltage, and calculate the ratio with Equation 10.
R1/R2 = (VOUT/2.5V) – 1
(10)
R1/R2 calculates to 1. The resistors should be chosen from standard value resistors in the range of 1 kΩ to 10
kΩ. A value of 1 kΩ is used for R1 and R2.
8.2.2.1.2 RON, FS
RON can be chosen using Equation 7 to set the nominal frequency, or from Equation 6 if the ON-time at a
particular VIN is important. A higher frequency generally means a smaller inductor and capacitors (value, size and
cost), but higher switching losses. A lower frequency means a higher efficiency, but with larger components.
Generally, if PC board space is tight, a higher frequency is better. The resulting ON-time and frequency have a
±25% tolerance. Using Equation 7 at a nominal VIN of 8 V in Equation 11.
5V x (8V - 1.4V)
8V x 175 kHz x 1.18 x 10-10
- 1.4 kW = 198 kW
RON
=
(11)
A value of 200 kΩ will be used for RON, yielding a nominal frequency of 161 kHz at VIN = 6 V, and 203 kHz at
VIN = 40 V.
8.2.2.1.3 L1
The inductor value is determined based on the load current, ripple current, and the minimum and maximum input
voltage (VIN(min), VIN(max)). See Figure 12.
IPK+
IO
IOR
IPK-
0 mA
1/Fs
Figure 12. Inductor Current
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To keep the circuit in continuous conduction mode, the maximum allowed ripple current is twice the minimum
load current, or 400 mAP-P. Using this value of ripple current, the inductor (L1) is calculated using Equation 12
and Equation 13.
VOUT x (VIN(max) - VOUT
)
L1 =
IOR x FS(min) x VIN(max)
where
•
FS(min) is the minimum frequency of 152 kHz (203 kHz – 25%) at VIN(max)
(12)
(13)
5V x (40V - 5V)
= 72 mH
L1 =
0.40A x 152 kHz x 40V
Equation 13 provides the minimum value for inductor L1. When selecting an inductor, use a higher standard
value (100 uH). To prevent saturation, and possible destructive current levels, L1 must be rated for the peak
current which occurs if the current limit and maximum ripple current are reached simultaneously (IPK in Figure 9).
The maximum ripple amplitude is calculated by rearranging Equation 12 using VIN(max), FS(min), and the minimum
inductor value, based on the manufacturer’s tolerance. Assume, for Equation 14, Equation 15, and Equation 16,
the inductor’s tolerance is ±20%.
VOUT x (VIN(max) - VOUT
)
IOR(max)
=
L1min x FS(min) x VIN(max)
(14)
(15)
5V x (40V - 5V)
IOR(max)
=
= 360 mAp-p
80 mH x 152 kHz x 40V
IPK = ILIM + IOR(max) = 1.5 A + 0.36 A = 1.86 A
where
•
ILIM is the maximum current limit threshold
(16)
At the nominal maximum load current of 1 A, the peak inductor current is 1.18 A.
8.2.2.1.4 RCL
Since it is obvious that the lower peak of the inductor current waveform does not exceed 1 A at maximum load
current (see Figure 12), it is not necessary to increase the current limit threshold. Therefore RCL is not needed for
this exercise. For applications where the lower peak exceeds 1 A, see Increasing The Current Limit Threshold.
8.2.2.1.5 C2 and R3
Since the LM25010 requires a minimum of 25 mVP-P of ripple at the FB pin for proper operation, the required
ripple at VOUT is increased by R1 and R2, and is equal to Equation 17.
VRIPPLE = 25 mVP-P × (R1 + R2) / R2 = 50 mVP-P
(17)
This necessary ripple voltage is created by the inductor ripple current acting on C2’s ESR + R3. First, determine
the minimum ripple current, which occurs at minimum VIN, maximum inductor value, and maximum frequency
with Equation 18.
VOUT x (VIN(min) - VOUT
)
IOR(min)
=
L1max x FS(max) x VIN(min)
5V x (6V - 5V)
=
= 34.5 mAp-p
120 mH x 201 kHz x 6V
(18)
(19)
The minimum ESR for C2 is then equal to Equation 19.
50 mV
ESR(min)
=
= 1.45W
34.5 mA
If the capacitor used for C2 does not have sufficient ESR, R3 is added in series as shown in the Functional Block
Diagram. The value chosen for C2 is application dependent, and it is recommended that it be no smaller than 3.3
µF. C2 affects the ripple at VOUT, and transient response. Experimentation is usually necessary to determine the
optimum value for C2.
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8.2.2.1.6 D1
A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may inadvertently affect the IC’s operation through external or internal EMI. The diode
should be rated for the maximum VIN (40 V), the maximum load current (1 A), and the peak current which occurs
when current limit and maximum ripple current are reached simultaneously (IPK in Figure 9), previously calculated
to be 1.86 A. The diode’s forward voltage drop affects efficiency due to the power dissipated during the OFF-
time. The average power dissipation in D1 is calculated from Equation 20.
PD1 = VF × IO × (1 – D)
where
•
•
IO is the load current
D is the duty cycle
(20)
8.2.2.1.7 C1
This capacitor limits the ripple voltage at VIN resulting from the source impedance of the supply feeding this
circuit, and the on/off nature of the switch current into VIN. At maximum load current, when the buck switch turns
on, the current into VIN steps up from zero to the lower peak of the inductor current waveform (IPK- in Figure 12),
ramps up to the peak value (IPK+), then drops to zero at turnoff. The average current into VIN during this ON-time
is the load current. For a worst case calculation, C1 must supply this average current during the maximum ON-
time. The maximum ON-time is calculated at VIN = 6 V using Equation 5, with a 25% tolerance added to
Equation 21.
1.18 x 10-10 x (200k + 1.4k)
x 1.25 = 6.5 ms
+ 67 ns
tON(max)
=
6V - 1.4V
(21)
The voltage at VIN should not be allowed to drop below 5.5 V in order to maintain VCC above its UVLO in
Equation 22.
IO x tON
1.0A x 6.5 ms
C1 =
=
= 13 mF
DV
0.5V
(22)
Normally a lower value can be used for C1 since the above calculation is a worst case calculation which
assumes the power source has a high source impedance. A quality ceramic capacitor with a low ESR should be
used for C1.
8.2.2.1.8 C3
The capacitor at the VCC pin provides noise filtering and stability, prevents false triggering of the VCC UVLO at
the buck switch ON and OFF transitions, and limits the peak voltage at VCC when a high voltage with a short rise
time is initially applied at VIN. C3 should be no smaller than 0.47 µF, and must be a good quality, low ESR,
ceramic capacitor, physically close to the IC pins.
8.2.2.1.9 C4
The recommended value for C4 is 0.022 µF. TI recommends a high quality ceramic capacitor with low ESR as
C4 supplies the surge current to charge the buck switch gate at each turnon. A low ESR also ensures a
complete recharge during each OFF-time.
8.2.2.1.10 C5
This capacitor suppresses transients and ringing due to lead inductance at VIN. TI recommends a low ESR, 0.1-
µF ceramic chip capacitor placed physically close to the LM25010.
8.2.2.1.11 C6
The capacitor at the SS pin determines the softstart time (that is the time for the reference voltage at the
regulation comparator and the output voltage) to reach their final value. Determine the capacitor value with
Equation 23.
tSS x 11.5 mA
C6 =
2.5V
(23)
For a 5 ms softstart time, C6 calculates to 0.022 µF.
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8.2.2.2 Increasing The Current Limit Threshold
The current limit threshold is nominally 1.25 A, with a minimum guaranteed value of 1 A. If, at maximum load
current, the lower peak of the inductor current (IPK– in Figure 12) exceeds 1 A, resistor RCL must be added
between SGND and ISEN to increase the current limit threshold to be equal or exceed that lower peak current. This
resistor diverts some of the recirculating current from the internal sense resistor so that a higher current level is
needed to switch the internal current limit comparator. Calculate IPK– with Equation 24.
IOR(min)
IPK- = IO(max)
-
2
where
•
•
IO(max) is the maximum load current
IOR(min) is the minimum ripple current calculated using Equation 18
(24)
(25)
RCL is calculated with Equation 25.
1.0A x 0.11W
RCL
=
IPK- - 1.0A
where
•
0.11 Ω is the minimum value of the internal resistance from SGND to ISEN
The next smaller standard value resistor should be used for RCL. With the addition of RCL it is necessary to check
the average and peak current values to ensure they do not exceed the LM25010 limits. At maximum load current
the average current through the internal sense resistor is calculated with Equation 26.
IO(max) x RCL x (VIN(max) - VOUT
)
IAVE
=
(RCL + 0.11W) x VIN(max)
(26)
If IAVE is less than 2 A, no changes are necessary. If it exceeds 2 A, RCL must be reduced. The upper peak of the
inductor current (IPK+), at maximum load current, is calculated using Equation 27.
IOR(max)
IPK+ = IO(max)
+
2
where
•
IOR(max) is calculated using Equation 14
(27)
If IPK+ exceeds 3.5 A , the inductor value must be increased to reduce the ripple amplitude. This necessitates
recalculation of IOR(min), IPK–, and RCL
.
When the circuit is in current limit, the upper peak current out of the SW pin is calculated with Equation 28.
1.5A x (150 mW + RCL
)
+ IOR(MAX)
IPK+(CL)
=
RCL
(28)
The inductor L1 and diode D1 must be rated for this current.
8.2.2.3 Ripple Configurations
For applications where low output voltage ripple is required the output can be taken directly from the low ESR
output capacitor (C2) as shown in Figure 13. However, R3 slightly degrades the load regulation. The specific
component values, and the application determine if this is suitable.
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L1
SW
FB
LM25010
R3
C2
R1
R2
V
OUT
Figure 13. Low Ripple Output
Where the circuit of Figure 13 is not suitable, the circuits of Figure 14 or Figure 15 can be used.
L1
SW
V
OUT
LM25010
Cff
R1
R2
R3
FB
C2
Figure 14. Low Output Ripple Using a Feedforward Capacitor
In Figure 14, Cff is added across R1 to AC-couple the ripple at VOUT directly to the FB pin. This allows the ripple
at VOUT to be reduced, in some cases considerably, by reducing R3. In the circuit of Figure 11, the ripple at VOUT
ranged from 50 mVP-P at VIN = 6 V to 285 mVP-P at VIN = 40 V. By adding a 1000 pF capacitor at Cff and reducing
R3 to 0.75 Ω, the VOUT ripple was reduced by 50%, ranging from 25 mVP-P to 142 mVP-P
.
L1
SW
V
OUT
C2
LM25010
RA
CB
CA
R1
R2
FB
Figure 15. Low Output Ripple Using Ripple Injection
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To reduce VOUT ripple further, the circuit of Figure 15 can be used. R3 has been removed, and the output ripple
amplitude is determined by C2’s ESR and the inductor ripple current. RA and CA are chosen to generate a 40
mV to 50 mVP-P sawtooth at their junction, and that voltage is AC-coupled to the FB pin via CB. In selecting RA
and CA, VOUT is considered a virtual ground as the SW pin switches between VIN and –1 V. Since the ON-time at
SW varies inversely with VIN, the waveform amplitude at the RA and CA junction is relatively constant. R1 and
R2 must typically be increased to more than 5 kΩ each to not significantly attenuate the signal provided to FB
through CB. Typical values for the additional components are RA = 200 kΩ, CA = 680 pF, and CB = 0.01 µF.
8.2.3 Application Curves
100
90
250
200
150
100
50
V
= 6V
IN
40V
12V
80
70
60
Load Current = 500 mA
50
200
400
600
800
1000
0
6
10
40
20
(V)
30
LOAD CURRENT (mA)
V
IN
Figure 16. Efficiency vs Load Current and VIN
Circuit of Figure 11
Figure 17. Frequency vs VIN
Circuit of Figure 11
8.3 Do's and Don'ts
A minimum load current of 1 mA is required to maintain proper operation. If the load current falls below that level,
the bootstrap capacitor can discharge during the long OFF-time and the circuit either shuts down or cycles ON
and OFF at a low frequency. If the load current is expected to drop below 1 mA in the application, choose the
feedback resistors to be low enough in value to provide the minimum required current at nominal VOUT
.
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9 Power Supply Recommendations
The LM25010 is designed to operate with an input power supply capable of supplying a voltage range from 6 V
to 42 V. The input power supply must be well-regulated and capable of supplying sufficient current to the
regulator during peak load operation. Also, like in all applications, the power-supply source impedance must be
small compared to the module input impedance to maintain the stability of the converter.
10 Layout
10.1 Layout Guidelines
The LM25010 regulation, overvoltage, and current limit comparators are very fast, and respond to short duration
noise pulses. Therefore, layout considerations are critical for optimum performance. The layout must be as neat
and compact as possible, and all the components must be as close as possible to their associated pins. The two
major current loops have currents which switch very fast, and so the loops should be as small as possible to
minimize conducted and radiated EMI. The first loop is that formed by C1 (CIN), through the VIN to SW pins, L1
(LIND), C2 (COUT), and back to C1. The second loop is that formed by D1, L1, C2, and the SGND and ISEN pins.
The ground connection from C2 to C1 should be as short and direct as possible, preferably without going through
vias. Directly connect the SGND and RTN pin to each other, and they should be connected as directly as
possible to the C1/C2 ground line without going through vias. The power dissipation within the IC can be
approximated by determining the total conversion loss (PIN – POUT), and then subtracting the power losses in the
free-wheeling diode and the inductor. The power loss in the diode is approximately Equation 29.
PD1 = IO × VF × (1 – D)
(29)
where IO is the load current, VF is the diode’s forward voltage drop, and D is the duty cycle. The power loss in the
inductor is approximately Equation 30.
PL1 = IO2 × RL × 1.1
where
•
•
RL is the inductor’s DC resistance
the 1.1 factor is an approximation for the AC losses
(30)
If it is expected that the internal dissipation of the LM25010 will produce high junction temperatures during
normal operation, good use of the PC board’s ground plane can help considerably to dissipate heat. The
exposed pad on the IC package bottom should be soldered to a ground plane, and that plane should both extend
from beneath the IC, and be connected to exposed ground plane on the board’s other side using as many vias
as possible. The exposed pad is internally connected to the IC substrate. The use of wide PC board traces at the
pins, where possible, can help conduct heat away from the IC. The four NC pins on the HTSSOP package are
not electrically connected to any part of the IC, and may be connected to ground plane to help dissipate heat
from the package. Judicious positioning of the PC board within the end product, along with the use of any
available air flow (forced or natural convection) can help reduce the junction temperature.
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10.2 Layout Example
VOUT
CA
COUT
LIND
GND
Cbyp
RA
CIN
CBST
SW
D1
LM25010
SW
VIN
VCC
RON
SS
VLINE
BST
ISEN
Exp Thermal
Pad
RON
CVCC
RFB2
CSS
SGND
RTN
GND
FB
CB
RFB1
Via to Ground Plane
Figure 18. LM25010 Buck Layout Example With the WSON Package
Copyright © 2005–2016, Texas Instruments Incorporated
Submit Documentation Feedback
21
Product Folder Links: LM25010 LM25010-Q1
LM25010, LM25010-Q1
SNVS419E –DECEMBER 2005–REVISED MAY 2016
www.ti.com
11 Device and Documentation Support
11.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related Links
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
PARTS
PRODUCT FOLDER
SAMPLE & BUY
LM25010
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
LM25010-Q1
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
22
Submit Documentation Feedback
Copyright © 2005–2016, Texas Instruments Incorporated
Product Folder Links: LM25010 LM25010-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM25010MH/NOPB
LM25010MHX/NOPB
LM25010Q0MH/NOPB
LM25010Q0MHX/NOPB
LM25010Q1MH/NOPB
LM25010Q1MHX/NOPB
ACTIVE
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
PWP
14
14
14
14
14
14
94
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 150
-40 to 150
-40 to 125
-40 to 125
L25010
MH
Samples
Samples
Samples
Samples
Samples
Samples
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PWP
2500 RoHS & Green
94 RoHS & Green
2500 RoHS & Green
94 RoHS & Green
SN
SN
SN
SN
SN
L25010
MH
PWP
L25010
Q0MH
PWP
L25010
Q0MH
PWP
L25010
Q1MH
PWP
2500 RoHS & Green
L25010
Q1MH
LM25010SD/NOPB
LM25010SDX/NOPB
ACTIVE
ACTIVE
WSON
WSON
DPR
DPR
10
10
1000 RoHS & Green
4500 RoHS & Green
NIPDAU | SN
NIPDAU | SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
25010SD
Samples
Samples
25010SD
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM25010, LM25010-Q1 :
Catalog : LM25010
•
Automotive : LM25010-Q1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM25010MHX/NOPB
HTSSOP PWP
14
14
14
10
10
10
10
2500
2500
2500
1000
1000
4500
4500
330.0
330.0
330.0
178.0
180.0
330.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
12.4
6.95
6.95
6.95
4.3
5.6
5.6
5.6
4.3
4.3
4.3
4.3
1.6
1.6
1.6
1.3
1.1
1.1
1.3
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
LM25010Q0MHX/NOPB HTSSOP PWP
LM25010Q1MHX/NOPB HTSSOP PWP
LM25010SD/NOPB
LM25010SD/NOPB
LM25010SDX/NOPB
LM25010SDX/NOPB
WSON
WSON
WSON
WSON
DPR
DPR
DPR
DPR
4.3
4.3
4.3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM25010MHX/NOPB
LM25010Q0MHX/NOPB
LM25010Q1MHX/NOPB
LM25010SD/NOPB
HTSSOP
HTSSOP
HTSSOP
WSON
PWP
PWP
PWP
DPR
DPR
DPR
DPR
14
14
14
10
10
10
10
2500
2500
2500
1000
1000
4500
4500
367.0
367.0
367.0
210.0
200.0
346.0
367.0
367.0
367.0
367.0
185.0
183.0
346.0
367.0
35.0
35.0
35.0
35.0
25.0
35.0
35.0
LM25010SD/NOPB
WSON
LM25010SDX/NOPB
LM25010SDX/NOPB
WSON
WSON
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LM25010MH/NOPB
LM25010Q0MH/NOPB
LM25010Q1MH/NOPB
PWP
PWP
PWP
HTSSOP
HTSSOP
HTSSOP
14
14
14
94
94
94
495
495
495
8
8
8
2514.6
2514.6
2514.6
4.06
4.06
4.06
Pack Materials-Page 3
PACKAGE OUTLINE
DPR0010A
WSON - 0.8 mm max height
SCALE 3.000
PLASTIC SMALL OUTLINE - NO LEAD
4.1
3.9
A
B
(0.2)
4.1
3.9
PIN 1 INDEX AREA
FULL R
BOTTOM VIEW
SIDE VIEW
20.000
ALTERNATIVE LEAD
DETAIL
0.8
0.7
C
SEATING PLANE
0.08 C
0.05
0.00
EXPOSED
THERMAL PAD
2.6 0.1
(0.1) TYP
SEE ALTERNATIVE
LEAD DETAIL
5
6
2X
3.2
11
3
0.1
8X 0.8
1
10
0.35
0.25
0.1
10X
0.5
0.3
PIN 1 ID
10X
C A B
C
0.05
4218856/B 01/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DPR0010A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(2.6)
10X (0.6)
SYMM
10
1
10X (0.3)
(1.25)
SYMM
11
(3)
8X (0.8)
6
5
(
0.2) VIA
TYP
(1.05)
(R0.05) TYP
(3.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
EXPOSED
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EDGE
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218856/B 01/2021
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
DPR0010A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
SYMM
10X (0.6)
METAL
TYP
(0.68)
10
1
10X (0.3)
(0.76)
11
SYMM
8X (0.8)
4X
(1.31)
5
6
(R0.05) TYP
4X (1.15)
(3.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 11:
77% PRINTED SOLDER COVERAGE BY AREA
SCALE:20X
4218856/B 01/2021
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
PACKAGE OUTLINE
PWP0014A
PowerPADTM TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
4
0
0
PLASTIC SMALL OUTLINE
C
6.6
6.2
TYP
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
12X 0.65
14
1
2X
5.1
4.9
3.9
NOTE 3
7
8
0.30
14X
0.19
4.5
4.3
B
0.1
C A B
SEE DETAIL A
(0.15) TYP
4X (0.2)
NOTE 5
4X (0.05)
NOTE 5
8
7
THERMAL
PAD
0.25
GAGE PLANE
3.255
3.205
15
1.2 MAX
0.15
0.05
0 - 8
14
1
0.75
0.50
DETAIL A
(1)
TYPICAL
3.155
3.105
4214867/A 09/2016
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
5. Features may differ and may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
PWP0014A
PowerPADTM TSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE
(3.4)
NOTE 9
(3.155)
SYMM
SOLDER MASK
DEFINED PAD
SEE DETAILS
14X (1.5)
1
14
14X (0.45)
(1.1)
TYP
15
SYMM
(3.255)
(5)
NOTE 9
12X (0.65)
8
7
(
0.2) TYP
VIA
(R0.05) TYP
(1.1) TYP
METAL COVERED
BY SOLDER MASK
(5.8)
LAND PATTERN EXAMPLE
SCALE:10X
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
PADS 1-14
4214867/A 09/2016
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.
www.ti.com
EXAMPLE STENCIL DESIGN
PWP0014A
PowerPADTM TSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE
(3.155)
BASED ON
0.125 THICK
STENCIL
14X (1.5)
(R0.05) TYP
1
14
14X (0.45)
15
(3.255)
BASED ON
0.125 THICK
STENCIL
SYMM
12X (0.65)
8
7
SEE TABLE FOR
METAL COVERED
BY SOLDER MASK
SYMM
(5.8)
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
EXPOSED PAD
100% PRINTED SOLDER COVERAGE BY AREA
SCALE:10X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
3.53 X 3.64
3.155 X 3.255 (SHOWN)
2.88 X 2.97
0.125
0.15
0.175
2.67 X 2.75
4214867/A 09/2016
NOTES: (continued)
10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.
www.ti.com
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TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
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standards, and any other safety, security, regulatory or other requirements.
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TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated
相关型号：
LM25011A-Q1
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