LM2717 [TI]
双路降压直流/直流转换器;
| 型号： | LM2717 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 双路降压直流/直流转换器 转换器 |
| 文件： | 总21页 (文件大小：1191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM2717
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SNVS253D –MAY 2005–REVISED MARCH 2013
LM2717 Dual Step-Down DC/DC Converter
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1
FEATURES
DESCRIPTION
The LM2717 is composed of two PWM DC/DC buck
(step-down) converters. The first converter is used to
generate a fixed output voltage of 3.3V. The second
converter is used to generate an adjustable output
voltage. Both converters feature low RDSON (0.16Ω)
internal switches for maximum efficiency. Operating
frequency can be adjusted anywhere between
300kHz and 600kHz allowing the use of small
external components. External soft-start pins for each
enables the user to tailor the soft-start times to a
specific application. Each converter may also be shut
down independently with its own shutdown pin. The
LM2717 is available in a low profile 24-lead TSSOP
package ensuring a low profile overall solution.
2
•
Fixed 3.3V Output Buck Converter with a 2.2A,
0.16Ω, Internal Switch
•
Adjustable Buck Converter with a 3.2A, 0.16Ω,
Internal Switch
•
•
•
Operating Input Voltage Range of 4V to 20V
Input Undervoltage Protection
300kHz to 600kHz Pin Adjustable Operating
Frequency
•
•
Over Temperature Protection
Small 24-Lead TSSOP Package
APPLICATIONS
•
•
•
•
TFT-LCD Displays
Handheld Devices
Portable Applications
Laptop Computers
Typical Application Circuit
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated
LM2717
SNVS253D –MAY 2005–REVISED MARCH 2013
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Connection Diagram
Top View
Figure 1. 24-Lead TSSOP
See Package Number PW0024A
PIN DESCRIPTIONS
Pin
1
Name
PGND
PGND
AGND
FB1
Function
Power ground. PGND and AGND pins must be connected together directly at the part.
Power ground. PGND and AGND pins must be connected together directly at the part.
Analog ground. PGND and AGND pins must be connected together directly at the part.
Fixed buck output voltage feedback input.
2
3
4
5
VC1
Fixed buck compensation network connection. Connected to the output of the voltage error amplifier.
Bandgap connection.
6
VBG
7
VC2
Adjustable buck compensation network connection. Connected to the output of the voltage error
amplifier.
8
FB2
AGND
AGND
PGND
PGND
SW2
Adjustable buck output voltage feedback input.
9
Analog ground. PGND and AGND pins must be connected together directly at the part.
Analog ground. PGND and AGND pins must be connected together directly at the part.
Power ground. PGND and AGND pins must be connected together directly at the part.
Power ground. PGND and AGND pins must be connected together directly at the part.
Adjustable buck power switch input. Switch connected between VIN pins and SW2 pin.
Analog power input. VIN pins should be connected together directly at the part.
Analog power input. VIN pins should be connected together directly at the part.
Adjustable buck converter bootstrap capacitor connection.
10
11
12
13
14
15
16
17
18
19
VIN
VIN
CB2
SHDN2
SS2
Shutdown pin for adjustable buck converter. Active low.
Adjustable buck soft start pin.
FSLCT
Switching frequency select input. Use a resistor to set the frequency anywhere between 300kHz and
600kHz.
20
21
22
23
24
SS1
SHDN1
CB1
Fixed buck soft start pin.
Shutdown pin for fixed buck converter. Active low.
Fixed buck converter bootstrap capacitor connection.
Analog power input. VIN pins should be connected together directly at the part.
Fixed buck power switch input. Switch connected between VIN pins and SW1 pin.
VIN
SW1
2
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Block Diagram
FSLCT
OSC
CB1
V
IN
95% Duty
Cycle Limit
+
+
SS1
Buck Load
Current
FB1
Measurement
SET
DC
LIMIT
+
PWM
Soft
Start
RESET
Comp
-
BUCK
DRIVE
Buck
Driver
36.5k
SW1
OVP
TSH
-
Error
Amp
+
SD
20.38k
+
OVP
Comp
-
PGND
Thermal
Shutdown
BG
SHDN1
Bandgap
Fixed Buck Converter
V
V
C1
BG
FSLCT
OSC
CB2
V
IN
95% Duty
Cycle Limit
+
+
SS2
Buck Load
Current
Measurement
SET
DC
LIMIT
+
PWM
Soft
RESET
Comp
-
Start
FB2
BUCK
Buck
DRIVE
Driver
SW2
OVP
TSH
-
Error
Amp
+
SD
+
OVP
Comp
-
PGND
Thermal
Shutdown
BG
SHDN2
Bandgap
Adjustable Buck Converter
V
V
C2
BG
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings(1)(2)
VIN
−0.3V to 22V
−0.3V to 22V
−0.3V to 22V
−0.3V to 7V
SW1 Voltage
SW2 Voltage
FB1, FB2 Voltages
CB1, CB2 Voltages
VC1 Voltage
−0.3V to VIN+7V (VIN=VSW
)
1.75V ≤ VC1 ≤ 2.25V
0.965V ≤ VC2 ≤ 1.565V
−0.3V to 7.5V
−0.3V to 7.5V
−0.3V to 2.1V
−0.3V to 2.1V
AGND to 5V
150°C
VC2 Voltage
SHDN1 Voltage
SHDN2 Voltage
SS1 Voltage
SS2 Voltage
FSLCT Voltage
Maximum Junction Temperature
Power Dissipation(3)
Lead Temperature
Vapor Phase (60 sec.)
Infrared (15 sec.)
ESD Susceptibility(4)
Internally Limited
300°C
215°C
220°C
Human Body Model
2kV
(1) Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum
allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum
allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.
(4) The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin.
Operating Conditions
Operating Junction Temperature Range(1)
Storage Temperature
Supply Voltage
−40°C to +125°C
−65°C to +150°C
4V to 20V
20V
SW1 Voltage
SW2 Voltage
20V
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% tested or ensured through statistical analysis. All limits at temperature extremes are specified via correlation using standard
Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Electrical Characteristics
Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating
Temperature Range (TJ = −40°C to +125°C). VIN = 5V, IL = 0A, and FSW = 300kHz unless otherwise specified.
Symbol
Parameter
Conditions
Min(1)
Typ(2)
2.7
6
Max(1)
Units
mA
mA
µA
IQ
Total Quiescent Current (both Not Switching
switchers)
6
Switching, switch open
12
VSHDN = 0V
9
27
VFB1
VFB2
Fixed Buck Feedback Voltage
3.3
V
Adjustable Buck Feedback
Voltage
1.267
V
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% tested or ensured through statistical analysis. All limits at temperature extremes are specified via correlation using standard
Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
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Electrical Characteristics (continued)
Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating
Temperature Range (TJ = −40°C to +125°C). VIN = 5V, IL = 0A, and FSW = 300kHz unless otherwise specified.
Symbol
Parameter
Conditions
VIN = 8V(4)
Min(1)
Typ(2)
Max(1)
Units
(3)
ICL1
Fixed Buck Switch Current
Limit
2.2
A
(3)
ICL2
IB1
Adjustable Buck Switch
Current Limit
VIN = 8V(4)
VIN = 20V
VIN = 20V
3.2
65
65
A
Fixed Buck FB Pin Bias
Current(5)
µA
IB2
Adjustable Buck FB Pin Bias
Current(5)
nA
V
VIN
Input Voltage Range
4
20
gm1
Fixed Buck Error Amp
Transconductance
ΔI = 20µA
ΔI = 20µA
1340
1360
134
µmho
gm2
AV1
AV2
Adjustable Buck Error Amp
Transconductance
µmho
V/V
Fixed Buck Error Amp Voltage
Gain
Adjustable Buck Error Amp
Voltage Gain
136
V/V
DMAX
FSW
Maximum Duty Cycle
Switching Frequency
89
93
%
RF = 46.4k
200
475
300
600
400
775
kHz
kHz
RF = 22.6k
ISHDN1
ISHDN2
IL1
Fixed Buck Shutdown Pin
Current
0V < VSHDN1 < 7.5V
−5
−5
5
5
5
5
µA
µA
µA
Adjustable Buck Shutdown Pin 0V < VSHDN2 < 7.5V
Current
Fixed Buck Switch Leakage
Current
VIN = 20V
0.01
IL2
Adjustable Buck Switch
Leakage Current
VIN = 20V
0.01
160
160
µA
mΩ
mΩ
(6)
RDSON1
RDSON2
Fixed Buck Switch RDSON
Adjustable Buck Switch
(6)
RDSON
ThSHDN1
Fixed Buck SHDN Threshold
Output High
Output Low
Output High
Output Low
1.8
1.8
1.36
1.33
1.36
1.33
V
V
0.7
ThSHDN2
Adjustable Buck SHDN
Threshold
0.7
15
ISS1
ISS2
UVP
Fixed Buck Soft Start Pin
Current
4
9
9
µA
µA
Adjustable Buck Soft Start Pin
Current
4
4
15
On Threshold
3.8
3.6
115
V
Off Threshold
Thermal Resistance(7)
3.3
θJA
TSSOP, package only
°C/W
(3) Duty cycle affects current limit due to ramp generator.
(4) Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. VIN
(5) Bias current flows into FB pin.
(6) Includes the bond wires, RDSON from VIN pin(s) to SW pin.
(7) Refer to Texas Instruments packaging website for more detailed thermal information and mounting techniques for the TSSOP package.
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Typical Performance Characteristics
Switching IQ
vs.
Input Voltage
(FSW = 300kHz)
Shutdown IQ
vs.
Input Voltage
9
8
7
6
5
4
3
2
1
16
14
12
10
8
6
4
2
0
4
6
8
10 12 14 16 18 20
0
4
6
8
10 12 14
16 18
20
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 2.
Figure 3.
Switching Frequency
vs.
Fixed Buck RDS(ON)
vs.
Input Voltage
(FSW = 300kHz)
Input Voltage
320
315
310
305
300
295
290
200
190
180
170
160
150
140
130
120
110
100
R
= 46.4k
F
4
6
8
10 12
14 16
18 20
4
6
8
10 12 14 16 18 20
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 4.
Figure 5.
Adjustable Buck RDS(ON)
vs.
Fixed Buck Efficiency
vs.
Input Voltage
Load Current
100
90
80
70
60
50
40
30
20
10
0
200
190
180
170
160
150
140
130
120
110
100
= 5V
V
IN
V
= 12V
IN
V
= 18V
IN
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6
4
6
8
10 12 14 16 18 20
LOAD CURRENT (A)
INPUT VOLTAGE (V)
Figure 6.
Figure 7.
6
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Typical Performance Characteristics (continued)
Adjustable Buck Efficiency
vs.
Adjustable Buck Efficiency
vs.
Load Current
(VOUT = 15V)
Load Current
(VOUT = 5V)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 18V
V
= 18V
IN
IN
0
0.5
1
1.5
2
2.5
0
0.5
1
1.5
2
2.5
LOAD CURRENT (A)
LOAD CURRENT (A)
Figure 8.
Figure 9.
Adjustable Buck Switch Current Limt
Fixed Buck Switch Current Limt
vs.
vs.
Input Voltage
(VOUT = 5V)
Input Voltage
2.4
2.2
2
3.4
3.2
3
1.8
1.6
1.4
1.2
2.8
2.6
2.4
2.2
2
1
8
10
12
14
16
18
20
4
6
8
10 12 14
16 18 20
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 10.
Figure 11.
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BUCK OPERATION
PROTECTION (BOTH REGULATORS)
The LM2717 has dedicated protection circuitry running during normal operation to protect the IC. The Thermal
Shutdown circuitry turns off the power devices when the die temperature reaches excessive levels. The UVP
comparator protects the power devices during supply power startup and shutdown to prevent operation at
voltages less than the minimum input voltage. The OVP comparator is used to prevent the output voltage from
rising at no loads allowing full PWM operation over all load conditions. The LM2717 also features a shutdown
mode for each converter decreasing the supply current to approximately 10µA (both in shutdown mode).
CONTINUOUS CONDUCTION MODE
The LM2717 contains current-mode, PWM buck regulators. A buck regulator steps the input voltage down to a
lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady
state), the buck regulator operates in two cycles. The power switch is connected between VIN and SW1 and
SW2.
In the first cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the
inductor and the load current is supplied by COUT and the rising current through the inductor.
During the second cycle the transistor is open and the diode is forward biased due to the fact that the inductor
current cannot instantaneously change direction. The energy stored in the inductor is transferred to the load and
output capacitor.
The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as:
VOUT
D =
, D' = (1-D)
VIN
(1)
where D is the duty cycle of the switch, D and D′ will be required for design calculations.
DESIGN PROCEDURE
This section presents guidelines for selecting external components.
SETTING THE OUTPUT VOLTAGE (ADJUSTABLE REGULATOR)
The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in
Figure 12. The feedback pin voltage is 1.26V, so the ratio of the feedback resistors sets the output voltage
according to the following equation:
VOUT - 1.267
RFB1 = RFB2
x
W
1.267
(2)
INPUT CAPACITOR
A low ESR aluminum, tantalum, or ceramic capacitor is needed betwen the input pin and power ground. This
capacitor prevents large voltage transients from appearing at the input. The capacitor is selected based on the
RMS current and voltage requirements. The RMS current is given by:
(3)
The RMS current reaches its maximum (IOUT/2) when VIN equals 2VOUT. This value should be calculated for both
regulators and added to give a total RMS current rating. For an aluminum or ceramic capacitor, the voltage rating
should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used, the voltage rating
required is about twice the maximum input voltage. The tantalum capacitor should be surge current tested by the
manufacturer to prevent being shorted by the inrush current. The minimum capacitor value should be 47µF for
lower output load current applications and less dynamic (quickly changing) load conditions. For higher output
current applications or dynamic load conditions a 68µF to 100µF low ESR capacitor is recommended. It is also
recommended to put a small ceramic capacitor (0.1µF to 4.7µF) between the input pins and ground to reduce
high frequency spikes.
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INDUCTOR SELECTION
The most critical parameters for the inductor are the inductance, peak current and the DC resistance. The
inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages (for 300kHz
operation):
(4)
A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, and current
stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage
ripple requirement. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the
ripple current increases with the input voltage, the maximum input voltage is always used to determine the
inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is
available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the
inductor copper loss equal 2% of the output power.
OUTPUT CAPACITOR
The selection of COUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant
frequency, PWM mode is approximated by:
(5)
The ESR term usually plays the dominant role in determining the voltage ripple. Low ESR ceramic, aluminum
electrolytic, or tantalum capacitors (such as Taiyo Yuden MLCC, Nichicon PL series, Sanyo OS-CON, Sprague
593D, 594D, AVX TPS, and CDE polymer aluminum) is recommended. An electrolytic capacitor is not
recommended for temperatures below −25°C since its ESR rises dramatically at cold temperature. Ceramic or
tantalum capacitors have much better ESR specifications at cold temperature and is preferred for low
temperature applications.
BOOTSTRAP CAPACITOR
A 4.7nF ceramic capacitor or larger is recommended for the bootstrap capacitor. For applications where the input
voltage is less than twice the output voltage a larger capacitor is recommended, generally 0.1µF to 1µF to
ensure plenty of gate drive for the internal switches and a consistently low RDS(ON)
.
SOFT-START CAPACITOR (BOTH REGULATORS)
The LM2717 does not contain internal soft-start which allows for fast startup time but also causes high inrush
current. Therefore for applications that need reduced inrush current the LM2717 has circuitry that is used to limit
the inrush current on start-up of the DC/DC switching regulators. This inrush current limiting circuitry serves as a
soft-start. The external SS pins are used to tailor the soft-start for a specific application. A current (ISS) charges
the external soft-start capacitor, CSS. The soft-start time can be estimated as:
TSS = CSS*0.6V/ISS
(6)
When programming the softstart time simply use the equation given in the Soft-Start Capacitor section above.
SHUTDOWN OPERATION (BOTH REGULATORS)
The shutdown pins of the LM2717 are designed so that they may be controlled using 1.8V or higher logic signals.
If the shutdown function is not to be used the pin may be left open. The maximum voltage to the shutdown pin
should not exceed 7.5V. If the use of a higher voltage is desired due to system or other constraints it may be
used, however a 100k or larger resistor is recommended between the applied voltage and the shutdown pin to
protect the device.
SCHOTTKY DIODE
The breakdown voltage rating of D1 and D2 is preferred to be 25% higher than the maximum input voltage. The
current rating for the diode should be equal to the maximum output current for best reliability in most
applications. In cases where the input voltage is much greater than the output voltage the average diode current
is lower. In this case it is possible to use a diode with a lower average current rating, approximately (1-D)*IOUT
however the peak current rating should be higher than the maximum load current.
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LAYOUT CONSIDERATIONS
The LM2717 uses two separate ground connections, PGND for the drivers and boost NMOS power device and
AGND for the sensitive analog control circuitry. The AGND and PGND pins should be tied directly together at the
package. The feedback and compensation networks should be connected directly to a dedicated analog ground
plane and this ground plane must connect to the AGND pin. If no analog ground plane is available then the
ground connections of the feedback and compensation networks must tie directly to the AGND pin. Connecting
these networks to the PGND can inject noise into the system and effect performance.
The input bypass capacitor CIN, as shown in Figure 12, must be placed close to the IC. This will reduce copper
trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 0.1µF to 4.7µF
bypass capacitors can be placed in parallel with CIN, close to the VIN pins to shunt any high frequency noise to
ground. The output capacitors, COUT1 and COUT2, should also be placed close to the IC. Any copper trace
connections for the COUTX capacitors can increase the series resistance, which directly effects output voltage
ripple. The feedback network, resistors RFB1 and RFB2, should be kept close to the FB pin, and away from the
inductor to minimize copper trace connections that can inject noise into the system. Trace connections made to
the inductors and schottky diodes should be minimized to reduce power dissipation and increase overall
efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149:
Layout Guidelines for Switching Power Supplies (SNVA021).
Application Information
Table 1. Some Recommended Inductors (Others May Be Used)
Manufacturer
Coilcraft
Inductor
Contact Information
www.coilcraft.com
www.cooperet.com
www.pulseeng.com
www.sumida.com
DO3316 and DO5022 series
DRQ73 and CD1 series
Coiltronics
Pulse
P0751 and P0762 series
CDRH8D28 and CDRH8D43 series
Sumida
Table 2. Some Recommended Input And Output Capacitors (Others May Be Used)
Manufacturer
Vishay Sprague
Taiyo Yuden
Capacitor
Contact Information
www.vishay.com
293D, 592D, and 595D series tantalum
High capacitance MLCC ceramic
www.t-yuden.com
ESRD seriec Polymer Aluminum Electrolytic
SPV and AFK series V-chip series
Cornell Dubilier
Panasonic
www.cde.com
High capacitance MLCC ceramic
EEJ-L series tantalum
www.panasonic.com
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L1
22 mH
3.3V OUT1
C
BOOT1
4.7 nF
C
OUT1A
D1
MBRS240
*Connect CINA (pin
23) and CINB (pins
14,15) as close as
possible to the VIN
pins.
C
U1
OUT1
1 mF
C
68 mF
SS1
ceramic
CB1
FB1
SS1
SW1
SHDN1
47 nF
4.7 nF
20k
R
17V to 20V IN
C
C1
V
IN
*C
*C
INB
INA
C1
C
IN
V
V
V
V
C1
IN
IN
C
BG
1 nF
4.7 mF
ceramic
4.7 mF
ceramic
68 mF
V
BG
C
2k
C2
C
BOOT2
SHDN2
CB2
C2
4.7 nF
R
C2
SS2
R
F
L2
1 mF
20.5k
15V OUT2
FB2
SW2
FSLCT
AGND
AGND
AGND
C
22 mH
SS2
47 nF
AGND
C
OUT2A
PGND
PGND
PGND
C
OUT2
R
FB1
1 mF
ceramic
D2
MBRS240
68 mF
221k
PGND
LM2717
R
FB2
20k
PGND
Figure 12. 15V, 3.3V Output Application
L1
22 mH
3.3V OUT1
C
BOOT1
1 mF
C
OUT1A
D1
MBRS240
*Connect CINA (pin
23) and CINB (pins
14,15) as close as
possible to the VIN
pins.
C
U1
OUT1
1 mF
C
68 mF
SS1
ceramic
CB1
FB1
SS1
SW1
SHDN1
47 nF
4.7 nF
20k
R
8V to 20V IN
C
C1
V
IN
*C
*C
INB
INA
C1
C
IN
V
V
V
V
C1
IN
IN
C
BG
1 nF
4.7 mF
ceramic
4.7 mF
ceramic
68 mF
V
BG
C
10k
C2
C2
C
BOOT2
SHDN2
CB2
C2
4.7 nF
R
SS2
R
F
L2
1 mF
20.5k
5V OUT2
FB2
SW2
FSLCT
AGND
AGND
AGND
C
22 mH
SS2
47 nF
AGND
C
OUT2A
PGND
PGND
PGND
C
OUT2
R
FB1
1 mF
ceramic
D2
MBRS240
68 mF
59k
PGND
LM2717
R
FB2
20k
PGND
Figure 13. 5V, 3.3V Output Application
Copyright © 2005–2013, Texas Instruments Incorporated
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11
Product Folder Links: LM2717
LM2717
SNVS253D –MAY 2005–REVISED MARCH 2013
www.ti.com
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 11
12
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Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM2717MT/NOPB
LM2717MTX/NOPB
ACTIVE
ACTIVE
TSSOP
TSSOP
PW
PW
24
24
61
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
LM2717MT
LM2717MT
2500 RoHS & Green
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2717MTX/NOPB
TSSOP
PW
24
2500
330.0
16.4
6.95
8.3
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP PW 24
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
LM2717MTX/NOPB
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
PW TSSOP
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LM2717MT/NOPB
24
61
495
8
2514.6
4.06
Pack Materials-Page 3
PACKAGE OUTLINE
PW0024A
TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
0
0
0
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
6.2
TYP
A
0.1 C
PIN 1 INDEX AREA
22X 0.65
24
1
2X
7.15
7.9
7.7
NOTE 3
12
B
13
0.30
24X
4.5
4.3
NOTE 4
0.19
1.2 MAX
0.1
C A B
0.25
GAGE PLANE
0.15
0.05
(0.15) TYP
SEE DETAIL A
0.75
0.50
0 -8
A
20
DETAIL A
TYPICAL
4220208/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0024A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
24X (1.5)
(R0.05) TYP
24
1
24X (0.45)
22X (0.65)
SYMM
12
13
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4220208/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0024A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
24X (1.5)
SYMM
(R0.05) TYP
24
1
24X (0.45)
22X (0.65)
SYMM
12
13
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220208/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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