LM3488MM/NOPB [TI]
适用于开关稳压器的 2.97V 至 40V 宽输入电压低侧 N 沟道控制器 | DGK | 8 | -40 to 125;
| 型号： | LM3488MM/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 适用于开关稳压器的 2.97V 至 40V 宽输入电压低侧 N 沟道控制器 | DGK | 8 | -40 to 125 开关 控制器 开关式稳压器 开关式控制器 光电二极管 电源电路 开关式稳压器或控制器 |
| 文件： | 总33页 (文件大小：1355K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM3488
LM3488-Q1
www.ti.com
SNVS089M –JULY 2000–REVISED MARCH 2013
High Efficiency Low-Side N-Channel Controller for Switching Regulators
Check for Samples: LM3488, LM3488-Q1
1
FEATURES
DESCRIPTION
The LM3488 is a versatile Low-Side N-FET high
2
•
LM3488Q is AEC-Q100 qualified and
performance controller for switching regulators. It is
suitable for use in topologies requiring low side FET,
such as boost, flyback, or SEPIC. Moreover, the
LM3488 can be operated at extremely high switching
frequency in order to reduce the overall solution size.
The switching frequency of LM3488 can be adjusted
to any value between 100kHz and 1MHz by using a
single external resistor or by synchronizing it to an
external clock. Current mode control provides
superior bandwidth and transient response, besides
cycle-by-cycle current limiting. Output current can be
programmed with a single external resistor.
manufactured on an Automotive Grade Flow
•
•
8-lead VSSOP package
Internal push-pull driver with 1A peak current
capability
•
•
Current limit and thermal shutdown
Frequency compensation optimized with a
capacitor and a resistor
•
•
•
Internal softstart
Current Mode Operation
Undervoltage Lockout with hysteresis
The LM3488 has built in features such as thermal
shutdown, short-circuit protection and over voltage
protection. Power saving shutdown mode reduces the
total supply current to 5µA and allows power supply
sequencing. Internal soft-start limits the inrush current
at start-up.
APPLICATIONS
•
•
Distributed Power Systems
Notebook, PDA, Digital Camera, and other
Portable Applications
•
•
Offline Power Supplies
Set-Top Boxes
KEY SPECIFICATIONS
•
•
Wide supply voltage range of 2.97V to 40V
100kHz to 1MHz Adjustable and
Synchronizable clock frequency
•
•
±1.5% (over temperature) internal reference
5µA shutdown current (over temperature)
TYPICAL APPLICATION CIRCUIT
Figure 1. Typical SEPIC Converter
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM3488
LM3488-Q1
SNVS089M –JULY 2000–REVISED MARCH 2013
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Connection Diagram
Figure 2. 8-Lead VSSOP Package
PIN DESCRIPTIONS
Pin Name
Pin
No.
Description
ISEN
1
2
Current sense input pin. Voltage generated across an external sense resistor is fed into this pin.
COMP
Compensation pin. A resistor, capacitor combination connected to this pin provides compensation for the control
loop.
FB
AGND
3
4
5
6
7
Feedback pin. The output voltage should be adjusted using a resistor divider to provide 1.26V at this pin.
Analog ground pin.
PGND
Power ground pin.
DR
Drive pin of the IC. The gate of the external MOSFET should be connected to this pin.
FA/SYNC/SD
Frequency adjust, synchronization, and Shutdown pin. A resistor connected to this pin sets the oscillator
frequency. An external clock signal at this pin will synchronize the controller to the frequency of the clock. A high
level on this pin for ≥ 30µs will turn the device off. The device will then draw less than 10µA from the supply.
VIN
8
Power supply input pin.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)
Absolute Maximum Ratings
Input Voltage
45V
-0.4V < VFB < 7V
-0.4V < VFA/SYNC/SD < 7V
1.0A
FB Pin Voltage
FA/SYNC/SD Pin Voltage
Peak Driver Output Current (<10µs)
Power Dissipation
Internally Limited
−65°C to +150°C
+150°C
Storage Temperature Range
Junction Temperature
ESD Susceptibilty
Human Body Model(2)
Vapor Phase (60 sec.)
Infared (15 sec.)
2kV
Lead Temperature
215°C
260°C
DR Pin Voltage
ILIM Pin Voltage
−0.4V ≤ VDR ≤ 8V
600mV
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
(2) The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin.
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(1)
Operating Ratings
Supply Voltage
2.97V ≤ VIN ≤ 40V
−40°C ≤ TJ ≤ +125°C
100kHz ≤ FSW ≤ 1MHz
Junction Temperature Range
Switching Frequency
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
Electrical Characteristics
Specifications in Standard type face are for TJ = 25°C, and in bold type face apply over the full Operating Temperature
Range. Unless otherwise specified, VIN = 12V, RFA = 40kΩ
Symbol
VFB
Parameter
Feedback Voltage
Conditions
Typical
Limit
Unit
VCOMP = 1.4V,
1.26
V
2.97 ≤ VIN ≤ 40V
1.2507/1.24
1.2753/1.28
V(min)
V(max)
ΔVLINE
ΔVLOAD
VUVLO
Feedback Voltage Line Regulation
Output Voltage Load Regulation
Input Undervoltage Lock-out
2.97 ≤ VIN ≤ 40V
0.001
±0.5
%/V
IEAO Source/Sink
%/V (max)
2.85
V
2.97
V(max)
VUV(HYS)
Input Undervoltage Lock-out Hysteresis
Nominal Switching Frequency
170
400
mV
mV (min)
mV (max)
130
210
Fnom
RFA = 40KΩ
kHz
360
430
kHz(min)
kHz(max)
RDS1 (ON)
RDS2 (ON)
VDR (max)
Driver Switch On Resistance (top)
Driver Switch On Resistance (bottom)
Maximum Drive Voltage Swing(1)
IDR = 0.2A, VIN= 5V
IDR = 0.2A
16
4.5
VIN
7.2
100
325
Ω
Ω
V
VIN < 7.2V
VIN ≥ 7.2V
Dmax
Maximum Duty Cycle(2)
Minimum On Time
%
Tmin (on)
nsec
230
550
nsec(min)
nsec(max)
(3)
ISUPPLY
IQ
Supply Current (switching)
2.7
5
mA
mA (max)
3.0
7
Quiescent Current in Shutdown Mode
Current Sense Threshold Voltage
VFA/SYNC/SD = 5V(4), VIN = 5V
VIN = 5V
µA
µA (max)
VSENSE
156
mV
135/ 125
180/ 190
mV (min)
mV (max)
VSC
Short-Circuit Current Limit Sense
Voltage
VIN = 5V
VIN = 5V
343
92
mV
mV (min)
mV (max)
250
415
VSL
Internal Compensation Ramp Voltage
mV
52
132
mV(min)
mV(max)
VSL ratio
VOVP
VSL/VSENSE
0.49
50
0.30
0.70
(min)
(max)
Output Over-voltage Protection (with
respect to feedback voltage)
VCOMP = 1.4V
mV
mV(min)
mV(max)
(5)
32/ 25
78/ 85
(1) The voltage on the drive pin, VDR is equal to the input voltage when input voltage is less than 7.2V. VDR is equal to 7.2V when the input
voltage is greater than or equal to 7.2V.
(2) The limits for the maximum duty cycle can not be specified since the part does not permit less than 100% maximum duty cycle
operation.
(3) For this test, the FA/SYNC/SD Pin is pulled to ground using a 40K resistor .
(4) For this test, the FA/SYNC/SD Pin is pulled to 5V using a 40K resistor.
(5) The over-voltage protection is specified with respect to the feedback voltage. This is because the over-voltage protection tracks the
feedback voltage. The over-voltage thresold can be calculated by adding the feedback voltage, VFB to the over-voltage protection
specification.
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Electrical Characteristics (continued)
Specifications in Standard type face are for TJ = 25°C, and in bold type face apply over the full Operating Temperature
Range. Unless otherwise specified, VIN = 12V, RFA = 40kΩ
Symbol
Parameter
Conditions
Typical
Limit
Unit
VOVP(HYS)
Output Over-Voltage Protection
Hysteresis(5)
VCOMP = 1.4V
60
mV
mV(min)
mV(max)
20
110
Gm
Error Ampifier Transconductance
Error Amplifier Voltage Gain
VCOMP = 1.4V
IEAO = 100µA (Source/Sink)
800
38
µmho
µmho (min)
1000/ 1265 µmho (max)
600/ 365
AVOL
VCOMP = 1.4V
V/V
IEAO = 100µA (Source/Sink)
26
44
V/V (min)
V/V (max)
IEAO
Error Amplifier Output Current (Source/ Source, VCOMP = 1.4V, VFB = 0V
Sink)
110
−140
2.2
µA
µA (min)
µA (max)
80/ 50
140/ 180
Sink, VCOMP = 1.4V, VFB = 1.4V
µA
µA (min)
µA (max)
−100/ −85
−180/ −185
VEAO
Error Amplifier Output Voltage Swing
Upper Limit
V
VFB = 0V
COMP Pin = Floating
1.8
2.4
V(min)
V(max)
Lower Limit
VFB = 1.4V
0.56
V
0.2
1.0
V(min)
V(max)
TSS
Tr
Internal Soft-Start Delay
Drive Pin Rise Time
VFB = 1.2V, VCOMP = Floating
Cgs = 3000pf, VDR = 0 to 3V
Cgs = 3000pf, VDR = 0 to 3V
Output = High
4
25
msec
ns
Tf
Drive Pin Fall Time
25
ns
VSD
Shutdown and Synchronization signal
1.27
V
(6)
threshold
1.4
0.3
V (max)
Output = Low
0.65
V
V (min)
ISD
Shutdown Pin Current
VSD = 5V
VSD = 0V
−1
+1
µA
IFB
Feedback Pin Current
Thermal Shutdown
15
nA
°C
TSD
Tsh
θJA
165
10
Thermal Shutdown Hysteresis
Thermal Resistance
°C
VSSOP-8 Package
200
°C/W
(6) The FA/SYNC/SD pin should be pulled to VIN through a resistor to turn the regulator off.
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Typical Performance Characteristics
Unless otherwise specified, VIN = 12V, TJ = 25°C.
IQ
ISupply
vs
vs
Temperature & Input Voltage
Input Voltage (Non-Switching)
Figure 3.
Figure 4.
ISupply
vs
VIN
Switching Frequency
vs
RFA
Figure 5.
Figure 6.
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Typical Performance Characteristics (continued)
Unless otherwise specified, VIN = 12V, TJ = 25°C.
Frequency
Drive Voltage
vs
Input Voltage
vs
Temperature
Figure 7.
Figure 8.
Current Sense Threshold
COMP Pin Voltage
vs
Load Current
vs
Input Voltage
Figure 9.
Figure 10.
Efficiency
Efficiency
vs
vs
Load Current (3.3V In and 12V Out)
Load Current (5V In and 12V Out)
Figure 11.
Figure 12.
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Typical Performance Characteristics (continued)
Unless otherwise specified, VIN = 12V, TJ = 25°C.
Efficiency
Efficiency
vs
vs
Load Current (9V In and 12V Out)
Load Current (3.3V In and 5V Out)
Figure 13.
Figure 14.
Error Amplifier Gain
Error Amplifier Phase
Figure 15.
Figure 16.
COMP Pin Source Current
Short Circuit Protection
vs
vs
Temperature
Input Voltage
Figure 17.
Figure 18.
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Typical Performance Characteristics (continued)
Unless otherwise specified, VIN = 12V, TJ = 25°C.
Compensation Ramp
Shutdown Threshold Hysteresis
vs
vs
Compensation Resistor
Temperature
Figure 19.
Figure 20.
Current Sense Voltage
vs
Duty Cycle
Figure 21.
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FUNCTIONAL BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
The LM3488 uses a fixed frequency, Pulse Width Modulated (PWM), current mode control architecture. In a
typical application circuit, the peak current through the external MOSFET is sensed through an external sense
resistor. The voltage across this resistor is fed into the ISEN pin. This voltage is then level shifted and fed into the
positive input of the PWM comparator. The output voltage is also sensed through an external feedback resistor
divider network and fed into the error amplifier negative input (feedback pin, FB). The output of the error amplifier
(COMP pin) is added to the slope compensation ramp and fed into the negative input of the PWM comparator.
At the start of any switching cycle, the oscillator sets the RS latch using the SET/Blank-out and switch logic
blocks. This forces a high signal on the DR pin (gate of the external MOSFET) and the external MOSFET turns
on. When the voltage on the positive input of the PWM comparator exceeds the negative input, the RS latch is
reset and the external MOSFET turns off.
The voltage sensed across the sense resistor generally contains spurious noise spikes, as shown in Figure 22.
These spikes can force the PWM comparator to reset the RS latch prematurely. To prevent these spikes from
resetting the latch, a blank-out circuit inside the IC prevents the PWM comparator from resetting the latch for a
short duration after the latch is set. This duration is about 150ns and is called the blank-out time.
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Under extremely light load or no-load conditions, the energy delivered to the output capacitor when the external
MOSFET is on during the blank-out time is more than what is delivered to the load. An over-voltage comparator
inside the LM3488 prevents the output voltage from rising under these conditions. The over-voltage comparator
senses the feedback (FB pin) voltage and resets the RS latch under these conditions. The latch remains in reset
state till the output decays to the nominal value.
Figure 22. Basic Operation of the PWM comparator
SLOPE COMPENSATION RAMP
The LM3488 uses a current mode control scheme. The main advantages of current mode control are inherent
cycle-by-cycle current limit for the switch, and simpler control loop characteristics. It is also easy to parallel power
stages using current mode control since as current sharing is automatic.
Current mode control has an inherent instability for duty cycles greater than 50%, as shown in Figure 23. In
Figure 23, a small increase in the load current causes the switch current to increase by ΔIO. The effect of this
load change, ΔI1, is :
(1)
From the above equation, when D > 0.5, ΔI1 will be greater than ΔIO. In other words, the disturbance is divergent.
So a very small perturbation in the load will cause the disturbance to increase.
To prevent the sub-harmonic oscillations, a compensation ramp is added to the control signal, as shown in
Figure 24.
With the compensation ramp,
(2)
Figure 23. Sub-Harmonic Oscillation for D>0.5
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Figure 24. Compensation Ramp Avoids Sub-Harmonic Oscillation
The compensation ramp has been added internally in LM3488. The slope of this compensation ramp has been
selected to satisfy most of the applications. The slope of the internal compensation ramp depends on the
frequency. This slope can be calculated using the formula:
MC = VSL.FS Volts/second
(3)
In the above equation, VSL is the amplitude of the internal compensation ramp. Limits for VSL have been specified
in the electrical characteristics.
In order to provide the user additional flexibility, a patented scheme has been implemented inside the IC to
increase the slope of the compensation ramp externally, if the need arises. Adding a single external resistor,
RSL(as shown in Figure 25) increases the slope of the compensation ramp, MC by :
.
.
40x10-6 RSL FS Amps
second
DMC =
RSEN
(4)
(5)
In this equation, ΔVSL is equal to 40.10-6RSL. Hence,
ΔVSL versus RSL has been plotted in Figure 26 for different frequencies.
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Figure 25. Increasing the Slope of the Compensation Ramp
Figure 26. ΔVSL vs RSL
FREQUENCY ADJUST/SYNCHRONIZATION/SHUTDOWN
The switching frequency of LM3488 can be adjusted between 100kHz and 1MHz using a single external resistor.
This resistor must be connected between FA/SYNC/SD pin and ground, as shown in Figure 27. See Typical
Performance Characteristics to determine the value of the resistor required for a desired switching frequency.
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The LM3488 can be synchronized to an external clock. The external clock must be connected to the
FA/SYNC/SD pin through a resistor, RSYNC as shown in Figure 28. The value of this resistor is dependent on the
off time of the synchronization pulse, TOFF(SYNC). Table 1 shows the range of resistors to be used for a given
TOFF(SYNC)
.
Table 1.
TOFF(SYNC) (µsec)
RSYNC range (kΩ)
5 to 13
1
2
20 to 40
3
40 to 65
4
55 to 90
5
70 to 110
85 to 140
100 to 160
120 to 190
135 to 215
150 to 240
6
7
8
9
10
It is also necessary to have the width of the synchronization pulse wider than the duty cycle of the converter
(when DR pin is high and the switching point is low). It is also necessary to have the synchronization pulse width
≥ 300nsecs.
The FA/SYNC/SD pin also functions as a shutdown pin. If a high signal (see Electrical Characteristics for
definition of high signal) appears on the FA/SYNC/SD pin, the LM3488 stops switching and goes into a low
current mode. The total supply current of the IC reduces to less than 10µA under these conditions.
Figure 29 and Figure 30 show implementation of shutdown function when operating in Frequency adjust mode
and synchronization mode respectively. In frequency adjust mode, connecting the FA/SYNC/SD pin to ground
forces the clock to run at a certain frequency. Pulling this pin high shuts down the IC. In frequency adjust or
synchronization mode, a high signal for more than 30µs shuts down the IC.
Figure 31 shows implementation of both frequency adjust with RFA resistor and frequency synchronization with
RSYNC. The switching frequency is defined by RFA when a synchronization signal is not applied. When sync is
applied it overrides the RFA setting.
Figure 27. Frequency Adjust
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Figure 28. Frequency Synchronization
Figure 29. Shutdown Operation in Frequency Adjust Mode
Figure 30. Shutdown Operation in Synchronization Mode
R
SYNC
C
SYNC
FA/SYNC/SD
270 pF
LM3488
R
FA
Figure 31. Frequency Adjust or Frequency Synchronization
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SHORT-CIRCUIT PROTECTION
When the voltage across the sense resistor (measured on ISEN Pin) exceeds 350mV, short-circuit current limit
gets activated. A comparator inside LM3488 reduces the switching frequency by a factor of 5 and maintains this
condition till the short is removed.
TYPICAL APPLICATIONS
The LM3488 may be operated in either continuous or discontinuous conduction mode. The following applications
are designed for continuous conduction operation. This mode of operation has higher efficiency and lower EMI
characteristics than the discontinuous mode.
BOOST CONVERTER
The most common topology for LM3488 is the boost or step-up topology. The boost converter converts a low
input voltage into a higher output voltage. The basic configuration for a boost regulator is shown in Figure 32. In
continuous conduction mode (when the inductor current never reaches zero at steady state), the boost regulator
operates in two cycles. In the first cycle of operation, MOSFET Q is turned on and energy is stored in the
inductor. During this cycle, diode D is reverse biased and load current is supplied by the output capacitor, COUT
.
In the second cycle, MOSFET Q is off and the diode is forward biased. The energy stored in the inductor is
transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The
output voltage is defined as:
(6)
(ignoring the drop across the MOSFET and the diode), or
where
•
•
•
D is the duty cycle of the switch
VD is the forward voltage drop of the diode
VQ is the drop across the MOSFET when it is on
(7)
The following sections describe selection of components for a boost converter.
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Figure 32. Simplified Boost Converter Diagram
(a) First cycle of operation
(b) Second cycle of operation
POWER INDUCTOR SELECTION
The inductor is one of the two energy storage elements in a boost converter. Figure 33 shows how the inductor
current varies during a switching cycle. The current through an inductor is quantified as:
(8)
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IL (A)
VIN
L
VIN - VOUT
L
DiL
IL_AVG
t (s)
D*Ts
Ts
(a)
ID (A)
VIN - VOUT
L
ID_AVG
=IOUT_AVG
t (s)
D*Ts
Ts
(b)
ISW (A)
VIN
L
ISW_AVG
t (s)
Ts
D*Ts
(C)
Figure 33. A. Inductor Current B. Diode Current C. Switch Current
If VL(t) is constant, diL(t)/dt must be constant. Hence, for a given input voltage and output voltage, the current in
the inductor changes at a constant rate.
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The important quantities in determining a proper inductance value are IL (the average inductor current) and ΔiL
(the inductor current ripple). If ΔiL is larger than IL, the inductor current will drop to zero for a portion of the cycle
and the converter will operate in discontinuous conduction mode. If ΔiL is smaller than IL, the inductor current will
stay above zero and the converter will operate in continuous conduction mode. All the analysis in this datasheet
assumes operation in continuous conduction mode. To operate in continuous conduction mode, the following
conditions must be met:
IL > ΔiL
(9)
(10)
(11)
Choose the minimum IOUT to determine the minimum L. A common choice is to set ΔiL to 30% of IL. Choosing an
appropriate core size for the inductor involves calculating the average and peak currents expected through the
inductor. In a boost converter,
(12)
and IL_peak = IL(max) + ΔiL(max),
where
DVIN
DiL =
2fSL
(13)
A core size with ratings higher than these values should be chosen. If the core is not properly rated, saturation
will dramatically reduce overall efficiency.
The LM3488 can be set to switch at very high frequencies. When the switching frequency is high, the converter
can be operated with very small inductor values. With a small inductor value, the peak inductor current can be
extremely higher than the output currents, especially under light load conditions.
The LM3488 senses the peak current through the switch. The peak current through the switch is the same as the
peak current calculated above.
PROGRAMMING THE OUTPUT VOLTAGE
The output voltage can be programmed using a resistor divider between the output and the feedback pins, as
shown in Figure 34. The resistors are selected such that the voltage at the feedback pin is 1.26V. RF1 and RF2
can be selected using the equation,
RF1
RF2
(
VOUT = 1.26
1+
(
(14)
A 100pF capacitor may be connected between the feedback and ground pins to reduce noise.
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VIN
L
D
VOUT
COUT
Q
DR
LM3488
ISEN
Rfb1
FB
RSEN
Rfb2
Figure 34. Adjusting the Output Voltage
SETTING THE CURRENT LIMIT
The maximum amount of current that can be delivered to the load is set by the sense resistor, RSEN. Current limit
occurs when the voltage that is generated across the sense resistor equals the current sense threshold voltage,
VSENSE. When this threshold is reached, the switch will be turned off until the next cycle. Limits for VSENSE are
specified in Electrical Characteristics. VSENSE represents the maximum value of the internal control signal VCS
.
This control signal, however, is not a constant value and changes over the course of a period as a result of the
internal compensation ramp (see Figure 22). Therefore the current limit threshold will also change. The actual
current limit threshold is a function of the sense voltage (VSENSE) and the internal compensation ramp:
RSEN x ISWLIMIT = VCSMAX = VSENSE - (D x VSL
)
where
•
ISWLIMIT is the peak switch current limit, defined by the equation below. As duty cycle increases, the control
voltage is reduced as VSL ramps up. Since current limit threshold varies with duty cycle, the following equation
should be used to select RSEN and set the desired current limit threshold:
(15)
VSENSE - (D x VSL
)
RSEN
=
ISWLIMIT
(16)
The numerator of the above equation is VCS, and ISWLIMIT is calculated as:
(D x VIN)
IOUT
+
ISWLIMIT
=
(1-D) (2 x fS x L)
(17)
To avoid false triggering, the current limit value should have some margin above the maximum operating value,
typically 120%. Values for both VSENSE and VSL are specified in Electrical Characteristics. However, calculating
with the limits of these two specs could result in an unrealistically wide current limit or RSEN range. Therefore, the
following equation is recommended, using the VSL ratio value given in Electrical Characteristics:
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VSENSE - (D x VSENSE x VSLratio)
RSEN
=
ISWLIMIT
(18)
RSEN is part of the current mode control loop and has some influence on control loop stability. Therefore, once
the current limit threshold is set, loop stability must be verified. To verify stability, use the following equation:
2 x VSL x fS x L
RSEN
<
Vo - (2 x VIN)
(19)
If the selected RSEN is greater than this value, additional slope compensation must be added to ensure stability,
as described in CURRENT LIMIT WITH EXTERNAL SLOPE COMPENSATION.
CURRENT LIMIT WITH EXTERNAL SLOPE COMPENSATION
RSL is used to add additional slope compensation when required. It is not necessary in most designs and RSL
should be no larger than necessary. Select RSL according to the following equation:
RSEN x (Vo - 2VIN)
- VSL
2 x fS x L
RSL
>
40 mA
where
•
RSEN is the selected value based on current limit. With RSL installed, the control signal includes additional
external slope to stabilize the loop, which will also have an effect on the current limit threshold. Therefore, the
current limit threshold must be re-verified, as illustrated in the equations below :
(20)
VCS = VSENSE – (D x (VSL + ΔVSL))
where
•
ΔVSL is the additional slope compensation generated and calculated as:
(21)
(22)
ΔVSL = 40 µA x RSL
This changes the equation for current limit (or RSEN) to:
VSENSE - (D x(VSL + DVSL))
ISWLIMIT
=
RSEN
(23)
The RSEN and RSL values may have to be calculated iteratively in order to achieve both the desired current limit
and stable operation. In some designs RSL can also help to filter noise on the ISEN pin.
If the inductor is selected such that ripple current is the recommended 30% value, and the current limit threshold
is 120% of the maximum peak, a simpler method can be used to determine RSEN. The equation below will
provide optimum stability without RSL, provided that the above 2 conditions are met:
VSENSE
RSEN
=
Vo - Vi
L x fS
x D
ISWLIMIT
+
(24)
POWER DIODE SELECTION
Observation of the boost converter circuit shows that the average current through the diode is the average load
current, and the peak current through the diode is the peak current through the inductor. The diode should be
rated to handle more than its peak current. The peak diode current can be calculated using the formula:
ID(Peak) = IOUT/ (1−D) + ΔIL
(25)
In the above equation, IOUT is the output current and ΔIL has been defined in Figure 33.
The peak reverse voltage for boost converter is equal to the regulator output voltage. The diode must be capable
of handling this voltage. To improve efficiency, a low forward drop schottky diode is recommended.
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POWER MOSFET SELECTION
The drive pin of LM3488 must be connected to the gate of an external MOSFET. In a boost topology, the drain of
the external N-Channel MOSFET is connected to the inductor and the source is connected to the ground. The
drive pin (DR) voltage depends on the input voltage (see Typical Performance Characteristics). In most
applications, a logic level MOSFET can be used. For very low input voltages, a sub-logic level MOSFET should
be used.
The selected MOSFET directly controls the efficiency. The critical parameters for selection of a MOSFET are:
1. Minimum threshold voltage, VTH(MIN)
2. On-resistance, RDS(ON)
3. Total gate charge, Qg
4. Reverse transfer capacitance, CRSS
5. Maximum drain to source voltage, VDS(MAX)
The off-state voltage of the MOSFET is approximately equal to the output voltage. VDS(MAX) of the MOSFET must
be greater than the output voltage. The power losses in the MOSFET can be categorized into conduction losses
and ac switching or transition losses. RDS(ON) is needed to estimate the conduction losses. The conduction loss,
PCOND, is the I2R loss across the MOSFET. The maximum conduction loss is given by:
where
•
DMAX is the maximum duty cycle.
(26)
(27)
The turn-on and turn-off transitions of a MOSFET require times of tens of nano-seconds. CRSS and Qg are
needed to estimate the large instantaneous power loss that occurs during these transitions.
The amount of gate current required to turn the MOSFET on can be calculated using the formula:
IG = Qg.FS
(28)
The required gate drive power to turn the MOSFET on is equal to the switching frequency times the energy
required to deliver the charge to bring the gate charge voltage to VDR (see Electrical Characteristics and Typical
Performance Characteristics for the drive voltage specification).
PDrive = FS.Qg.VDR
(29)
INPUT CAPACITOR SELECTION
Due to the presence of an inductor at the input of a boost converter, the input current waveform is continuous
and triangular, as shown in Figure 33. The inductor ensures that the input capacitor sees fairly low ripple
currents. However, as the input capacitor gets smaller, the input ripple goes up. The rms current in the input
capacitor is given by:
(30)
The input capacitor should be capable of handling the rms current. Although the input capacitor is not as critical
in a boost application, low values can cause impedance interactions. Therefore a good quality capacitor should
be chosen in the range of 10µF to 20µF. If a value lower than 10µF is used, then problems with impedance
interactions or switching noise can affect the LM3478. To improve performance, especially with VIN below 8 volts,
it is recommended to use a 20Ω resistor at the input to provide a RC filter. The resistor is placed in series with
the VIN pin with only a bypass capacitor attached to the VIN pin directly (see Figure 35). A 0.1µF or 1µF ceramic
capacitor is necessary in this configuration. The bulk input capacitor and inductor will connect on the other side
of the resistor with the input power supply.
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R
IN
V
IN
V
IN
C
IN
C
LM3488
BYPASS
Figure 35. Reducing IC Input Noise
OUTPUT CAPACITOR SELECTION
The output capacitor in a boost converter provides all the output current when the inductor is charging. As a
result it sees very large ripple currents. The output capacitor should be capable of handling the maximum rms
current. The rms current in the output capacitor is:
(31)
Where
(32)
and D, the duty cycle is equal to (VOUT − VIN)/VOUT
.
The ESR and ESL of the output capacitor directly control the output ripple. Use capacitors with low ESR and ESL
at the output for high efficiency and low ripple voltage. Surface Mount tantalums, surface mount polymer
electrolytic and polymer tantalum, Sanyo- OSCON, or multi-layer ceramic capacitors are recommended at the
output.
DESIGNING SEPIC USING LM3488
Since the LM3488 controls a low-side N-Channel MOSFET, it can also be used in SEPIC (Single Ended Primary
Inductance Converter) applications. An example of SEPIC using LM3488 is shown in Figure 36. As shown in
Figure 36, the output voltage can be higher or lower than the input voltage. The SEPIC uses two inductors to
step-up or step-down the input voltage. The inductors L1 and L2 can be two discrete inductors or two windings of
a coupled transformer since equal voltages are applied across the inductor throughout the switching cycle. Using
two discrete inductors allows use of catalog magnetics, as opposed to a custom transformer. The input ripple can
be reduced along with size by using the coupled windings of transformer for L1 and L2.
Due to the presence of the inductor L1 at the input, the SEPIC inherits all the benefits of a boost converter. One
main advantage of SEPIC over boost converter is the inherent input to output isolation. The capacitor CS isolates
the input from the output and provides protection against shorted or malfunctioning load. Hence, the A SEPIC is
useful for replacing boost circuits when true shutdown is required. This means that the output voltage falls to 0V
when the switch is turned off. In a boost converter, the output can only fall to the input voltage minus a diode
drop.
The duty cycle of a SEPIC is given by:
(33)
In the above equation, VQ is the on-state voltage of the MOSFET, Q, and VDIODE is the forward voltage drop of
the diode.
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Figure 36. Typical SEPIC Converter
POWER MOSFET SELECTION
As in boost converter, the parameters governing the selection of the MOSFET are the minimum threshold
voltage, VTH(MIN), the on-resistance, RDS(ON), the total gate charge, Qg, the reverse transfer capacitance, CRSS
,
and the maximum drain to source voltage, VDS(MAX). The peak switch voltage in a SEPIC is given by:
VSW(PEAK) = VIN + VOUT + VDIODE
(34)
The selected MOSFET should satisfy the condition:
VDS(MAX) > VSW(PEAK)
(35)
(36)
The peak switch current is given by:
The rms current through the switch is given by:
(37)
POWER DIODE SELECTION
The Power diode must be selected to handle the peak current and the peak reverse voltage. In a SEPIC, the
diode peak current is the same as the switch peak current. The off-state voltage or peak reverse voltage of the
diode is VIN + VOUT. Similar to the boost converter, the average diode current is equal to the output current.
Schottky diodes are recommended.
SELECTION OF INDUCTORS L1 AND L2
Proper selection of the inductors L1 and L2 to maintain constant current mode requires calculations of the
following parameters.
Average current in the inductors:
(38)
IL2AVE = IOUT
(39)
23
Peak to peak ripple current, to calculate core loss if necessary:
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(40)
(41)
maintains the condition IL > ΔiL/2 to ensure constant current mode.
(VIN - VQ)(1-D)
L1 >
2IOUT S
f
(42)
(43)
(VIN - VQ)D
L2 >
2IOUT S
f
Peak current in the inductor, to ensure the inductor does not saturate:
(44)
(45)
IL1PK must be lower than the maximum current rating set by the current sense resistor.
The value of L1 can be increased above the minimum recommended to reduce input ripple and output ripple.
However, once DIL1 is less than 20% of IL1AVE, the benefit to output ripple is minimal.
By increasing the value of L2 above the minimum recommended, ΔIL2 can be reduced, which in turn will reduce
the output ripple voltage:
IOUT
DIL2
ESR
DVOUT
=
+
(1-D )
2
where
•
ESR is the effective series resistance of the output capacitor.
(46)
If L1 and L2 are wound on the same core, then L1 = L2 = L. All the equations above will hold true if the
inductance is replaced by 2L. A good choice for transformer with equal turns is Coiltronics CTX series Octopack.
SENSE RESISTOR SELECTION
The peak current through the switch, ISW(PEAK) can be adjusted using the current sense resistor, RSEN, to provide
a certain output current. Resistor RSEN can be selected using the formula:
VSENSE - D(VSL + DVSL)
RSEN
=
ISWPEAK
(47)
Sepic Capacitor Selection
The selection of SEPIC capacitor, CS, depends on the rms current. The rms current of the SEPIC capacitor is
given by:
(48)
The SEPIC capacitor must be rated for a large ACrms current relative to the output power. This property makes
the SEPIC much better suited to lower power applications where the rms current through the capacitor is
relatively small (relative to capacitor technology). The voltage rating of the SEPIC capacitor must be greater than
the maximum input voltage. Tantalum capacitors are the best choice for SMT, having high rms current ratings
relative to size. Ceramic capacitors could be used, but the low C values will tend to cause larger changes in
voltage across the capacitor due to the large currents. High C value ceramics are expensive. Electrolytics work
well for through hole applications where the size required to meet the rms current rating can be accommodated.
There is an energy balance between CS and L1, which can be used to determine the value of the capacitor. The
basic energy balance equation is:
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(49)
Where
(50)
(51)
is the ripple voltage across the SEPIC capacitor, and
is the ripple current through the inductor L1. The energy balance equation can be solved to provide a minimum
value for CS:
(52)
Input Capacitor Selection
Similar to a boost converter, the SEPIC has an inductor at the input. Hence, the input current waveform is
continuous and triangular. The inductor ensures that the input capacitor sees fairly low ripple currents. However,
as the input capacitor gets smaller, the input ripple goes up. The rms current in the input capacitor is given by:
(53)
The input capacitor should be capable of handling the rms current. Although the input capacitor is not as critical
in a boost application, low values can cause impedance interactions. Therefore a good quality capacitor should
be chosen in the range of 10µF to 20µF. If a value lower than 10µF is used, then problems with impedance
interactions or switching noise can affect the LM3478. To improve performance, especially with VIN below 8 volts,
it is recommended to use a 20Ω resistor at the input to provide a RC filter. The resistor is placed in series with
the VIN pin with only a bypass capacitor attached to the VIN pin directly (see Figure 35). A 0.1µF or 1µF ceramic
capacitor is necessary in this configuration. The bulk input capacitor and inductor will connect on the other side
of the resistor with the input power supply.
Output Capacitor Selection
The ESR and ESL of the output capacitor directly control the output ripple. Use low capacitors with low ESR and
ESL at the output for high efficiency and low ripple voltage. Surface mount tantalums, surface mount polymer
electrolytic and polymer tantalum, Sanyo- OSCON, or multi-layer ceramic capacitors are recommended at the
output.
The output capacitor of the SEPIC sees very large ripple currents (similar to the output capacitor of a boost
converter. The rms current through the output capacitor is given by:
(DIL1 + DIL2)2
ISWPK2 - ISWPK (DIL1 + DIL2)+
(1-D) - IOUT
2
IRMS
=
3
(54)
The ESR and ESL of the output capacitor directly control the output ripple. Use low capacitors with low ESR and
ESL at the output for high efficiency and low ripple voltage. Surface mount tantalums, surface mount polymer
electrolytic and polymer tantalum, Sanyo- OSCON, or multi-layer ceramic capacitors are recommended at the
output for low ripple.
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Other Application Circuits
V
+
= 3.3V (±10%)
IN
IN
C
100 mF, 6.3V
L
10 mH
I
V
IN
SEN
D MBRD340
V = 5V, 2A
OUT
C
22 nF
20k
C
R
FA
COMP FA/SD/SYNC
+
C
OUT
RC
4.7k
40k
LM3488
100 mF, 10V
x2
Q1
IRF7807
FB
DR
R
F1
60k
AGND
PGND
R
F2
C
SN
R
SN
0.025W
0.01 mF
Figure 37. Typical High Efficiency Step-Up (Boost) Converter
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SNVS089M –JULY 2000–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision L (March 2013) to Revision M
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 26
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PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
LM3488MM
ACTIVE
VSSOP
VSSOP
DGK
8
8
1000
TBD
Call TI
CU SN
Call TI
S21B
S21B
LM3488MM/NOPB
ACTIVE
DGK
1000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
-40 to 125
LM3488MMX
NRND
VSSOP
VSSOP
DGK
DGK
8
8
3500
3500
TBD
Call TI
CU SN
Call TI
-40 to 125
-40 to 125
S21B
S21B
LM3488MMX/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LM3488QMM/NOPB
LM3488QMMX/NOPB
ACTIVE
ACTIVE
VSSOP
VSSOP
DGK
DGK
8
8
1000
3500
Green (RoHS
& no Sb/Br)
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
SSKB
SSKB
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3488MM
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
DGK
DGK
DGK
8
8
8
8
8
8
1000
1000
3500
3500
1000
3500
178.0
178.0
330.0
330.0
178.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
5.3
5.3
5.3
5.3
5.3
5.3
3.4
3.4
3.4
3.4
3.4
3.4
1.4
1.4
1.4
1.4
1.4
1.4
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
LM3488MM/NOPB
LM3488MMX
LM3488MMX/NOPB
LM3488QMM/NOPB
LM3488QMMX/NOPB
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM3488MM
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
DGK
DGK
DGK
8
8
8
8
8
8
1000
1000
3500
3500
1000
3500
210.0
210.0
367.0
367.0
210.0
367.0
185.0
185.0
367.0
367.0
185.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
LM3488MM/NOPB
LM3488MMX
LM3488MMX/NOPB
LM3488QMM/NOPB
LM3488QMMX/NOPB
Pack Materials-Page 2
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