LM34917ATL/NOPB [TI]
具有智能限流功能的 2.3x2mm、8-33V、1.25A、恒定导通时间非同步降压稳压器 | YZR | 12 | -40 to 125;型号: | LM34917ATL/NOPB |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有智能限流功能的 2.3x2mm、8-33V、1.25A、恒定导通时间非同步降压稳压器 | YZR | 12 | -40 to 125 稳压器 |
文件: | 总22页 (文件大小:757K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LM34917A
www.ti.com.cn
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
具有智能电流限制的 LM34917A 超小型 33V,1.25A 恒定接通时间降压开
关稳压器
查询样品: LM34917A
1
特性
封装
2
•
工作输入电压范围:8V 至 33V
•
12 焊锡凸点 DSBGA 封装
•
•
•
•
•
芯片尺寸球栅阵列 (DSBGA) 封装
≊35V 时,输入过压关断
瞬态能力达到 50V
说明
LM34917A 降压开关稳压器特有执行低成本、高效降
压偏置稳压器(至少能够为负载提供 1.25A 的电流)
所需的全部功能。 为了减少由可能的电感器饱和所导
致的过多开关电流,谷值电流限值阀值随着输入和输出
电压的变化而改变,而且接通时间会在检测到电流限值
时被减少。 这个降压稳压器包含一个 N 通道降压开关
并且采用 12 引脚 DSBGA 封装。 恒定接通时间反馈
调节机制无需环路补偿,从而实现快速负载瞬态响应,
并简化电路实现。 由于输入电压和接通时间之间的反
比关系,线路和负载变化时,运行频率保持恒定。 谷
值电流限制可在检测到电流限值时实现恒定电压到恒定
电流的平滑转换,从而在不使用折返的情况下减少频率
和输出电压。 额外特性包括:VCC欠压闭锁、输入过压
关断、热关断、栅极驱动欠压闭锁和最大占空比限制。
集成 N 通道降压开关
随 V输入和 V输出变化的谷值电流限值以减少过多电
感器电流
•
•
•
•
•
•
电流限制时,接通时间被减少
集成启动稳压器
无需环路补偿
超快瞬态响应
最大开关频率:2MHz
在负载电流和输入电压变化时,工作频率几乎保持
恒定
•
•
•
•
可编程软启动
精密内部基准
可调输出电压
热关断
典型应用
•
•
•
高效负载点 (POL) 稳压器
非隔离式降压稳压器
次级高压后置稳压器
基本降压稳压器
8V - 33V
Input
VIN
VCC
C3
C1
LM34917A
R
ON
BST
SW
L1
RON/SD
SS
C4
V
OUT
SHUT
DOWN
C8
C7
D1
R3
C2
R1
R2
ISEN
FB
C6
RTN
SGND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
版权 © 2007–2013, Texas Instruments Incorporated
English Data Sheet: SNOSAX7
LM34917A
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
www.ti.com.cn
连接图
BST
D3
C3
B3
A3
D2
C2
B2
A2
D1
C1
B1
A1
D1
C1
B1
A1
D2
C2
B2
A2
D3
C3
B3
A3
SW
VIN
SW
VCC
SS
VIN
ISEN
RON
FB
SGND
RTN
图 1. 焊锡凸块一侧
封装编号 YZR0012UNA
图 2. 顶视图
封装编号 YZR0012UNA
引脚说明
引脚 编号
名称
说明
应用信息
A1
A2
A3
B1
B2
SGND
RTN
感测接地
电路接地
再循环电流从这个引脚流入电流感测电阻器。
针对除电流限值检测之外所有内部电路的接地。
FB
反馈输入来自经稳压输出
电流感测
被内部连接至稳压和过压比较器。 此稳压电平为 2.5V。
ISEN
再循环电流从这个引脚流入续流二极管。
RON/SD
接通时间控制和关断
VIN 和这个引脚之间的一个外部电阻器设定降压开关接通时
间。 把这个引脚接地将关断稳压器。
B3
C1,C2
C3
SS
VIN
VCC
软启动
一个内部电流源将外部电容器充电至 2.5V,从而提供软启动功
能。
输入电源电压
启动稳压器的输出
工作输入电压范围为 8.0V 至 33V,此时过压关断在内部设定
为 ≊35V。 瞬态能力为 50V。
标称稳压值为 7.0V。 将一个 0.1µF 电容器由这个引脚连接至
RTN。 可将一个外部电压(8V 至 14V)施加到这个引脚来减
少内部耗散。 将一个内部二极管连接在 VCC 和 VIN 之间。
D1,D2
SW
开关节点
内部连接至降压开关源。 连接至电感器、二极管和引导电容
器。
D3
BST
针对引导电容器的升压引脚
将一个 0.022µF 电容器由 SW 连接至这个引脚。 每次关闭时
间时,通过一个内部二极管对此电容器充电。
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
Copyright © 2007–2013, Texas Instruments Incorporated
LM34917A
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ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
Absolute Maximum Ratings(1)(2)
VIN to RTN
50V
BST to RTN
64V
SW to RTN (Steady State)
BST to VCC
-1.5V
50V
VIN to SW
50V
BST to SW
14V
VCC to RTN
14V
SGND to RTN
-0.3V to +0.3V
See text
-0.3V to 4V
-0.3 to 7V
Current out of ISEN
SS to RTN
All Other Inputs to RTN
(3)
ESD Rating
Human Body Model
Storage Temperature Range
Junction Temperature
2kV
-65°C to +150°C
150°C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
(1)
Operating Ratings
VIN Voltage
8.0V to 33V
−40°C to + 125°C
Junction Temperature
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
Electrical Characteristics
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C
to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the
(2)
following conditions apply: VIN = 12V, RON = 200kΩ. See (1) and
.
Symbol
Parameter
Conditions
Min
6.6
Typ
Max
7.4
Units
Start-Up Regulator, VCC
VCCReg
VCC regulated output
Vin > 9V
ICC = 0 mA,
7.0
1.3
V
V
VIN-VCC dropout voltage
VCC = UVLOVCC + 250 mV
VCC output impedance
(0 mA ≤ ICC ≤ 5 mA)
VIN = 8V
150
0.75
11
Ω
VIN = 12V
(3)
VCC current limit
VCC = 0V
mA
V
UVLOVCC
VCC under-voltage lockout
threshold
VCC increasing
5.45
UVLOVCC hysteresis
UVLOVCC filter delay
IIN operating current
IIN shutdown current
VCC decreasing
145
3
mV
µs
100 mV overdrive
Non-switching, FB = 3V
RON/SD = 0V
0.68
85
0.95
160
mA
µA
Switch Characteristics
Rds(on)
UVLOGD
Buck Switch Rds(on)
Gate Drive UVLO
ITEST = 200 mA
0.33
4
0.7
Ω
VBST - VSW Increasing
2.65
4.62
V
(1) For detailed information on soldering DSBGA packages, refer to Application Note AN-1112 (SNVA009).
(2) Typical specifications represent the most likely parametric norm at 25°C operation.
(3) VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading
Copyright © 2007–2013, Texas Instruments Incorporated
3
LM34917A
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
www.ti.com.cn
Electrical Characteristics (continued)
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C
to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the
following conditions apply: VIN = 12V, RON = 200kΩ. See (1) and (2)
.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
UVLOGD hysteresis
450
mV
Softstart Pin
VSS
ISS
Pull-up voltage
2.5
V
µA
V
Internal current source
11.6
0.18
VRES
Restart threshold after OVP
shutdown
Current Limit
ILIM
Threshold
VIN = 8V, VFB = 2.4V
1.15
1.05
0.95
1.35
1.2
1.55
1.45
1.35
A
VIN = 30V, VFB = 2.4V
VIN = 30V, VFB = 1.0V
1.15
150
Response time
ns
On Timer
tON - 1
On-time (normal operation)
On-time (normal operation)
On-time (current limit)
VIN = 10V, RON = 200 kΩ
VIN = 32V, RON = 200 kΩ
VIN = 10V, RON = 200 kΩ
2.1
0.3
2.8
860
1.13
0.65
40
3.5
1.0
µs
ns
µs
V
tON - 2
tON - 3
Shutdown threshold at RON/SD Voltage at RON/SD rising
Shutdown Threshold hysteresis Voltage at RON/SD falling
mV
Off Timer
tOFF
Minimum Off-time
90
ns
Regulation and Over-Voltage Comparators (FB Pin)
VREF
FB regulation threshold
FB over-voltage threshold
FB bias current
SS pin = steady state
2.445
33.0
2.50
2.9
10
2.550
36.9
V
V
FB = 3V
nA
Input Over-Voltage Shutdown
VIN(OV) Shutdown voltage threshold at
VIN
Thermal Shutdown
TSD
VIN increasing
34.8
V
Thermal shutdown temperature Junction temperature rising
Thermal shutdown hysteresis
175
20
°C
°C
Thermal Resistance
θJA Junction to Ambient
0 LFPM Air Flow
58
°C/W
4
Copyright © 2007–2013, Texas Instruments Incorporated
LM34917A
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ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
Typical Performance Characteristics
Unless otherwise specified the following conditions apply: TJ = 25°C
Efficiency at 1.5 MHz
Efficiency at 2 MHz
Figure 3.
Figure 4.
VCC vs. VIN
ON-Time vs. VIN and RON
10
7.5
R
ON
= 600 kW
200 kW
100 kW
7.0
6.5
6.0
5.5
5.0
F
= 94 kHz
S
3.0
1.0
F
S
= 350 kHz
400 kW
F
S
= 700 kHz
0.3
0.1
50 kW
5
10
15
20
(V)
25
30
35
6.5
7.0
7.5
8.0
(V)
8.5
9.0
V
IN
V
IN
Figure 5.
Figure 6.
Voltage at the RON/SD Pin
Valley Current Limit Threshold vs. VFB and VIN
1.5
3.0
2.0
1.0
0
1.4
R
ON
= 50k
100k
200k
V
= 8V
IN
1.3
1.2
1.1
1.0
15V
24V
600k
33V
0
0.5
1.0
1.5
(V)
2.0
2.5
5
10
15
20
(V)
25
30
35
V
V
FB
IN
Figure 7.
Figure 8.
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LM34917A
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
www.ti.com.cn
Typical Performance Characteristics (continued)
Unless otherwise specified the following conditions apply: TJ = 25°C
VCC vs. ICC
ICC vs Externally Applied VCC
10
8
8
V
8 10V
IN
7
6
5
4
3
2
1
0
V
= 8V
IN
700 kHz
350 kHz
6
V
= 9V
IN
4
2
V
Externally Loaded
CC
F
= 94 kHz
S
F
= 350 kHz
S
0
7
8
9
10
11
12
(V)
13
14
0
2
4
8
10
12
6
I
(mA)
APPLIED V
CC
CC
Figure 9.
Figure 10.
Shutdown and Operating Current Into VIN
Figure 11.
6
Copyright © 2007–2013, Texas Instruments Incorporated
LM34917A
www.ti.com.cn
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
Typical Application Circuit and Block Diagram
7V START-UP
REGULATOR
LM34917A
Input
VIN
VCC
8V - 33V
C5
C1
V
CC
C3
UVLO
0V SHUTDOWN
+
34.8V
ON TIMER
GND
R
ON
0.65V
MINIMUM
R
ON
OFF TIMER
START
D Ton FINISH
RON/SD
FINISH
START
BST
SD
Gate Drive
UVLO
THERMAL
SHUTDOWN
V
IN
2.5V
C4
11.6 mA
LOGIC
SS
FB
L1
LEVEL
SHIFT
Driver
C6
R3
C8
SW
REGULATION
COMPARATOR
C7
V
OUT
D1
OVER-VOLTAGE
COMPARATOR
CURRENT LIMIT
COMPARATOR
2.9V
R1
+
RTN
ISEN
-
R
SENSE
C2
V
CL
Threshold
Adjust
IN
-
+
41 mW
R2
FB
SGND
Copyright © 2007–2013, Texas Instruments Incorporated
7
LM34917A
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
www.ti.com.cn
V
IN
7.0V
UVLO
V
CC
SW Pin
Inductor
Current
2.5V
SS Pin
V
OUT
t1
t2
Figure 12. Startup Sequence
8
Copyright © 2007–2013, Texas Instruments Incorporated
LM34917A
www.ti.com.cn
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
FUNCTIONAL DESCRIPTION
The LM34917A Step Down Switching Regulator features all the functions needed to implement a low cost,
efficient buck bias power converter capable of supplying at least 1.25A to the load. This high voltage regulator
contains an N-Channel buck switch, is easy to implement, and is available in the DSBGA package. The
regulator’s operation is based on a constant on-time control scheme where the on-time is inversely proportional
to the input voltage. This feature results in the operating frequency remaining relatively constant with load and
input voltage variations. The feedback control scheme requires no loop compensation resulting in very fast load
transient response. The valley current limit scheme protects against excessively high currents if the output is
short circuited when VIN is high. To aid in controlling excessive switch current due to a possible saturating
inductor the valley current limit threshold changes with input and output voltages, and the on-time is reduced by
approximately 50% when current limit is detected. An over-voltage detection at VIN stops the circuit's switching
when the input voltage exceeds 34.8V. The LM34917A can be applied in numerous applications to efficiently
regulate down higher voltages. Additional features include: Thermal shutdown, VCC under-voltage lock-out, gate
drive under-voltage lock-out, and maximum duty cycle limit.
Control Circuit Overview
The LM34917A buck DC-DC regulator employs a control scheme based on a comparator and a one-shot on-
timer, with the output voltage feedback (FB) compared to an internal reference (2.5V). If the FB voltage is below
the reference the buck switch is switched on for a time period determined by the input voltage and a
programming resistor (RON). Following the on-time the switch remains off until the FB voltage falls below the
reference, but for a time not less than the minimum off-time forced by the LM34917A. The buck switch is then
switched on for another on-time period.
When in regulation, the LM34917A operates in continuous conduction mode at heavy load currents and
discontinuous conduction mode at light load currents. In continuous conduction mode the inductor’s current is
always greater than zero, and the operating frequency remains relatively constant with load and line variations.
The minimum load current for continuous conduction mode is one-half the inductor’s ripple current amplitude.
The approximate operating frequency is calculated as follows:
VOUT x (VIN œ 1.35V)
VIN x 1.16 x 10-10 x (RON + 1.4k)
fSW
=
(1)
The buck switch duty cycle is equal to:
VOUT
VIN
tON
DC =
= tON x fSW
=
tON + tOFF
(2)
In discontinuous conduction mode, where the inductor’s current reaches zero during the off-time forcing a longer-
than-normal off-time, the operating frequency is lower than in continuous conduction mode, and varies with load
current. Conversion efficiency is maintained at light loads since the switching losses reduce with the reduction in
load and frequency. The approximate discontinuous operating frequency can be calculated as follows:
VOUT2 x L1 x 1.48 x 1020
fSW
=
2
RL x RON
(3)
where RL = the load resistance, and L1 is the circuit’s inductor.
The output voltage is set by the two feedback resistors (R1, R2 in the Block Diagram). The regulated output
voltage is calculated as follows:
VOUT = 2.5 x (R1 + R2) / R2
(4)
Output voltage regulation is based on supplying ripple voltage to the feedback input (FB pin) in phase with the
SW pin. The LM34917A requires a minimum of 25 mVp-p of ripple voltage at the FB pin. The ripple is generated
as a triangle wavefrom at the junction of R3 and C8 as the SW pin switches high and low, and fed to the FB pin
by C7.
If the voltage at FB rises above 2.9V, due to a transient at VOUT or excessive inductor current which creates
higher than normal ripple at VOUT, the internal over-voltage comparator immediately shuts off the internal buck
switch. The next on-time starts when the voltage at FB falls below 2.5V and the inductor current falls below the
current limits threshold.
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LM34917A
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ON-Time Timer
The on-time for the LM34917A is determined by the RON resistor and the input voltage (VIN), calculated from:
1.16 x 10-10 x (RON + 1.4 kW)
tON
=
+ 100 ns
VIN - 1.35V
(5)
The inverse relationship with VIN results in a nearly constant frequency as VIN is varied. To set a specific
continuous conduction mode switching frequency (fSW), the RON resistor is determined from the following:
VOUT x (VIN - 1.35V)
VIN x 1.16 x 10-10 x fSW
-1.4kW
RON
=
(6)
Equation 1, Equation 5 and Equation 6 are valid only during normal operation - i.e., the circuit is not in current
limit. When the LM34917A operates in current limit, the on-time is reduced by approximately 50%. This feature
reduces the peak inductor current which may be excessively high if the load current and the input voltage are
simultaneously high. This feature operates on a cycle-by-cycle basis until the load current is reduced and the
output voltage resumes its normal regulated value. Equation 1, Equation 5 and Equation 6 have a ±25%
tolerance.
Remote Shutdown
The LM34917A can be remotely shut down by taking the RON/SD pin below 0.65V. See Figure 13. In this mode
the SS pin is internally grounded, the on-timer is disabled, and bias currents are reduced. Releasing the RON/SD
pin allows the circuit to resume operation after the SS pin voltage is below 0.18V. The voltage at the RON/SD pin
is normally between 1.4V and 3.5V, depending on VIN and the RON resistor.
V
IN
Input
Voltage
LM34917A
R
ON
RON/SD
STOP
RUN
Figure 13. Remote Shutdown
Input Over-Voltage Shutdown
If the input voltage at VIN increases above 34.8V an internal comparator disables the buck switch and the on-
timer, and grounds the soft-start pin. Normal operation resumes when the VIN voltage reduces below 34.8V, and
when the soft-start voltage (at the SS pin) has reduced below 0.18V.
Current Limit
Current limit detection occurs during the off-time by monitoring the recirculating current flowing out of the ISEN
pin. Referring to the Block Diagram, during the off-time the inductor current flows through the load, into SGND,
through the internal sense resistor, out of ISEN and through D1 to the inductor. If that current exceeds the
current limit threshold the current limit comparator output delays the start of the next on-time period. The next on-
time starts when the current out of ISEN is below the threshold and the voltage at FB falls below 2.5V. The
operating frequency is typically lower due to longer-than-normal off-times.
The valley current limit threshold is a function of the input voltage (VIN) and the output voltage sensed at FB, as
shown in the graph “Valley Current Limit Threshold vs. VFB and VIN”. This feature reduces the inductor current’s
peak value at high line and load. To further reduce the inductor’s peak current, the next cycle’s on-time is
reduced by approximately 50% if the voltage at FB is below its threshold when the inductor current reduces to
the current limit threshold (VOUT is low due to current limiting).
10
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LM34917A
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ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
Figure 14 illustrates the inductor current waveform during normal operation and in current limit. During the first
“Normal Operation” the load current is IOUT1, the average of the ripple waveform. As the load resistance is
reduced, the inductor current increases until it exceeds the current limit threshold. During the “Current Limited”
portion of Figure 14, the current limit threshold lowers since the high load current causes VOUT (and the voltage
at FB) to reduce. The on-time is reduced by approximately 50%, resulting in lower ripple amplitude for the
inductor’s current. During this time the LM34917A is in a constant current mode, with an average load current
equal to the current limit threshold + ΔI/2 (IOUT2). Normal operation resumes when the load current is reduced to
IOUT3, allowing VOUT, the current limit threshold, and the on-time to return to their normal values. Note that in the
second period of “Normal Operation”, even though the inductor’s peak current exceeds the current limit threshold
during part of each cycle, the circuit is not in current limit since the current falls below the threshold before the
feedback voltage reduces to its threshold to initiate the next on-time.
The peak current allowed through the buck switch, and the ISEN pin, is 2A, and the maximum allowed average
current is 1.5A.
I
OUT2
Current Limit
Threshold
I
OUT3
DI
T
ON
2
I
OUT1
T
ON
2.5V
Normal
Operation
Current
Limited
Normal
Operation
Load
Current
Increases
Load Current
Decreases
Figure 14. Inductor Current - Normal and Current Limit Operation
N - Channel Buck Switch and Driver
The LM34917A integrates an N-Channel buck switch and associated floating high voltage gate driver. The gate
driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.022
µF capacitor (C4) connected between BST and SW provides the voltage to the driver during the on-time. During
each off-time, the SW pin is at approximately -1V, and C4 is recharged for the next on-time from VCC through the
internal diode. The minimum off-time ensures a minimum time each cycle to recharge the bootstrap capacitor.
Softstart
The softstart feature allows the converter to gradually reach a steady state operating point, thereby reducing
start-up stresses and current surges. Upon turn-on, after VCC reaches the under-voltage threshold, an internal
11.6 µA current source charges up the external capacitor at the SS pin to 2.5V (t2 in Figure 12). The ramping
voltage at SS (and the non-inverting input of the regulation comparator) ramps up the output voltage in a
controlled manner.
An internal switch grounds the SS pin if VCC is below the under-voltage lockout threshold, if the RON/SD pin is
grounded, or if VIN exceeds the overvoltage threshold.
Copyright © 2007–2013, Texas Instruments Incorporated
11
LM34917A
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
www.ti.com.cn
Thermal Shutdown
The LM34917A should be operated so the junction temperature does not exceed 125°C. If the junction
temperature increases above that, an internal Thermal Shutdown circuit activates (typically) at 175°C, taking the
controller to a low power reset state by disabling the buck switch. This feature helps prevent catastrophic failures
from accidental device overheating. When the junction temperature reduces below 155°C (typical hysteresis =
20°C), normal operation resumes.
Applications Information
EXTERNAL COMPONENTS
The procedure for calculating the external components is illustrated with the following design example. Referring
to the Block Diagram, the circuit is to be configured for the following specifications:
•
•
•
•
•
•
•
VOUT = 5V
VIN = 8V to 33V
Minimum load current = 200 mA
Maximum load current = 1000 mA
Switching Frequency = 1.5 MHz
Soft-start time = 5 ms
Output voltage ripple level: Minimum
R1 and R2: These resistors set the output voltage. The ratio of the feedback resistors is calculated from:
R1/R2 = (VOUT/2.5V) - 1
(7)
For this example, R1/R2 = 1. R1 and R2 should be chosen from standard value resistors in the range of 1.0 kΩ –
10 kΩ which satisfy the above ratio. For this example, 2.49 kΩ is chosen for R1 and R2.
RON: This resistor sets the on-time, and (by default) the switching frequency. Since the maximum frequency is
limited by the minimum off-time forced by the LM34917A, first check that the desired frequency is less than:
VIN - VOUT
= 3.57 MHz at VIN = 8V
fSW
<
VIN x 105 ns
(8)
The RON resistor is calculated from Equation 6 using the minimum input voltage:
VOUT x (VIN(min) - 1.35V)
VIN(min) x 1.16 x 10-10 x fSW
- 1.4 kW = 22.49 kW
RON
=
(9)
Equation 5 is used to verify that this value resistor does not set an on-time less than 120 ns at maximum input
voltage. A standard value 22.1 kΩ resistor is used, resulting in a nominal frequency of 1.49 MHz. The minimum
on-time is 188 ns at Vin = 33V, and the maximum on-time is 510 ns at Vin = 8V.
L1: The main parameter affected by the inductor is the inductor current ripple amplitude (IOR). The minimum load
current is used to determine the maximum allowable ripple in order to maintain continuous conduction mode,
where the lower peak does not reach 0 mA. This is not a requirement of the LM34917A, but serves as a
guideline for selecting L1. For this example, the maximum ripple current should be less than:
IOR(MAX) = 2 x IOUT(min) = 400 mAp-p
(10)
For other applications, if the minimum load current is zero, use 20% of IOUT(max) for IOUT(min) in Equation 10. The
ripple amplitude calculated in Equation 10 is then used in the following equation:
ton(min) x (VIN(max) œ VOUT
)
= 13.2 mH
L1(min)
=
IOR(max)
(11)
A standard value 15 µH inductor is selected. The maximum ripple amplitude, which occurs at maximum VIN,
calculates to 351 mA p-p, and the peak current is 1175 mA at maximum load current. Ensure the selected
inductor is rated for this peak current.
C2: C2 should typically be no smaller than 3.3 µF, although that is dependent on the frequency and the desired
output characteristics. C2 should be a low ESR good quality ceramic capacitor. Experimentation is usually
necessary to determine the minimum value for C2, as the nature of the load may require a larger value. A load
which creates significant transients requires a larger value for C2 than a non-varying load.
12
Copyright © 2007–2013, Texas Instruments Incorporated
LM34917A
www.ti.com.cn
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
C1 and C5: C1’s purpose is to supply most of the switch current during the on-time, and limit the voltage ripple
at VIN, since it is assumed the voltage source feeding VIN has some amount of source impedance.
At maximum load current, when the buck switch turns on, the current into VIN suddenly increases to the lower
peak of the inductor’s ripple current, ramps up to the upper peak, then drops to zero at turn-off. The average
current during the on-time is the load current. For a worst case calculation, C1 must supply this average load
current during the maximum on-time, without letting the voltage at VIN drop below ≊7.5V. The minimum value for
C1 is calculated from:
IOUT (max) x tON
C1 =
= 1.02 mF
DV
(12)
where tON is the maximum on-time, and ΔV is the allowable ripple voltage at VIN (0.5V at VIN = 8V). C5’s purpose
is to minimize transients and ringing due to long lead inductance leading the VIN pin. A low ESR 0.1 µF ceramic
chip capacitor must be located close to the VIN and RTN pins.
C3: The capacitor at the VCC pin provides noise filtering and stability for the VCC regulator. C3 should be no
smaller than 0.1 µF, and should be a good quality, low ESR ceramic capacitor. C3’s value, and the VCC current
limit, determine a portion of the turn-on-time (t1 in Figure 12).
C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended
as C4 supplies a surge current to charge the buck switch gate at each turn-on. A low ESR also helps ensure a
complete recharge during each off-time.
C6: The capacitor at the SS pin determines the soft-start time, i.e. the time for the output voltage to reach its final
value (t2 in Figure 12). The capacitor value is determined from:
t2 x 11.6 mA
2.5V
C6 =
= 0.023 mF
(13)
R3, C7, C8: The ripple amplitude at VOUT is determined by C2’s characteristics and the inductor’s ripple current
amplitude, and typically ranges from 5 mV to 30 mV over the Vin range. Since the LM34917A’s regulation
comparator requires a minimum of 25 mVp-p ripple at the FB pin, these three components are added to generate
and provide the necessary ripple to FB in phase with the waveform at SW. R3 and C8 are chosen to generate a
sawtooth waveform at their junction, and that voltage is AC coupled to the FB pin via C7. To determine the
values for R3, C7 and C8, the following procedure is used:
Calculate VA = VOUT – (VSW x (1 – (VOUT/VIN(min)))
(14)
where VSW is the absolute value of the voltage at the SW pin during the off-time (typically 1V). VA, the DC
voltage at the R3/C8 junction, calculates to 4.63V, and is used in the next equation.
(VIN (min) - VA) x tON
= 17.5 X 10-6
R3 x C8 =
DV
(15)
where tON is the maximum on-time (at minimum input voltage), and ΔV is the desired ripple amplitude at the
R3/C8 junction, typically 100 mV. R3 and C8 are chosen from standard value components to satisfy the above
product. For this example, 3300 pF is chosen for C8, and 5.23 kΩ is chosen for R3. C7 is chosen large
compared to C8, typically 0.1 µF.
D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may inadvertently affect the IC’s operation through external or internal EMI. The diode
must be rated for the maximum input voltage, the maximum load current, and the peak current which occurs
when the current limit and maximum ripple current are reached simultaneously. The diode’s average power
dissipation is calculated from:
PD1 = VF x IOUT x (1-D)
(16)
where VF is the diode’s forward voltage drop, and D is the on-time duty cycle.
FINAL CIRCUIT
The final circuit is shown in Figure 15, and its performance is shown in Figure 16 and Figure 17. Current limit
measured approximately 1.34A at Vin = 8V, and 1.27A at Vin = 33V. The output ripple amplitude measured 4
mVp-p at Vin = 8V, and 14 mVp-p at Vin = 33V.
Copyright © 2007–2013, Texas Instruments Incorporated
13
LM34917A
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
www.ti.com.cn
8V to 33V
Input
VCC
C3
VIN
0.1mF
C5
0.1 mF
C1
2 mF
LM34917A
BST
C4
0.022 mF
15 mH
L1
R
ON
VOUT
5V
22.1 kW
C8
R3
SW
RON/SD
R1
2.49 kW
3300 pF
C7
0.1mF
5.23 kW
SHUT
DOWN
D1
ISEN
FB
C2
20 mF
SS
C6
0.022 mF
R2
2.49 kW
SGND
RTN
Figure 15. Example Circuit
Figure 16. Efficiency vs. Load Current and VIN (Circuit of Figure 15)
Figure 17. Frequency vs. VIN (Circuit of Figure 15)
ALTERNATE OUTPUT RIPPLE CONFIGURATIONS
For applications which can accept higher levels of ripple at VOUT, the following configurations are simpler and a
bit more economical.
a) Alternate #1: In Figure 18, R3, C7 and C8 are removed, and Cff and R4 are installed, resulting in a higher
ripple level than the circuit of Figure 15. Ripple is created at VOUT by the inductor’s ripple current passing through
R4. That ripple voltage is AC coupled to the FB pin through Cff, allowing the minimum ripple at VOUT to be set at
25 mVp-p. The minimum ripple current amplitude (IOR(min)) is calculated by re-arranging Equation 11 using tON(max)
and VIN(min). The minimum value for R4 is calculated from:
25 mV
R4 =
IOR (min)
(17)
14
Copyright © 2007–2013, Texas Instruments Incorporated
LM34917A
www.ti.com.cn
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
The next larger standard value resistor should be selected for R4 to allow for tolerances. The minimum value for
Cff is determined from:
tON (max)
Cff =
(R1//R2)
(18)
The next larger standard value capacitor should be used for Cff.
L1
SW
V
OUT
Cff
LM34917A
R1
R4
FB
R2
C2
Figure 18. Reduced Ripple Configuration
b) Alternate #2: In Figure 19, R3, C7 and C8 are removed, and R4 is installed, resulting in a higher ripple level
than the circuits of Figure 15 and Figure 18. Ripple is created at VOUT by the inductor’s ripple current passing
through R4. That ripple voltage is coupled to the FB pin through the feedback resistors (R1, R2). Since the
LM34917A requires a minimum of 25 mVp-p ripple at the FB pin, the ripple required at VOUT is higher than 25
mVp-p by the gain of the feedback resistors. The minimum ripple current (IOR(min)) is calculated by re-arranging
Equation 11 using tON(max) and VIN(min). The minimum value for R4 is calculated from:
25 mV x (R1 + R2)
R4(min)
=
R2 x IOR (min)
(19)
The next larger standard value resistor should be used for R4.
L1
SW
V
OUT
LM34917A
R1
R2
R4
FB
C2
Figure 19. Maximum Ripple Configuration
c) Alternate minimum ripple configuration: The circuit in Figure 20 is the same as that in Figure 19, except
the output voltage is taken from the junction of R4 and C2. The ripple at VOUT is determined by the inductor’s
ripple current and C2’s characteristics. However, R4 slightly degrades the load regulation. This circuit may be
suitable if the load current is fairly constant. R4 is calculated as described in Alternate #2 above.
Copyright © 2007–2013, Texas Instruments Incorporated
15
LM34917A
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
www.ti.com.cn
L1
SW
FB
LM34917A
R1
R2
R4
V
OUT
C2
Figure 20. Alternate Minimum Output Ripple Configuration
Minimum Load Current
The LM34917A requires a minimum load current of 1 mA. If the load current falls below that level, the bootstrap
capacitor (C4) may discharge during the long off-time, and the circuit will either shutdown, or cycle on and off at
a low frequency. If the load current is expected to drop below 1 mA in the application, R1 and R2 should be
chosen low enough in value so they provide the minimum required current at nominal VOUT
.
PC BOARD LAYOUT
Refer to application note AN-1112 for PC board guidelines for the DSBGA package.
The LM34917A regulation, over-voltage, and current limit comparators are very fast, and respond to short
duration noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be
as neat and compact as possible, and all of the components must be as close as possible to their associated
pins. The two major current loops have currents which switch very fast, and so the loops should be as small as
possible to minimize conducted and radiated EMI. The first loop is that formed by C1, through the VIN to SW
pins, L1, C2, and back to C1.The second current loop is formed by D1, L1, C2 and the SGND and ISEN pins.
The power dissipation within the LM34917A can be approximated by determining the total conversion loss (PIN
-
POUT), and then subtracting the power losses in the free-wheeling diode and the inductor. The power loss in the
diode is approximately:
PD1 = Iout x VF x (1-D)
(20)
where Iout is the load current, VF is the diode’s forward voltage drop, and D is the on-time duty cycle. The power
loss in the inductor is approximately:
PL1 = Iout2 x RL x 1.1
(21)
where RL is the inductor’s DC resistance, and the 1.1 factor is an approximation for the AC losses. If it is
expected that the internal dissipation of the LM34917A will produce excessive junction temperatures during
normal operation, good use of the PC board’s ground plane can help to dissipate heat. Additionally the use of
wide PC board traces, where possible, can help conduct heat away from the IC. Judicious positioning of the PC
board within the end product, along with the use of any available air flow (forced or natural convection) can help
reduce the junction temperatures.
16
Copyright © 2007–2013, Texas Instruments Incorporated
LM34917A
www.ti.com.cn
ZHCS593D –DECEMBER 2007–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
Copyright © 2007–2013, Texas Instruments Incorporated
17
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM34917ATL/NOPB
ACTIVE
DSBGA
YZR
12
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
SRHA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM34917ATL/NOPB
DSBGA
YZR
12
250
178.0
8.4
2.01
2.57
0.76
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
DSBGA YZR 12
SPQ
Length (mm) Width (mm) Height (mm)
208.0 191.0 35.0
LM34917ATL/NOPB
250
Pack Materials-Page 2
MECHANICAL DATA
YZR0012xxx
0.600±0.075
D
E
TLA12XXX (Rev C)
D: Max = 2.33 mm, Min =2.269 mm
E: Max = 1.987 mm, Min =1.926 mm
4215049/A
12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
www.ti.com
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