LM3503ITLX-16/NOPB [TI]

Dual-Display Constant Current LED Driver with Analog Brightness Control 10-DSBGA -40 to 85;


型号：	LM3503ITLX-16/NOPB
厂家：	TEXAS INSTRUMENTS
描述：	Dual-Display Constant Current LED Driver with Analog Brightness Control 10-DSBGA -40 to 85 驱动接口集成电路
文件：	总27页 (文件大小：1422K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LM3503

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SNVS329E –JULY 2005–REVISED MAY 2013

LM3503 Dual-Display Constant Current LED Driver with Analog Brightness Control

Check for Samples: LM3503

FEATURES

APPLICATIONS

•

Drives up to 4, 6, 8 or 10 White LEDs for Dual

Display Backlighting

•

Dual Display Backlighting in Portable devices

Cellular Phones and PDAs

•

>80% Peak Efficiency

DESCRIPTION

The LM3503 is a white LED driver for lighting

Output Voltage Protection Options: 16V, 25V,

35V & 44V

applications.

For

dual

display

backlighting

complete

•

Input Under-Voltage Protection

applications, the LM3503 provides

Internal Soft Start Eliminates Inrush Current

1 MHz Constant Switching Frequency

Analog Brightness Control

solution. The LM3503 contains two internal white LED

current bypass FET (Field Effect Transistor) switches.

The white LED current can be adjusted with a DC

voltage from a digital to analog converter or RC

filtered PWM (pulse-width-modulated) signal at the

Cntrl pin.

Wide Input Voltage Range: 2.5V to 5.5V

Low Profile Packages: <1 mm Height

–

10 Bump DSBGA

16 Pin WQFN

Typical Application

22 mH

MAIN:

2 to 5

LEDs

OUT1

SUPPLY

OUT2

4.7 mF

Cntrl

En1

En2

OUT

LM3503-44

1 mF

AGND

PGND

SUB:

2 to 5

LEDs

Logic

Voltage

Signal

Inputs

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LM3503

SNVS329E –JULY 2005–REVISED MAY 2013

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DESCRIPTION (CONTINUED)

With no external compensation, cycle-by-cycle current limit, output over-voltage protection, input under-voltage

protection, and dynamic white LED current control capability, the LM3503 offers superior performance over other

step-up white LED drivers.

Connection Diagram

10 11 12

Figure 1. 10-Bump Thin DSBGA Package

(YPA0010) (Top View)

Figure 2. 16-Lead Thin WQFN Package

(RGH0016A) (Top View)

PIN DESCRIPTIONS

Bump #

Pin #

Name

Cntrl

Description

White LED Current Control Connection

Feedback Voltage Connection

V_OUT2

Drain Connections of the NMOS and PMOS Field Effect Transistor (FET) Switches (Figure 3: N2 and

P1). Connect 100nF at V_OUT2node if V_OUT2is not used

V_OUT1

Over-Voltage Protection (OVP) and Source Connection of the PMOS FET Switch (Figure 3: P1)

2 and 3

Drain Connection of the Power NMOS Switch (Figure 3: N1)

Power Ground Connection

Analog Ground Connection

Input Voltage Connection

NMOS FET Switch Control Connection

PMOS FET Switch Control Connection

No Connection

15 and 16

Pgnd

Agnd

V_IN

En2

En1

No Connection

DAP

No Connection

DAP

Die Attach Pad (DAP), to be soldered to the printed circuit board’s ground plane for enhanced

thermal dissipation.

Cntrl (Bump A1): White LED current control pin. Use this pin to control the feedback voltage with an external

DC voltage.

Fb (Bump B1):Output voltage feedback connection.

V_OUT2(Bump C1):Drain connections of the internal PMOS and NMOS FET switches (Figure 3: P1 and N2). It is

recommended to connect 100nF at V_OUT2if V_OUT2is not used for LM3503-35V & LM3503-44V versions.

V_OUT1(Bump D1):

Source connection of the internal PMOS FET switch (Figure 3: P1) and OVP sensing node. The output capacitor

must be connected as close to the device as possible, between the V_OUT1pin and ground plane. Also connect

the Schottky diode as close as possible to the V_OUT1pin to minimize trace resistance and EMI radiation.

Sw (Bump D2):

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Drain connection of the internal power NMOS FET switch (Figure 3: N1). Minimize the metal trace length and

maximize the metal trace width connected to this pin to reduce EMI radiation and trace resistance.

Pgnd (Bump D3): Power ground pin. Connect directly to the ground plane.

Agnd (Bump C3):Analog ground pin. Connect the analog ground pin directly to the Pgnd pin.

V_IN(Bump B3): Input voltage connection pin. The C_INcapacitor should be as close to the device as possible,

between the V_INpin and ground plane.

En2 (Bump A3): Enable pin for the internal NMOS FET switch (Figure 3: N2) during device operation. When

V_En2is ≥ 1.4V, the internal NMOS FET switch turns off and the SUB display is turned on. The En2 pin has an

internal pull down circuit, thus the internal NMOS FET switch is normally in the on state of operation with the

SUB display turned off. When V_En2is ≤ 0.3V, the internal NMOS FET switch turns on and the SUB display is

turned off. If both V_En1and V_En2are ≤ 0.3V the LM3503 will shutdown. If V_OUT2is not used, En2 must be floating

or grounded and En1 used to enable the device.

En1 (Bump A2): Enable pin for the internal PMOS FET switch (Figure 3: P1) during device operation. When

V_En1is ≤ 0.3V, the internal PMOS FET switch turns on and the MAIN display is turned off. When V_En1is ≥ 1.4V,

the internal PMOS FET switch turns off and the MAIN display is turned on. If both V_En1and V_En2are ≤ 0.3V the

LM3503 will shutdown. The En1 pin has an internal pull down circuit, thus the internal PMOS FET switch is

normally in the on state of operation with the MAIN display turned off. If V_OUT2is not used, En2 must be grounded

and En1 use to enable the device.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings⁽¹⁾⁽²⁾

V_INPin

−0.3V to +5.5V

−0.3V to +48V

−0.3V to +5.5V

−0.3V to +48V

−0.3V to V_OUT1

−0.3V to +5.5V

Internally Limited

+150°C

Sw Pin

Fb Pin

Cntrl Pin

V_OUT1Pin

V_OUT2Pin

En1

En2

Continuous Power Dissipation

Maximum Junction Temperature (T_J-MAX

Storage Temperature Range

ESD Rating⁽³⁾

)

−65°C to +150°C

2 kV

Human Body Model

Machine Model

200V

(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not

apply when operating the device outside of its rated operating conditions.

(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.

(3) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF

capacitor discharged directly into each pin.

Operating Conditions⁽¹⁾⁽²⁾

Junction Temperature (T_J) Range

Ambient Temperature (T_A) Range

Supply Voltage, V_INPin

En1 and En2 Pins

−40°C to +125°C

−40°C to +85°C

2.5V to 5.5V

0V to 5.5V

Cntrl Pin

0V to 3.5V

(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not

apply when operating the device outside of its rated operating conditions.

(2) All voltages are with respect to the potential at the GND pin.

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Thermal Properties⁽³⁾

Junction-to-Ambient Thermal Resistance (θ_JA

)

DSBGA Package

65°C/W

49°C/W

WQFN Package

(3) The maximum allowable power dissipation is a function of the maximum junction temperature, T_J(MAX), the junction-to-ambient thermal

resistance, θ_JA, and the ambient temperature, T_A. See Thermal Properties for the thermal resistance. The maximum allowable power

dissipation at any ambient temperature is calculated using: P_D(MAX)= (T_J(MAX)–T_A)/ θ_JA. Exceeding the maximum allowable power

dissipation will cause excessive die temperature. For more information on this topic, please refer to Application Note 1187(An1187):

Leadless Leadframe Package (LLP) and Application Note 1112(AN1112) for DSBGA chip scale package.

Electrical Characteristics⁽¹⁾⁽²⁾

Limits in standard typeface are for T_J= +25°C. Limits in bold typeface apply over the full operating junction temperature

range (−40°C ≤ T_J≤ +125°C). Unless otherwise specified,V_IN= 2.5V.

Symbol

V_IN

Parameter

Input Voltage

Conditions

Min

Typ

Max

Units

2.5

5.5

I_Q

Non-Switching

Switching

Shutdown

Cntrl = 1.6V

Fb = 0V, Sw Is Floating

En1 = En2 = 0V

0.5

1.9

0.1

µA

V_Fb

I_CL

Feedback Voltage

Cntrl = 3.5V

0.5

0.55

0.6

NMOS Power Switch

Current Limit

16, Fb = 0V

25, Fb = 0V

35, Fb = 0V

44,FB = 0V

250

400

450

400

600

750

650

800

1050

I_Fb

Feedback Pin Output

Bias Current

Fb = 0.25V, Cntrl = 1.6V

500

1.2

F_S

Switching Frequency

0.8

MHz

R_DS(ON)

NMOS Power Switch ON I_Sw= 500 mA⁽³⁾

Resistance

0.55

1.1

Ω

(Figure 3: N1)

R_PDS(ON)

PMOS ON Resistance

Of V_OUT1/V_OUT2Switch

(Figure 3: P1)

I_PMOS= 20 mA, En1 = 0V, En2 = 1.5V

R_NDS(ON)

NMOS ON Resistance

Of V_OUT2/Fb Switch

(Figure 3: N2)

I_NMOS= 20 mA, En1 = 1.5V, En2 = 0V

2.5

D_MAX

I_Sw

Maximum Duty Cycle

Fb = 0V

Sw Pin Leakage

Current⁽⁴⁾

Sw = 42V, En1 = En2 =0V

0.01

µA

I_V

OUT1(OFF)

V_OUT1Pin Leakage

Current⁽⁴⁾

V_OUT1= 14V, En1 = En2 = 0V (16)

V_OUT1= 23V, En1 = En2 = 0V (25)

V_OUT1= 32V, En1 = En2 = 0V (35)

V_OUT1= 42V, En1 = En2 = 0V (44)

0.1

µA

I_V

OUT1(ON)

V_OUT1Pin Bias

Current⁽⁴⁾

V_OUT1= 14V, En1 = En1 = 1.5V (16)

V_OUT1= 23V, En1 = En2 = 1.5V (25)

V_OUT1= 32V, En1 = En2 = 1.5V (35)

V_OUT1= 42V, En1 = En2 = 1.5V (44)

100

140

I_V

V_OUT2Pin Leakage

Current⁽⁴⁾

Fb = En1 = En2 = 0V, V_OUT2= V_OUT1= 42V

OUT2

0.1

µA

UVP

Under-Voltage

Protection

On Threshold

Off Threshold

2.4

2.3

2.5

2.2

(1) All voltages are with respect to the potential at the GND pin.

(2) Min and Max limits are ensured by design, test, or statistical analysis. Typical numbers are not specified, but do represent the most

likely norm.

(3) NMOS Power On Resistance measured at I_SW= 250mA for sixteen voltage version.

(4) Current flows into the pin.

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Electrical Characteristics⁽¹⁾⁽²⁾(continued)

Limits in standard typeface are for T_J= +25°C. Limits in bold typeface apply over the full operating junction temperature

range (−40°C ≤ T_J≤ +125°C). Unless otherwise specified,V_IN= 2.5V.

Symbol

OVP

Parameter

Conditions

Min

Typ

Max

Units

Over-Voltage

On Threshold (16)

Off Threshold (16)

On Threshold (25)

14.5

14.0

22.5

21.5

32.0

31.0

40.5

39.0

15.5

16.5

16.0

25.5

24.5

35.0

34.0

43.5

42.0

Protection⁽⁵⁾

F Off Threshold (25)

On Threshold (35)

Off Threshold (35)

On Threshold (44)

Off Threshold (44)

V_En1

PMOS FET Switch and

Device Enabling

Threshold (Figure 3: P1)

Off Threshold

On Threshold

0.8

0.3

1.4

V_En2

NMOS FET Switch and

Device Enabling

Threshold (Figure 3: N2)

Off Threshold

On Threshold

0.8

0.3

1.4

V_Cntrl

I_En1

V_CntrlRange

En1 Pin Bias Current⁽⁶⁾

V_IN= 3.6V

0.2

3.5

En1 = 2.5V

En1 = 0V

0.1

µA

I_En2

En2 Pin Bias Current⁽⁶⁾

En2 = 2.5V

En2 = 0V

0.1

µA

I_CNTRL

Cntrl Pin Bias Current⁽⁶⁾Cntrl = 2.5V

(5) The on threshold indicates that the LM3503 is no longer switching or regulating LED current, while the off threshold indicates normal

operation.

(6) Current flows into the pin.

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Block Diagram

2,3

Soft Start

Thermal Shutdown

OVP

Comparator

Current Limit

OUT1

UVP

Comparator

UVP

Reference

OVP

Reference

Light Load

Comparator

Light Load

Reference

Current Sense

Error

Amplifier

PWM

Comparator

Driver Logic

OUT2

Cntrl

Oscillator

FET Logic

Duty Limit

Comparator

Duty Limit

Reference

15,16

10 12

AGND

PGND

En1 En2

Figure 3. Block Diagram

Detailed Description of Operation

The LM3503 utilizes an asynchronous current mode pulse-width-modulation (PWM) control scheme to regulate

the feedback voltage over specified load conditions. The DC/DC converter behaves as a controlled current

source for white LED applications. The operation can best be understood by referring to the block diagram in

Figure 3 for the following operational explanation. At the start of each cycle, the oscillator sets the driver logic

and turns on the internal NMOS power device, N1, conducting current through the inductor and reverse biasing

the external diode. The white LED current is supplied by the output capacitor when the internal NMOS power

device, N1, is turned on. The sum of the error amplifier’s output voltage and an internal voltage ramp are

compared with the sensed power NMOS, N1, switch voltage. Once these voltages are equal, the PWM

comparator will then reset the driver logic, thus turning off the internal NMOS power device, N1, and forward

biasing the external diode. The inductor current then flows through the diode to the white LED load and output

capacitor. The inductor current recharges the output capacitor and supplies the current for the white LED load.

The oscillator then sets the driver logic again repeating the process. The output voltage of the error amplifier

controls the current through the inductor. This voltage will increase for larger loads and decrease for smaller

loads limiting the peak current in the inductor and minimizing EMI radiation. The duty limit comparator is always

operational, it prevents the internal NMOS power switch, N1, from being on for more than one oscillator cycle

and conducting large amounts of current. The light load comparator allows the LM3503 to properly regulate

light/small white LED load currents, where regulation becomes difficult for the LM3503’s primary control loop.

Under light load conditions, the LM3503 will enter into a pulse skipping pulse-frequency-mode (PFM) of operation

where the operational frequency will vary with the load. As a result of PFM mode operation, the output voltage

ripple magnitude will significantly increase.

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The LM3503 has two control pins, En1 and En2, used for selecting which segment of a single white LED string

network is active for dual display applications. En1 controls the main display (MAIN) segment of the single string

white LED network between pins V_OUT1and V_OUT2. En2 controls the sub display (SUB) segment of the single

string white LED network between the V_OUT2and Fb. If both V_En1and V_En2are ≤ 0.3V, the LM3503 will shutdown,

for further description of the En1 and En2 operation, see Figure 33. During shutdown the output capacitor

discharges through the string of white LEDs and feedback resistor to ground. The LED current can be

dynamically controlled by a DC voltage on the Cntrl pin. When V_Cntrl= 0V the white LED current may not be

equal to zero because of offsets within the LM3503 internal circuitry. To ensure zero white LED current the

LM3503 must be in shutdown mode operation.

The LM3503 has dedicated protection circuitry active during normal operation to protect the integrated circuit (IC)

and external components. Soft start circuitry is present in the LM3503 to allow for slowly increasing the current

limit to its steady-state value to prevent undesired high inrush current during start up. Thermal shutdown circuitry

turns off the internal NMOS power device, N1, when the internal semiconductor junction temperature reaches

excessive levels. The LM3503 has a under-voltage protection (UVP) comparator that disables the internal NMOS

power device when battery voltages are too low, thus preventing an on state where the internal NMOS power

device conducts large amounts of current. The over-voltage protection (OVP) comparator prevents the output

voltage from increasing beyond the protection limit when the white LED string network is removed or if there is a

white LED failure. OVP allows for the use of low profile ceramic capacitors at the output. The current through the

internal NMOS power device, N1, is monitored to prevent peak inductor currents from damaging the IC. If during

a cycle (cycle=1/switching frequency) the peak inductor current exceeds the current limit for the LM3503, the

internal NMOS power device will be turned off for the remaining duration of that cycle.

En1 En2

Result (See Figure 1 and Figure 2)

Shutdown

0.3V 0.3V [P1‰OFF N2‰OFF N1‰OFF] or [MAIN‰OFF SUB‰OFF N1‰OFF]

1.4V 0.3V [P1‰OFF N2‰ON N1‰Switching] or [MAIN‰ON SUB‰OFF N1‰Switching]

0.3V 1.4V [P1‰ON N2‰OFF N1‰Switching] or [MAIN‰OFF SUB‰ON N1‰Switching]

1.4V 1.4V [P1‰OFF N2‰OFF N1‰Switching] or [MAIN‰ON SUB‰ON N1‰Switching]

Figure 4. Operational Characteristics Table

Typical Performance Characteristics

(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η = P_OUT/ P_IN= [(V_OUT– V_Fb) * I_OUT] / [V_IN* I_IN].

T_A= +25°C, unless otherwise stated.)

I_Q(Non-Switching)

Switching Frequency

V_IN

Temperature

1.03

1.02

1.01

1.00

0.99

0.98

0.97

0.96

0.95

0.94

0.93

0.600

0.580

0.560

0.540

0.520

0.500

0.480

0.460

0.440

0.420

0.400

= 2.5V

-40^oC

25^oC

125^oC

-40 -20

20 40 60 80 100 120

2.5

3.0

3.5

4.0

4.5

5.0

5.5

-30 -10 10 30 50 70 90 110 130

INPUT VOLTAGE (V)

TEMPERATURE (^oC)

Figure 5.

Figure 6.

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Typical Performance Characteristics (continued)

(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η = P_OUT/ P_IN= [(V_OUT– V_Fb) * I_OUT] / [V_IN* I_IN].

T_A= +25°C, unless otherwise stated.)

I_Q(Switching)

Temperature

V_IN

1.95

1.90

1.85

1.80

1.75

4.00

3.50

3.00

2.50

2.00

1.50

= 2.5V

-40^oC

125^oC

25^oC

-40 -20

20 40 60 80 100 120

-30 -10 10 30 50 70 90 110 130

2.5

3.0

3.5

4.0

4.5

5.0

5.5

INPUT VOLTAGE (V)

TEMPERATURE (^oC)

Figure 7.

Figure 8.

10 LED Efficiency

8 LED Efficiency

LED Current

= 5.5V

= 4.2V

= 3V

= 3.3V

= 3V

= 3.3V

= 2.7V

10 12 14 16 18 20

LED CURRENT (mA)

Figure 9.

Figure 10.

6 LED Efficiency

LED Current

4 LED Efficiency

LED Current

100

= 5.5V

= 4.2V

= 5.5V

= 4.2V

= 3.3V

= 3V

= 2.7V

10 12 14 16 18

10 12 14 16 18 20

LED CURRENT (mA)

Figure 11.

Figure 12.

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Typical Performance Characteristics (continued)

(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η = P_OUT/ P_IN= [(V_OUT– V_Fb) * I_OUT] / [V_IN* I_IN].

T_A= +25°C, unless otherwise stated.)

Cntrl Pin Current

Maximum Duty Cycle

Cntrl Pin Voltage

Temperature

= 2.5

-40^oC

25^oC

125^oC

0.0

-40 -20

20 40 60 80 100 120

0.5

1.0

1.5

2.0

2.5

3.0

-30 -10 10 30 50 70 90 110 130

CNTRL PIN VOLTAGE (V)

TEMPERATURE (^oC)

Figure 13.

Figure 14.

En1 Pin Current

En1 Pin Voltage

En2 Pin Current

En2 Pin Voltage

-40^oC

25^oC

-40^oC

25^oC

125^oC

0.0

1.0

2.0

3.0

4.0

5.0

1.0

2.0

3.0

4.0

5.0

EN1 PIN VOLTAGE (V)

EN2 PIN VOLTAGE (V)

Figure 15.

Figure 16.

V_OUT1Pin Current

V_OUT1Pin Voltage

Power NMOS R_DS(ON)(Figure 3: N1)

V_IN

1000

900

800

700

600

500

400

300

160

= 400 mA

NMOS

140

120

100

125^oC

-40^oC

25^oC

125^oC

-40^oC

2.5

3.0

3.5

4.0

4.5

5.0

5.5

PIN VOLTAGE (V)

OUT1

INPUT VOLTAGE (V)

Figure 17.

Figure 18.

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Typical Performance Characteristics (continued)

(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η = P_OUT/ P_IN= [(V_OUT– V_Fb) * I_OUT] / [V_IN* I_IN].

T_A= +25°C, unless otherwise stated.)

NMOS R_DS(ON)(Figure 3: N2)

PMOS R_DS(ON)(Figure 3: P1)

V_IN

3.50

3.00

2.50

2.00

1.50

1.00

0.50

0.00

= 20 mA

NMOS

= 20 mA

PMOS

125^oC

25^oC

-40^oC

2.0

12.0

22.0

32.0

42.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

PIN VOLTAGE (V)

OUT1

INPUT VOLTAGE (V)

Figure 19.

Figure 20.

Feedback Voltage

Cntrl Pin Voltage

Current Limit (LM3503-16)

Temperature

440

420

400

380

360

340

320

0.28

0.24

0.20

0.16

0.12

0.08

0.04

0.00

= 2.5V

= 5.5V

= 2.7V

= 7.0V

-40 -25 -10

20 35 50 65 80

0.3 0.5 0.7 0.9 1.1 1.3 1.5

TEMPERATURE (^oC)

CNTRL VOLTAGE (V)

Figure 21.

Figure 22.

Current Limit (LM3503-16)

Current Limit (LM3503-25)

V_IN

Temperature

620

600

580

560

540

520

500

480

460

440

420

480

460

440

420

400

380

360

340

320

= 2.5V

T = 85^oC

T = 25^oC

= 5.5V

= 7.0V

T = -40^oC

-40 -25 -10

20 35 50 65 80

2.5

3.0

3.5

4.0

4.5

5.0

5.5

TEMPERATURE (^oC)

INPUT VOLTAGE (V)

Figure 23.

Figure 24.

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Typical Performance Characteristics (continued)

(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η = P_OUT/ P_IN= [(V_OUT– V_Fb) * I_OUT] / [V_IN* I_IN].

T_A= +25°C, unless otherwise stated.)

Current Limit (LM3503-25)

Current Limit (LM3503-35/44)

V_IN

Temperature

780

620

600

580

560

540

520

500

480

460

440

T = 85^oC

T = 25^oC

770

760

750

740

730

720

710

700

690

= 7.0V

= 2.5V

T = -40^oC

-40 -25 -10

20 35 50 65 80

2.5

3.0

3.5

4.0

4.5

5.0

5.5

TEMPERATURE (^oC)

INPUT VOLTAGE (V)

Figure 25.

Figure 26.

Current Limit (LM3503-35/44)

Feedback Voltage (V_Cntrl= 0.8V)

V_IN

Temp

0.127

780

770

760

750

740

730

720

710

700

690

CNTRL = 0.8V

0.126

0.125

0.124

0.123

0.122

0.121

0.120

0.119

85^oC

= 5.5V

25^oC

-40^oC

= 2.7V

2.5

3.0

3.5

4.0

4.5

5.0

5.5

-40

-20

-30

-10

INPUT VOLTAGE (V)

TEMPERATURE (^oC)

Figure 27.

Figure 28.

Feedback Voltage (V_Cntrl= 1.6V)

Temp

V_IN= 3.6V at 15mA & 4 Leds

0.257

CNTRL = 1.6V

0.256

0.255

0.254

0.253

0.252

0.251

0.250

0.249

= 5.5V

= 2.7V

-40

-20

-30

-10

TEMPERATURE (^oC)

Figure 29.

Figure 30.

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Typical Performance Characteristics (continued)

(See Typical Application Circuit : L=DO1608C-223 and D=B150-13. Efficiency: η = P_OUT/ P_IN= [(V_OUT– V_Fb) * I_OUT] / [V_IN* I_IN].

T_A= +25°C, unless otherwise stated.)

Dimming Duty Cycle vs LED Current

V_IN=3.6V, 2LEDs on Main & Sub Display

V_IN= 3.6V at 15mA & 2 Leds

40.00

35.00

30.00

50 kHz

25.00

10 kHz

20.00

1 kHz

500 Hz

15.00

10.00

5.00

200 Hz

0.00

10 20 30 40 50 60 70 80 90

DUTY CYCLE (%)

Figure 31.

Figure 32.

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APPLICATION INFORMATION

WHITE LED CURRENT SETTING

The white LED current is controlled by a DC voltage at the Cntrl pin.

The relationship between the Cntrl pin voltage and Fb pin voltage can be computed with the following:

V_FB= (0.156) x (V_Cntrl

)

•

V_Cntrl: Cntrl Pin Voltage. Voltage Range: 0.2V ≤ V_Cntrl≤ 3.5V.

V_Fb: Feedback Pin Voltage.

(1)

(2)

LED CURRENT

The LED current is set using the following equation:

V_Fb

I_LED

To determine the maximum output current capability of the device, it is best to estimate using equations on page

16 and the minimum peak current limit of the device (see electrical table). Note the current capability will be

higher with less LEDs in the application.

WHITE LED DIMMING

PWM Signal

OUT1

OUT2

Cntrl

En1

En2

LM3503

AGND

PGND

Figure 33. If V_OUT2is not used, En2 must be grounded

Aside from varying the DC voltage at the Cntrl pin, white LED dimming can be accomplished through the RC

filtering of a PWM signal. The PWM signal frequency should be at least a decade greater than the RC filter

bandwidth. WHITE LED DIMMING is how the LM3503 should be wired for PWM filtered white LED dimming

functionality. When using PWM dimming, it is recommended to add 1-2ms delay between the Cntrl signal and the

main Enable sginal (En1) to allow time for the output to discharge. This will prevent potential flickering especially

if the Sub display is compose of 2 LEDs or less.

The equations below are guidelines for choosing the correct RC filter values in relation to the PWM signal

frequency.

Equation:

F_RC

2 x p x R x C

(3)

Equation:

F_PWM> 10 x F_RC

(4)

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F_RC

RC Filter Bandwidth Cutoff Frequency.

F_PWM: PWM Signal Frequency.

Chosen Filter Resistor.

Chosen Filter Capacitor.

For example, using the above equations to determine the proper RC values. Assume the following condition:V_IN=

3.6V, C=0.01µF and F_PWM= 500Hz, then F_RC= 50Hz by relation to equation 2. By rearranging equation 1 to solve

for R; R = 318.5K ohms (standard value, R = 316K).

PWM Dimming Duty Cycle vs. LED Current

The results are based on the 2LEDs on Main display and 2LEDs on Sub display

Duty

(%)

200Hz

R = 787k ohms

0.78mA

500Hz

R =316k ohms

1.59mA

1KHz

R = 158kohms

2.23mA

10KHz

R=16.2k ohms

3.42mA

50KHz

R=3.16k ohms

3.58mA

100kHz

R=1.62k ohms

3.61mA

1.85mA

3.46mA

4.78mA

7.09mA

7.41mA

7.48mA

2.88mA

5.35mA

7.33mA

10.77mA

14.48mA

19.1mA

11.25mA

15.12mA

19.06mA

22.98mA

26.9mA

11.34mA

15.24mA

19.16mA

23.10mA

27.05mA

31.00mA

35.00mA

3.96mA

7.24mA

9.88mA

5.05mA

9.12mA

12.45mA

15.03mA

17.61mA

20.20mA

22.79mA

6.08mA

11.03mA

12.94mA

14.83mA

16.73mA

21.86mA

25.71mA

29.53mA

33.32mA

7.13mA

8.17mA

30.83mA

34.78mA

9.24mA

= DT

(Vin - Vout)/L

Vin/L

(avg)

Time

Figure 34. Inductor Current Waveform

CONTINUOUS AND DISCONTINUOUS MODES OF OPERATION

Since the LM3503 is a constant frequency pulse-width-modulated step-up regulator, care must be taken to make

sure the maximum duty cycle specification is not violated. The duty cycle equation depends on which mode of

operation the LM3503 is in. The two operational modes of the LM3503 are continuous conduction mode (CCM)

and discontinuous conduction mode (DCM). Continuous conduction mode refers to the mode of operation where

during the switching cycle, the inductor current never goes to and stays at zero for any significant amount of time

during the switching cycle. Discontinuous conduction mode refers to the mode of operation where during the

switching cycle, the inductor current goes to and stays at zero for a significant amount of time during the

switching cycle. Figure 34 illustrates the threshold between CCM and DCM operation. In Figure 34 the inductor

current is right on the CCM/DCM operational threshold. Using this as a reference, a factor can be introduced to

calculate when a particular application is in CCM or DCM operation. R is a CCM/DCM factor we can use to

compute which mode of operation a particular application is in. If R is ≥ 1, then the application is operating in

CCM. Conversely, if R is < 1, the application is operating in DCM. The R factor inequalities are a result of the

components that make up the R factor. From Figure 34, the R factor is equal to the average inductor current,

I_L(avg), divided by half the inductor ripple current, Δi_L. Using Figure 34, the following equation can be used to

compute R factor:

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2 * I_L(avg)

R =

Di_L

(5)

(6)

(7)

[I_OUT

[(1-D) * Eff]

[V_IN* D]

]

I_L(avg) =

Di_L=

[L * Fs]

[2 * I_OUT* L * Fs * (V_OUT)²]

[(V_IN)²* Eff * (V_OUT- V_IN)]

R =

(8)

V_IN: Input Voltage.

V_OUT: Output Voltage.

Eff: Efficiency of the LM3503.

Fs: Switching Frequency.

I_OUT

White LED Current/Load Current.

Inductance Magnitude/Inductor Value.

Duty Cycle for CCM operation.

Δi_L: Inductor Ripple Current.

I_L(avg): Average Inductor Current.

For CCM operation, the duty cycle can be computed with:

t_ON

D =

T_S

(9)

[V_OUT- V_IN]

D =

[V_OUT

]

(10)

V_OUT: Output Voltage.

V_INInput Voltage.

Duty Cycle for CCM Operation.

For DCM operation, the duty cycle can be computed with:

t_ON

D =

T_S

(11)

(12)

[2 * I_OUT* L * (V_OUT- V_IN) * Fs]

D =

[(V_IN)²* Eff]

Duty Cycle for DCM Operation.

V_OUT: Output Voltage.

V_IN

Input Voltage.

I_OUT

White LED Current/Load Current.

Fs: Switching Frequency.

L: Inductor Value/Inductance Magnitude.

INDUCTOR SELECTION

In order to maintain inductance, an inductor used with the LM3503 should have a saturation current rating larger

than the peak inductor current of the particular application. Inductors with low DCR values contribute decreased

power losses and increased efficiency. The peak inductor current can be computed for both modes of operation:

CCM and DCM.

The cycle-by-cycle peak inductor current for CCM operation can be computed with:

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Di_L

I_PeakI (avg) +

(13)

(14)

[I_OUT

[(1 - D) * Eff]

]

[V_IN* D]

I_Peak

[2 * L * Fs]

V_IN: Input Voltage.

Eff: Efficiency of the LM3503.

Fs: Switching Frequency.

I_OUT

White LED Current/Load Current.

Inductance Magnitude/Inductor Value.

Duty Cycle for CCM Operation.

I_PEAK: Peak Inductor Current.

Δi_L: Inductor Ripple Current.

I_L(avg): Average Inductor Current.

The cycle-by-cycle peak inductor current for DCM operation can be computed with:

[V_IN* D]

I_Peak

[L * Fs]

(15)

V_IN: Input Voltage.

Fs: Switching Frequency.

Inductance Magnitude/Inductor Value.

Duty Cycle for DCM Operation.

I_PEAK: Peak Inductor Current.

The minimum inductance magnitude/inductor value for the LM3503 can be calculated using the following, which

is only valid when the duty cycle is > 0.5:

[V_IN* R_DS(ON)* ((D/D‘) - 1)]

L >

[1.562 * Fs]

(16)

Duty Cycle.

1-D.

D’:

R_DS(ON): NMOS Power Switch ON Resistance.

Fs: Switching Frequency.

V_IN: Input Voltage.

Inductance Magnitude/Inductor Value.

This equation gives the value required to prevent subharmonic oscillations. The result of this equation and the

inductor ripple currents should be accounted for when choosing an inductor value.

Some recommended Inductor manufactures included but are not limited to:

DO1608C-223

Coilcraft

www.coilcraft.com

DT1608C-223

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CAPACITOR SELECTION

Multilayer ceramic capacitors are the best choice for use with the LM3503. Multilayer ceramic capacitors have

the lowest equivalent series resistance (ESR). Applied voltage or DC bias, temperature, dielectric material type

(X7R, X5R, Y5V, etc), and manufacturer component tolerance have an affect on the true or effective capacitance

of a ceramic capacitor. Be aware of how your application will affect a particular ceramic capacitor by analyzing

the aforementioned factors of your application. Before selecting a capacitor always consult the capacitor

manufacturer’s data curves to verify the effective or true capacitance of the capacitor in your application.

INPUT CAPACITOR SELECTION

The input capacitor serves as an energy reservoir for the inductor. In addition to acting as an energy reservoir for

the inductor the input capacitor is necessary for the reduction in input voltage ripple and noise experienced by

the LM3503. The reduction in input voltage ripple and noise helps ensure the LM3503’s proper operation, and

reduces the effect of the LM3503 on other devices sharing the same supply voltage. To ensure low input voltage

ripple, the input capacitor must have an extremely low ESR. As a result of the low input voltage ripple

requirement multilayer ceramic capacitors are the best choice. A minimum capacitance of 2.0 µF is required for

normal operation, so consult the capacitor manufacturer’s data curves to verify whether the minimum

capacitance requirement is going to be achieved for a particular application.

OUTPUT CAPACITOR SELECTION

The output capacitor serves as an energy reservoir for the white LED load when the internal power FET switch

(Figure 3: N1) is on or conducting current. The requirements for the output capacitor must include worst case

operation such as when the load opens up and the LM3503 operates in over-voltage protection (OVP) mode

operation. A minimum capacitance of 0.5 µF is required to ensure normal operation. Consult the capacitor

manufacturer’s data curves to verify whether the minimum capacitance requirement is going to be achieved for a

particular application.

Some recommended capacitor manufacturers included but are not limited to:

Taiyo-Yuden

muRata

TDK

GMK212BJ105MD (0805/35V)

GRM40-035X7R105K (0805/50V)

C3216X7R1H105KT (1206/50V)

C3216X7R1C475K (1206/16V)

08053D105MAT (0805/25V)

08056D475KAT (0805/6.3V)

1206ZD475MAT (1206/10V)

www.t-yuden.com

www.murata.com

www.tdktca.com

AVX

www.avxcorp.com

DIODE SELECTION

To maintain high efficiency it is recommended that the average current rating (I_For I_O) of the selected diode

should be larger than the peak inductor current (I_Lpeak). At the minimum the average current rating of the diode

should be larger than the maximum LED current. To maintain diode integrity the peak repetitive forward current

(I_FRM) must be greater than or equal to the peak inductor current (I_Lpeak). Diodes with low forward voltage ratings

(V_F) and low junction capacitance magnitudes (C_Jor C_Tor C_D) are conducive to high efficiency. The chosen

diode must have a reverse breakdown voltage rating (V_Rand/or V_RRM) that is larger than the output voltage

(V_OUT). No matter what type of diode is chosen, Schottky or not, certain selection criteria must be followed:

1. V_Rand V_RRM> V_OUT

2. I_For I_O≥ I_LOADor I_OUT

3. I_FRM≥ I_Lpeak

Some recommended diode manufacturers included but are not limited to:

Vishay

SS12(1A/20V)

SS14(1A/40V)

SS16(1A/60V)

www.vishay.com

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On Semiconductor

MBRM120E (1A/20V)

www.onsemi.com

MBRS1540T3 (1.5A/40V)

MBR240LT (2A/40V)

CMSH1-40M (1A/40V)

Central Semiconductor

www.centralsemi.com

SHUTDOWN AND START-UP

On startup, the LM3503 contains special circuitry that limits the peak inductor current which prevents large

current spikes from loading the battery or power supply. The LM3503 is shutdown when both En1 and En2

signals are less than 0.3V. During shutdown the output voltage is a diode drop below the supply voltage. When

shutdown, the softstart is reset to prevent inrush current at the next startup.

THERMAL SHUTDOWN

The LM3503 stops regulating when the internal semiconductor junction temperature reaches approximately

140°C. The internal thermal shutdown has approximately 20°C of hysteresis which results in the LM3503 turning

back on when the internal semiconductor junction temperature reaches 120°C. When the thermal shutdown

temperature is reached, the softstart is reset to prevent inrush current when the die temperature cools.

UNDER VOLTAGE PROTECTION

The LM3503 contains protection circuitry to prevent operation for low input supply voltages. When Vin drops

below 2.3V, typically, the LM3503 will no longer regulate. In this mode, the output voltage will be one diode drop

below Vin and the softstart will be reset. When Vin increases above 2.4V, typically, the device will begin

regulating again.

OVER VOLTAGE PROTECTION

The LM3503 contains dedicated ciruitry for monitoring the output voltage. In the event that the LED network is

disconnected from the LM3503, the output voltage will increase and be limited to 15.5V(typ.) for the 16V version,

24V(typ.) for the 25V version, 34V(typ.) for 35V version and 42V(typ.) for the 44V version. (see electrical table for

more details). In the event that the network is reconnected regulation will resume at the appropriate output

voltage.

LAYOUT CONSIDERATIONS

All components, except for the white LEDs, must be placed as close as possible to the LM3503. The die attach

pad (DAP) must be soldered to the ground plane.

The input bypass capacitor C_IN, as shown in the Typical Application Circuit, must be placed close to the IC and

connect between the V_INand Pgnd pins. This will reduce copper trace resistance which effects input voltage

ripple of the IC. For additional input voltage filtering, a 100 nF bypass capacitor can be placed in parallel with C_IN

to shunt any high frequency noise to ground. The output capacitor, C_OUT, must be placed close to the IC and be

connected between the V_OUT1and Pgnd pins. Any copper trace connections for the C_OUTcapacitor can increase

the series resistance, which directly effects output voltage ripple and efficiency. The current setting resistor, R1,

should be kept close to the Fb pin to minimize copper trace connections that can inject noise into the system.

The ground connection for the current setting resistor network should connect directly to the Pgnd pin. The Agnd

pin should be tied directly to the Pgnd pin. Trace connections made to the inductor should be minimized to

reduce power dissipation and increase overall efficiency while reducing EMI radiation. For more details regarding

layout guidelines for switching regulators, refer to Applications Note AN-1149.

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REVISION HISTORY

Changes from Revision D (May 2013) to Revision E

Page

•

Changed layout of National Data Sheet to TI format .......................................................................................................... 18

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23-Sep-2013

PACKAGING INFORMATION

Orderable Device

LM3503ITL-16/NOPB

LM3503ITL-25/NOPB

LM3503ITL-35/NOPB

LM3503ITL-44/NOPB

LM3503ITLX-16/NOPB

LM3503ITLX-25/NOPB

LM3503ITLX-35/NOPB

LM3503ITLX-44/NOPB

Status Package Type Package Pins Package

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

-40 to 85

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

ACTIVE

DSBGA

YPA

250

Green (RoHS

& no Sb/Br)

SNAGCU

Level-1-260C-UNLIM

SBHB

SBJB

SBKB

SDNB

SBHB

SBJB

SBKB

SDNB

ACTIVE

YPA

250

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

250

Green (RoHS

& no Sb/Br)

3000

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

LM3503SQ-16

ACTIVE

WQFN

RGH

TBD

Call TI

CU SN

Call TI

-40 to 85

L00045B

LM3503SQ-16/NOPB

1000

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

LM3503SQ-25

ACTIVE

WQFN

RGH

TBD

Call TI

CU SN

Call TI

-40 to 85

L00046B

LM3503SQ-25/NOPB

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

LM3503SQ-35

ACTIVE

WQFN

RGH

1000

TBD

Call TI

CU SN

Call TI

-40 to 85

L00047B

LM3503SQ-35/NOPB

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

LM3503SQ-44

ACTIVE

WQFN

RGH

TBD

Call TI

CU SN

Call TI

-40 to 85

L00053B

LM3503SQ-44/NOPB

1000

4500

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

LM3503SQX-16

ACTIVE

WQFN

RGH

TBD

Call TI

CU SN

Call TI

-40 to 85

L00045B

LM3503SQX-16/NOPB

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

23-Sep-2013

Orderable Device

Status Package Type Package Pins Package

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

LM3503SQX-25

ACTIVE

WQFN

RGH

TBD

Call TI

CU SN

Call TI

-40 to 85

L00046B

LM3503SQX-25/NOPB

ACTIVE

RGH

4500

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

L00046B

LM3503SQX-35

ACTIVE

WQFN

RGH

TBD

Call TI

CU SN

Call TI

-40 to 85

L00047B

LM3503SQX-35/NOPB

4500

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

LM3503SQX-44

ACTIVE

WQFN

RGH

TBD

Call TI

CU SN

Call TI

-40 to 85

L00053B

LM3503SQX-44/NOPB

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

23-Sep-2013

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

23-Sep-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

LM3503ITL-16/NOPB

LM3503ITL-25/NOPB

LM3503ITL-35/NOPB

LM3503ITL-44/NOPB

DSBGA

YPA

RGH

250

178.0

330.0

8.4

2.03

4.3

2.21

4.3

0.76

1.3

4.0

8.0

250

8.4

8.0

250

8.4

8.0

LM3503ITLX-16/NOPB DSBGA

LM3503ITLX-25/NOPB DSBGA

LM3503ITLX-35/NOPB DSBGA

LM3503ITLX-44/NOPB DSBGA

3000

1000

4500

8.4

8.0

8.4

8.0

8.4

8.0

8.4

8.0

LM3503SQ-16/NOPB

LM3503SQ-25/NOPB

LM3503SQ-35

WQFN

12.4

12.0

4.3

1.3

4.3

1.3

LM3503SQ-35/NOPB

LM3503SQ-44/NOPB

LM3503SQX-16/NOPB

LM3503SQX-25/NOPB

LM3503SQX-35/NOPB

LM3503SQX-44/NOPB

4.3

1.3

4.3

1.3

4.3

1.3

4.3

1.3

4.3

1.3

4.3

1.3

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

23-Sep-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

LM3503ITL-16/NOPB

LM3503ITL-25/NOPB

LM3503ITL-35/NOPB

LM3503ITL-44/NOPB

LM3503ITLX-16/NOPB

LM3503ITLX-25/NOPB

LM3503ITLX-35/NOPB

LM3503ITLX-44/NOPB

LM3503SQ-16/NOPB

LM3503SQ-25/NOPB

LM3503SQ-35

DSBGA

WQFN

YPA

RGH

250

210.0

203.0

367.0

185.0

190.0

367.0

35.0

41.0

35.0

250

3000

1000

4500

LM3503SQ-35/NOPB

LM3503SQ-44/NOPB

LM3503SQX-16/NOPB

LM3503SQX-25/NOPB

LM3503SQX-35/NOPB

LM3503SQX-44/NOPB

Pack Materials-Page 2

MECHANICAL DATA

RGH0016A

SQA16A (Rev A)

www.ti.com

MECHANICAL DATA

YPA0010

0.600

±0.075

TLP10XXX (Rev D)

D: Max = 2.124 mm, Min =2.063 mm

E: Max = 1.946 mm, Min =1.885 mm

4215069/A

12/12

A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.

B. This drawing is subject to change without notice.

NOTES:

www.ti.com

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LM3503ITLX-16/NOPB [TI]

相关型号：

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LM3503ITLX-35

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LM3503SQ-25

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