LM3525M-L/NOPB [TI]

0.5A 负载、2.7-5.5V、80mΩ USB 电源开关 | D | 8 | -40 to 125;
LM3525M-L/NOPB
型号: LM3525M-L/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

0.5A 负载、2.7-5.5V、80mΩ USB 电源开关 | D | 8 | -40 to 125

开关 驱动 电源开关 光电二极管 接口集成电路
文件: 总20页 (文件大小:1276K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LM3525  
www.ti.com  
SNVS051D FEBRUARY 2000REVISED MARCH 2013  
LM3525 Single Port USB Power Switch and Over-Current Protection  
Check for Samples: LM3525  
1
FEATURES  
DESCRIPTION  
The LM3525 provides Universal Serial Bus standard  
power switch and over-current protection for all host  
port applications. The single port device is ideal for  
Notebook PC and Handheld PC applications that  
supply power to one port.  
2
Compatible with USB1.1 and USB 2.0  
1 ms Fault Flag Delay During Hot-Plug Events  
Smooth Turn-On Eliminates Inrush Induced  
Voltage Drop  
UL Recognized Component: REF # 205202  
A 1 ms delay on fault flag output prevents erroneous  
overcurrent reporting caused by inrush currents  
during the hot-plug events.  
1A Nominal Short Circuit Output Current  
Protects Notebook PC Power Supplies  
Thermal Shutdown Protects Device in Direct  
Short Condition  
The LM3525 accepts an input voltage between 2.7V  
and 5.5V allowing use as a device-based inrush  
current limiter for 3.3V USB peripherals, as well as  
Root and Self-Powered Hubs at 5.5V. The Enable  
input accepts both 3.3V and 5.0V logic thresholds.  
500mA Minimum Continuous Load Current  
Small SOIC-8 Package Minimizes Board Space  
2.7V to 5.5V Input Voltage Range  
Switch Resistance 120 mMax. at VIN = 5V  
1µA Max Standby Current  
The small size, low RON, and 1 ms fault flag delay  
make the LM3525 a good choice for root hubs as well  
as ganged power control in space-critical self-  
powered hubs.  
100 µA Max Operating Current  
Undervoltage Lockout (UVLO)  
APPLICATIONS  
Universal Serial Bus (USB) Root Hubs  
including Desktop and Notebook PC  
USB Monitor Hubs  
Other Self-Powered USB Hub Devices  
High Power USB Devices Requiring Inrush  
Limiting  
General Purpose High Side Switch  
Applications  
Typical Operating Circuit and Connection Diagram  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2000–2013, Texas Instruments Incorporated  
LM3525  
SNVS051D FEBRUARY 2000REVISED MARCH 2013  
www.ti.com  
Figure 1. LM3525M-L  
Figure 2. LM3525M-H  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
(1)(2)  
Absolute Maximum Ratings  
Supply Voltage  
0.3V to 6.0V  
0.3V to 6.0V  
0.3V to 5.5V  
700 mW  
Output Voltage  
Voltage at All Other Pins  
Power Dissipation (TA = 25°C)(3)  
(3)  
TJMAX  
150°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when  
operating the device beyond its rated operating conditions. Products are not tested under negative Absolute Maximum conditions.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and  
specifications.  
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX (maximum junction temperature),  
θJA (junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any  
temperature is PDMAX = (TJMAX TA)/θJA or the number given in the Absolute Maximum Ratings, which ever is lower. The thermal  
resistance θJA of the LM3525 in the SOIC-8 package is 150°C/W.  
Operating Ratings  
Supply Voltage Range  
2.7 to 5.5V  
40°C to +85°C  
40°C to +125°C  
65°C to +150°C  
260°C  
Operating Ambient Range  
Operating Junction Temperature Range  
Storage Temperature Range  
Lead Temperature (Soldering, 5 seconds)  
ESD Rating(1)  
2 kV  
(1) The human body model is a 100 pF capacitor discharged through a 1.5 kresistor into each pin.  
2
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LM3525  
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SNVS051D FEBRUARY 2000REVISED MARCH 2013  
DC Electrical Characteristics  
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.  
Unless otherwise specified: VIN = 5.0V, EN = 0V (LM3525-L) or EN = VIN (LM3525-H).  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
IN to Out pins  
RON  
On-Resistance  
VIN = 5V  
VIN = 2.7V  
80  
120  
120  
160  
mΩ  
IOUT  
ISC  
OUT pins continuous output current  
Short Circuit Output Current  
0.5  
A
A
See(1)  
0.5  
1.0  
1.5  
10  
ILEAK  
OUT pins Output Leakage Current EN = VIN (LM3525-L) or  
EN = GND (LM3525-H),  
0.15  
µA  
OCTHRESH  
RFO  
Over-current Threshold  
2.25  
6
3.2  
25  
A
IFO = 10 mA, VIN = 5V  
FLAG Output Resistance  
IFO = 10 mA, VIN = 2.7V  
8
40  
IEN  
EN/EN Leakage Current  
EN/EN Input Voltage  
EN/EN Input Voltage  
Under-Voltage Lockout  
EN/EN = 0V or EN/EN = VIN  
0.5  
0.5  
µA  
V
VIH  
See(2)  
See(2)  
2.4  
1.9  
1.7  
VIL  
0.8  
V
VUVLO  
VIN = Increasing  
VIN = Decreasing  
1.9  
1.8  
V
IDDOFF  
IDDON  
ThSD  
Supply Current  
Supply Current  
Switch OFF  
Switch ON  
0.05  
65  
1
µA  
µA  
100  
Overtemperature Shutdown  
Threshold(1)  
TJ Increasing  
TJ Decreasing  
135  
125  
°C  
°C  
IFH  
Error Flag Leakage Current  
VFLAG= 5V  
0.1  
1
µA  
(1) Thermal shutdown will protect the device from permanent damage.  
(2) For the LM3525-L, OFF is EN 2.4V and ON is EN 0.8V. For the LM3525-H, OFF is EN 0.8V and ON is EN 2.4V  
AC Electrical Characteristics  
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.  
Unless otherwise specified: VIN = 5.0V.  
Symbol  
Parameter  
OUT Rise Time  
Conditions  
Min  
Typ  
200  
20  
Max  
Units  
µs  
tr  
RL = 10Ω  
RL = 10Ω  
RL = 10Ω  
RL = 10Ω  
RL = 0  
tf  
OUT Fall Time  
µs  
tON  
Turn on Delay, EN to OUT  
Turn off Delay, EN to OUT  
Over Current Flag Delay  
200  
20  
µs  
tOFF  
tOC  
µs  
1
ms  
Copyright © 2000–2013, Texas Instruments Incorporated  
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LM3525  
SNVS051D FEBRUARY 2000REVISED MARCH 2013  
www.ti.com  
TYPICAL APPLICATION CIRCUIT  
PIN DESCRIPTION  
Pin Number  
Pin Name  
Pin Function  
1
EN (LM3525-L) Enable (Input): Logic-compatible enable input.  
EN (LM3525-H)  
2
3
FLG  
GND  
NC  
Fault Flag (Output): Active-low, open-drain output. Indicates overcurrent, UVLO and thermal shutdown.  
Ground  
4, 5  
7
Not internally connected.  
IN  
Supply Input: This pin is the input to the power switch and the supply voltage for the IC.  
Switch Output: This pin is the output of the high side switch. Pins 6 & 8 must be tied together.  
6, 8  
OUT  
Figure 3. Typical Application Circuit  
4
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LM3525  
www.ti.com  
SNVS051D FEBRUARY 2000REVISED MARCH 2013  
Typical Performance Characteristics  
VIN = 5.0V, IL = 500 mA, TA = 25°C unless otherwise specified.  
RDSON  
vs  
VIN  
RDSON  
vs  
Temperature  
Figure 4.  
Figure 5.  
Current Limit  
vs  
Temperature  
Over Current Threshold  
vs  
Temperature  
Figure 6.  
Figure 7.  
Delay  
vs  
Temperature  
UVLO Threshold  
Figure 8.  
Figure 9.  
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SNVS051D FEBRUARY 2000REVISED MARCH 2013  
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Typical Performance Characteristics (continued)  
VIN = 5.0V, IL = 500 mA, TA = 25°C unless otherwise specified.  
Short Circuit Response  
Under Voltage Lock Out (UVLO)  
Figure 10.  
Figure 11.  
Turn-ON/OFF Delay and Rise Time/Fall Time  
Short Circuit Current  
Figure 12.  
Figure 13.  
6
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Product Folder Links: LM3525  
LM3525  
www.ti.com  
SNVS051D FEBRUARY 2000REVISED MARCH 2013  
FUNCTIONAL DESCRIPTION  
The LM3525-H and LM3525-L are high side P-Channel switches with active-high and active-low enable inputs,  
respectively. Fault conditions turn off and inhibit turn-on of the output transistor and activate the open-drain error  
flag transistor sinking current to the ground.  
INPUT AND OUTPUT  
IN (Input) is the power supply connection to the control circuitry and the source of the output MOSFET.  
OUT (Output) is the drain of the output MOSFET. In a typical application circuit, current flows through the switch  
from IN to OUT towards the load.  
If VOUT is greater than VIN when the switch is enabled, current will flow from OUT to IN since the MOSFET is  
bidirectional.  
THERMAL SHUTDOWN  
LM3525 is internally protected against excessive power dissipation. In the event of a shorted output or heavy  
loads that could elevate the die temperature to above approximately 135°C, the thermal shutdown circuit of the  
LM3525 will be activated and the power switch turned off.  
The switch is turned on after die temperature drops by 10°C. This built-in temperature hysteresis prevents  
undesirable oscillation of the thermal protection circuit and allows the device to reset itself after it is cooled down.  
UNDERVOLTAGE LOCKOUT  
UVLO prevents the MOSFET switch from turning on until input voltage exceeds 1.9V.  
UVLO shuts off the MOSFET switch and signals the fault flag if input voltage drops below 1.8V. UVLO functions  
only when device is enabled.  
CURRENT LIMIT  
The current limit circuit is designed to protect the system supply, the MOSFET switches and the load from  
damage caused by excessive currents. The current limit threshold is set internally to allow a minimum of 500 mA  
through the MOSFET but limit the maximum current to 1.0A typical.  
FAULT FLAG  
The fault flag is an open-drain output capable of sinking 10 mA load current to typically 60 mV above ground.  
The fault flag is active (pulled low) when any of the following conditions are present: undervoltage, current limit,  
or thermal shutdown.  
A 1ms delay in reporting fault condition prevents erroneous fault flags and eliminates the need for external RC  
delay network.  
Application Information  
FILTERING  
The USB specification indicates that “no less than 120 µF tantalum capacitors” must be used on the output of  
each downstream port. This bulk capacitance provides the short-term transient current needed during a hot plug-  
in. Current surges caused by the input capacitance of the down stream device could generate undesirable EMI  
signals. Ferrite beads in series with all power and ground lines are recommended to eliminate or significantly  
reduce EMI.  
In selecting a ferrite bead, the DC resistance of the wire used must be kept to minimum to reduce the voltage  
drop.  
A 0.01 µF ceramic capacitor is recommended on each port directly between the Vbus and ground pins to prevent  
EMI damage to other components during the hot - detachment.  
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SNVS051D FEBRUARY 2000REVISED MARCH 2013  
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Adequate capacitance must be connected to the input of the device to limit the input voltage drop during a hot-  
plug event to less than 330 mV. For a few tens of µs, the host must supply the inrush current to the peripheral,  
charging its bulk capacitance to Vbus. This current is initially supplied by the input capacitor. A 33 µF 16V  
tantalum capacitor is recommended.  
In choosing the capacitors, special attention must be paid to the Effective Series Resistance, ESR, of the  
capacitors to minimize the IR drop across the capacitor's ESR.  
SOFT START  
To eliminate the upstream voltage droop caused by the high in-rush current drawn by the output capacitors, the  
inrush current is internally limited to 1.0A.  
TRANSIENT OVER-CURRENT DELAY  
In USB applications, it is required that output bulk capacitance is utilized to support hot-plug events. During hot-  
plug events, inrush currents may also cause the flag to go active. Since these conditions are not valid over-  
current faults, the USB controller must ignore the flag during these events.  
High transient current is also generated when switch is enabled and large values of capacitance at the output  
have to be rapidly charged. The inrush currents created could exceed the short circuit current limit threshold of  
the device forcing it into the current limit mode. The capacitor is charged with the maximum available short circuit  
current set by the LM3525. The duration of the inrush current depends on the size of the output capacitance and  
load current. Since this is not a valid fault condition, the LM3525 delays the generation of the fault flag for 1 ms.  
If condition persists due to other causes such as a short, a fault flag is generated after a 1 ms delay has elapsed.  
The LM3525's 1 ms delay in issuing the fault flag is adequate for most applications. If longer delays are required,  
an RC filter as shown in Figure 14 may be used.  
Figure 14. Transient Fitter  
PCB LAYOUT CONSIDERATIONS  
In order to meet the USB requirements for voltage drop, droop and EMI, each component used in this circuit  
must be evaluated for its contribution to the circuit performance as shown in Figure 15. The PCB layout rules and  
guidelines must be followed.  
Place the switch as close to the USB connector as possible. Keep all Vbus traces as short as possible and use  
at least 50-mil, 1 ounce copper for all Vbus traces. Solder plating the traces will reduce the trace resistance.  
Avoid vias as much as possible. If vias are used, use multiple vias in parallel and/or make them as large as  
possible.  
Place the output capacitor and ferrite beads as close to the USB connector as possible.  
If ferrite beads are used, use wires with minimum resistance and large solder pads to minimize connection  
resistance.  
8
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LM3525  
www.ti.com  
SNVS051D FEBRUARY 2000REVISED MARCH 2013  
Figure 15. Self-Powered Hub Per-Port Voltage Drop  
Typical Applications  
Figure 16. SIngle-Port USB Self-Powered Hub  
Figure 17. Soft-Start Application  
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LM3525  
SNVS051D FEBRUARY 2000REVISED MARCH 2013  
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Figure 18. Inrush Current-limit Application  
10  
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LM3525  
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SNVS051D FEBRUARY 2000REVISED MARCH 2013  
REVISION HISTORY  
Changes from Revision C (March 2013) to Revision D  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 10  
Copyright © 2000–2013, Texas Instruments Incorporated  
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11  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Sep-2021  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
95  
95  
95  
95  
(1)  
(2)  
(3)  
(4/5)  
(6)  
LM3525M-H  
LM3525M-H/NOPB  
LM3525M-L  
ACTIVE  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
D
D
D
D
D
D
8
8
8
8
8
8
Non-RoHS  
& Green  
Call TI  
Level-1-235C-UNLIM  
Level-1-260C-UNLIM  
Level-1-235C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
3525  
M-H  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
RoHS & Green  
SN  
Call TI  
SN  
3525  
M-H  
Non-RoHS  
& Green  
3525  
M-L  
LM3525M-L/NOPB  
LM3525MX-H/NOPB  
LM3525MX-L/NOPB  
RoHS & Green  
3525  
M-L  
2500 RoHS & Green  
2500 RoHS & Green  
SN  
3525  
M-H  
SN  
3525  
M-L  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Sep-2021  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM3525MX-H/NOPB  
LM3525MX-L/NOPB  
SOIC  
SOIC  
D
D
8
8
2500  
2500  
330.0  
330.0  
12.4  
12.4  
6.5  
6.5  
5.4  
5.4  
2.0  
2.0  
8.0  
8.0  
12.0  
12.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM3525MX-H/NOPB  
LM3525MX-L/NOPB  
SOIC  
SOIC  
D
D
8
8
2500  
2500  
367.0  
367.0  
367.0  
367.0  
35.0  
35.0  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TUBE  
*All dimensions are nominal  
Device  
Package Name Package Type  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
LM3525M-H  
LM3525M-H  
D
D
D
D
D
D
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
8
8
8
8
8
8
95  
95  
95  
95  
95  
95  
495  
495  
495  
495  
495  
495  
8
8
8
8
8
8
4064  
4064  
4064  
4064  
4064  
4064  
3.05  
3.05  
3.05  
3.05  
3.05  
3.05  
LM3525M-H/NOPB  
LM3525M-L  
LM3525M-L  
LM3525M-L/NOPB  
Pack Materials-Page 3  
PACKAGE OUTLINE  
D0008A  
SOIC - 1.75 mm max height  
SCALE 2.800  
SMALL OUTLINE INTEGRATED CIRCUIT  
C
SEATING PLANE  
.228-.244 TYP  
[5.80-6.19]  
.004 [0.1] C  
A
PIN 1 ID AREA  
6X .050  
[1.27]  
8
1
2X  
.189-.197  
[4.81-5.00]  
NOTE 3  
.150  
[3.81]  
4X (0 -15 )  
4
5
8X .012-.020  
[0.31-0.51]  
B
.150-.157  
[3.81-3.98]  
NOTE 4  
.069 MAX  
[1.75]  
.010 [0.25]  
C A B  
.005-.010 TYP  
[0.13-0.25]  
4X (0 -15 )  
SEE DETAIL A  
.010  
[0.25]  
.004-.010  
[0.11-0.25]  
0 - 8  
.016-.050  
[0.41-1.27]  
DETAIL A  
TYPICAL  
(.041)  
[1.04]  
4214825/C 02/2019  
NOTES:  
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.  
Dimensioning and tolerancing per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not  
exceed .006 [0.15] per side.  
4. This dimension does not include interlead flash.  
5. Reference JEDEC registration MS-012, variation AA.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
D0008A  
SOIC - 1.75 mm max height  
SMALL OUTLINE INTEGRATED CIRCUIT  
8X (.061 )  
[1.55]  
SYMM  
SEE  
DETAILS  
1
8
8X (.024)  
[0.6]  
SYMM  
(R.002 ) TYP  
[0.05]  
5
4
6X (.050 )  
[1.27]  
(.213)  
[5.4]  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:8X  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
METAL  
EXPOSED  
METAL  
EXPOSED  
METAL  
.0028 MAX  
[0.07]  
.0028 MIN  
[0.07]  
ALL AROUND  
ALL AROUND  
SOLDER MASK  
DEFINED  
NON SOLDER MASK  
DEFINED  
SOLDER MASK DETAILS  
4214825/C 02/2019  
NOTES: (continued)  
6. Publication IPC-7351 may have alternate designs.  
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
D0008A  
SOIC - 1.75 mm max height  
SMALL OUTLINE INTEGRATED CIRCUIT  
8X (.061 )  
[1.55]  
SYMM  
1
8
8X (.024)  
[0.6]  
SYMM  
(R.002 ) TYP  
[0.05]  
5
4
6X (.050 )  
[1.27]  
(.213)  
[5.4]  
SOLDER PASTE EXAMPLE  
BASED ON .005 INCH [0.125 MM] THICK STENCIL  
SCALE:8X  
4214825/C 02/2019  
NOTES: (continued)  
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
9. Board assembly site may have different recommendations for stencil design.  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
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DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license  
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TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
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