LM3526 [TI]

2 通道、0.5A 负载、2.7-5.5V、100mΩ USB 电源开关;
LM3526
型号: LM3526
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

2 通道、0.5A 负载、2.7-5.5V、100mΩ USB 电源开关

开关 电源开关
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LM3526  
www.ti.com  
SNVS054E FEBRUARY 2000REVISED MARCH 2013  
LM3526 Dual Port USB Power Switch and Over-Current Protection  
Check for Samples: LM3526  
1
FEATURES  
DESCRIPTION  
The LM3526 provides Universal Serial Bus standard  
power switch and over-current protection for all host  
port applications. The dual port device is ideal for  
Notebook and desktop PC's that supply power to  
more than one port.  
2
Compatible with USB1.1 and USB 2.0  
1 ms Fault Flag Delay Filters Hot-Plug Events  
Smooth Turn-on Eliminates In-rush Induced  
Voltage Drop  
UL Recognized Component: REF# 205202  
A 1 ms delay on the fault flag output prevents  
erroneous overcurrent reporting caused by in-rush  
currents during hot-plug events.  
1A Nominal Short Circuit Output Current  
Protects PC Power Supplies  
Thermal Shutdown Protects Device in Direct  
Short Condition  
The dual stage thermal protection circuit in the  
LM3526 provides individual protection to each switch  
and the entire device. In a short-circuit/over-current  
event, the switch dissipating excessive heat is turned  
off, allowing the second switch to continue to function  
uninterrupted.  
500mA Minimum Continuous Load Current  
Small SOIC-8 package minimizes board space  
2.7V to 5.5V Input Voltage Range  
140 mMax. Switch Resistance  
1 µA Max. Standby Current  
The LM3526 accepts an input voltage between 2.7V  
and 5.5V allowing use as a device-based in-rush  
current limiter for 3.3V USB peripherals, as well as  
Root and Self-Powered Hubs at 5.5V. The Enable  
inputs accept both 3.3V and 5.0V logic thresholds.  
200 µA Max. Operating Current  
Under-voltage Lockout (UVLO)  
The small size, low RON, and 1 ms fault flag delay  
make the LM3526 a good choice for root hubs as well  
as per-port power control in embedded and stand-  
alone hubs.  
APPLICATIONS  
Universal Serial Bus (USB) Root Hubs  
including Desktop and Notebook PC  
USB Monitor Hubs  
Other Self-Powered USB Hub Devices  
High Power USB Devices Requiring In-rush  
Limiting  
General Purpose High Side Switch  
Applications  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2000–2013, Texas Instruments Incorporated  
LM3526  
SNVS054E FEBRUARY 2000REVISED MARCH 2013  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Typical Operating Circuit and Connection Diagram  
Figure 1. LM3526-H  
Figure 2. LM3526-L  
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LM3526  
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SNVS054E FEBRUARY 2000REVISED MARCH 2013  
Absolute Maximum Ratings(1)(2)  
Supply Voltage  
0.3V to 6V  
0.3V to 6V  
0.3V to 5.5V  
700 mW  
Output Voltage  
Voltage at All Other Pins  
Power Dissipation (TA = 25°C)(3)  
(3)  
TJMAX  
150°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when  
operating the device beyond its rated operating conditions.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and  
specifications.  
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX (Maximum junction temperature),  
θJA (junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any  
temperature is PDMAX = (TJMAX TA)/θJA or the number given in the Absolute Maximum Ratings, which ever is lower. θJA = 150°C/W.  
Operating Ratings  
Supply Voltage Range  
2.7V to 5.5V  
40°C to 85°C  
40°C to 125°C  
65°C to +150°C  
260°C  
Operating Ambient Range  
Operating Junction Temperature Range  
Storage Temperature Range  
Lead Temperature (Soldering, 5 seconds)  
ESD Rating(1)  
2kV  
ESD Rating Output Only  
8kV  
(1) The human body model is a 100 pF capacitor discharged through a 1.5 kresistor into each pin. Enable pin ESD threshold is 1.7kV.  
DC Electrical Characteristics  
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.  
Unless otherwise specified: VIN = 5.0V, VEN = 0V (LM3526-L) or VEN = VIN (LM3526-H).  
Symbol  
RON  
IOUT  
ISC  
Parameter  
Conditions  
Min  
Typ  
100  
110  
Max  
140  
180  
Units  
mΩ  
A
VIN = 5V, IOUT = 500mA, each switch  
VIN = 2.7V, IOUT = 500mA, each switch  
On Resistance  
OUT pins continuous output Each Output  
current  
Short Circuit Output Current Each Output (enable into Load)(1)  
0.5  
A
VOUT = 4.0V  
VOUT = 0.1V  
0.5  
1.2  
1
1.9  
1.5  
3.2  
10  
OCTHRESH  
ILEAK  
Over-current Threshold  
2.2  
0.01  
A
OUT pins Output Leakage  
Current  
VEN = VIN (LM3526-L)  
VEN = 0V (LM3526-H)  
µA  
IFO = 10 mA, VIN = 5.0V  
IFO = 10 mA, VIN = 3.3V  
IFO = 10 mA, VIN = 2.7V  
VEN/VEN = 0V or VEN/VEN = VIN  
See(2)  
10  
11  
12  
25  
35  
40  
0.5  
RFO  
FLAG Output Resistance  
IEN  
EN/EN Leakage Current  
EN/EN Input Logic High  
EN/EN Input Logic Low  
0.5  
µA  
V
VIH  
2.4  
1.9  
1.7  
1.8  
VIL  
See(2)  
0.8  
V
VUVLO  
Under-Voltage Lockout  
Threshold  
V
IDDOFF  
Supply Current  
Switch-Off  
0.2  
1
µA  
40°C TJ 85°C  
2
IDDON  
ThSD  
Supply Current  
Switch-On  
115  
200  
µA  
°C  
Over-temperature Shutdown TJ Increasing, with no shorted output  
Threshold  
150  
145  
135  
TJ Increasing, with shorted output (s)  
TJ Decreasing(1)  
(1) Thermal Shutdown will protect the device from permanent damage.  
(2) For LM3526-L, OFF is EN 2.4V and ON is EN 0.8V. For LM3526-H, OFF is EN 0.8V and ON is EN 2.4V.  
Copyright © 2000–2013, Texas Instruments Incorporated  
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LM3526  
SNVS054E FEBRUARY 2000REVISED MARCH 2013  
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DC Electrical Characteristics (continued)  
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.  
Unless otherwise specified: VIN = 5.0V, VEN = 0V (LM3526-L) or VEN = VIN (LM3526-H).  
Symbol  
IFH  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Error Flag Leakage Current Vflag = 5V  
0.01  
1
µA  
AC Electrical Characteristics  
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.  
Unless otherwise specified: VIN = 5.0V.  
Symbol  
Parameter  
OUT Rise Time  
Conditions  
Min  
Typ  
100  
5
Max  
Units  
µs  
tr  
RL = 10Ω  
RL = 10Ω  
RL = 10Ω  
RL = 10Ω  
RL = 0  
tf  
OUT Fall Time  
µs  
tON  
Turn on Delay, EN to OUT  
Turn off Delay, EN to OUT  
Over Current Flag Delay  
150  
5
µs  
tOFF  
tOC  
µs  
1
ms  
TYPICAL APPLICATION CIRCUIT  
PIN DESCRIPTIONS  
Pin Number  
Pin Name  
Pin Function  
1, 4  
ENA, ENB  
(LM3526-L)  
ENA, ENB  
(LM3526-H)  
Enable (Input): Logic-compatible enable inputs.  
2, 3  
FLAG A  
FLAG B  
Fault Flag (Output): Active-low, open-drain outputs. Indicates overcurrent, UVLO or thermal shutdown.  
*See Application Information for more information.  
6
7
GND  
IN  
Ground  
Supply Input: This pin is the input to the power switch and the supply voltage for the IC.  
Switch Output: These pins are the outputs of the high side switch.  
8, 5  
OUT A  
OUT B  
Figure 3. Typical Application Circuit  
4
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LM3526  
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SNVS054E FEBRUARY 2000REVISED MARCH 2013  
Typical Performance Characteristics  
VIN = 5.0V, IL = 500 mA, TA = 25°C unless otherwise specified.  
RON  
vs  
Temperature  
RON  
vs  
Temperature  
Figure 4.  
Figure 5.  
Quiescent Current  
vs  
Input Voltage  
Quiescent Current  
vs  
Temperature  
Figure 6.  
Figure 7.  
Current Limit  
vs  
Output Voltage  
OC Threshold  
vs  
Temperature  
Figure 8.  
Figure 9.  
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Typical Performance Characteristics (continued)  
VIN = 5.0V, IL = 500 mA, TA = 25°C unless otherwise specified.  
Fault Flag Delay  
Fault Flag Delay  
vs  
Temperature  
vs  
Temperature  
Figure 10.  
Figure 11.  
Under Voltage Lockout Threshold  
vs  
Under Voltage Lockout (UVLO)  
Temperature  
Figure 12.  
Figure 13.  
Short Circuit Response with  
Thermal Cycling*  
Over Current/Current Limit Response*  
* Output is shorted to Ground through a 100 mresistor  
Figure 14.  
Figure 15.  
6
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SNVS054E FEBRUARY 2000REVISED MARCH 2013  
Typical Performance Characteristics (continued)  
VIN = 5.0V, IL = 500 mA, TA = 25°C unless otherwise specified.  
Turn-ON/OFF Response with  
Turn-ON/OFF Response with  
47/10µF Load  
47/150µF Load  
Figure 16.  
Figure 17.  
Thermal Shutdown Response  
(Port A output shorted*)  
Thermal Shutdown Response (See Notes)  
* Port A is shorted to GND through a 100 mresistor  
Figure 18.  
Figure 19.  
Enable into a short  
Figure 20.  
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LM3526  
SNVS054E FEBRUARY 2000REVISED MARCH 2013  
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FUNCTIONAL DESCRIPTION  
The LM3526-H and LM3526-L are high side P-Channel switches with active-high and active-low enable inputs,  
respectively. Fault conditions turn-off and inhibit turn-on of the output transistor and activate the open-drain error  
flag transistor sinking current to the ground.  
INPUT AND OUTPUT  
IN (Input) is the power supply connection to the control circuitry and the source of the output MOSFET.  
OUT (Output) is the connection to the drain of the output MOSFET. In a typical application circuit, current flows  
through the switch from IN to OUT towards the load.  
If VOUT is greater than VIN when the switch is enabled, current will flow from OUT to IN since the MOSFET is  
bidirectional.  
THERMAL SHUTDOWN  
The LM3526 is internally protected against excessive power dissipation by a two-stage thermal protection circuit.  
If the device temperature rises to approximately 145°C, the thermal shutdown circuitry turns off any switch that is  
current limited. Non-overloaded switches continue to function normally. If the die temperature rises above 150°C,  
both switches are turned off and both fault flag outputs are activated. Hysteresis ensures that a switch turned off  
by thermal shutdown will not be turned on again until the die temperature is reduced to 135°C. Shorted switches  
will continue to cycle off and on, due to the rising and falling die temperature, until the short is removed.  
UNDERVOLTAGE LOCKOUT  
UVLO prevents the MOSFET switch from turning on until input voltage exceeds 1.8V (typical).  
If input voltage drops below 1.8V (typical), UVLO shuts off the MOSFET switch and signals the fault flag. UVLO  
functions only when device is enabled.  
CURRENT LIMIT  
The current limit circuit is designed to protect the system supply, the MOSFET switches and the load from  
damage caused by excessive currents. The current limit threshold is set internally to allow a minimum of 500 mA  
through the MOSFET but limits the output current to approximately 1.0A typical.  
FAULT FLAG  
The fault flag is an open-drain output capable of sinking 10 mA load current to typically 100 mV above ground.  
A parasitic diode exists between the flag pins and VIN pin. Pulling the flag pins to voltages higher than VIN will  
forward bias this diode and will cause an increase in supply current. This diode will also clamp the voltage on the  
flag pins to a diode drop above VIN.  
The fault flag is active (pulled low) when any of the following conditions are present: under-voltage, current limit,  
or thermal shutdown.  
A 1ms (typ.) delay in reporting the fault condition prevents erroneous fault flags and eliminates the need for an  
external RC delay network.  
Application Information  
FILTERING  
The USB specification indicates that “no less than 120 µF tantalum capacitors” must be used on the output of  
each downstream port. This bulk capacitance provides the short-term transient current needed during a hot plug-  
in. Current surges caused by the input capacitance of the down stream device could generate undesirable EMI  
signals. Ferrite beads in series with all power and ground lines are recommended to eliminate or significantly  
reduce EMI.  
In selecting a ferrite bead, the DC resistance of the wire used must be kept to a minimum to reduce the voltage  
drop.  
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SNVS054E FEBRUARY 2000REVISED MARCH 2013  
A 0.01 µF ceramic capacitor is recommended on each port directly between the Vbus and ground pins to prevent  
EMI damage to other components during the hot-detachment.  
Adequate capacitance must be connected to the input of the device to limit the input voltage drop during a hot-  
plug event to less than 330 mV. For a few tens of µs, the host must supply the in-rush current to the peripheral,  
charging its bulk capacitance to Vbus. This current is initially supplied by the input capacitor. A 33 µF 16V  
tantalum capacitor is recommended.  
In choosing the capacitors, special attention must be paid to the Effective Series Resistance, ESR, of the  
capacitors to minimize the IR drop across the capacitor's ESR.  
SOFT START  
To eliminate the upstream voltage droop caused by the high in-rush current drawn by the output capacitors, the  
maximum in-rush current is internally limited to 1.5A.  
TRANSIENT OVER-CURRENT DELAY  
High transient current is also generated when the switch is enabled and large values of capacitance at the output  
have to be rapidly charged. The in-rush currents created could exceed the short circuit current limit threshold of  
the device forcing it into the current limit mode. The capacitor is charged with the maximum available short circuit  
current set by the LM3526. The duration of the in-rush current depends on the size of the output capacitance and  
load current. Since this is not a valid fault condition, the LM3526 delays the generation of the fault flag for 1 ms.  
If the condition persists due to other causes such as a short, a fault flag is generated after a 1 ms delay has  
elapsed.  
The LM3526's 1 ms delay in issuing the fault flag is adequate for most applications. If longer delays are required,  
an RC filter as shown in Figure 21 may be used.  
Figure 21.  
PCB LAYOUT CONSIDERATIONS  
In order to meet the USB requirements for voltage drop, droop and EMI, each component used in this circuit  
must be evaluated for its contribution to the circuit performance. The PCB layout rules and guidelines must be  
followed.  
Place the switch as close to the USB connector as possible. Keep all Vbus traces as short as possible and use  
at least 50-mil, 1 ounce copper for all Vbus traces. Solder plating the traces will reduce the trace resistance.  
Avoid vias as much as possible. If vias are used, use multiple vias in parallel and/or make them as large as  
possible.  
Place the output capacitor and ferrite beads as close to the USB connector as possible.  
If ferrite beads are used, use wires with minimum resistance and large solder pads to minimize connection  
resistance.  
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SNVS054E FEBRUARY 2000REVISED MARCH 2013  
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Figure 22. Self-Powered Hub Per-Port Voltage Drop  
Typical Applications  
Figure 23. Dual-Port USB Self-Powered Hub  
Figure 24. Soft-Start Application (Single port shown)  
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SNVS054E FEBRUARY 2000REVISED MARCH 2013  
Figure 25. In-rush Current-limit Application  
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LM3526  
SNVS054E FEBRUARY 2000REVISED MARCH 2013  
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REVISION HISTORY  
Changes from Revision D (March 2013) to Revision E  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 11  
12  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Sep-2021  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
95  
95  
95  
95  
(1)  
(2)  
(3)  
(4/5)  
(6)  
LM3526M-H  
LM3526M-H/NOPB  
LM3526M-L  
ACTIVE  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
D
D
D
D
D
D
D
8
8
8
8
8
8
8
Non-RoHS  
& Green  
Call TI  
Level-1-235C-UNLIM  
Level-1-260C-UNLIM  
Level-1-235C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-235C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
3526  
M-H  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
RoHS & Green  
SN  
Call TI  
SN  
3526  
M-H  
Non-RoHS  
& Green  
3526  
M-L  
LM3526M-L/NOPB  
LM3526MX-H/NOPB  
LM3526MX-L  
RoHS & Green  
3526  
M-L  
2500 RoHS & Green  
SN  
3526  
M-H  
2500  
Non-RoHS  
& Green  
Call TI  
SN  
3526  
M-L  
LM3526MX-L/NOPB  
2500 RoHS & Green  
3526  
M-L  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Sep-2021  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM3526MX-H/NOPB  
LM3526MX-L  
SOIC  
SOIC  
SOIC  
D
D
D
8
8
8
2500  
2500  
2500  
330.0  
330.0  
330.0  
12.4  
12.4  
12.4  
6.5  
6.5  
6.5  
5.4  
5.4  
5.4  
2.0  
2.0  
2.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
LM3526MX-L/NOPB  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM3526MX-H/NOPB  
LM3526MX-L  
SOIC  
SOIC  
SOIC  
D
D
D
8
8
8
2500  
2500  
2500  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
35.0  
35.0  
35.0  
LM3526MX-L/NOPB  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TUBE  
*All dimensions are nominal  
Device  
Package Name Package Type  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
LM3526M-H  
LM3526M-H  
D
D
D
D
D
D
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
8
8
8
8
8
8
95  
95  
95  
95  
95  
95  
495  
495  
495  
495  
495  
495  
8
8
8
8
8
8
4064  
4064  
4064  
4064  
4064  
4064  
3.05  
3.05  
3.05  
3.05  
3.05  
3.05  
LM3526M-H/NOPB  
LM3526M-L  
LM3526M-L  
LM3526M-L/NOPB  
Pack Materials-Page 3  
PACKAGE OUTLINE  
D0008A  
SOIC - 1.75 mm max height  
SCALE 2.800  
SMALL OUTLINE INTEGRATED CIRCUIT  
C
SEATING PLANE  
.228-.244 TYP  
[5.80-6.19]  
.004 [0.1] C  
A
PIN 1 ID AREA  
6X .050  
[1.27]  
8
1
2X  
.189-.197  
[4.81-5.00]  
NOTE 3  
.150  
[3.81]  
4X (0 -15 )  
4
5
8X .012-.020  
[0.31-0.51]  
B
.150-.157  
[3.81-3.98]  
NOTE 4  
.069 MAX  
[1.75]  
.010 [0.25]  
C A B  
.005-.010 TYP  
[0.13-0.25]  
4X (0 -15 )  
SEE DETAIL A  
.010  
[0.25]  
.004-.010  
[0.11-0.25]  
0 - 8  
.016-.050  
[0.41-1.27]  
DETAIL A  
TYPICAL  
(.041)  
[1.04]  
4214825/C 02/2019  
NOTES:  
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.  
Dimensioning and tolerancing per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not  
exceed .006 [0.15] per side.  
4. This dimension does not include interlead flash.  
5. Reference JEDEC registration MS-012, variation AA.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
D0008A  
SOIC - 1.75 mm max height  
SMALL OUTLINE INTEGRATED CIRCUIT  
8X (.061 )  
[1.55]  
SYMM  
SEE  
DETAILS  
1
8
8X (.024)  
[0.6]  
SYMM  
(R.002 ) TYP  
[0.05]  
5
4
6X (.050 )  
[1.27]  
(.213)  
[5.4]  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:8X  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
METAL  
EXPOSED  
METAL  
EXPOSED  
METAL  
.0028 MAX  
[0.07]  
.0028 MIN  
[0.07]  
ALL AROUND  
ALL AROUND  
SOLDER MASK  
DEFINED  
NON SOLDER MASK  
DEFINED  
SOLDER MASK DETAILS  
4214825/C 02/2019  
NOTES: (continued)  
6. Publication IPC-7351 may have alternate designs.  
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
D0008A  
SOIC - 1.75 mm max height  
SMALL OUTLINE INTEGRATED CIRCUIT  
8X (.061 )  
[1.55]  
SYMM  
1
8
8X (.024)  
[0.6]  
SYMM  
(R.002 ) TYP  
[0.05]  
5
4
6X (.050 )  
[1.27]  
(.213)  
[5.4]  
SOLDER PASTE EXAMPLE  
BASED ON .005 INCH [0.125 MM] THICK STENCIL  
SCALE:8X  
4214825/C 02/2019  
NOTES: (continued)  
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
9. Board assembly site may have different recommendations for stencil design.  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license  
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you  
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these  
resources.  
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for  
TI products.  
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2022, Texas Instruments Incorporated  

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