LM3678SD-1.2/NOPB [TI]

用于便携式应用的高性能、微型 1.5A 降压直流/直流转换器 | DSC | 10 | -30 to 85;
LM3678SD-1.2/NOPB
型号: LM3678SD-1.2/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

用于便携式应用的高性能、微型 1.5A 降压直流/直流转换器 | DSC | 10 | -30 to 85

便携式 开关 光电二极管 转换器
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LM3678  
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SNVS464C APRIL 2008REVISED MAY 2013  
High-Performance Miniature 1.5-A Step-Down DC-DC Converter for Handheld Applications  
Check for Samples: LM3678  
1
FEATURES  
DESCRIPTION  
The LM3678 step-down DC-DC converter is  
optimized for powering low-voltage circuits from a  
single Li-Ion cell battery and input voltage rails from  
2.5 V to 5.5 V. It provides up to 1.5-A load current,  
over the entire input voltage range. LM3678 offers a  
0.8V or 1.2V option. One of the pair of voltages is set  
through the VSELECT pin.  
2
VOUT = 0.8 V or 1.2 V  
VIN = 2.5 V to 5.5 V  
1.5-A Maximum Load Capability  
3.3-MHz (Typical) PWM Fixed Switching  
Frequency Allows Use of 1-µH Inductor  
±3% DC Output Voltage Precision  
0.01-µA (Typical) Shutdown Current  
LM3678 operates in PWM mode with  
a fixed  
frequency of 3.3 MHz. Internal synchronous  
rectification provides high efficiency during PWM  
mode operation. In shutdown mode, the device turns  
off and reduces battery consumption to 0.01 µA  
(typical).  
Internal Synchronous Rectification for High  
Efficiency  
Internal Soft Start  
Current Overload and Thermal Shutdown  
Protection  
The LM3678 is available in a 3mm x 3mm DSC-10  
package. A high switching frequency of 3.3 MHz  
(typical) allows use of tiny surface-mount  
components. Only three external surface-mount  
components, an inductor and two ceramic capacitors,  
are required (solution size less than 33 mm2). For  
voltages other than the voltage shown, contact TI or  
your distributor.  
APPLICATIONS  
PDAs and Smart Phones  
Personal Media Players  
W-LAN  
USB Modem Applications  
Digital Still Cameras  
Portable Hard Disk Drives  
Efficiency vs. Output Current  
( VOUT = 1.2V)  
Typical Application Circuit  
1 mH  
V
= 2.5V to 5.5V  
IN  
V
VDD  
VDD  
OUT  
SW  
FB  
CIN  
10 mF  
22 mF  
C
OUT  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0.8V/1.2V  
VSELECT  
EN  
LM3678  
PWM  
PGOOD  
GND  
GND  
NOTE: VSEL H = 1.2V, VSEL L = 0.8V  
0.100  
0.010  
1.000  
LOAD (A)  
10.000  
Figure 1.  
Figure 2.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008–2013, Texas Instruments Incorporated  
 
LM3678  
SNVS464C APRIL 2008REVISED MAY 2013  
www.ti.com  
Functional Block Diagram  
V
EN  
SW  
IN  
Current Limit  
Comparator  
+
Undervoltage  
Lockout  
Ramp  
Generator  
Soft  
Start  
-
Ref1  
PFM Current  
Comparator  
Thermal  
Bandgap  
+
2 MHz  
Oscillator  
Shutdown  
-
Ref2  
PWM Comparator  
+
-
Error  
Amp  
Control Logic  
Driver  
V
REF  
+
-
0.5V  
+
-
V
COMP  
1.0V  
+
-
Zero Crossing  
Comparator  
Frequency  
Compensation  
Fixed Ver  
FB  
GND  
VSELECT  
PGOOD PWM  
Figure 3. LM3678 Block Diagram  
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Connection Diagram and Package Mark Information  
GND  
1
FB  
EN  
10  
9
FB  
GND  
GND  
1
2
10  
9
2
GND  
EN  
D
A
P
D
A
P
8
PWM  
PWM  
PGOOD  
8
7
3
4
SW  
3
SW  
VDD  
VDD  
4
5
PGOOD  
VSELECT  
7
VDD  
6
6
5
VDD  
VSELECT  
Figure 4. Top View  
Figure 5. Bottom View  
Table 1. Pin Descriptions  
Pin  
No.  
Name  
Description  
1
2
3
4
5
6
GND  
GND  
Power Ground pin.  
Analog Ground Pin  
SW  
Switching node connection to the internal PFET switch and NFET synchronous rectifier  
Analog supply input. Connect to the input filter capacitor (see Figure 1).  
Power supply Input. Connect to the input filter capacitor (see Figure 1).  
VDD  
VDD  
VSELECT  
Output voltage select (For example)  
VSELECT = LOW, VOUT = 0.8V  
VSELECT = HIGH , VOUT = 1.2V  
7
PGOOD  
Power Good Flag. This common drain logic output is pulled to ground when the output voltage is not within  
±7.5% of regulation.  
8
9
PWM  
EN  
Connect PWM pin to VIN.  
Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.0V. Do not  
leave this pin floating.  
10  
FB  
Feedback analog input. Connect directly to the output filter capacitor for fixed voltage versions.  
DAP  
DAP  
Die Attach Pad, connect the DAP to GND on PCB layout to enhance thermal performance. It should not be used  
as a primary ground connection.  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Absolute Maximum Ratings(1)  
VIN Pin: Voltage to GND  
EN Pin  
0.2V to 6.0V  
0.2V to 6.0V  
FB, SW Pin  
Continuous Power Dissipation(2)  
(GND0.2V) to (VIN + 0.2V)  
Internally Limited  
+150°C  
Junction Temperature (TJ-MAX  
Storage Temperature Range  
)
65°C to +150°C  
260°C  
Maximum Lead Temperature (Soldering, 10 seconds)  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under  
which the device operates. Operating Ratings do not imply specified performance limits. For specified performance limits and associated  
test conditions, see the Electrical Characteristics.  
(2) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ= 150°C (typ) and  
disengages at TJ= 130°C (typ).  
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Operating Ratings(1)(2)  
Input Voltage Range  
2.5V to 5.5V  
0mA to 1.5A  
Recommended Load Current  
Junction Temperature (TJ) Range  
Ambient Temperature (TA) Range(3)  
30°C to +125°C  
30°C to +85°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under  
which the device operates. Operating Ratings do not imply specified performance limits. For specified performance limits and associated  
test conditions, see the Electrical Characteristics.  
(2) All voltages are with respect to the potential at the GND pin.  
(3) In applications with high power dissipation or poor package resistance, the maximum ambient temperature may need to be derated.  
Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX), the maximum power  
dissipation of the device in the application (PD-MAX) and the junction to ambient thermal resistance of the package (θJA) in the  
application, as given by the following equation: TA-MAX= TJ-MAX(θJAx PD-MAX).  
Thermal Properties  
Junction-to-Ambient Thermal Resistance (θJA) (DSC-10) for 4-layer board  
(1)  
49.8°C/W  
(1) Junction-to-ambient thermal resistance is highly application and board layout dependent. In applications where high power dissipation  
exists, special care must be given to thermal dissipation issues in board design.  
Electrical Characteristics(1)(2)(3)(4)  
Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full operating ambient temperature range  
(30°C TA +85°C). Unless otherwise noted, specifications apply to the LM3678 Typical Application Circuit (see Figure 1)  
with VIN = EN = 3.6V  
Symbol  
VFB  
Parameter  
Feedback voltage  
Test Conditions  
Min  
-3  
Typ  
Max  
+3  
Unit  
%
VSELECT = Low and High  
VREF  
RDSON (P)  
RDSON (N)  
ILIM  
Internal reference voltage  
0.5  
150  
110  
2.15  
V
Pin-to-pin resistance for PFET  
Pin-to-pin resistance for NFET  
Switch peak current limit  
VIN= VGS= 3.6V  
VIN= VGS= 3.6V  
Open loop  
200  
150  
2.4  
1
mΩ  
mΩ  
A
1.9  
1.2  
ISHDN  
VIH  
Shutdown supply current  
EN = 0V  
µA  
V
Logic high input for EN and VSELECT  
Logic low input for EN and VSELECT  
Enable (EN) input current  
VIN = 3.6V  
VIL  
VIN = 3.6V  
0.4  
1
V
IEN  
0.01  
3.3  
µA  
MHz  
FOSC  
Internal oscillator frequency  
PWM Mode  
2.7  
3.6  
(1) All voltages are with respect to the potential at the GND pin.  
(2) Refer to Typical Performance Characteristics for closed loop data and its variation with regards to supply voltage and temperature.  
Electrical Characteristics reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is  
activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until  
output voltage drops by 10%.  
(3) The parameters in the electrical characteristic table are tested at VIN= 3.6V unless otherwise specified. For performance over the input  
voltage range, see Typical Performance Characteristics.  
(4) Min and Max limits are specified by design, test or statistical analysis. Typical numbers represent the most likely norm.  
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Typical Performance Characteristics  
LM3678SD, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.2V, CIN = 10µF, COUT = 22µF, and TA= 25°C, unless otherwise noted.  
Quiescent Supply Current vs. Temperature  
Switching Frequency vs. Temperature  
500  
3.50  
3.45  
3.40  
3.35  
3.30  
3.25  
3.20  
3.15  
3.10  
3.05  
3.00  
475  
450  
425  
400  
375  
350  
325  
300  
275  
250  
-30  
-10  
10  
30  
50  
70  
90  
-30  
-10  
10  
30  
50  
70  
90  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 6.  
Figure 7.  
NFET_ RDSON vs. Temperature  
PFET_RDSON vs. Temperature  
220  
200  
180  
160  
140  
120  
100  
80  
150  
140  
130  
120  
110  
100  
90  
80  
70  
10  
-30  
-10  
10  
30  
50  
70  
90  
-30  
-10  
30  
50  
70  
90  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 8.  
Figure 9.  
ILIMIT vs. Temperature (Open Loop)  
Efficiency PWM Mode vs. ILOAD (0.8V)  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
2.50  
2.45  
2.40  
2.35  
2.30  
2.25  
2.20  
2.15  
2.10  
2.05  
2.00  
1.95  
1.90  
-30  
-10  
10  
30  
50  
70  
90  
0.0001 0.0010 0.010 0.100 1.000 10.000  
TEMPERATURE (°C)  
LOAD (A)  
Figure 10.  
Figure 11.  
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Typical Performance Characteristics (continued)  
LM3678SD, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.2V, CIN = 10µF, COUT = 22µF, and TA= 25°C, unless otherwise noted.  
Line Transient Response  
(VOUT = 0.8V, LOAD = 500mA)  
Efficiency PWM Mode vs. ILOAD (1.2V)  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
.0001 0.0010 0.010 0.100 1.000 10.000  
LOAD (A)  
Figure 12.  
Figure 13.  
Line Transient Response  
(VOUT = 1.2V, LOAD = 500mA)  
Load Transient Response  
(VIN = 3.6V, VOUT = 1.2V, Load Step 0 500mA)  
Figure 14.  
Figure 15.  
Load Transient Response  
(VIN = 3.6V, VOUT = 0.8V, Load Step 0 500mA)  
Load Transient Response  
(VIN = 3.6V, VOUT = 0.8V, Load Step 500mA 1A)  
Figure 16.  
Figure 17.  
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Typical Performance Characteristics (continued)  
LM3678SD, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.2V, CIN = 10µF, COUT = 22µF, and TA= 25°C, unless otherwise noted.  
Load Transient Response  
(VIN = 3.6V, VOUT = 1.2V, Load Step 500mA 1A)  
VSELECT Transient Response  
(VIN = 3.6V, LOAD = 500mA)  
Figure 18.  
Figure 19.  
VSELECT Transient Response  
(VIN = 3.6V, No LOAD)  
VSELECT Transient Response  
(VIN = 3.6V, LOAD = 1A)  
Figure 20.  
Figure 21.  
Start Up  
Start Up  
(VIN = 3.6V, VOUT = 1.2V, LOAD = 1A)  
(VIN = 3.6V, VOUT = 1.2V, LOAD = 500mA)  
Figure 22.  
Figure 23.  
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Typical Performance Characteristics (continued)  
LM3678SD, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.2V, CIN = 10µF, COUT = 22µF, and TA= 25°C, unless otherwise noted.  
Switching Waveform  
(VOUT = 1.2V, LOAD = 1A)  
Figure 24.  
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OPERATION DESCRIPTION  
DEVICE INFORMATION  
The LM3678, a high-efficiency step-down DC-DC switching buck converter, delivers a constant voltage from a  
single Li-Ion battery and input voltage rails from 2.5 V to 5.5 V to portable devices such as cell phones and  
PDAs. Using a voltage mode architecture with synchronous rectification, the LM3678 has the ability to deliver up  
to 1.5 A, depending on the input voltage, output voltage, ambient temperature and the inductor chosen.  
Additional features include soft start, undervoltage protection, current overload protection, and thermal shutdown  
protection. As shown in Figure 1, only three external power components are required for implementation.  
The part uses an internal reference voltage of 0.5 V. It is recommended to keep the part in shutdown until the  
input voltage is 2.5 V or higher.  
CIRCUIT OPERATION  
During the first portion of each switching cycle, the control block in the LM3678 turns on the internal PFET  
switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The  
inductor limits the current to a ramp with a slope of (VIN–VOUT)/L, by storing energy in a magnetic field.  
During the second portion of each cycle, the controller turns the PFET switch off, blocking current flow from the  
input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the  
NFET to the output filter capacitor and load, which ramps the inductor current down with a slope of - VOUT/L.  
The output filter stores charge when the inductor current is high, and releases it when inductor current is low,  
smoothing the voltage across the load.  
The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the  
load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and  
synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The  
output voltage is equal to the average voltage at the SW pin.  
PWM OPERATION  
During device operation the converter operates as a voltage-mode controller with input voltage feed forward. This  
allows the converter to achieve good load and line regulation. The DC gain of the power stage is proportional to  
the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is  
introduced.  
The output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to  
control power to the load. At the beginning of each clock cycle the PFET switch is turned on and the inductor  
current ramps up until the comparator trips and the control logic turns off the switch. The current limit comparator  
can also turn off the switch in case the current limit of the PFET is exceeded. Then the NFET switch is turned on  
and the inductor current ramps down. The next cycle is initiated by the clock turning off the NFET and turning on  
the PFET.  
Figure 25. Typical PWM Operation  
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INTERNAL SYNCHRONOUS RECTIFICATION  
The LM3678 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and  
associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the  
output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode.  
CURRENT LIMITING  
A current limit feature allows the LM3678 to protect itself and external components during overload conditions by  
implementing current limiting with an internal comparator that trips at 2.15A (typ). If the output is shorted to  
ground the device enters a timed current limit mode where the NFET is turned on for a longer duration until the  
inductor current falls below a low threshold. This allows the inductor current more time to decay, thereby  
preventing runaway.  
SHUTDOWN MODE  
Setting the EN input pin low (<0.4V) places the LM3678 in shutdown mode. During shutdown the PFET switch,  
NFET switch, reference, control and bias circuitry of the LM3678 are turned off. Setting EN high (>1.0V) enables  
normal operation. It is recommended to set EN pin low to turn off the LM3678 during system power up and  
undervoltage conditions when the supply is less than 2.5V. Do not leave the EN pin floating.  
SOFT START  
The LM3678 has a soft-start circuit that limits in-rush current during start-up. During start-up the switch current  
limit is increased in steps. Soft start is activated only if EN goes from logic low to logic high after VIN reaches  
2.5V. Soft start is implemented by increasing switch current limit in steps of 250mA, 500mA, 1A and 2A (typical  
switch current limit). The start-up time thereby depends on the output capacitor and load current demanded at  
start-up.  
Inductor Selection  
There are two main considerations when choosing an inductor; the inductor should not saturate, and the inductor  
current ripple should be small enough to achieve the desired output voltage ripple. Different saturation current  
rating specifications are followed by different manufacturers so attention must be given to details. Saturation  
current ratings are typically specified at 25°C. However, ratings at the maximum ambient temperature of  
application should be requested from the manufacturer. Shielded inductors radiate less noise and should be  
preferred.  
There are two methods to choose the inductor saturation current rating.  
Method 1:  
The saturation current should be greater than the sum of the maximum load current and the worst case average  
to peak inductor current. This can be written as  
>
ISAT IOUTMAX + IRIPPLE  
VIN - VOUT  
VOUT  
VIN  
1
«
* ≈  
÷ ∆  
◊ «  
* ≈ ’  
where IRIPPLE  
=
÷ ∆ ÷  
2 * L  
◊ « f ◊  
(1)  
IRIPPLE: average to peak inductor current  
IOUTMAX: maximum load current (1.5A)  
VIN: maximum input voltage in application  
L : minimum inductor value including worst case tolerances (30% drop can be considered for method 1)  
f : minimum switching frequency (2.7Mhz)  
VOUT: output voltage  
For a more conservative approach, a 1µH inductor with a saturation current rating of at least 2.5A is  
recommended for most applications.  
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Input Capacitor Selection  
A ceramic input capacitor of 10uF, 6.3V is sufficient for most applications. Place the input capacitor as close as  
possible to the VIN pin of the device. A larger value may be used for improved input voltage filtering. Use X7R or  
X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting  
case sizes like 0805 and 0603. The input filter capacitor supplies current to the PFET switch of the LM3678 in  
the first half of each cycle and reduces voltage ripple imposed on the input power source. A ceramic capacitor’s  
low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing current. Select a  
capacitor with sufficient ripple current rating. The input current ripple can be calculated as:  
2
VOUT  
VIN  
VOUT  
VIN  
r
«
÷
1 -  
+
*
IRMS = IOUTMAX  
*
12  
(VIN - VOUT) V  
*
OUT  
r =  
L f I  
* *  
V
IN  
*
OUTMAX  
*
The worst case is when VIN = 2 VOUT  
(2)  
Table 2. Suggest Inductors and Their Suppliers  
Model  
Vendor  
Dimensions  
LxWxH (mm)  
D.C.R (max)  
ISAT  
NR4012T1R0N  
LPS4012-102L  
LPS4012-102L  
Taiyo Yuden  
Coilcraft  
4 x 4 x 1.2  
60mΩ  
100mΩ  
40mΩ  
2.5A  
2.5A  
3.4A  
3.9 x 3.9 x 1.2  
3.9 x 3.9 x 1.8  
Coilcraft  
Output Capacitor Selection  
A ceramic output capacitor of 22µF, 6.3V is sufficient for most applications. Use X7R or X5R types; do not use  
Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and  
0603. DC bias characteristics vary from manufacturer to manufacturer and dc bias curves should be requested  
from them as part of the capacitor selection process.  
The output filter capacitor smooths out current flow from the inductor to the load, helps maintain a steady output  
voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with  
sufficient capacitance and sufficiently low ESR to perform these functions.  
The output voltage ripple is caused by the charging and discharging of the output capacitor and by the RESR and  
can be calculated as:  
Voltage peak-to-peak ripple due to capacitance can be expressed as follow:  
IRIPPLE  
=
VPP-C  
4*f*C  
(3)  
Voltage peak-to-peak ripple due to ESR can be expressed as follow:  
VPP-ESR = (2 * IRIPPLE) * RESR  
Because these two components are out of phase the RMS (root mean squared) value can be used to get an  
approximate value of peak-to-peak ripple.  
The peak-to-peak ripple voltage RMS value can be expressed as follow:  
2
VPP-RMS  
=
VPP-C2 + VPP-ESR  
(4)  
Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series  
resistance of the output capacitor (RESR).  
The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations  
is at the switching frequency of the part.  
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Table 3. Suggested Capacitors and Their Suppliers  
Case Size  
Inch (mm)  
Model  
10µF for CIN  
Type  
Vendor  
Voltage Rating  
GRM21BR60J106K  
JMK212BJ106K  
Ceramic, X5R  
Ceramic, X5R  
Ceramic, X5R  
Murata  
Taiyo-Yuden  
TDK  
6.3V  
6.3V  
6.3V  
0805 (2012)  
0805 (2012)  
0805 (2012)  
C2012X5R0J106K  
22µF for COUT  
JMK212BJ226MG  
Ceramic, X5R  
Taiyo-Yuden  
6.3V  
0805 (2012)  
Board Layout Considerations  
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance  
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss  
in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or  
instability.  
Good layout for the LM3678 can be implemented by following a few simple design rules below.  
1. Place the LM3678, inductor and filter capacitors close together and make the traces short. The traces  
between these components carry relatively high switching currents and act as antennas. Following this rule  
reduces radiated noise. Special care must be given to place the input filter capacitor very close to the VIN  
and GND pin.  
2. Arrange the components so that the switching current loops curl in the same direction. During the first half of  
each cycle, current flows from the input filter capacitor through the LM3678 and inductor to the output filter  
capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled  
up from ground through the LM3678 by the inductor to the output filter capacitor and then back through  
ground forming a second current loop. Routing these loops so the current curls in the same direction  
prevents magnetic field reversal between the two half-cycles and reduces radiated noise.  
3. Connect the ground pins of the LM3678 and filter capacitors together using generous component-side  
copper fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several  
vias. This reduces ground-plane noise by preventing the switching currents from circulating through the  
ground plane. It also reduces ground bounce at the LM3678 by giving it a low-impedance ground connection.  
4. Use wide traces between the power components and for power connections to the DC-DC converter circuit.  
This reduces voltage errors caused by resistive losses across the traces.  
5. Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the power  
components. The voltage feedback trace must remain close to the LM3678 circuit and should be direct but  
should be routed opposite to noisy components. This reduces EMI radiated onto the DC-DC converter’s own  
voltage feedback trace. A good approach is to route the feedback trace on another layer and to have a  
ground plane between the top layer and layer on which the feedback trace is routed. In the same manner for  
the adjustable part it is desired to have the feedback dividers on the bottom layer.  
6. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks  
and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through  
distance.  
For detailed layout information, refer to Application Note 1722 LM3678 Evaluation Board SNVA289.  
In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board,  
arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive  
preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a  
metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators.  
12  
Submit Documentation Feedback  
Copyright © 2008–2013, Texas Instruments Incorporated  
Product Folder Links: LM3678  
 
LM3678  
www.ti.com  
SNVS464C APRIL 2008REVISED MAY 2013  
REVISION HISTORY  
Changes from Revision B (April 2013) to Revision C  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 12  
Copyright © 2008–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
Product Folder Links: LM3678  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
LM3678SD-1.2/NOPB  
LM3678SDE-1.2/NOPB  
ACTIVE  
ACTIVE  
WSON  
WSON  
DSC  
DSC  
10  
10  
1000 RoHS & Green  
250 RoHS & Green  
SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-30 to 85  
-30 to 85  
S021B  
S021B  
SN  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
21-Oct-2021  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM3678SD-1.2/NOPB  
LM3678SDE-1.2/NOPB  
WSON  
WSON  
DSC  
DSC  
10  
10  
1000  
250  
178.0  
178.0  
12.4  
12.4  
3.3  
3.3  
3.3  
3.3  
1.0  
1.0  
8.0  
8.0  
12.0  
12.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
21-Oct-2021  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM3678SD-1.2/NOPB  
LM3678SDE-1.2/NOPB  
WSON  
WSON  
DSC  
DSC  
10  
10  
1000  
250  
208.0  
208.0  
191.0  
191.0  
35.0  
35.0  
Pack Materials-Page 2  
MECHANICAL DATA  
DSC0010A  
SDA10A (Rev A)  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license  
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you  
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these  
resources.  
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for  
TI products.  
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2021, Texas Instruments Incorporated  

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