LM4030AMF-4.096/NOPB [TI]
LM4030 SOT-23 Ultra-High Precision Shunt Voltage Reference;
| 型号： | LM4030AMF-4.096/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LM4030 SOT-23 Ultra-High Precision Shunt Voltage Reference 光电二极管 |
| 文件： | 总20页 (文件大小：1162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM4030
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SNVS552B –MARCH 2008–REVISED APRIL 2013
LM4030 SOT-23 Ultra-High Precision Shunt Voltage Reference
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1
FEATURES
DESCRIPTION
The LM4030 is an ultra-high precision shunt voltage
reference, having exceptionally high initial accuracy
(0.05%) and temperature stability (10ppm/°C). The
LM4030 is available with fixed voltage options of 2.5V
and 4.096V. Despite the tiny SOT-23 package, the
LM4030 exhibits excellent thermal hysteresis
(75ppm) and long-term stability (40ppm) as well as
immunity to board stress effects.
2
•
•
•
•
•
•
•
•
•
High Output Voltage Accuracy 0.05%
Low Temperature Coefficient 10 ppm/°C
Extended Temperature Operation -40-125°C
Excellent Thermal Hysteresis, 75ppm
Excellent Long-Term Stability, 40ppm
High Immunity to Board Stress Effects
Capable of Handling 50 mA Transients
Voltage Options 2.5V, 4.096V
The LM4030 is designed to operate without an
external capacitor, but any capacitor up to 10µF may
be used. The LM4030 can be powered off as little as
120µA (max) but is capable of shunting up to 30mA
continuously. As with any shunt reference, the
LM4030 can be powered off of virtually any supply
and is a simple way to generate a highly accurate
system reference.
SOT-23 Package
APPLICATIONS
•
•
•
•
•
•
Data Acquisition/Signal path
Test and Measurement
Automotive & Industrial
Communications
The LM4030 is available in three grades (A, B, and
C). The best grade devices (A) have an initial
accuracy of 0.05% with ensured temperature
coefficient of 10 ppm/°C or less, while the lowest
grade parts (C) have an initial accuracy of 0.15% and
a temperature coefficient of 30 ppm/°C.
Instrumentation
Power Management
Typical Application Circuit
V
IN
R
Z
I
BIAS
I
LOAD
V
REF
4
5
I
SHUNT
C
OUT
Connection Diagram
N/C
1
- GND
5
4
2
3
N/C or GND
N/C
+ VREF
SOT-23 Package
(Top View)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LM4030
SNVS552B –MARCH 2008–REVISED APRIL 2013
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PIN DESCRIPTIONS
Pin #
Name
Function
No connect pin, leave floating
Ground or no connect
No connect pin, leave floating
Reference voltsge
1
N/C
2
3
4
5
GND, N/C
N/C
VREF
GND
Ground
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)(2)
Absolute Maximum Ratings
Maximum Voltage on any input
Power Dissipation (TA = 25°C)
Storage Temperature Range
-0.3 to 6V
350mW
(3)
−65°C to 150°C
260°C
Lead Temperature (soldering, 10sec)
Vapor Phase (60 sec)
215°C
Infrared (15sec)
220°C
(4)
ESD Susceptibility
Human Body Model
2kV
(1) Absolute Maximum Ratings indicate limits beyond which damage may occur to the device. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications, see Electrical
Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Without PCB copper enhancements. The maximum power dissipation must be de-rated at elevated temperatures and is limited by TJMAX
(maximum junction temperature), θJ-A (junction to ambient thermal resistance) and TA (ambient temperature). The maximum power
dissipation at any temperature is: PDissMAX = (TJMAX - TA) /θJ-A up to the value listed in the Absolute Maximum Ratings. θJ-A for SOT-23
package is 220°C/W, TJMAX = 125°C.
(4) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Operating Ratings
Maximum Continuous Shunt Current
30mA
50mA
Maximum Shunt Current (<1s)
Junction Temperature Range (TJ)
−40°C to +125°C
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Electrical Characteristics
LM4030-2.5 (VOUT = 2.5V)
Limits in standard type are for TJ = 25°C only, and limits in boldface type apply over the junction temperature (TJ) range of -
40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values
represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
(1)
(2)
(1)
Symbol
Parameter
Conditions
ISHUNT = 120µA
Min
Typ
2.5
Max
Unit
VREF
Reverse Breakdown Voltage
V
Reverse Breakdown Voltage Tolerance (ISHUNT = 120µA)
LM4030A-2.5
(A Grade - 0.05%)
(B Grade - 0.10%)
(C Grade - 0.15%)
-0.05
-0.10
-0.15
0.05
%
%
LM4030B-2.5
0.10
0.15
120
LM4030C-2.5
%
IRMIN
TC
Minimum Operating Current
µA
(3)
Temperature Coefficient
LM4030A-2.5
0°C ≤ TJ ≤ + 85°C
10
20
ppm / °C
ppm / °C
ppm / °C
ppm / °C
ppm / mA
-40°C ≤ TJ ≤ +125°C
-40°C ≤ TJ ≤ +125°C
-40°C ≤ TJ ≤ +125°C
160µA ≤ ISHUNT ≤ 30mA
LM4030B-2.5
LM4030C-2.5
20
30
ΔVREF/ΔISHUNT Reverse Breakdown Voltage Change
25
110
with Current
(4)
ΔVREF
VHYST
VN
Long Term Stability
Thermal Hysteresis
1000 Hrs, TA = 30°C
-40°C ≤ TJ ≤ +125°C
0.1 Hz to 10 Hz
40
75
ppm
ppm
µVPP
(5)
(6)
Output Noise Voltage
105
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical
Quality Control.
(2) Typical numbers are at 25°C and represent the most likely parametric norm.
(3) Temperature coefficient is measured by the "Box" method; i.e., the maximum ΔVREF is divided by the maximum ΔT.
(4) Long term stability is VREF @25°C measured during 1000 hrs. This measurement is taken for IR = 500 µA.
(5) Thermal hysteresis is defined as the change in +25°C output voltage before and after cycling the device from (-40°C to 125°C) eight
times.
(6) Low frequency peak-to-peak noise measured using first-order 0.1 Hz HPF and second-order 10 Hz LPF.
Electrical Characteristics
LM4030-4.096 (VOUT = 4.096V)
Limits in standard type are for TJ = 25°C only, and limits in boldface type apply over the junction temperature (TJ) range of -
40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values
represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
(1)
(2)
(1)
Symbol
Parameter
Conditions
ISHUNT = 130µA
Min
Typ
4.096
Max
Unit
VREF
Reverse Breakdown Voltage
V
Reverse Breakdown Voltage Tolerance ( ISHUNT = 130µA)
LM4030A-4.096
(A Grade - 0.05%)
(B Grade - 0.10%)
(C Grade - 0.15%)
-0.05
-0.10
-0.15
0.05
%
%
LM4030B-4.096
0.10
0.15
130
LM4030C-4.096
%
IRMIN
TC
Minimum Operating Current
µA
(3)
Temperature Coefficient
LM4030A-4.096
0°C ≤ TJ ≤ + 85°C
10
20
20
30
95
ppm / °C
ppm / °C
ppm / °C
ppm / °C
ppm / mA
-40°C ≤ TJ ≤ +125°C
-40°C ≤ TJ ≤ +125°C
-40°C ≤ TJ ≤ +125°C
160µA ≤ ISHUNT ≤ 30mA
LM4030B-4.096
LM4030C-4.096
ΔVREF/ΔILOAD
Reverse Breakdown Voltage Change
with Current
15
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical
Quality Control.
(2) Typical numbers are at 25°C and represent the most likely parametric norm.
(3) Temperature coefficient is measured by the "Box" method; i.e., the maximum ΔVREF is divided by the maximum ΔT.
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Electrical Characteristics
LM4030-4.096 (VOUT = 4.096V) (continued)
Limits in standard type are for TJ = 25°C only, and limits in boldface type apply over the junction temperature (TJ) range of -
40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values
represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
(1)
(2)
(1)
Symbol
ΔVREF
VHYST
VN
Parameter
Conditions
1000 Hrs, TA = 30°C
-40°C ≤ TJ ≤ +125°C
0.1 Hz to 10 Hz
Min
Typ
40
75
165
Max
Unit
ppm
ppm
µVPP
(4)
Long Term Stability
(5)
Thermal Hysteresis
Output Noise Voltage
(6)
(4) Long term stability is VREF @25°C measured during 1000 hrs. This measurement is taken for IR = 500 µA.
(5) Thermal hysteresis is defined as the change in +25°C output voltage before and after cycling the device from (-40°C to 125°C) eight
times.
(6) Low frequency peak-to-peak noise measured using first-order 0.1 Hz HPF and second-order 10 Hz LPF.
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Typical Performance Characteristics for 2.5V
Output Voltage
vs
Temperature
0.1 - 10 Hz Peak-to-Peak Noise
2.503
2.502
2.501
2.5
5 TYPICAL UNITS
2.499
2.498
2.497
-40 -20
0
20 40 60 80 100 120
TEMPERATURE (oC)
Figure 1.
Figure 2.
Start Up - 120 µA
Start Up - 50 mA
Figure 3.
Figure 4.
Reverse Dynamic Impedance
vs
Reverse Breakdown Voltage Change with Current
Frequency
Figure 5.
Figure 6.
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Typical Performance Characteristics for 4.096V
Output Voltage
vs
Temperature
0.1 - 10 Hz Peak-to-Peak Noise
Figure 7.
Figure 8.
Start Up - 130 µA
Start Up - 50 mA
Figure 9.
Figure 10.
Reverse Dynamic Impedance
vs
Reverse Breakdown Voltage Change with Current
Frequency
Figure 11.
Figure 12.
6
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Typical Performance Characteristics
Forward Characteristic
Load Transient Response
Figure 13.
Figure 14.
Minimum Operating Current
Noise Spectrum
Figure 15.
Figure 16.
Output Voltage
vs
Thermal Cycle (-40°C to 125°C)
Thermal Hysteresis Distribution
20
18
16
14
12
10
8
6
4
2
0
0
40 80 120 160 200 240 280
20
60 100 140 180 220 260 300
HYSTERESIS (PPM)
Figure 17.
Figure 18.
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Typical Performance Characteristics (continued)
Long Term Stability (TA = 25°C)
Long Term Stability (TA =125°C)
Figure 19.
Figure 20.
8
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APPLICATION INFORMATION
THEORY OF OPERATION
The LM4030 is an ultra-high precision shunt voltage reference, having exceptionally high initial accuracy (0.05%)
and temperature stability (10ppm/°C). The LM4030 is available with fixed voltage options of 2.5V and 4.096V.
Despite the tiny SOT-23 package, the LM4030 exhibits excellent thermal hysteresis (75ppm) and long-term
stability (25ppm). The LM4030 is designed to operate without an external capacitor, but any capacitor up to 10
µF may be used. The LM4030 can be powered off as little as 120 µA (max) but is capable of shunting up to 30
mA continuously. The typical application circuit for the LM4030 is shown in Figure 21.
V
IN
R
Z
I
BIAS
I
LOAD
V
REF
4
5
I
SHUNT
C
OUT
Figure 21. Typical Application Circuit
COMPONENT SELECTION
A resistor must be chosen to set the maximum operating current for the LM4030 (RZ in Figure 21). The value of
the resistor can be calculated using the following equation:
RZ = (VIN - VREF)/(IMIN_OPERATING + ILOAD_MAX
)
(1)
RZ is chosen such that the total current flowing through RZ is greater than the maximum load current plus the
minimum operating current of the reference itself. This ensures that the reference is never starved for current.
Running the LM4030 at higher currents is advantageous for reducing noise. The reverse dynamic impedance of
the VREF node scales inversely with the shunted current (see Figure 22) leading to higher rejection of noise
emanating from the input supply and from EMI (electro-magnetic interferrence).
Figure 22. Reverse Dynamic Impedance vs IOUT
The LM4030 is designed to operate with or without a bypass capacitor (COUT in Figure 21) and is stable with
capacitors of up to 10 μF. The use of a bypass capacitor can improve transient response and reduce broadband
noise. Additionally, a bypass capacitor will counter the rising reverse dynamic impedance at higher frequencies
improving noise immunity (see Figure 23).
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Figure 23. Reverse Dynamic Impedance vs COUT
As with other regulators, an external capacitor reduces the amplitude of the VREF transient when a sudden
change in loading takes place. The capacitor should be placed as close to the part as possible to reduce the
effects of unwanted board parasitics.
THERMAL HYSTERESIS
Thermal hysteresis is the defined as the change in output voltage at 25°C after some deviation from 25°C. This
is to say that thermal hysteresis is the difference in output voltage between two points in a given temperature
profile. An illustrative temperature profile is shown in Figure 24.
125oC
V
REF1
25oC
Time
V
REF2
-40oC
Figure 24. Illustrative Temperature Profile
This may be expressed analytically as the following:
lVREF1 - VREF2
l
x 106 ppm
VHYS
=
VREF
where
•
•
•
•
VHYS = Thermal hysteresis expressed in ppm
VREF = Nominal preset output voltage
VREF1 = VREF before temperature fluctuation
VREF2 = VREF after temperature fluctuation
(2)
The LM4030 features a low thermal hysteresis of 75 ppm (typical) from -40°C to 125°C after 8 temperature
cycles.
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TEMPERATURE COEFFICIENT
Temperature drift is defined as the maximum deviation in output voltage over the temperature range. This
deviation over temperature may be illustrated as shown in Figure 25.
Voltage
V
REF_MAX
Temperature
V
REF_MIN
Temperature Range
Figure 25. Illustrative VREF vs Temperature Profile
Temperature coefficient may be expressed analytically as the following:
(VREF_MAX - VREF_MIN
)
x 106 ppm
TD =
VREF x DT
where
•
•
•
•
•
TD = Temperature drift
VREF = Nominal preset output voltage
VREF_MIN = Minimum output voltage over operating temperature range
VREF_MAX = Maximum output voltage over operating temperature range
ΔT = Operating temperature range
(3)
The LM4030 features a low temperature drift of 10ppm (max) to 30ppm (max), depending on the grade.
DYNAMIC OFFSET CANCELLATION AND LONG TERM STABILITY
Aside from initial accuracy and drift performance, other specifications such as thermal hysteresis and long-term
stability can affect the accuracy of a voltage reference, especially over the lifetime of the application. The
reference voltage can also shift due to board stress once the part is mounted onto the PCB and during
subsequent thermal cycles. Generally, these shifts in VREF arise due to offsets between matched devices within
the regulation loop. Both passive and active devices naturally experience drift over time and stress and
temperature gradients across the silicon die also generate offset. The LM4030 incorporates a dynamic offset
cancellation scheme which compensates for offsets developing within the regulation loop. This gives the LM4030
excellent long-term stability (40 ppm typical) and thermal hysteresis performance (75ppm typical), as well as
substantial immunity to PCB stress effects, despite being packaged in a tiny SOT-23.
EXPRESSION OF ELECTRICAL CHARACTERISTICS
Electrical characteristics are typically expressed in mV, ppm, or a percentage of the nominal value. Depending
on the application, one expression may be more useful than the other. To convert one quantity to the other one
may apply the following:
ppm to mV error in output voltage:
VREF x ppmERROR
= VERROR
103
where
•
VREF is in volts (V) and VERROR is in milli-volts (mV)
(4)
11
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Bit error (1 bit) to voltage error (mV):
VREF
n
x 103
= VERROR
(5)
VREF is in volts (V), VERROR is in milli-volts (mV), and n is the number of bits.
mV to ppm error in output voltage:
VERROR
x 103
= ppmERROR
VREF
where
•
VREF is in volts (V) and VERROR is in milli-volts (mV)
(6)
(7)
Voltage error (mV) to percentage error (percent):
VERROR
x 0.1
= Percent_Error
VREF
where
•
VREF is in volts (V) and VERROR is in milli-volts (mV)
PRINTED CIRCUIT BOARD and LAYOUT CONSIDERATIONS
The LM4030 has a very small change in reverse voltage with current (25ppm/mA typical) so large variations in
load current (up to 50mA) should not appreciably shift VREF. Parasitic resistance between the LM4030 and the
load introduces a voltage drop proportional to load current and should be minimized. The LM4030 should be
placed as close to the load it is driving as the layout will allow. The location of RZ is not important, but COUT
should be as close to the LM4030 as possible so added ESR does not degrade the transient performance.
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REVISION HISTORY
Changes from Revision A (April 2013) to Revision B
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 12
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PACKAGE OPTION ADDENDUM
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13-Sep-2014
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
LM4030AMF-2.5/NOPB
LM4030AMF-4.096/NOPB
LM4030AMFX-2.5/NOPB
LM4030AMFX4.096/NOPB
LM4030BMF-2.5/NOPB
LM4030BMF-4.096/NOPB
LM4030BMFX-2.5/NOPB
LM4030BMFX4.096/NOPB
LM4030CMF-2.5/NOPB
LM4030CMF-4.096/NOPB
LM4030CMFX-2.5/NOPB
LM4030CMFX4.096/NOPB
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
R5JA
R5KA
R5JA
R5KA
R5JB
R5KB
R5JB
R5KB
R5JC
R5KC
R5JC
R5KC
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
1000
3000
3000
1000
1000
3000
3000
1000
1000
3000
3000
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
13-Sep-2014
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM4030AMF-2.5/NOPB SOT-23
LM4030AMF-4.096/NOPB SOT-23
LM4030AMFX-2.5/NOPB SOT-23
DBV
DBV
DBV
DBV
5
5
5
5
1000
1000
3000
3000
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.4
1.4
1.4
1.4
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
LM4030AMFX4.096/NOP SOT-23
B
LM4030BMF-2.5/NOPB SOT-23
LM4030BMF-4.096/NOPB SOT-23
LM4030BMFX-2.5/NOPB SOT-23
DBV
DBV
DBV
DBV
5
5
5
5
1000
1000
3000
3000
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.4
1.4
1.4
1.4
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
LM4030BMFX4.096/NOP SOT-23
B
LM4030CMF-2.5/NOPB SOT-23
LM4030CMF-4.096/NOPB SOT-23
LM4030CMFX-2.5/NOPB SOT-23
DBV
DBV
DBV
DBV
5
5
5
5
1000
1000
3000
3000
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.4
1.4
1.4
1.4
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
LM4030CMFX4.096/NOP SOT-23
B
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM4030AMF-2.5/NOPB
LM4030AMF-4.096/NOPB
LM4030AMFX-2.5/NOPB
LM4030AMFX4.096/NOPB
LM4030BMF-2.5/NOPB
LM4030BMF-4.096/NOPB
LM4030BMFX-2.5/NOPB
LM4030BMFX4.096/NOPB
LM4030CMF-2.5/NOPB
LM4030CMF-4.096/NOPB
LM4030CMFX-2.5/NOPB
LM4030CMFX4.096/NOPB
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
3000
3000
1000
1000
3000
3000
1000
1000
3000
3000
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
Pack Materials-Page 2
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