LM4132DQ1MFT3.3 [TI]

汽车类 SOT-23 精密低压降电压基准 | DBV | 5 | -40 to 125;


型号：	LM4132DQ1MFT3.3
厂家：	TEXAS INSTRUMENTS
描述：	汽车类 SOT-23 精密低压降电压基准 \| DBV \| 5 \| -40 to 125
文件：	总42页 (文件大小：1037K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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LM4132, LM4132-Q1

SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

LM4132, LM4132-Q1 SOT-23 Precision Low Dropout Voltage Reference

1 Features

3 Description

The LM4132 family of precision voltage references

performs comparable to the best laser-trimmed

bipolar references, but in cost-effective CMOS

technology. The key to this breakthrough is the use of

EEPROM registers for correction of curvature,

temperature coefficient (tempco), and accuracy on a

CMOS band-gap architecture allowing package-level

programming to overcome assembly shift. The shifts

in voltage accuracy and tempco during assembly of

die into plastic packages limit the accuracy of

references trimmed with laser techniques.

•

Qualified for Automotive Applications

•

AEC-Q100 Qualified With the Following Results:

–

Device Temperature Grade 1: –40ºC to

+125ºC Ambient Operating Temperature

Range

–

Device HBM ESD Classification Level 2

•

Output Initial Voltage Accuracy: 0.05%

Low Temperature Coefficient: 10 ppm/°C

Low Supply Current: 60 µA

Enable Pin Allowing a 3-µA Shutdown Mode

20-mA Output Current

Unlike other LDO references, the LM4132 can deliver

up to 20 mA and does not require an output capacitor

or buffer amplifier. These advantages along with the

SOT-23 packaging are important for space-critical

applications.

Voltage Options: 1.8 V, 2.048 V, 2.5 V, 3 V,

3.3 V, 4.096 V

•

Custom Voltage Options Available

(1.8 V to 4.096 V)

Series references provide lower power consumption

than shunt references, because they do not have to

idle the maximum possible load current under no-load

conditions. This advantage, the low quiescent current

(60 µA), and the low dropout voltage (400 mV) make

the LM4132 ideal for battery-powered solutions.

•

V_INRange of V_REF+ 400 mV to 5.5 V at 10 mA

Stable With Low-ESR Ceramic Capacitors

2 Applications

The LM4132 is available in five grades (A, B, C, D

and E) for greater flexibility. The best grade devices

(A) have an initial accuracy of 0.05% with a specified

temperature coefficient of 10 ppm/°C or less, while

the lowest grade devices (E) have an initial accuracy

of 0.5% and a tempco of 30 ppm/°C.

•

Instrumentation and Process Control

Test Equipment

Data Acquisition Systems

Base Stations

Servo Systems

Device Information⁽¹⁾

Portable, Battery-Powered Equipment

Automotive and Industrial

Precision Regulators

Battery Chargers

PART NUMBER

PACKAGE

BODY SIZE (NOM)

LM4132,

LM4132-Q1

SOT-23 (5)

2.90 mm × 1.60 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Communications

Medical Equipment

Simplified Schematic

Input

Output

2.5V

REF

OUT

LM4132

Enable

GND

*The capacitor C_INis required and the capacitor C_OUTis optional.

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LM4132, LM4132-Q1

SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

www.ti.com

Table of Contents

Features.................................................................. 1

Applications ........................................................... 1

Description ............................................................. 1

Revision History..................................................... 2

Pin Configuration and Functions......................... 3

Specifications......................................................... 3

6.1 Absolute Maximum Ratings ...................................... 3

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

Detailed Description ............................................ 20

7.1 Overview ................................................................. 20

7.2 Functional Block Diagram ....................................... 20

7.3 Feature Description................................................. 20

7.4 Device Functional Modes........................................ 21

Applications and Implementation ...................... 22

8.1 Application Information............................................ 22

8.2 Typical Applications ................................................ 22

Power Supply Recommendations...................... 25

10 Layout................................................................... 26

10.1 Layout Guidelines ................................................. 26

10.2 Layout Example .................................................... 26

11 Device and Documentation Support ................. 27

11.1 Documentation Support ........................................ 27

11.2 Related Links ........................................................ 27

11.3 Receiving Notification of Documentation Updates 27

11.4 Community Resources.......................................... 27

11.5 Trademarks........................................................... 27

11.6 Electrostatic Discharge Caution............................ 27

11.7 Glossary................................................................ 27

6.5 Electrical Characteristics LM4132-1.8

(V_OUT= 1.8 V)............................................................ 5

6.6 Electrical Characteristics LM4132-2

(V_OUT= 2.048 V)........................................................ 6

6.7 Electrical Characteristics LM4132-2.5

(V_OUT= 2.5 V)............................................................ 7

6.8 Electrical Characteristics LM4132-3 (V_OUT= 3 V) .... 8

6.9 Electrical Characteristics LM4132-3.3

(V_OUT= 3.3 V)............................................................ 9

6.10 Electrical Characteristics LM4132-3.3-

Q1(V_OUT= 3.3 V) ..................................................... 10

12 Mechanical, Packaging, and Orderable

6.11 Electrical Characteristics LM4132-4.1

(V_OUT= 4.096 V)...................................................... 11

Information ........................................................... 27

6.12 Typical Characteristics.......................................... 12

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision F (March 2016) to Revision G

Page

•

Updated data sheet text to the latest TI documentation and translations standards ............................................................. 1

Added LM4132-3.3-Q1 to maximum load current in Recommended Operating Conditions ................................................. 4

Added Electrical Characteristics LM4132-3.3-Q1 table........................................................................................................ 10

Changes from Revision E (January 2016) to Revision F

Page

•

Added correct Layout Example ............................................................................................................................................ 26

Changes from Revision D (March 2015) to Revision E

Page

•

Added Device Information, ESD Ratings and Thermal Information tables, Feature Description section, Device

Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout

section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section...... 1

Changes from Revision C (April 2013) to Revision D

Page

•

Added some of the latest inclusions from new TI formatting and made available of the automotive grade for the

SOT-23 package..................................................................................................................................................................... 1

Changes from Revision B (August 2005) to Revision C

Page

•

Changed layout of National Data Sheet to TI format ........................................................................................................... 25

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SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

5 Pin Configuration and Functions

DBV Package

5-Pin SOT-23

Top View

N/C

GND

5 V

REF

4 V

Pin Functions

I/O⁽¹⁾

DESCRIPTION

NO.

NAME

N/C

—

No connect pin, leave floating

Ground

GND

Enable pin

V_IN

Input supply

V_REF

Reference output

(1) G: Ground; I: Input; P: Power

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

MIN

MAX

UNIT

Maximum voltage on any input

Output short-circuit duration

–0.3

Voltage

Indefinite

Power dissipation (T_A= 25°C)⁽³⁾

Lead temperature (soldering, 10 sec)

Vapor phase (60 sec)

350

260

215

220

150

°C

Infrared (15 sec)

°C

Storage temperature, T_stg

−65

°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(3) Without PCB copper enhancements. The maximum power dissipation must be de-rated at elevated temperatures and is limited by T_JMAX

(maximum junction temperature), R_θJA(junction to ambient thermal resistance) and T_A(ambient temperature). The maximum power

dissipation at any temperature is: P_DissMAX= (T_JMAX– T_A) / R_θJAup to the value listed in theAbsolute Maximum Ratings. R_θJAfor SOT-23

is 164.1°C/W, T_JMAX= 125°C.

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SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

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6.2 ESD Ratings

VALUE

UNIT

V_(ESD)

Electrostatic discharge⁽¹⁾Human-body model (HBM), per AEC Q100-002⁽²⁾

±2000

(1) The Human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.

(2) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

MIN NOM

MAX UNIT

Maximum input supply voltage

5.5

V_IN

Maximum enable input voltage

LM4132

°C

Maximum load current

LM4132-3.3-Q1

Junction temperature, T_J

–40

125

6.4 Thermal Information

LM4132, LM4132-Q1

THERMAL METRIC⁽¹⁾

DBV (SOT-23)

5 PINS

164.1

UNIT

R_θJA

R_θJC(top)

R_θJB

ψ_JT

Junction-to-ambient thermal resistance

°C/W

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

115.3

27.1

Junction-to-top characterization parameter

Junction-to-board characterization parameter

12.8

ψ_JB

26.6

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

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SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

6.5 Electrical Characteristics LM4132-1.8 (V_OUT= 1.8 V)

Unless otherwise specified, limits are T_J= 25°C, V_IN= 5 V, and I_LOAD= 0 mA.

PARAMETER

TEST CONDITIONS

(A Grade - 0.05%)

MIN⁽¹⁾TYP⁽²⁾

–0.05%

–0.1%

MAX⁽¹⁾

0.05%

0.1%

0.2%

0.4%

0.5%

UNIT

LM4132A-1.8

LM4132B-1.8

LM4132C-1.8

LM4132D-1.8

LM4132E-1.8

(B Grade - 0.1%)

(C Grade - 0.2%)

(D Grade - 0.4%)

(E Grade - 0.5%)

0°C ≤ T_J≤ 85°C

–40°C ≤ T_J≤ 125°C

Output voltage initial

accuracy

V_REF

–0.2%

–0.4%

–0.5%

LM4132A-1.8

LM4132B-1.8

LM4132C-1.8

LM4132D-1.8

LM4132E-1.8

TCV_REF/°C

Temperature coefficient

Supply current

ppm/°C

–40°C ≤ T_J≤ 125°C

I_Q

µA

–40°C ≤ T_J≤ 125°C

EN = 0 V

100

I_{Q_SD}

Supply current in shutdown

Line regulation

µA

–40°C ≤ T_J≤ 125°C

V_REF+ 400 mV ≤ V_IN≤ 5.5 V

0 mA ≤ I_LOAD≤ 20 mA

–40°C ≤ T_J≤ 125°C

1000 Hrs

ΔV_REF/ΔV_IN

ΔV_REF/ΔI_LOAD

ppm/V

ppm/mA

Load regulation

120

Long-term stability⁽³⁾

Thermal hysteresis⁽⁴⁾

ΔV_REF

ppm

–40°C ≤ T_J≤ 125°C

I_LOAD= 10 mA

230

V_IN– V_REF

Dropout voltage⁽⁵⁾

–40°C ≤ T_J≤ 125°C

0.1 Hz to 10 Hz

400

V_N

I_SC

V_IL

V_IH

Output noise voltage

Short-circuit current

170

µV_PP

–40°C ≤ T_J≤ 125°C

Enable pin maximum low input level

Enable pin minimum high input level

35% (V_IN)

65% (V_IN

)

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using

Statistical Quality Control.

(2) Typical numbers are at 25°C and represent the most likely parametric norm.

(3) Long-term stability is V_REFat 25°C measured during 1000 hrs.

(4) Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C).

(5) Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value

measured with a 5-V input.

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6.6 Electrical Characteristics LM4132-2 (V_OUT= 2.048 V)

Unless otherwise specified, limits are T_J= 25°C, V_IN= 5 V, and I_LOAD= 0 mA.

PARAMETER

TEST CONDITIONS

(A Grade - 0.05%)

MIN⁽¹⁾TYP⁽²⁾

–0.05%

–0.1%

MAX⁽¹⁾

0.05%

0.1%

0.2%

0.4%

0.5%

UNIT

LM4132A-2.0

LM4132B-2.0

LM4132C-2.0

LM4132D-2.0

LM4132E-2.0

(B Grade - 0.1%)

(C Grade - 0.2%)

(D Grade - 0.4%)

(E Grade - 0.5%)

0°C ≤ T_J≤ 85°C

–40°C ≤ T_J≤ 125°C

Output voltage initial

accuracy

V_REF

–0.2%

–0.4%

–0.5%

LM4132A-2.0

LM4132B-2.0

LM4132C-2.0

LM4132D-2.0

LM4132E-2.0

TCV_REF/°C

Temperature coefficient

Supply current

ppm/°C

–40°C ≤ T_J≤ 125°C

I_Q

µA

–40°C ≤ T_J≤ 125°C

EN = 0 V

100

I_{Q_SD}

Supply current in shutdown

Line regulation

µA

–40°C ≤ T_J≤ 125°C

V_REF+ 400 mV ≤ V_IN≤ 5.5 V

0 mA ≤ I_LOAD≤ 20 mA

–40°C ≤ T_J≤ 125°C

1000 Hrs

ΔV_REF/ΔV_IN

ΔV_REF/ΔI_LOAD

ppm/V

ppm/mA

Load regulation

120

Long-term stability⁽³⁾

Thermal hysteresis⁽⁴⁾

ΔV_REF

ppm

–40°C ≤ T_J≤ 125°C

I_LOAD= 10 mA

175

V_IN– V_REF

Dropout voltage⁽⁵⁾

–40°C ≤ T_J≤ 125°C

0.1 Hz to 10 Hz

400

V_N

I_SC

V_IL

V_IH

Output noise voltage

Short-circuit current

190

µV_PP

–40°C ≤ T_J≤ 125°C

Enable pin maximum low input level

Enable pin minimum high input level

35% (V_IN)

65% (V_IN

)

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using

Statistical Quality Control.

(2) Typical numbers are at 25°C and represent the most likely parametric norm.

(3) Long-term stability is V_REFat 25°C measured during 1000 hrs.

(4) Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C).

(5) Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value

measured with a 5-V input.

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SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

6.7 Electrical Characteristics LM4132-2.5 (V_OUT= 2.5 V)

Unless otherwise specified, limits are T_J= 25°C, V_IN= 5 V, and I_LOAD= 0 mA.

PARAMETER

TEST CONDITIONS

(A Grade - 0.05%)

MIN⁽¹⁾TYP⁽²⁾

–0.05%

–0.1%

MAX⁽¹⁾

0.05%

0.1%

0.2%

0.4%

0.5%

UNIT

LM4132A-2.5

LM4132B-2.5

LM4132C-2.5

LM4132D-2.5

LM4132E-2.5

(B Grade - 0.1%)

(C Grade - 0.2%)

(D Grade - 0.4%)

(E Grade - 0.5%)

0°C ≤ T_J≤ 85°C

–40°C ≤ T_J≤ 125°C

Output voltage initial

accuracy

V_REF

–0.2%

–0.4%

–0.5%

LM4132A-2.5

LM4132B-2.5

LM4132C-2.5

LM4132D-2.5

LM4132E-2.5

TCV_REF/°C

Temperature coefficient

Supply current

ppm/°C

–40°C ≤ T_J≤ 125°C

I_Q

µA

–40°C ≤ T_J≤ 125°C

EN = 0 V

100

I_{Q_SD}

Supply current in shutdown

Line regulation

µA

–40°C ≤ T_J≤ 125°C

V_REF+ 400 mV ≤ V_IN≤ 5.5 V

0 mA ≤ I_LOAD≤ 20 mA

–40°C ≤ T_J≤ 125°C

1000 Hrs

ΔV_REF/ΔV_IN

ΔV_REF/ΔI_LOAD

ppm/V

ppm/mA

Load regulation

120

Long-term stability⁽³⁾

Thermal hysteresis⁽⁴⁾

ΔV_REF

ppm

–40°C ≤ T_J≤ 125°C

I_LOAD= 10 mA

175

V_IN– V_REF

Dropout voltage⁽⁵⁾

–40°C ≤ T_J≤ 125°C

0.1 Hz to 10 Hz

400

V_N

I_SC

V_IL

V_IH

Output noise voltage

Short-circuit current

240

µV_PP

–40°C ≤ T_J≤ 125°C

Enable pin maximum low input level

Enable pin minimum high input level

35% (V_IN)

65% (V_IN

)

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using

Statistical Quality Control.

(2) Typical numbers are at 25°C and represent the most likely parametric norm.

(3) Long-term stability is V_REFat 25°C measured during 1000 hrs.

(4) Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C).

(5) Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value

measured with a 5-V input.

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6.8 Electrical Characteristics LM4132-3 (V_OUT= 3 V)

Unless otherwise specified, limits are T_J= 25°C, V_IN= 5 V, and I_LOAD= 0 mA.

PARAMETER

TEST CONDITIONS

(A Grade - 0.05%)

MIN⁽¹⁾TYP⁽²⁾

–0.05%

–0.1%

MAX⁽¹⁾

0.05%

0.1%

0.2%

0.4%

0.5%

UNIT

LM4132A-3.0

LM4132B-3.0

LM4132C-3.0

LM4132D-3.0

LM4132E-3.0

(B Grade - 0.1%)

(C Grade - 0.2%)

(D Grade - 0.4%)

(E Grade - 0.5%)

0°C ≤ T_J≤ 85°C

–40°C ≤ T_J≤ 125°C

Output voltage initial

accuracy

V_REF

–0.2%

–0.4%

–0.5%

LM4132A-3.0

LM4132B-3.0

LM4132C-3.0

LM4132D-3.0

LM4132E-3.0

TCV_REF/°C

Temperature coefficient

Supply current

ppm/°C

–40°C ≤ T_J≤ 125°C

I_Q

µA

–40°C ≤ T_J≤ 125°C

EN = 0 V

100

I_{Q_SD}

Supply current in shutdown

Line regulation

µA

–40°C ≤ T_J≤ 125°C

V_REF+ 400 mV ≤ V_IN≤ 5.5 V

0 mA ≤ I_LOAD≤ 20 mA

–40°C ≤ T_J≤ 125°C

1000 Hrs

ΔV_REF/ΔV_IN

ΔV_REF/ΔI_LOAD

ppm/V

ppm/mA

Load regulation

120

Long-term stability⁽³⁾

Thermal hysteresis⁽⁴⁾

ΔV_REF

ppm

–40°C ≤ T_J≤ 125°C

I_LOAD= 10 mA

175

V_IN– V_REF

Dropout voltage⁽⁵⁾

–40°C ≤ T_J≤ 125°C

0.1 Hz to 10 Hz

400

V_N

I_SC

V_IL

V_IH

Output noise voltage

Short-circuit current

285

µV_PP

–40°C ≤ T_J≤ 125°C

Enable pin maximum low input level

Enable pin minimum high input level

35% (V_IN)

65% (V_IN

)

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using

Statistical Quality Control.

(2) Typical numbers are at 25°C and represent the most likely parametric norm.

(3) Long-term stability is V_REFat 25°C measured during 1000 hrs.

(4) Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C).

(5) Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value

measured with a 5-V input.

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SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

6.9 Electrical Characteristics LM4132-3.3 (V_OUT= 3.3 V)

Unless otherwise specified, limits are T_J= 25°C, V_IN= 5 V, and I_LOAD= 0 mA.

PARAMETER

TEST CONDITIONS

(A Grade - 0.05%)

MIN⁽¹⁾TYP⁽²⁾

–0.05%

–0.1%

MAX⁽¹⁾

0.05%

0.1%

0.2%

0.4%

0.5%

UNIT

LM4132A-3.3

LM4132B-3.3

LM4132C-3.3

LM4132D-3.3

LM4132E-3.3

(B Grade - 0.1%)

(C Grade - 0.2%)

(D Grade - 0.4%)

(E Grade - 0.5%)

0°C ≤ T_J≤ 85°C

–40°C ≤ T_J≤ 125°C

Output voltage initial

accuracy

V_REF

–0.2%

–0.4%

–0.5%

LM4132A-3.3

LM4132B-3.3

LM4132C-3.3

LM4132D-3.3

LM4132E-3.3

TCV_REF/°C

Temperature coefficient

Supply current

ppm/°C

–40°C ≤ T_J≤ 125°C

I_Q

µA

–40°C ≤ T_J≤ 125°C

EN = 0 V

100

I_{Q_SD}

Supply current in shutdown

Line regulation

µA

–40°C ≤ T_J≤ 125°C

V_REF+ 400 mV ≤ V_IN≤ 5.5 V

0 mA ≤ I_LOAD≤ 20 mA

–40°C ≤ T_J≤ 125°C

1000 Hrs

ΔV_REF/ΔV_IN

ΔV_REF/ΔI_LOAD

ppm/V

ppm/mA

Load Regulation

120

Long-term stability⁽³⁾

Thermal hysteresis⁽⁴⁾

ΔV_REF

ppm

–40°C ≤ T_J≤ 125°C

I_LOAD= 10 mA

175

V_IN– V_REF

Dropout voltage⁽⁵⁾

–40°C ≤ T_J≤ 125°C

0.1 Hz to 10 Hz

400

V_N

I_SC

V_IL

V_IH

Output noise voltage

Short-circuit current

310

µV_PP

–40°C ≤ T_J≤ 125°C

Enable pin maximum low input level

Enable pin minimum high input level

35% (V_IN)

65% (V_IN

)

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using

Statistical Quality Control.

(2) Typical numbers are at 25°C and represent the most likely parametric norm.

(3) Long-term stability is V_REFat 25°C measured during 1000 hrs.

(4) Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C).

(5) Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value

measured with a 5-V input.

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SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

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6.10 Electrical Characteristics LM4132-3.3-Q1(V_OUT= 3.3 V)

Unless otherwise specified, limits are T_J= 25°C, V_IN= 5 V, and I_LOAD= 0 mA.

PARAMETER

TEST CONDITIONS

(C Grade - 0.2%)

MIN⁽¹⁾TYP⁽²⁾

–0.2%

MAX⁽¹⁾

0.2%

0.4%

UNIT

LM4132C-3.3-Q1

LM4132D-3.3-Q1

LM4132C-3.3-Q1

LM4132D-3.3-Q1

Output voltage initial

accuracy

V_REF

(D Grade - 0.4%)

–0.4%

Temperature

coefficient

TCV_REF/°C

–40°C ≤ T_J≤ 125°C

ppm/°C

µA

I_Q

Supply current

–40°C ≤ T_J≤ 125°C

EN = 0 V

100

I_{Q_SD}

Supply current in shutdown

Line regulation

µA

–40°C ≤ T_J≤ 125°C

V_REF+ 400 mV ≤ V_IN≤ 5.5 V

0 mA ≤ I_LOAD≤ 25 mA

–40°C ≤ T_J≤ 125°C

1000 Hrs

ΔV_REF/ΔV_IN

ΔV_REF/ΔI_LOAD

ppm/V

ppm/mA

Load Regulation

120

Long-term stability⁽³⁾

Thermal hysteresis⁽⁴⁾

ΔV_REF

ppm

–40°C ≤ T_J≤ 125°C

I_LOAD= 10 mA

175

V_IN– V_REF

Dropout voltage⁽⁵⁾

–40°C ≤ T_J≤ 125°C

0.1 Hz to 10 Hz

400

V_N

I_SC

V_IL

V_IH

Output noise voltage

310

µV_PP

Short-circuit current

–40°C ≤ T_J≤ 125°C

Enable pin maximum low input level

Enable pin minimum high input level

35% (V_IN)

65% (V_IN

)

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using

Statistical Quality Control.

(2) Typical numbers are at 25°C and represent the most likely parametric norm.

(3) Long-term stability is V_REFat 25°C measured during 1000 hrs.

(4) Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C).

(5) Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value

measured with a 5-V input.

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6.11 Electrical Characteristics LM4132-4.1 (V_OUT= 4.096 V)

Unless otherwise specified, limits are T_J= 25°C, V_IN= 5 V, and I_LOAD= 0 mA.

PARAMETER

TEST CONDITIONS

(A Grade - 0.05%)

MIN⁽¹⁾TYP⁽²⁾

–0.05%

–0.1%

MAX⁽¹⁾

0.05%

0.1%

0.2%

0.4%

0.5%

UNIT

LM4132A-4.1

LM4132B-4.1

LM4132C-4.1

LM4132D-4.1

LM4132E-4.1

(B Grade - 0.1%)

(C Grade - 0.2%)

(D Grade - 0.4%)

(E Grade - 0.5%)

0°C ≤ T_J≤ 85°C

–40°C ≤ T_J≤ 125°C

Output voltage initial

accuracy

V_REF

–0.2%

–0.4%

–0.5%

LM4132A-4.1

LM4132B-4.1

LM4132C-4.1

LM4132D-4.1

LM4132E-4.1

TCV_REF/°C

Temperature coefficient

Supply current

ppm/°C

–40°C ≤ T_J≤ 125°C

I_Q

µA

–40°C ≤ TJ ≤ 125°C

EN = 0 V

100

I_{Q_SD}

Supply current in shutdown

Line regulation

µA

–40°C ≤ T_J≤ 125°C

V_REF+ 400 mV ≤ V_IN≤ 5.5 V

0 mA ≤ I_LOAD≤ 20 mA

–40°C ≤ T_J≤ 125°C

1000 Hrs

ΔV_REF/ΔV_IN

ΔV_REF/ΔI_LOAD

100

ppm/V

ppm/mA

Load regulation

120

Long-term stability⁽³⁾

Thermal hysteresis⁽⁴⁾

ΔV_REF

ppm

–40°C ≤ T_J≤ 125°C

I_LOAD= 10 mA

175

V_IN– V_REF

Dropout voltage⁽⁵⁾

–40°C ≤ T_J≤ 125°C

0.1 Hz to 10 Hz

400

V_N

I_SC

V_IL

V_IH

Output noise voltage

Short-circuit current

350

µV_PP

–40°C ≤ T_J≤ 125°C

Enable pin maximum low input level

Enable pin minimum high input level

35% (V_IN)

65% (V_IN

)

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using

Statistical Quality Control.

(2) Typical numbers are at 25°C and represent the most likely parametric norm.

(3) Long-term stability is V_REFat 25°C measured during 1000 hrs.

(4) Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C).

(5) Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value

measured with a 5-V input.

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6.12 Typical Characteristics

100

450

400

= 2.048V

REF

2.048V

125^oC

25^oC

350

300

250

200

150

100

-40^oC

2.5V

4.096V

0.5

1.5

2.5

3.5

4.5

5.5

(mA)

INPUT VOLTAGE (V)

LOAD

Figure 1. Dropout vs Load to 0.5% Accuracy

Figure 2. Supply Current vs Input Voltage

5.0

2.5

4.5

4.0

3.5

3.0

1.5

0.5

2.5

2.0

2.5

3.5

(V)

4.5

-40 -25

TEMPERATURE (^oC)

Figure 4. Shutdown I_Qvs Temperature

50 75 100 125

Figure 3. Enable Threshold Voltage and Hysteresis

200

150

100

1 TYPICAL UNIT FROM EACH

VOLTAGE OPTION

150

-50

-100

-150

-200

100 200 300 400 500 600 700 800 9001000

TIME (Hours)

LOAD CURRENT (mA)

Figure 6. Ground Current vs Load Current

Figure 5. Typical Long-Term Stability

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Typical Characteristics (continued)

Temperature Range

-40^oC < T_J< 125^oC

after 8 thermal cycles

25 50 75 100 125 150 200

HYSTERESIS (ppm)

Figure 7. Typical Thermal Hysteresis

Figure 8. Turnon Transient Response

I_LOAD= 0 to 10 mA

V_IN= 4 V to 5.5 V

Figure 9. Load Transient Response

Figure 10. Line Transient Response

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6.12.1 Typical Characteristics for 1.8 V

1.804

1.803

1.8010

1.8005

1.8000

1.7995

1.7990

1.7985

1.7980

125^oC

1.802

5 TYPICAL UNITS

1.801

1.800

25^oC

1.799

1.798

-40^oC

1.797

1.796

-40 -20

20 40 60 80 100 120

TEMPERATURE (^oC)

10 12 14 16 18 20

LOAD CURRENT (mA)

Figure 12. Load Regulation

Figure 11. Output Voltage vs Temperature

1.8020

1.8015

1.8010

1.8005

125^oC

25^oC

1.8000

1.7995

1.7990

1.7985

1.7990

-40^oC

2.2 2.7

3.2 3.7

4.2

4.7

5.2

INPUT VOLTAGE (V)

Figure 13. Line Regulation

Figure 14. 0.1–10 Hz Noise

-10

-20

-30

-40

-50

-60

NO C

OUT

NO C

OUT

-70

-80

= 0.1 mF

OUT

-90

100

10k

100

10k

100k

FREQUENCY (Hz)

Figure 15. Output Voltage Noise Spectrum

Figure 16. Power Supply Rejection vs Frequency

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6.12.2 Typical Characteristics for 2.048 V

2.050

2.049

2.048

2.047

2.046

2.045

2.052

2.051

2.050

5 TYPICAL UNITS

2.049

2.048

2.047

2.046

2.045

25^oC

-40^oC

125^oC

-50 -25

TEMPERATURE (^oC)

Figure 17. Output Voltage vs Temperature

75 100 125

LOAD CURRENT (mA)

Figure 18. Load Regulation

2.052

2.051

2.050

2.049

2.048

2.047

2.046

125^oC

25^oC

-40^oC

2.5

3.0

3.5

INPUT VOLTAGE (V)

Figure 19. Line Regulation

4.0

4.5

5.0

5.5

Figure 20. 0.1–10 Hz Noise

-10

-20

-30

-40

-50

-60

-70

-80

NO C

OUT

NO C

OUT

= 0.1 mF

100

10k

100

10k

100k

FREQUENCY (Hz)

Figure 21. Output Voltage Noise Spectrum

Figure 22. Power Supply Rejection vs Frequency

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6.12.3 Typical Characteristics for 2.5 V

2.504

2.503

2.502

2.501

2.500

2.499

2.498

2.503

5 TYPICAL UNITS

2.502

-40^oC

2.501

2.500

2.499

2.498

2.497

125^oC

25^oC

-50 -25

75 100 125

LOAD CURRENT (mA)

Figure 24. Load Regulation

TEMPERATURE (^oC)

Figure 23. Output Voltage vs Temperature

2.502

125^oC

2.501

2.500

2.499

2.498

2.497

25^oC

-40^oC

3.0

3.5

4.0

INPUT VOLTAGE (V)

Figure 25. Line Regulation

4.5

5.0

5.5

Figure 26. 0.1–10 Hz Noise

-10

-20

-30

-40

-50

-60

-70

-80

NO C

OUT

NO C

OUT

= 0.1 mF

OUT

100

10k

100

10k

100k

FREQUENCY (Hz)

Figure 27. Output Voltage Noise Spectrum

Figure 28. Power Supply Rejection vs Frequency

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6.12.4 Typical Characteristics for 3 V

3.006

3.005

3.004

3.003

3.0020

3.0015

3.0010

3.0005

3.0000

2.9995

2.9990

2.9985

2.9980

2.9975

125^oC

3.002

5 TYPICAL UNITS

3.001

25^oC

2.999

2.998

2.997

2.996

-40^oC

10 12 14 16 18 20

LOAD CURRENT (mA)

Figure 30. Load Regulation

-40 -20

20 40 60 80 100 120

TEMPERATURE (^oC)

Figure 29. Output Voltage vs Temperature

3.0020

3.0015

3.0010

3.0005

3.0000

2.9995

2.9990

2.9985

2.9980

125^oC

25^oC

-40^oC

3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5

INPUT VOLTAGE (V)

Figure 32. 0.1–10 Hz Noise

Figure 31. Line Regulation

-10

-20

-30

-40

-50

-60

-70

NO C

OUT

NO C

OUT

= 0.1 mF

OUT

-80

100

10k

100k

100

10k

FREQUENCY (Hz)

Figure 33. Output Voltage Noise Spectrum

Figure 34. Power Supply Rejection vs Frequency

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6.12.5 Typical Characteristics for 3.3 V

3.305

3.304

3.303

3.3005

3.3000

3.2995

3.2990

3.2985

3.2980

3.2975

-40^oC

25^oC

5 TYPICAL UNITS

3.302

3.301

3.3

3.299

3.298

3.297

3.296

3.295

125^oC

10 12 14 16 18 20

-40 -20

20 40 60 80 100 120

TEMPERATURE (^oC)

Figure 35. Output Voltage vs Temperature

LOAD CURRENT (mA)

Figure 36. Load Regulation

3.3010

3.3008

3.3006

3.3004

3.3002

3.3000

3.2998

3.2996

25^oC

125^oC

-40^oC

3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5

INPUT VOLTAGE (V)

Figure 37. Line Regulation

Figure 38. 0.1–10 Hz Noise

-10

-20

-30

-40

-50

-60

NO C

OUT

NO C

OUT

= 0.1 mF

OUT

-70

-80

-90

100

10k

100k

100

10k

FREQUENCY (Hz)

Figure 40. Power Supply Rejection vs Frequency

Figure 39. Output Voltage Noise Spectrum

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6.12.6 Typical Characteristics for 4.096 V

4.104

4.102

4.098

4.097

4.096

4.095

4.094

4.093

-40^oC

5 TYPICAL UNITS

4.100

4.098

4.096

4.094

4.092

4.090

125^oC

25^oC

-50 -25

75 100 125

LOAD CURRENT (mA)

Figure 42. Load Regulation

TEMPERATURE (^oC)

Figure 41. Output Voltage vs Temperature

4.100

4.099

4.098

4.097

4.096

4.095

4.094

4.093

4.092

125^oC

-40^oC

25^oC

4.5

4.7

4.9

INPUT VOLTAGE (V)

Figure 43. Line Regulation

5.1

5.3

5.5

Figure 44. 0.1–10 Hz Noise

-10

-20

-30

-40

-50

-60

-70

-80

NO C

OUT

NO C

OUT

= 0.1 mF

100

10k

100

10k

100k

FREQUENCY (Hz)

Figure 45. Output Voltage Noise Spectrum

Figure 46. Power Supply Rejection vs Frequency

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7 Detailed Description

7.1 Overview

The LM4132 device is a precision band-gap voltage reference available in 6 different voltages with 20-mA

current source capability. This series reference can operate with input voltages from V_REF+ 400 mV to 5.5 V

while consuming 60-µA (typical) supply current. In shutdown mode, current drops to 3 µA (typical). The LM4132

is available in five grades from A and E.

The best grade devices (A) have an initial accuracy of 0.05% with a specified tempco of 10 ppm/°C from –40°C

to 125°C. The grade devices (E) have an initial accuracy of 0.5% with specified tempco of 30 ppm/°C from –40°C

to 125°C.

7.2 Functional Block Diagram

V_IN

V_BG

BANDGAP

CELL

Q₁

I_LOAD

V_REF

≈

’

R₁

= V_BG1+

∆

R₁

R_{2 ◊}

C_OUT

R₂

7.3 Feature Description

The LM4132 can be remotely operated by applying an EN voltage between 65% of V_IN, and V_IN. The LM4312

can be remotely disabled by applying an EN voltage between 0 V to 35% of V_IN. The EN pin can also be

strapped to V_IN, so V_REFis active when V_INis applied.

7.3.1 Short Circuited Output

The LM4132 features indefinite short-circuit protection. This protection limits the output current to 75 mA when

the output is shorted to ground.

7.3.2 Turnon Time

Turnon time is defined as the time taken for the output voltage to rise to 90% of the preset value. The turnon time

depends on the load. The turnon time is typically 33.2 µs when driving a 1-µF load and 78.8 µs when driving a

10-µF load. Some users may experience an extended turnon time (up to 10 ms) under brownout conditions and

low temperatures (–40°C).

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Feature Description (continued)

7.3.3 Thermal Hysteresis

Thermal hysteresis is defined as the change in output voltage at 25ºC after some deviation from 25ºC. This is to

say that thermal hysteresis is the difference in output voltage between two points in a given temperature profile.

An illustrative temperature profile is shown in Figure 47.

125^oC

REF1

25^oC

Time

REF2

-40^oC

Figure 47. Temperature Profile

This may be expressed analytically by Equation 1:

lV_REF1- V_REF2

x 10⁶ppm

V_HYS

V_REF

where

•

V_HYS= Thermal hysteresis expressed in ppm

V_REF= Nominal preset output voltage

V_REF1= V_REFbefore temperature fluctuation

V_REF2= V_REFafter temperature fluctuation

The LM4132 features a low thermal hysteresis of 75 ppm (typical) from –40°C to 125°C after 8 temperature

cycles.

(1)

7.4 Device Functional Modes

Table 1 describes the functional modes of the LM4132.

Table 1. Enable Pin Mode Summary

ENABLE PIN CONNECTION

EN = VIN

LOGIC STATE

DESCRIPTION

Normal operation — LM4132 starts up.

The LM4312 is in shutdown mode.

EN = GND

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8 Applications and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LM4132 family of precision voltage references can deliver up to 20 mA without an output capacitor or buffer

amplifier. The LM4132 is ideal for battery-powered solutions, with a low quiescent current of 60 µA, and a low

dropout voltage of 400 mV. The LM4132 enters the shutdown mode (3 µA, typical) when EN is 0 V.

8.2 Typical Applications

8.2.1 LM4132 Typical Application

Input

Output

2.5V

REF

OUT

LM4132

Enable

GND

8.2.1.1 Design Requirements

For this design example, use the parameters listed as the input parameters.

•

V_IN> V_REF+ 400 mV (I_LOAD≤ 10 mA)

_LOAD≤ 20 mA

The LM4132 is enabled when 65%V_IN< V_EN≤ V_IN. V_ENcannot be greater than V_IN; otherwise, the device does

not operate correctly.

•

The devices is disabled when 0 V ≤ V_EN≤ 35% V_IN.

8.2.1.2 Detailed Design Procedure

The foundation of any voltage reference is the band-gap circuit. While the reference in the LM4132 is developed

from the gate-source voltage of transistors in the device, principles of the band-gap circuit are easily understood

using a bipolar example. For a detailed analysis of the bipolar band-gap circuit, refer to AN-56 LM113 1.2V

Reference (SNVA514).

8.2.1.2.1 Supply and Enable Voltages

To ensure proper operation, V_ENand V_INmust be within a specified range. An acceptable range of input voltages

is calculated by Equation 2:

V_IN> V_REF+ 400 mV (I_LOAD≤ 10 mA)

(2)

The EN pin uses an internal pullup current source (I_PULLUP≊ 2 µA) that may be left floating or triggered by an

external source. If the device is not enabled by an external source, it may be connected to V_IN. An acceptable

range of enable voltages is given by Figure 4. See Electrical Characteristics LM4132-1.8 (V_OUT= 1.8 V) and

Figure 3 for more detail. The device does not operate correctly for V_EN> V_IN.

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Typical Applications (continued)

8.2.1.2.2 Component Selection

A small ceramic (X5R or X7R) capacitor on the input must be used to ensure stable operation. The value of C_IN

must be sized according to the output capacitor value. The value of C_INmust satisfy the relationship C_IN≥ C_OUT

When no output capacitor is used, C_INmust have a minimum value of 0.1 µF. Noise on the power-supply input

may affect the output noise. Larger input capacitor values (typically 4.7 µF to 22 µF) may help reduce noise on

the output and significantly reduce overshoot during start-up. Use of an additional optional bypass capacitor from

the input and ground may help further reduce noise on the output. With an input capacitor, the LM4132 drives

any combination of resistance and capacitance up to V_REF/ 20 mA and 10 µF, respectively.

The LM4132 is designed to operate with or without an output capacitor and is stable with capacitive loads up to

10 µF. Connecting a capacitor from the output and ground significantly improves the load transient response

when switching from a light load to a heavy load. The output capacitor must not be made arbitrarily large

because capacitor selection affects the turnon time as well as line and load transients.

While a variety of capacitor chemistry types may be used, it is typically advisable to use low equivalent series

resistance (ESR) ceramic capacitors. Such capacitors provide a low impedance to high frequency signals,

effectively bypassing them to ground. Bypass capacitors must be mounted close to the device. Mounting bypass

capacitors close to the device helps reduce the parasitic trace components thereby improving performance.

8.2.1.2.3 Temperature Coefficient

Temperature drift is defined as the maximum deviation in output voltage over the operating temperature range.

This deviation over temperature may be shown in Figure 48:

Voltage

REF_MAX

Temperature

REF_MIN

Temperature Range

Figure 48. V_REFvs Temperature Profile

Temperature coefficient may be expressed analytically as Equation 3:

(V_{REF_MAX}- V_{REF_MIN}

)

x 10⁶ppm

T_D

V_REFx ΔT

where

•

T_D= Temperature drift

V_REF= Nominal preset output voltage

V_{REF_MIN}= Minimum output voltage over operating temperature range

V_{REF_MAX}= Maximum output voltage over operating temperature range

ΔT = Operating temperature range

The LM4132 features a low temperature drift of 10 ppm (maximum) to 30 ppm (maximum), depending on the

grade.

(3)

8.2.1.2.4 Long-Term Stability

Long-term stability refers to the fluctuation in output voltage over a long period of time (1000 hours). The LM4132

features a typical long-term stability of 50 ppm over 1000 hours. The measurements are made using 5 units of

each voltage option, at a nominal input voltage (5 V), with no load, at room temperature.

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Typical Applications (continued)

8.2.1.2.5 Expression of Electrical Characteristics

Electrical characteristics are typically expressed in mV, ppm, or a percentage of the nominal value. Depending

on the application, one expression may be more useful than the other. To convert one quantity to the other one

may apply the following:

ppm to mV error in output voltage:

V_REFx ppm_ERROR

= V_ERROR

10³

where

•

V_REFis in volts (V)

V_ERRORis in millivolts (mV)

(4)

Bit error (1 bit) to voltage error (mV):

V_REF

2ⁿ

x 10³

= V_ERROR

where

•

V_REFis in volts (V)

V_ERRORis in millivolts (mV)

n is the number of bits

(5)

mV to ppm error in output voltage:

V_ERROR

x 10³

= ppm_ERROR

V_REF

where

•

V_REFis in volts (V)

V_ERRORis in millivolts (mV)

(6)

(7)

Voltage error (mV) to percentage error (percent):

V_ERROR

x 0.1

= Percent_Error

V_REF

where

•

V_REFis in volts (V)

V_ERRORis in millivolts (mV)

8.2.1.3 Application Curves

2.503

2.502

2.501

2.500

2.499

2.498

2.497

125^oC

-40^oC

2.501

2.500

2.499

2.498

25^oC

-40^oC

125^oC

25^oC

3.0

3.5

4.0

4.5

5.0

5.5

LOAD CURRENT (mA)

INPUT VOLTAGE (V)

Figure 49. Load Regulation

Figure 50. Line Regulation

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Typical Applications (continued)

8.2.2 Other Application Circuits

REF

Input

REF

+5V

OUT

-V

REF

LM4132

GND

-5V

R/2

Enable

4.7 µF< C

< 10 µF

OUT

Figure 51. Voltage Reference With Complementary Output

+5V

Input

REF

REF_FORCE

100 kW

µF

0.1

LM4132

REF_SENSE

Enable

GND

Figure 52. Precision Voltage Reference With Force and Sense Output

Input

Output

REF

500W

LM4132

GND

0.1µF

Enable

SET

OUT

I_OUT= (V_REF/(R₁+ R_SET)) + I_GND

GND

1 kW

Figure 53. Programmable Current Source

9 Power Supply Recommendations

An input capacitor between VIN and ground is required, and must be placed close to the device. An output

capacitor is optional, and if used must satisfy the relationship C_IN>= C_OUT. Refer to Component Selection.

Submit Documentation Feedback

Product Folder Links: LM4132 LM4132-Q1

LM4132, LM4132-Q1

SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

www.ti.com

10 Layout

10.1 Layout Guidelines

The mechanical stress due to PCB mounting can cause the output voltage to shift from its initial value. The

center of a PCB generally has the highest mechanical and thermal expansion stress. Mounting the device near

the edges or the corners of the board where mechanical stress is at its minimum. References in SOT-23

packages are generally less prone to assembly stress than devices in small outline (SOIC) packages.

A mechanical isolation of the device by creating an island by cutting a U shape slot (U - SLOT) on the PCB while

mounting the device helps in reducing the impact of the PCB stresses on the output voltage of the reference.

This approach would also provide some thermal isolation from the rest of the circuit.

Figure 54 shows a recommended printed board layout for LM4132 along with an in-set diagram, which exhibits a

slot cut on three sides of the reference device.

Bypass capacitors must be mounted close to the device. Mounting bypass capacitors close to the device reduces

the parasitic trace components, thereby improving performance.

10.2 Layout Example

PCB Top View

VIN

VREF

PCB Length

LM4132

PCB Side View

STRESS

N/C

U - SLOT

N/C GND EN

LM4132

VREF

U - SLOT

PCB Length

GND

Set C_OUT

close to V_OUT

and GND

N/C

Set C_IN

close to V_IN

and GND

C_OUT

LM4132

C_IN

V_REF

V_IN

Figure 54. Typical Layout Example With LM4132

Submit Documentation Feedback

Product Folder Links: LM4132 LM4132-Q1

LM4132, LM4132-Q1

www.ti.com

SNVS372G –AUGUST 2005–REVISED OCTOBER 2016

11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation see the following:

AN-56 LM113 1.2V Reference (SNVA514)

11.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 2. Related Links

TECHNICAL

DOCUMENTS

TOOLS &

SOFTWARE

SUPPORT &

COMMUNITY

PARTS

PRODUCT FOLDER SAMPLE & BUY

LM4132

Click here

LM4132-Q1

11.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

11.4 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

11.5 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.6 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

11.7 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Submit Documentation Feedback

Product Folder Links: LM4132 LM4132-Q1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

LM4132AMF-1.8/NOPB

LM4132AMF-2.0/NOPB

LM4132AMF-2.5/NOPB

LM4132AMF-3.0/NOPB

LM4132AMF-3.3/NOPB

LM4132AMF-4.1/NOPB

LM4132AMFX-1.8/NOPB

LM4132AMFX-2.0/NOPB

LM4132AMFX-2.5/NOPB

LM4132AMFX-3.0/NOPB

LM4132AMFX-3.3/NOPB

LM4132AMFX-4.1/NOPB

LM4132AQ1MFR2.5

ACTIVE

SOT-23

DBV

1000 RoHS & Green

3000 RoHS & Green

Level-1-260C-UNLIM

-40 to 125

R4AA

R4BA

R4CA

R4DA

R4EA

R4FA

R4AA

R4BA

R4CA

R4DA

R4EA

R4FA

ZECX

ZEIX

LM4132AQ1MFR3.0

LM4132AQ1MFT2.5

250

RoHS & Green

ZECX

ZEIX

LM4132AQ1MFT3.0

LM4132BMF-1.8/NOPB

LM4132BMF-2.0/NOPB

LM4132BMF-2.5/NOPB

LM4132BMF-3.0/NOPB

1000 RoHS & Green

R4AB

R4BB

R4CB

R4DB

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

LM4132BMF-3.3/NOPB

LM4132BMF-4.1/NOPB

LM4132BMFX-1.8/NOPB

LM4132BMFX-2.0/NOPB

LM4132BMFX-2.5/NOPB

LM4132BMFX-3.0/NOPB

LM4132BMFX-3.3/NOPB

LM4132BMFX-4.1/NOPB

LM4132BQ1MFR2.5

ACTIVE

SOT-23

DBV

1000 RoHS & Green

3000 RoHS & Green

Level-1-260C-UNLIM

-40 to 125

R4EB

R4FB

R4AB

R4BB

R4CB

R4DB

R4EB

R4FB

ZDYX

ZEJX

ZDYX

ZEJX

R4AC

R4BC

R4CC

R4DC

R4EC

R4FC

R4AC

R4BC

R4CC

LM4132BQ1MFR3.0

LM4132BQ1MFT2.5

250

RoHS & Green

LM4132BQ1MFT3.0

LM4132CMF-1.8/NOPB

LM4132CMF-2.0/NOPB

LM4132CMF-2.5/NOPB

LM4132CMF-3.0/NOPB

LM4132CMF-3.3/NOPB

LM4132CMF-4.1/NOPB

LM4132CMFX-1.8/NOPB

LM4132CMFX-2.0/NOPB

LM4132CMFX-2.5/NOPB

1000 RoHS & Green

3000 RoHS & Green

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

LM4132CMFX-3.0/NOPB

LM4132CMFX-3.3/NOPB

LM4132CMFX-4.1/NOPB

LM4132CQ1MFR2.5

ACTIVE

SOT-23

DBV

3000 RoHS & Green

Level-1-260C-UNLIM

-40 to 125

R4DC

R4EC

R4FC

ZDZX

ZEKX

ZEZX

ZDZX

ZEKX

ZEZX

R4AD

R4BD

R4CD

R4DD

R4ED

R4FD

R4AD

R4BD

R4CD

R4DD

R4ED

R4FD

LM4132CQ1MFR3.0

LM4132CQ1MFR3.3

LM4132CQ1MFT2.5

250

RoHS & Green

LM4132CQ1MFT3.0

LM4132CQ1MFT3.3

LM4132DMF-1.8/NOPB

LM4132DMF-2.0/NOPB

LM4132DMF-2.5/NOPB

LM4132DMF-3.0/NOPB

LM4132DMF-3.3/NOPB

LM4132DMF-4.1/NOPB

LM4132DMFX-1.8/NOPB

LM4132DMFX-2.0/NOPB

LM4132DMFX-2.5/NOPB

LM4132DMFX-3.0/NOPB

LM4132DMFX-3.3/NOPB

LM4132DMFX-4.1/NOPB

1000 RoHS & Green

3000 RoHS & Green

Addendum-Page 3

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

LM4132DQ1MFR2.5

LM4132DQ1MFR3.0

ACTIVE

SOT-23

DBV

3000 RoHS & Green

Level-1-260C-UNLIM

-40 to 125

ZEAX

ZELX

ZFAX

ZEAX

ZELX

ZFAX

R4AE

R4BE

R4CE

R4DE

R4EE

R4FE

R4AE

R4BE

R4CE

R4DE

R4EE

R4FE

LM4132DQ1MFR3.3

LM4132DQ1MFT2.5

250

RoHS & Green

LM4132DQ1MFT3.0

LM4132DQ1MFT3.3

LM4132EMF-1.8/NOPB

LM4132EMF-2.0/NOPB

LM4132EMF-2.5/NOPB

LM4132EMF-3.0/NOPB

LM4132EMF-3.3/NOPB

LM4132EMF-4.1/NOPB

LM4132EMFX-1.8/NOPB

LM4132EMFX-2.0/NOPB

LM4132EMFX-2.5/NOPB

LM4132EMFX-3.0/NOPB

LM4132EMFX-3.3/NOPB

LM4132EMFX-4.1/NOPB

1000 RoHS & Green

3000 RoHS & Green

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

Addendum-Page 4

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF LM4132, LM4132-Q1 :

Catalog: LM4132

•

Automotive: LM4132-Q1

•

NOTE: Qualified Version Definitions:

Catalog - TI's standard catalog product

•

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

•

Addendum-Page 5

PACKAGE MATERIALS INFORMATION

www.ti.com

9-Aug-2022

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

Reel

Diameter

Cavity

A0 Dimension designed to accommodate the component width

B0 Dimension designed to accommodate the component length

K0 Dimension designed to accommodate the component thickness

Overall width of the carrier tape

P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2

Q3 Q4

Q1 Q2

Q3 Q4

User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

LM4132AMF-1.8/NOPB SOT-23

LM4132AMF-2.0/NOPB SOT-23

LM4132AMF-2.5/NOPB SOT-23

LM4132AMF-3.0/NOPB SOT-23

LM4132AMF-3.3/NOPB SOT-23

LM4132AMF-4.1/NOPB SOT-23

LM4132AMFX-1.8/NOPB SOT-23

LM4132AMFX-2.0/NOPB SOT-23

LM4132AMFX-2.5/NOPB SOT-23

LM4132AMFX-3.0/NOPB SOT-23

LM4132AMFX-3.3/NOPB SOT-23

LM4132AMFX-4.1/NOPB SOT-23

DBV

1000

3000

250

178.0

8.4

3.2

1.4

4.0

8.0

LM4132AQ1MFR2.5

LM4132AQ1MFR3.0

LM4132AQ1MFT2.5

LM4132AQ1MFT3.0

SOT-23

250

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

9-Aug-2022

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

LM4132BMF-1.8/NOPB SOT-23

LM4132BMF-2.0/NOPB SOT-23

LM4132BMF-2.5/NOPB SOT-23

LM4132BMF-3.0/NOPB SOT-23

LM4132BMF-3.3/NOPB SOT-23

LM4132BMF-4.1/NOPB SOT-23

LM4132BMFX-1.8/NOPB SOT-23

LM4132BMFX-2.0/NOPB SOT-23

LM4132BMFX-2.5/NOPB SOT-23

LM4132BMFX-3.0/NOPB SOT-23

LM4132BMFX-3.3/NOPB SOT-23

LM4132BMFX-4.1/NOPB SOT-23

DBV

1000

3000

250

178.0

8.4

3.2

1.4

4.0

8.0

LM4132BQ1MFR2.5

LM4132BQ1MFR3.0

LM4132BQ1MFT2.5

LM4132BQ1MFT3.0

SOT-23

250

LM4132CMF-1.8/NOPB SOT-23

LM4132CMF-2.0/NOPB SOT-23

LM4132CMF-2.5/NOPB SOT-23

LM4132CMF-3.0/NOPB SOT-23

LM4132CMF-3.3/NOPB SOT-23

LM4132CMF-4.1/NOPB SOT-23

LM4132CMFX-1.8/NOPB SOT-23

LM4132CMFX-2.0/NOPB SOT-23

LM4132CMFX-2.5/NOPB SOT-23

LM4132CMFX-3.0/NOPB SOT-23

LM4132CMFX-3.3/NOPB SOT-23

LM4132CMFX-4.1/NOPB SOT-23

1000

3000

250

LM4132CQ1MFR2.5

LM4132CQ1MFR3.0

LM4132CQ1MFR3.3

LM4132CQ1MFT2.5

LM4132CQ1MFT3.0

LM4132CQ1MFT3.3

SOT-23

250

LM4132DMF-1.8/NOPB SOT-23

LM4132DMF-2.0/NOPB SOT-23

LM4132DMF-2.5/NOPB SOT-23

LM4132DMF-3.0/NOPB SOT-23

LM4132DMF-3.3/NOPB SOT-23

LM4132DMF-4.1/NOPB SOT-23

LM4132DMFX-1.8/NOPB SOT-23

1000

3000

Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

9-Aug-2022

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

LM4132DMFX-2.0/NOPB SOT-23

LM4132DMFX-2.5/NOPB SOT-23

LM4132DMFX-3.0/NOPB SOT-23

LM4132DMFX-3.3/NOPB SOT-23

LM4132DMFX-4.1/NOPB SOT-23

DBV

3000

250

178.0

8.4

3.2

1.4

4.0

8.0

LM4132DQ1MFR2.5

LM4132DQ1MFR3.0

LM4132DQ1MFR3.3

LM4132DQ1MFT2.5

LM4132DQ1MFT3.0

LM4132DQ1MFT3.3

SOT-23

250

LM4132EMF-1.8/NOPB SOT-23

LM4132EMF-2.0/NOPB SOT-23

LM4132EMF-2.5/NOPB SOT-23

LM4132EMF-3.0/NOPB SOT-23

LM4132EMF-3.3/NOPB SOT-23

LM4132EMF-4.1/NOPB SOT-23

LM4132EMFX-1.8/NOPB SOT-23

LM4132EMFX-2.0/NOPB SOT-23

LM4132EMFX-2.5/NOPB SOT-23

LM4132EMFX-3.0/NOPB SOT-23

LM4132EMFX-3.3/NOPB SOT-23

LM4132EMFX-4.1/NOPB SOT-23

1000

3000

Pack Materials-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

9-Aug-2022

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

LM4132AMF-1.8/NOPB

LM4132AMF-2.0/NOPB

LM4132AMF-2.5/NOPB

LM4132AMF-3.0/NOPB

LM4132AMF-3.3/NOPB

LM4132AMF-4.1/NOPB

LM4132AMFX-1.8/NOPB

LM4132AMFX-2.0/NOPB

LM4132AMFX-2.5/NOPB

LM4132AMFX-3.0/NOPB

LM4132AMFX-3.3/NOPB

LM4132AMFX-4.1/NOPB

LM4132AQ1MFR2.5

SOT-23

DBV

1000

3000

250

208.0

191.0

35.0

LM4132AQ1MFR3.0

LM4132AQ1MFT2.5

LM4132AQ1MFT3.0

250

LM4132BMF-1.8/NOPB

LM4132BMF-2.0/NOPB

1000

Pack Materials-Page 4

PACKAGE MATERIALS INFORMATION

www.ti.com

9-Aug-2022

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

LM4132BMF-2.5/NOPB

LM4132BMF-3.0/NOPB

LM4132BMF-3.3/NOPB

LM4132BMF-4.1/NOPB

LM4132BMFX-1.8/NOPB

LM4132BMFX-2.0/NOPB

LM4132BMFX-2.5/NOPB

LM4132BMFX-3.0/NOPB

LM4132BMFX-3.3/NOPB

LM4132BMFX-4.1/NOPB

LM4132BQ1MFR2.5

SOT-23

DBV

1000

3000

250

208.0

210.0

208.0

191.0

185.0

191.0

35.0

LM4132BQ1MFR3.0

LM4132BQ1MFT2.5

LM4132BQ1MFT3.0

250

LM4132CMF-1.8/NOPB

LM4132CMF-2.0/NOPB

LM4132CMF-2.5/NOPB

LM4132CMF-3.0/NOPB

LM4132CMF-3.3/NOPB

LM4132CMF-4.1/NOPB

LM4132CMFX-1.8/NOPB

LM4132CMFX-2.0/NOPB

LM4132CMFX-2.5/NOPB

LM4132CMFX-3.0/NOPB

LM4132CMFX-3.3/NOPB

LM4132CMFX-4.1/NOPB

LM4132CQ1MFR2.5

1000

3000

250

LM4132CQ1MFR3.0

LM4132CQ1MFR3.3

LM4132CQ1MFT2.5

LM4132CQ1MFT3.0

250

LM4132CQ1MFT3.3

250

LM4132DMF-1.8/NOPB

LM4132DMF-2.0/NOPB

LM4132DMF-2.5/NOPB

LM4132DMF-3.0/NOPB

LM4132DMF-3.3/NOPB

LM4132DMF-4.1/NOPB

LM4132DMFX-1.8/NOPB

LM4132DMFX-2.0/NOPB

LM4132DMFX-2.5/NOPB

LM4132DMFX-3.0/NOPB

LM4132DMFX-3.3/NOPB

1000

3000

Pack Materials-Page 5

PACKAGE MATERIALS INFORMATION

www.ti.com

9-Aug-2022

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

LM4132DMFX-4.1/NOPB

LM4132DQ1MFR2.5

SOT-23

DBV

3000

250

208.0

191.0

35.0

LM4132DQ1MFR3.0

LM4132DQ1MFR3.3

LM4132DQ1MFT2.5

LM4132DQ1MFT3.0

250

LM4132DQ1MFT3.3

250

LM4132EMF-1.8/NOPB

LM4132EMF-2.0/NOPB

LM4132EMF-2.5/NOPB

LM4132EMF-3.0/NOPB

LM4132EMF-3.3/NOPB

LM4132EMF-4.1/NOPB

LM4132EMFX-1.8/NOPB

LM4132EMFX-2.0/NOPB

LM4132EMFX-2.5/NOPB

LM4132EMFX-3.0/NOPB

LM4132EMFX-3.3/NOPB

LM4132EMFX-4.1/NOPB

1000

3000

Pack Materials-Page 6

PACKAGE OUTLINE

DBV0005A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

3.0

2.6

0.1 C

1.75

1.45

0.90

PIN 1

INDEX AREA

(0.1)

2X 0.95

1.9

3.05

2.75

1.9

(0.15)

0.5

0.3

0.15

0.00

(1.1)

TYP

0.2

C A B

NOTE 5

0.25

GAGE PLANE

0.22

0.08

TYP

0.6

0.3

TYP

SEATING PLANE

4214839/G 03/2023

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Refernce JEDEC MO-178.

4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed 0.25 mm per side.

5. Support pin may differ or may not be present.

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EXAMPLE BOARD LAYOUT

DBV0005A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

5X (1.1)

5X (0.6)

SYMM

(1.9)

2X (0.95)

(R0.05) TYP

(2.6)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

EXPOSED METAL

0.07 MIN

ARROUND

0.07 MAX

ARROUND

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4214839/G 03/2023

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

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EXAMPLE STENCIL DESIGN

DBV0005A

SOT-23 - 1.45 mm max height

SMALL OUTLINE TRANSISTOR

PKG

5X (1.1)

5X (0.6)

SYMM

(1.9)

2X(0.95)

(R0.05) TYP

(2.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

4214839/G 03/2023

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

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TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”

AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable

standards, and any other safety, security, regulatory or other requirements.

These resources are subject to change without notice. TI grants you permission to use these resources only for development of an

application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license

is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you

will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these

resources.

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TI products.

TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

LM4132DQ1MFT3.3 [TI]

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