LM4820MMX-6 [TI]
1W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO8, MSOP-8;
| 型号： | LM4820MMX-6 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO8, MSOP-8 放大器 光电二极管 商用集成电路 |
| 文件： | 总20页 (文件大小：990K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 2002
LM4820-6
Fixed Gain 1 Watt Audio Power Amplifier
General Description
Key Specifications
The LM4820-6 is an audio power amplifier primarily de-
signed for demanding applications in mobile phones and
other portable communication device applications. It is ca-
pable of delivering 1 watt of continuous average power to an
8Ω BTL load with less than 1% distortion (THD+N) at 6dB of
BTL gain from a 5VDC power supply.
j
j
j
j
Improved PSRR at 217Hz
Power Output at 5.0V & 1% THD
Power Output at 3.3V & 1% THD
Shutdown Current
62dB
1.0W(typ.)
400mW(typ.)
0.1µA(typ.)
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4820-6 does not require input
and gain resistors, output coupling capacitors or bootstrap
capacitors, and therefore is ideally suited for mobile phone
and other low voltage applications where minimal parts
count and low power consumption is a primary requirement.
Features
n Fixed 6dB BTL voltage gain
n Available in space-saving packages micro SMD, MSOP
and SOIC
n Ultra low current shutdown mode
n Can drive capacitive loads up to 500 pF
n Improved pop & click circuitry eliminates noises during
turn-on and turn-off transitions
n 2.0 - 5.5V operation
n No output coupling capacitors, snubber networks or
bootstrap capacitors required
The LM4820-6 features a low-power consumption shutdown
mode, which is achieved by driving the shutdown pin with
logic low. Additionally, the LM4820-6 features an internal
thermal shutdown protection mechanism.
The LM4820-6 contains advanced pop & click circuitry which
eliminates noises which would otherwise occur during
turn-on and turn-off transitions.
n External gain configuration still possible
Applications
n Mobile Phones
n PDAs
n Portable electronic devices
Typical Application
20010601
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS200106
www.national.com
Connection Diagrams
8 Bump micro SMD
Small Outline (SO) Package
20010635
Top View
Order Number LM4820M-6
See NS Package Number M08A
20010623
Top View
Order Number LM4820IBP-6, LM4820IBPX-6
See NS Package Number BPA08DDB
Mini Small Outline (MSOP) Package
micro SMD Marking
20010670
Top View
X - Date Code
20010636
Top View
Order Number LM4820MM-6
See NS Package Number MUA08A
T - Die Traceability
G - Boomer Family
F - LM4820IBP-6
SO Marking
MSOP Marking
20010672
Top View
20010671
Top View
XY - Date Code
TT - Die Traceability
G- Boomer Family
26 - LM4820MM-6
Bottom 2 lines - Part Number ( LM4820M-6 )
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2
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
θJA (micro SMD)
220˚C/W
56˚C/W
θJC (MSOP)
θJA (MSOP)
190˚C/W
Soldering Information
Supply Voltage
6.0V
−65˚C to +150˚C
−0.3V to VDD +0.3V
Internally Limited
2500V
See AN-1112 "microSMD Wafers Level Chip Scale
Package".
Storage Temperature
Input Voltage
Power Dissipation (Note 3)
ESD Susceptibility (Note 4)
ESD Susceptibility (Note 5)
Junction Temperature
Thermal Resistance
θJC (SO)
Operating Ratings
Temperature Range
250V
150˚C
TMIN ≤ TA ≤ TMAX
−40˚C ≤ TA ≤ 85˚C
2.0V ≤ VDD ≤ 5.5V
Supply Voltage
35˚C/W
θJA (SO)
150˚C/W
Electrical Characteristics VDD = 5V (Notes 1, 2, 8)
The following specifications apply for VDD = 5V, AV = 1, and 8Ω load unless otherwise specified. Limits apply for TA = 25˚C.
LM4820-6
Symbol
IDD
Parameter
Conditions
VIN = 0V, Io = 0A
Typical
Limit
(Note 7)
10
Units
(Note 6)
Quiescent Power Supply Current
Shutdown Current
4
0.1
mA (max)
ISD
Vshutdown = GND
µA (max)
Po
Output Power
THD = 2% (max); f = 1 kHz
Po = 0.4 Wrms; f = 1kHz
Vripple = 200mV sine p-p
1
W
%
THD+N
PSRR
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
0.1
62 (f =
217Hz)
66 (f = 1kHz)
6.0
dB
AV
Fixed Voltage Gain
1.41Vin rms, RL = 8Ω
6.5
5.5
dB Max
dB Min
Electrical Characteristics VDD = 3.3V (Notes 1, 2, 8)
The following specifications apply for VDD = 3.3V, AV = 1, and 8Ω load unless otherwise specified. Limits apply for TA = 25˚C.
LM4820-6
Symbol
IDD
Parameter
Conditions
VIN = 0V, Io = 0A
Typical
(Note 6)
3.5
Limit
Units
(Note 7)
Quiescent Power Supply Current
Shutdown Current
mA (max)
ISD
Vshutdown = GND
0.1
µA (max)
Po
Output Power
THD = 1% (max); f = 1kHz
Po = 0.15Wrms; f = 1kHz
Vripple = 200mV sine p-p
0.4
W
%
THD+N
PSRR
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
0.1
60 (f =
217Hz)
62 (f = 1kHz)
6.0
dB
AV
Fixed Voltage Gain
.7Vin rms, RL = 8Ω
dB
Electrical Characteristics VDD = 2.6V (Notes 1, 2, 8)
The following specifications apply for VDD = 2.6V and 8Ω Load unless otherwise specified. Limits apply for TA = 25˚C.
LM4820-6
Symbol
Parameter
Conditions
Typical
(Note 6)
2.6
Limit
Units
(Note 7)
IDD
ISD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A
Vshutdown = GND
mA (max)
µA (max)
0.1
3
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Electrical Characteristics VDD = 2.6V (Notes 1, 2, 8)
The following specifications apply for VDD = 2.6V and 8Ω Load unless otherwise specified. Limits apply for TA
=
25˚C. (Continued)
LM4820-6
Symbol
P0
Parameter
Output Power ( 8Ω )
Conditions
Typical
(Note 6)
0.2
Limit
(Note 7)
Units
THD = 1% (max); f = 1 kHz THD =
1% (max); f = 1 kHz
W
W
%
Output Power ( 4Ω )
0.4
THD+N
PSRR
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
Po = 0.1Wrms; f = 1kHz
Vripple = 200mV sine p-p
0.08
44 (f =
217Hz)
44 (f = 1kHz)
6.0
dB
AV
Fixed Voltage Gain
.5Vin rms, RL = 8Ω
dB
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
A
JMAX JA
allowable power dissipation is P
= (T
–T )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4820-6, see power
DMAX
JMAX A JA
derating curves for additional information.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Machine Model, 220 pF–240 pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I by a maximum of 2µA.
SD
External Components Description
(Figure 1)
Components
Functional Description
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
4.
5.
CS
CB
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
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4
Typical Performance Characteristics
THD+N vs Frequency
THD+N vs Frequency
at VDD = 5V, 8Ω RL, and PWR = 250mW
at VDD = 3.3V, 8Ω RL, and PWR = 150mW
20010637
20010638
THD+N vs Frequency
THD+N vs Frequency
at VDD = 2.6V, 8Ω RL, and PWR = 100mW
at VDD = 2.6V, 4Ω RL, and PWR = 100mW
20010639
20010640
5
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Typical Performance Characteristics (Continued)
THD+N vs Power Out
VDD = 5V, 8Ω RL, 1kHz
THD+N vs Power Out
VDD = 3.3V, 8Ω RL, 1kHz
@
@
20010641
20010642
THD+N vs Power Out
VDD = 2.6V, 8Ω RL, 1kHz
THD+N vs Power Out
VDD = 2.6V, 4Ω RL, 1kHz
@
@
20010643
20010644
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Typical Performance Characteristics (Continued)
@
@
Power Supply Rejection Ratio (PSRR) VDD = 5V
Power Supply Rejection Ratio (PSRR) VDD = 5V
20010645
20010673
Input terminated with 10Ω R
Input Floating
@
@
Power Supply Rejection Ratio (PSRR) VDD = 2.6V
Power Supply Rejection Ratio (PSRR) VDD = 3.3V
20010647
20010646
Input terminated with 10Ω R
Input terminated with 10Ω R
7
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Typical Performance Characteristics (Continued)
Power Dissipation vs
Output Power
Power Dissipation vs
Output Power
@
VDD = 3.3V
VDD = 5V
20010649
20010648
Power Dissipation vs
Output Power
Output Power vs
Load Resistance
VDD = 2.6V
20010651
20010650
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Typical Performance Characteristics (Continued)
Supply Current vs
Shutdown Voltage
Clipping (Dropout) Voltage vs
Supply Voltage
20010653
20010652
Open Loop Frequency Response
Frequency Response vs
Input Capacitor Size
20010655
20010654
9
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Typical Performance Characteristics (Continued)
Power Derating Curves
Noise Floor
20010669
20010656
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POWER SUPPLY BYPASSING
Application Information
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the device as possible. Typical appli-
cations employ a 5V regulator with 10 µF tantalum or elec-
trolytic capacitor and a ceramic bypass capacitor which aid
in supply stability. This does not eliminate the need for
bypassing the supply nodes of the LM4820-6. The selection
of a bypass capacitor, especially CB, is dependent upon
PSRR requirements, click and pop performance (as ex-
plained in the section, Proper Selection of External Com-
ponents), system cost, and size constraints.
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4820-6 has two operational
amplifiers internally. Figure 1 shows that the output of am-
plifier one serves as the input to amplifier two which results
in both amplifiers producing signals identical in magnitude,
but out of phase by 180˚. Consequently, the differential gain
for the IC is
AVD= 2 *(Rf/Ri)
(1)
By driving the load differentially through outputs Vo1 and
Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configura-
tion where one side of the load is connected to ground.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4820-6 contains a shutdown pin to externally turn off the
amplifier’s bias circuitry. This shutdown feature turns the
amplifier off when a logic low is placed on the shutdown pin.
By switching the shutdown pin to ground, the LM4820-6
supply current draw will be minimized in idle mode. While the
device will be disabled with shutdown pin voltages less than
0.5VDC, the idle current may be greater than the typical
value of 0.1µA. (Idle current is measured with the shutdown
pin grounded).
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same con-
ditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing ex-
cessive clipping, please refer to the Audio Power Amplifier
Design section.
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry to provide a
quick, smooth transition into shutdown. Another solution is to
use a single-pole, single-throw switch in conjunction with an
external pull-up resistor. When the switch is closed, the
shutdown pin is connected to ground and disables the am-
plifier. If the switch is open, then the external pull-up resistor
will enable the LM4820-6. This scheme guarantees that the
shutdown pin will not float thus preventing unwanted state
changes.
A bridge configuration, such as the one used in LM4820-6,
also creates a second advantage over single-ended amplifi-
ers. Since the differential outputs, Vo1 and Vo2, are biased
at half-supply, no net DC voltage exists across the load. This
eliminates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configura-
tion. Without an output coupling capacitor, the half-supply
bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
POWER DISSIPATION
PROPER SELECTION OF EXTERNAL COMPONENTS
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Since the LM4820-6 has two
operational amplifiers in one package, the maximum internal
power dissipation is 4 times that of a single-ended amplifier.
The maximum power dissipation for a given application can
be derived from the power dissipation graphs or from Equa-
tion 2.
Proper selection of external components in applications us-
ing integrated power amplifiers is critical to optimize device
and system performance. While the LM4820-6 is tolerant of
external component combinations, consideration to compo-
nent values must be used to maximize overall system qual-
ity.
The LM4820-6 is unity-gain stable which gives the designer
maximum system flexibility. The LM4820-6 at 6dB of fixed
gain is a low gain configuration which minimizes THD+N
values, and maximizes the signal to noise ratio. Low gain
configurations require large input signals to obtain a given
output power. Input signals equal to or greater than 1 Vrms
are available from sources such as audio codecs. Please
refer to the section, Audio Power Amplifier Design, for a
more complete explanation of proper gain selection.
PDMAX = 4*(VDD)2/(2π2RL)
(2)
It is critical that the maximum junction temperature TJMAX of
150˚C is not exceeded. TJMAX can be determined from the
power derating curves by using PDMAX and the PC board foil
area. By adding additional copper foil, the thermal resistance
of the application can be reduced from a free air value of
150˚C/W, resulting in higher PDMAX. Additional copper foil
can be added to any of the leads, bumps or vias connected
to the LM4820-6. It is especially effective when connected to
VDD, GND, and the output pins. Refer to the application
information on the LM4820-6 reference design board for an
example of good heat sinking. If TJMAX still exceeds 150˚C,
then additional changes must be made. These changes can
include reduced supply voltage, higher load impedance, or
reduced ambient temperature. Internal power dissipation is a
function of output power. Refer to the Typical Performance
Characteristics curves for power dissipation information for
different output powers and output loading.
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. To a large extent, the band-
width is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor, Ci, forms a
first order high pass filter which limits low frequency re-
sponse. This value should be chosen based on needed
frequency response for a few distinct reasons.
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenu-
ation. But in many cases the speakers used in portable
systems, whether internal or external, have little ability to
11
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2.7VDD to 5VDD is a standard supply voltage range for most
applications. Extra supply voltage creates headroom that
allows the LM4820-6 to reproduce peaks in excess of 1W
without producing audible distortion. At this time, the de-
signer must make sure that the power supply choice along
with the output impedance does not violate the conditions
explained in the Power Dissipation section.
Application Information (Continued)
reproduce signals below 100 Hz to 150 Hz. Thus, using a
large input capacitor may not increase actual system perfor-
mance.
In addition to system cost and size, click and pop perfor-
mance is effected by the size of the input coupling capacitor,
Ci. A larger input coupling capacitor requires more charge to
reach its quiescent DC voltage (nominally 1/2 VDD). This
charge comes from the output via the feedback and is apt to
create pops upon device enable. Thus, by minimizing the
capacitor size based on necessary low frequency response,
turn-on pops can be minimized.
Once the power dissipation equations have been addressed,
the differential gain is determined from Equations 4 or 5.
(4)
(5)
or
Besides minimizing the input capacitor size, careful consid-
eration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize
turn-on pops since it determines how fast the LM4820-6
turns on. The slower the LM4820-6’s outputs ramp to their
quiescent DC voltage (nominally 1/2 VDD), the smaller the
turn-on pop. Choosing CB equal to 1.0 µF along with a small
value of Ci (in the range of 0.1 µF to 0.39 µF), should
produce a virtually clickless and popless shutdown function.
While the device will function properly, (no oscillations or
motorboating), with CB equal to 0.1 µF, the device will be
much more susceptible to turn-on clicks and pops. Thus, a
value of CB equal to 1.0 µF is recommended in all but the
most cost sensitive designs.
AVD = 2 ( Rf/Ri )
Rf = Ri = 25kΩ
AVD = 2 ( 25kΩ/25kΩ )
AVD = 2
The last step in this design example is setting the amplifier’s
-3dB frequency bandwidth. To achieve the desired 0.25dB
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit. The high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
both response limits is 0.17dB, well within the 0.25dB
desired limit. The results are
AUDIO POWER AMPLIFIER DESIGN
A 1W/8Ω Audio Amplifier
fL = 100Hz/5 = 20Hz
and
Given:
fH = 20kHz x 5 = 100kHz
Power Output
Load Impedance
Input Level
1 Wrms
As mentioned in the Selecting Proper External Compo-
nents section, Ri and Ci create a highpass filter that sets the
amplifier’s lower bandpass frequency limit. To find the cou-
pling capacitor’s value, use Equation 6
8Ω
1 Vrms
Input Impedance
Bandwidth
25 kΩ
100 Hz–20 kHz 0.25 dB
Ci ≥ 1/(2πRifL)
(6)
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Per-
formance Characteristics section, the supply rail can be
easily found. A second way to determine the minimum sup-
ply rail is to calculate the required Vopeak using Equation 3.
Using this method, the minimum supply voltage would be
The result is
1/(2π*25kΩ*20kHz) = .318µf
Use a 0.33µf capacitor, the closest standard value.
The product of the desired high frequency cutoff (100kHz in
this example ) and the differential gain AVD, determines the
upper passband response limit. With AVD = 2 and fH
100kHz, the closed-loop gain bandwidth product (GBWP) is
200kHz. This is less than the LM4820-6’s 25MHz GBWP.
With this margin, the amplifier can be used in designs that
require more differential gain while avoiding performance,
restricting bandwidth limitations.
=
(Vopeak + (VODTOP + VOD )), where VODBOT and VODTOP are
BOT
extrapolated from the Dropout Voltage vs Supply Voltage
curve in the Typical Performance Characteristics section.
(3)
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Application Information (Continued)
20010625
FIGURE 2. Reference Design Board and Layout - micro SMD
13
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Application Information (Continued)
LM4820-6 micro SMD BOARD ARTWORK
Silk Screen
Top Layer
20010657
20010658
Bottom Layer
Inner Layer Ground
20010659
20010660
Inner Layer VDD
20010661
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Application Information (Continued)
20010668
FIGURE 3. Reference Design Board and PCB Layout Guidelines - MSOP & SO Boards
15
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LM4820-6 MSOP DEMO BOARD ARTWORK
Silk Screen
Application Information (Continued)
LM4820-6 SO DEMO BOARD ARTWORK
Silk Screen
20010665
20010662
Top Layer
Top Layer
20010666
Bottom Layer
20010663
Bottom Layer
20010667
20010664
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Application Information (Continued)
Mono LM4820-6 Reference Design Boards
Bill of Material for all 3 Demo Boards
Item
1
Part Number
Part Description
Qty
1
Ref Designator
551011208-001 LM4820-6 Mono Reference Design Board
482911183-001 LM4820-6 Audio AMP
10
20
21
25
30
35
1
U1
C1
C2
C3
R1
J1
151911207-001 Tant Cap 1uF 16V 10
1
151911207-002 Cer Cap 0.39uF 50V Z5U 20% 1210
152911207-001 Tant Cap 1uF 16V 10
1
1
472911207-001 Res 20K Ohm 1/10W 5
3
210007039-002 Jumper Header Vertical Mount 2X1 0.100
2
PCB LAYOUT GUIDELINES
Single-Point Power / Ground Connections
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing High Frequency noise coupling between the
analog and digital sections. It is further recommended to put
digital and analog power traces over the corresponding digi-
tal and analog ground traces to minimize noise coupling.
General Mixed Signal Layout Recommendation
Power and Ground Circuits
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces
should be located as far away as possible from analog
components and circuit traces.
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bring-
ing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a
major impact on low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
take require a greater amount of design time but will not
increase the final price of the board. The only extra parts
required will be some jumpers.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and cross talk.
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Physical Dimensions inches (millimeters) unless otherwise noted
Note: Unless otherwise specified.
1. Epoxy coating.
2. 63Sn/37Pb eutectic bump.
3. Recommend non-solder mask defined landing pad.
4. Pin 1 is established by lower left corner with respect to text orientation pins are numbered counterclockwise.
5. Reference JEDEC registration MO-211, variation BC.
8-Bump micro SMD
Order Number LM4820IBP-6, LM4820IBPX-6
NS Package Number BPA08DDB
X1 = 1.361 0.03 X2 = 1.361 0.03 X3 = 0.850 0.10
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
MSOP
Order Number LM4820MM-6
NS Package Number MUA08A
SO
Order Number LM4820M-6
NS Package Number M08A
19
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Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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相关型号：
LM4830MX
IC 2 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO24, 0.300 INCH, PLASTIC, SOP-24, Audio/Video Amplifier
NSC
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