LM48512TLX/NOPB [TI]

具有集成升压转换器和 EMI 抑制功能的 2.7W 单声道、模拟输入 D 类音频放大器 | YZR | 16 | -40 to 85;
LM48512TLX/NOPB
型号: LM48512TLX/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有集成升压转换器和 EMI 抑制功能的 2.7W 单声道、模拟输入 D 类音频放大器 | YZR | 16 | -40 to 85

升压转换器 放大器 消费电路 商用集成电路 音频放大器 视频放大器
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April 9, 2012  
LM48512ꢀ  
PowerWise® Boosted, Ultra Low-EMI, Mono, E2S Class D  
Audio Power Amplifier  
General Description  
Key Specifications  
Part of National’s PowerWise family or products, the  
LM48512 delivers 1.8W into 8, while consuming 14.5mA of  
quiescent current. The LM48512 also features National’s En-  
hanced Emissions Suppression (E2S) system, a patented,  
ultra low EMI PWM architecture that significantly reduces RF  
emissions while preserving audio quality and efficiency.  
LM48512 improves battery life, reduces external component  
count, board area consumption, system cost, and simplifies  
design.  
■ꢀPower Output at VDD = 3.6V  
RL = 8Ω, THD+N 1%  
1.8W (typ)  
82% (typ)  
■ꢀEfficiency at 3.6V, 800mW into 8Ω  
■ꢀQuiescent Power Supply Current  
at 3.6V  
14.5mA  
0.04μA (typ)  
■ꢀShutdown current  
The LM48512 is designed to meet the demands of portable  
multimedia devices. The LM48512 features high efficiency  
compared to other boosted amplifiers and low EMI Class D  
amplifiers. The LM48512 is capable of driving an 8speaker  
to 5.5V levels (1.8W) from a 3.6V supply while operating at  
82% efficiency. Flexible power supply requirements allow op-  
eration from 2.3V to 5.5V. The E2S system features a patent-  
ed edge rate control (ERC) architecture that further reduces  
emissions by minimizing the high frequency component of the  
device output, while maintaining high quality audio reproduc-  
tion (THD+N = 0.03%) and high efficiency. A low power  
shutdown mode reduces supply current consumption to  
0.04μA.  
Features  
E2S System Reduces EMI while Preserving Audio Quality  
and Efficiency  
Integrated Boost Converter  
Supply Voltage Level Detection on Boost Converter  
Low Power Shutdown Mode  
"Click and Pop" suppression  
Applications  
Mobile phones  
Smart phones  
The LM48512 features a battery-saving automatic gain con-  
trol (AGC). The AGC detects the battery voltage and reduces  
the gain of the amplifier to limit the output as the battery volt-  
age decreases.  
PDAs  
Superior click and pop suppression eliminates audible tran-  
sients on power-up/down and during shutdown.  
Typical Application  
30121756  
FIGURE 1. Typical Audio Amplifier Application Circuit  
Boomer® is a registered trademark of National Semiconductor Corporation.  
© 2012 Texas Instruments Incorporated  
301217 SNAS497A  
www.ti.com  
Connection Diagrams  
TL Package  
2.098mm x 2.098mm x 0.6mm  
16 – Bump micro SMD Markings  
30121760  
Top View  
XY = Date Code  
TT = Die Traceability  
G = Boomer Family  
N3 = LM48512TL  
30121769  
Top View  
Order Number LM48512TL  
See NS Package Number TLA16QSA  
Pin Descriptions  
TABLE 1.  
PIN  
A1  
NAME  
PVDD  
PVOUT  
SW  
DESCRIPTION  
Amplifier Power Supply Input. Connect to PVOUT.  
Boost Converter Output  
A2  
A3  
Boost Converter Switching Node  
Boost Converter Power Ground  
Non-Inverting Amplifier Output  
A4  
PGND  
OUTA  
GAIN  
RTRIP  
VDD  
B1  
B2  
Gain Select Input  
B3  
Boost Supply Threshold Voltage Set Pin  
Power Supply  
B4  
C1  
OUTB  
PGND  
SDAMP  
GND  
Inverting Amplifier Output  
C2, D1  
C3  
Class D Power Ground  
Active Low Amplifier Shutdown Input. Connect to VDD for normal operation.  
Ground  
C4  
D2  
IN+  
Non-Inverting Amplifier Input  
D3  
IN-  
Inverting Amplifier Input  
Active Low Boost Converter Shutdown Input. Connect to VDD for normal operation.  
D4  
SDREG  
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2
Thermal Resistance  
ꢁθJA (TLA16QSA)  
Soldering Information  
See AN-1112 “Micro SMD Wafer Level Chip  
Scale Package”  
Absolute Maximum Ratings (Note 1, Note  
2)  
50°C/W  
If Military/Aerospace specified devices are required,  
please contact the Texas Instruments Sales Office/  
Distributors for availability and specifications.  
Supply Voltage (VDD) (Note 1)  
Storage Temperature  
Power Dissipation (Note 3)  
ESD Rating (Note 4)  
6.0V  
−65°C to +150°C  
Internally Limited  
2000V  
Operating Ratings  
Temperature Range  
TMIN TA TMAX  
Supply Voltage  
−40°C TA +85°C  
2.3V VDD 5.5V  
ESD Rating (Note 5)  
200V  
Junction Temperature  
150°C  
Electrical Characteristics VDD = 3.6V, PVDD = 5.75V (Note 1, Note 2)  
The following specifications apply for AV = 2V/V, L = 2.2μH, RL = 15μH + 8Ω + 15μH (Note 8), f = 1kHz, unless otherwise specified.  
Limits apply for TA = 25°C.  
LM48512  
Units  
Symbol  
VOS  
Parameter  
Conditions  
Typical  
(Note 6)  
3
Limit  
(Note 7)  
10  
(Limits)  
VIN = 0, VDD = 2.3V to 5.5V  
Differential Output Offset Voltage  
Quiescent Power Supply Current  
mV  
VIN = 0, RL = ∞  
VDD = 3.6V  
IDD  
19  
14.5  
8.5  
mA (max)  
mA  
Boost Converter Only  
SDREG = VDD  
SDAMP = GND  
PVOUT  
Boost Converter Output Voltage  
5.75  
0.04  
V
ISD  
Shutdown Current  
SDAMP = SDREG = GND  
1
μA (max)  
V (min)  
V (max)  
ms  
VIH  
Logic Input High Voltage  
Logic Input Low Voltage  
Wake Up Time  
1.35  
0.35  
VIL  
TWU  
fSW(AMP)  
9
Class D Switching Frequency  
320  
2
kHz  
GAIN = GND (<0.7V)  
GAIN = float (0.7V–1.0V)  
GAIN = VDD (>1.0V)  
±5%  
±5%  
±5%  
V/V (max)  
V/V (max)  
V/V (max)  
AV  
6
Gain  
10  
AV = 2V/V (6dB)  
kΩ  
kΩ  
kΩ (min)  
kΩ  
30  
15  
10  
AV = 6V/V (15.5dB)  
AV = 10V/V (20dB)  
RIN  
Input Resistance  
8
SDAMP = SDREG = GND  
70  
VCM  
VIN  
Input Common Mode  
Differential AC Input  
1.4  
V
VP-P (max)  
Device Enabled or Disabled  
5.6  
RL = 15μH+8Ω+15μH, THD+N = 10%  
f = 1kHz, 22kHz BW  
2.2  
1.8  
2.7  
W
W (min)  
W
RL = 15μH+8Ω+15μH, THD+N = 1%  
f = 1kHz, 22kHz BW  
PO  
Output Power  
1.7  
RL = 15μH+4Ω+15μH, THD+N = 1%  
f = 1kHz, 22kHz BW  
RL = 15μH+8Ω+15μH, f = 1kHz  
PO = 100mW  
0.03  
0.03  
%
%
PO = 1W  
THD+N  
Total Harmonic Distortion + Noise  
RL = 15μH+4Ω+15μH, f = 1kHz  
PO = 1W  
0.03  
%
3
www.ti.com  
LM48512  
Typical  
Units  
(Limits)  
Symbol  
Parameter  
Conditions  
Limit  
(Note 6)  
(Note 7)  
VRIPPLE = 200mVP-P Sine  
Inputs AC GND, Input referred  
CIN = 100nF, fRIPPLE = 217Hz  
90  
dB  
PSRR  
Power Supply Rejection Ratio  
VRIPPLE = 200mVP-P Sine  
Inputs AC GND, Input referred  
CIN = 100nF, fRIPPLE = 1kHz  
85  
65  
dB  
dB  
VRIPPLE = 1VP-P  
fRIPPLE = 217Hz  
CMRR  
Common Mode Rejection Ratio  
Efficiency  
RL = 15μH+8Ω+15μH, f = 1kHz  
PO = 400mW  
78  
82  
81  
%
%
%
η
PO = 800mW  
PO = 1.8W  
PO = 1.8W, A-weighted Filter  
Input referred, A-weighted Filter  
Input referred, Un-weighted  
SNR  
Signal-To-Noise-Ratio  
Output Noise  
97  
25  
50  
dB  
μV  
μV  
εOS  
RTRIP = 64.9kΩ  
RTRIP = 27.5kΩ  
RTRIP = 20kΩ  
3.00  
3.55  
3.70  
±5%  
±5%  
±5%  
V (max)  
V (max)  
V (max)  
VDD(TRIP)  
Supply Voltage AGC Trip Point  
Boost Converter Start-up Current  
Limit  
ILIMIT(SU)  
IIND  
600  
mA  
A
Boost Converter Maximum Inductor  
Current  
2.25  
Gain Compression Range  
Attack Time  
6
dB  
tA  
tR  
20  
μs/dB  
ms/dB  
Release Time  
1600  
Boost Converter Switching  
Frequency  
fSW(REG)  
2
MHz  
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability  
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in  
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the  
device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified.  
Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified  
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.  
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum  
allowable power dissipation is PDMAX = (TJMAX − TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower.  
Note 4: Human body model, applicable std. JESD22-A114C.  
Note 5: Machine model, applicable std. JESD22-A115-A.  
Note 6: Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product  
characterization and are not guaranteed.  
Note 7: Datasheet min/max specification limits are guaranteed by test or statistical analysis.  
Note 8: RL is a resistive load in series with two inductors to simulate an actual speaker load. For RL = 8Ω, the load is 15µH+8Ω+15µH. For RL = 4Ω, the load is  
15µH+4Ω+15µH.  
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4
 
 
 
 
 
 
 
 
Typical Performance Characteristics  
THD+N vs Frequency  
VDD = 3.6V, PO = 1W, RL = 8Ω  
THD+N vs Output Power  
VDD = 2.7V, RL = 8Ω, f = 1kHz  
30121778  
30121772  
THD+N vs Output Power  
VDD = 3.6V, RL = 4Ω, f = 1kHz  
THD+N vs Output Power  
VDD = 3.6V, RL = 8Ω, f = 1kHz  
30121775  
30121774  
THD+N vs Output Power  
VDD = 5.0V, RL = 8Ω, f = 1kHz  
Efficiency vs Output Power  
RL = 8Ω, f = 1kHz  
30121776  
30121779  
5
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CMRR vs Frequency  
VDD = 3.6V, f = 217Hz  
PSRR vs Frequency  
VDD = 3.6V, f = 1kHz  
VRIPPLE = 1VP-P, RL = 8Ω  
VRIPPLE = 200mVp-p, RL = 8Ω  
30121787  
30121786  
Power Dissipation vs Output Power  
Output Power vs Supply Voltage  
RL = 8Ω, f = 1kHz  
RL = 8Ω, f = 1kHz  
30121780  
30121789  
Supply Current vs Supply Voltage  
No Load  
Boost Output Voltage vs Load Current  
VDD = 2.7V  
30121783  
30121782  
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6
Boost Output Voltage vs Load Current  
VDD = 3.6V  
Boost Output Voltage vs Load Current  
VDD = 5.0V  
30121784  
30121785  
7
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Application Information  
GENERAL AMPLIFIER FUNCTION  
BOOST INPUT CAPACITOR SELECTION  
The LM48512 mono Class D audio power amplifier features  
a filterless modulation scheme that reduces external compo-  
nent count, conserving board space and reducing system  
cost. The outputs of the device transition from VDD to GND  
with a 300kHz switching frequency. With no signal applied,  
the outputs (VOUTA and VOUTB) switch with a 50% duty cycle,  
in phase, causing the two outputs to cancel. This cancellation  
results in no net voltage across the speaker, thus there is no  
current to the load in the idle state.  
An input capacitor is required to serve as an energy reservoir  
for the current which must flow into the coil each time the  
switch turns ON. The input capacitor will also help keep the  
noise low from the power supply. This capacitor must have  
extremely low ESR, so ceramic capacitors are recommend-  
ed. A nominal value of 10μF is recommended for this appli-  
cation.  
MAXIMUM CURRENT  
The boost converter of the LM48512 has two maximum cur-  
rent limits to prevent damage to the device and also battery  
shutdown when the current gets too high. First is the control  
of the start-up current, where the boost converter internally  
limits it to 600mA (ILIMIT(SU)). The second limit is on the induc-  
tor current, where it is typically internally limited to 2.25A.  
With the input signal applied, the duty cycle (pulse width) of  
the LM48512 outputs changes. For increasing output voltage,  
the duty cycle of VOUTA increases, while the duty cycle of  
VOUTB decreases. For decreasing output voltages, the con-  
verse occurs. The difference between the two pulse widths  
yields the differential output voltage.  
AUTOMATIC GAIN CONTROL AND AUTOMATIC LEVEL  
CONTROL  
ENHANCED EMISSIONS SUPPRESSION SYSTEM (E2S)  
The LM48512 features National’s patent-pending E2S system  
that reduces EMI, while maintaining high quality audio repro-  
duction and efficiency. The E2S system features advanced  
edge rate control (ERC), greatly reducing the high frequency  
components of the output square waves by controlling the  
output rise and fall times, slowing the transitions to reduce RF  
emissions, while maximizing THD+N and efficiency perfor-  
mance. The overall result of the E2S system is a filterless  
Class D amplifier that passes FCC Class B radiated emis-  
sions standards with 20in of twisted pair cable, with excellent  
0.03% THD+N and high 82% efficiency.  
The LM48512 features either Automatic Gain Control (AGC)  
or Automatic Level Control (ALC) by configuring the RTRIP pin  
B3. The settings are shown in Table 2.  
TABLE 2. Automatic Gain/Level Control Table  
RTRIP  
VDD  
Operation  
Disable AGC and ALC  
AGC  
Resistor  
GND  
ALC  
DIFFERENTIAL AMPLIFIER EXPLANATION  
Automatic Gain Control Operation  
As logic supplies continue to shrink, system designers are in-  
creasingly turning to differential analog signal handling to  
preserve signal to noise ratios with restricted supply level. The  
LM48512 features a fully differential speaker amplifier. A dif-  
ferential amplifier amplifies the difference between the two  
input signals. Traditional audio power amplifiers have typical-  
ly offered only single-ended inputs resulting in a 6dB reduc-  
tion of SNR relative to differential inputs. The LM48512 also  
offers the possibility of DC input coupling which eliminates the  
input coupling capacitors. A major benefit of the fully differ-  
ential amplifier is the improved common mode rejection ratio  
(CMRR) over single ended input amplifiers. The increased  
CMRR of the differential amplifier reduces sensitivity to  
ground offset related noise injection, especially important in  
noisy systems.  
The AGC circuitry is designed to limit the output swing to the  
load for speaker protection and to prolong battery life. When  
RTRIP is connected to a resistor, AGC activates by detecting  
the VDD level in combination with the input level. The user can  
set the VDD level (VDD(TRIP)) at which AGC trips by connecting  
different resistor values (RTRIP) to ground, refer to Table 3.  
TABLE 3. AGC Table  
VDD(TRIP) (V)  
RTRIP (kΩ)  
20.0  
3.7  
3.6  
3.55  
3.5  
3.4  
3.3  
3.2  
3.1  
3.0  
2.9  
2.8  
24.8  
27.5  
30.3  
36.3  
When evaluating the LM48512, use BAL-GND inputs and  
provide clean grounding to ensure proper operation.  
42.8  
49.7  
SYNCHRONOUS RECTIFIER  
57.1  
The LM48512 uses an internal synchronous series switch in  
place of an external Schottcky diode, which reduces the num-  
ber of external components required for its application. Effi-  
ciency is also increased since the power dissipation of the  
switch is less than the power dissipation of a diode.  
64.9  
73.2  
82.0  
Once VDD drops below the VDD(TRIP) voltage set by RTRIP, AGC  
operation begins. While AGC is in operation, VDD sets the  
output swing as shown in Figure 2.  
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30121702  
FIGURE 2. AGC Output Swing vs Supply Voltage Graph  
If output swing of the amplifier exceeds the limit determined  
by VDD, gain of the amplifier will be adjusted accordingly.  
Release: AGC releases at increments of 0.5dB steps per  
every 800ms if the output does not reach the output swing  
limit.  
See Figure 3 for the following:  
Adjusting: While the part is in compression mode, the first  
attack following a release is at increments of 0.5dB steps, this  
is also referred to as Adjusting.  
Attack: AGC attack occurs at increments of -1dB steps ev-  
ery 20μs until the output is below the output swing limit or  
when it reaches the maximum gain compression of -6dB.  
30121759  
FIGURE 3. AGC Operation  
Automatic Level Control  
output limit swing of the amplifier will be limited to 90% of  
PVOUT, with the same Attack, Release, and Adjusting char-  
acteristics as the AGC.  
The ALC circuitry is similar to AGC in that it also limits the  
output swing of the amplifier, but the difference is that ALC is  
always activated once the RTRIP pin is connected to GND. The  
9
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POWER DISSIPATION AND EFFICIENCY  
tors as close to the device as possible. A 10μF and a 1μF  
bypass capacitors are recommended to increase supply sta-  
bility.  
The major benefit of a Class D amplifier is increased efficiency  
versus a Class AB. The efficiency of the LM48512 is attributed  
to the region of operation of the transistors in the output stage.  
The Class D output stage acts as current steering switches,  
consuming negligible amounts of power compared to their  
Class AB counterparts. Most of the power loss associated  
with the output stage is due to the IR loss of the MOSFET on-  
resistance, along with switching losses due to gate charge.  
AUDIO AMPLIFIER INPUT CAPACITOR SELECTION  
Input capacitors may be required for some applications, or  
when the audio source is single-ended. Input capacitors block  
the DC component of the audio signal, eliminating any conflict  
between the DC component of the audio source and the bias  
voltage of the LM48512. The input capacitors create a high-  
pass filter with the input resistors RIN. The -3dB point of the  
high pass filter is found using Equation 1 below.  
SHUTDOWN FUNCTION  
The LM48512 features a low current shutdown mode. Set  
SDREG = SDAMP = GND to disable the amplifier and reduce  
supply current to 0.04μA.  
Switch SDREG and SDAMP between GND and VDD for min-  
imum current consumption is shutdown. The LM48512 may  
be disabled with shutdown voltages in between GND and  
VDD, the idle current will be greater than the typical 0.1μA val-  
ue. Increased THD+N may also be observed when a voltage  
of less than VDD is applied to SDREG and SDAMP.  
f = 1 / 2πRINCIN  
(1)  
Where RIN is the value of the input resistor given in the Elec-  
trical Characteristics table.  
The input capacitors can also be used to remove low fre-  
quency content from the audio signal. Small speakers cannot  
reproduce, and may even be damaged by low frequencies.  
High pass filtering the audio signal helps protect the speakers.  
When the LM48512 is using a single-ended source, power  
supply noise on the ground is seen as an input signal. Setting  
the high-pass filter point above the power supply noise fre-  
quencies (for example, 217Hz in a GSM phone), filters out the  
noise such that it is not amplified and heard on the output.  
Capacitors with a tolerance of 10% or better are recommend-  
ed for impedance matching and improved CMRR and PSRR.  
PROPER SELECTION OF EXTERNAL COMPONENTS  
Inductor Selection  
The LM48512 is designed to use a 2.2μH inductor. When the  
boost converter is boosting, the inductor will typically be the  
biggest area of efficiency loss in the boost converter circuitry,  
therefore, choosing an inductor with the lowest possible se-  
ries resistance is important. In addition to the series resis-  
tance, the saturation rating of the inductor should also be  
greater than the maximum operating peak current.  
AUDIO AMPLIFIER GAIN  
The LM48512 features three logic configured gain settings.  
The device gain is selected through the GAIN input. The gain  
settings are as shown in Table 4.  
Boost Output Capacitor Selection  
The boost converter in the LM48512 is designed to operate  
with a 22μF ceramic output capacitor. When the boost con-  
verter is running, the output capacitor supplies the load cur-  
rent during the boost converter on-time. When the NMOS  
switch turns off, the inductor energy is discharged through the  
internal PMOS switch, supplying power to the load and restor-  
ing charge to the output capacitor. This causes a sag in the  
output voltage (PVOUT) during the on-time and a rise in the  
output voltage during the off-time. The output capacitor is  
chosen to limit this output ripple and to ensure the converter  
remains stable.  
TABLE 4. Gain Settings  
AV  
6dB  
GAIN pin input  
GND (<0.7V)  
Float (0.7V–1.0V)  
VDD (>1.0V)  
15.5dB  
20dB  
AUDIO AMPLIFIER POWER SUPPLY BYPASSING/  
FILTERING  
Proper power supply bypassing is critical for low noise per-  
formance and high PSRR. Place the supply bypass capaci-  
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10  
 
 
SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION  
One thing to note is that the Differential AC Input specification  
of 5.6VP-P (max) will be 2.8VP-P in the Single-Ended applica-  
tion. Figure 4 shows the typical single-ended applications  
circuit.  
The LM48512 is compatible with single-ended sources. When  
configured for single-ended inputs, input capacitors must be  
used to block and DC component at the input of the device.  
30121770  
FIGURE 4. Single-Ended Input Configuration  
PCB LAYOUT GUIDELINES  
As output power increases, interconnect resistance (PCB  
traces and wires) between the amplifier, load and power sup-  
ply create a voltage drop. The voltage loss due to the traces  
between the LM48512 and the load results in lower output  
power and decreased efficiency. Higher trace resistance be-  
tween the supply and the LM48512 has the same effect as a  
poorly regulated supply, increasing ripple on the supply line,  
and reducing peak output power. The effects of residual trace  
resistance increases as output current increases due to high-  
er output power, decreased load impedance or both. To main-  
tain the highest output voltage swing and corresponding peak  
output power, the PCB traces that connect the output pins to  
the load and the supply pins to the power supply should be  
as wide as possible to minimize trace resistance.  
use of power planes creates parasitic capacitors that help to  
filter the power supply line.  
The inductive nature of the transducer load can also result in  
overshoot on one of both edges, clamped by the parasitic  
diodes to GND and VDD in each case. From an EMI stand-  
point, this is an aggressive waveform that can radiate or  
conduct to other components in the system and cause inter-  
ference. In is essential to keep the power and output traces  
short and well shielded if possible. Use of ground planes  
beads and micros-strip layout techniques are all useful in pre-  
venting unwanted interference.  
As the distance from the LM48512 and the speaker increases,  
the amount of EMI radiation increases due to the output wires  
or traces acting as antennas become more efficient with  
length. Ferrite chip inductors places close to the LM48512  
outputs may be needed to reduce EMI radiation.  
The use of power and ground planes will give the best THD  
+N performance. In addition to reducing trace resistance, the  
11  
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LM48512 Demo Board Schematic  
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12  
Demo Boards  
30121766  
30121767  
FIGURE 9. Top Silkscreen  
FIGURE 10. Top Layer  
30121763  
30121764  
FIGURE 11. Layer 2 (GND)  
FIGURE 12. Layer 3 (VDD )  
30121762  
30121765  
FIGURE 13. Bottom Layer  
FIGURE 14. Bottom Silkscreen  
13  
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Revision History  
Rev  
1.0  
Date  
Description  
04/09/12  
Initial WEB released.  
www.ti.com  
14  
Physical Dimensions inches (millimeters) unless otherwise noted  
micro SMD  
Order Number LM48512TL  
NS Package Number TLA16QSA  
X1 = 2.098mm, X2 = 2.098mm, X3 = 0.6mm  
15  
www.ti.com  
Notes  
www.ti.com  
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