LM4878ITP/NOPB [TI]
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OBSOLETE
LM4878
www.ti.com
SNAS056D –OCTOBER 2000–REVISED APRIL 2013
LM4878 Boomer® Audio Power Amplifier Series 1 Watt Audio Power Amplifier in micro
SMD package with Shutdown Logic Low
Check for Samples: LM4878
1
FEATURES
DESCRIPTION
The LM4878 is a bridge-connected audio power
amplifier capable of delivering 1 W of continuous
average power to an 8Ω load with less than .2%
(THD) from a 5V power supply.
2
•
Internal Pulldown Resistor on Shutdown.
Micro SMD Package (see App. Note AN-1112)
5V - 2V Operation
•
•
•
No Output Coupling Capacitors or Bootstrap
Capacitors
Boomer audio power amplifiers were designed
specifically to provide high quality output power with a
minimal amount of external components. Since the
LM4878 does not require output coupling capacitors
or bootstrap capacitors. It is optimally suited for low-
power portable applications.
•
•
Unity-Gain Stable
External Gain Configuration Capability
APPLICATIONS
The LM4878 features an externally controlled, low-
power consumption shutdown mode, as well as an
internal thermal shutdown protection mechanism.
•
•
•
Cellular Phones
Portable Computers
Low Voltage Audio Systems
The unity-gain stable LM4878 can be configured by
external gain-setting resistors.
KEY SPECIFICATIONS
•
•
Power Output at 0.2% THD: 1 W (typ)
Shutdown Current: 0.01 µA (typ)
Typical Application
Figure 1. Typical Audio Amplifier Application Circuit
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
OBSOLETE
LM4878
SNAS056D –OCTOBER 2000–REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
CONNECTION DIAGRAM
8 Bump micro SMD
(Top View)
See Package Number YPB0008
X - Date Code, T - Die Traceability, G - Boomer Family, D - LM4878IBP
Figure 2. micro SMD Marking (Top View)
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ABSOLUTE MAXIMUM RATINGS(1)(2)
Supply Voltage
6.0V
−65°C to +150°C
−0.3V to VDD +0.3V
Internally Limited
2500V
Storage Temperature
Input Voltage
Power Dissipation(3)
ESD Susceptibility(4)
ESD Susceptibility(5)
250V
Junction Temperature
150°C
Soldering Information
See AN-1112 "Micro-SMD Wafers Level Chip Scale Package".
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever
is lower. For the LM4878, TJMAX = 150°C. The typical junction-to-ambient thermal resistance is 150°C/W.
(4) Human body model, 100 pF discharged through a 1.5 kΩ resistor.
(5) Machine Model, 220 pF–240 pF discharged through all pins.
OPERATING RATINGS
Temperature Range
T
MIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ 85°C
2.0V ≤ VDD ≤ 5.5V
Supply Voltage
ELECTRICAL CHARACTERISTICS VDD = 5V(1)(2)(3)
The following specifications apply for VDD = 5V and 8Ω Load unless otherwise specified. Limits apply for TA = 25°C.
LM4878
Units
(Limits)
Symbol
Parameter
Conditions
Typical
Limit
(5)
(4)
VDD
Supply Voltage
2.0
5.5
7
V (min)
V (max)
mA (max)
µA (max)
mV (max)
W
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A
5.3
0.01
5
ISD
VPIN5 = 0V
2
VOS
Po
Output Offset Voltage
Output Power
VIN = 0V
50
THD = 0.2% (max); f = 1 kHz
1
THD+N
Total Harmonic Distortion+Noise
Po = 0.25 Wrms; AVD = 2; 20 Hz ≤ f ≤
0.1
%
20 kHz
PSRR
Power Supply Rejection Ratio
VDD = 4.9V to 5.1V
65
dB
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a maximum of 2µA.
(4) Typicals are measured at 25°C and represent the parametric norm.
(5) Limits are ensured to AOQL (Average Outgoing Quality Level).
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ELECTRICAL CHARACTERISTICS VDD = 3.3V(1)(2)(3)
The following specifications apply for VDD = 3.3V and 8Ω Load unless otherwise specified. Limits apply for TA = 25°C.
LM4878
Units
(Limits)
Symbol
Parameter
Conditions
Typical
Limit
(5)
(4)
VDD
Supply Voltage
2.0
5.5
V (min)
V (max)
mA (max)
µA (max)
mV (max)
W
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A
4
0.01
5
ISD
VPIN5 = 0V
VOS
Po
Output Offset Voltage
Output Power
VIN = 0V
THD = 1% (max); f = 1 kHz
.5
.45
THD+N
Total Harmonic Distortion+Noise
Po = 0.25 Wrms; AVD = 2; 20 Hz ≤ f ≤
0.15
%
20 kHz
PSRR
Power Supply Rejection Ratio
VDD = 3.2V to 3.4V
65
dB
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a maximum of 2µA.
(4) Typicals are measured at 25°C and represent the parametric norm.
(5) Limits are ensured to AOQL (Average Outgoing Quality Level).
ELECTRICAL CHARACTERISTICS VDD = 2.6V(1)(2)(3)(4)
The following specifications apply for VDD = 2.6V and 8Ω Load unless otherwise specified. Limits apply for TA = 25°C.
LM4878
Units
Symbol
Parameter
Conditions
Typical
Limit
(Limits)
(5)
(6)
VDD
Supply Voltage
2.0
5.5
V (min)
V (max)
IDD
ISD
VOS
P0
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A
3.4
0.01
5
mA (max)
µA (max)
mV (max)
VPIN5 = 0V
VIN = 0V
Output Offset Voltage
Output Power ( 8Ω )
Output Power ( 4Ω )
THD = 0.3% (max); f = 1 kHz THD =
0.5% (max); f = 1 kHz
0.25
0.5
W
W
THD+N
PSRR
Total Harmonic Distortion+Noise
Po = 0.25 Wrms; AVD = 2; 20 Hz ≤ f ≤
20 kHz
0.25
%
Power Supply Rejection Ratio
VDD = 2.5V to 2.7V
65
dB
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Low Voltage Circuit - See Figure 25
(4) Shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a maximum of 2µA.
(5) Typicals are measured at 25°C and represent the parametric norm.
(6) Limits are ensured to AOQL (Average Outgoing Quality Level).
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SNAS056D –OCTOBER 2000–REVISED APRIL 2013
ELECTRICAL CHARACTERISTICS VDD = 5/3.3/2.6V SHUTDOWN INPUT
LM4878
Units
(Limits)
Symbol
Parameter
Conditions
Typical
Limit
1.2
VIH
VIL
Shutdown Input Voltage High
Shutdown Input Voltage Low
V(min)
V(max)
0.4
External Components Description
(Figure 1)
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high pass
filter with Ci at fC= 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter with
Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components, for an explanation of how to
determine the value of Ci.
3.
4.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for
information concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
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TYPICAL PERFORMANCE CHARACTERISTICS
THD+N vs Frequency at 5V and 8Ω
THD+N vs Frequency at 3.3V and 8Ω
Figure 3.
Figure 4.
THD+N vs Frequency at 2.6V and 8Ω
THD+N vs Frequency at 2.6V and 4Ω
Figure 5.
Figure 6.
THD+N vs Output Power @ VDD = 5V
THD+Nvs Output Power @ VDD = 3.3V
Figure 7.
Figure 8.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
THD+N vs Output Power 2.6V at 8Ω
THD+N vs Output Power 2.6V at 4Ω
Figure 9.
Figure 10.
Output Power vs Supply Voltage
Output Power vs Load Resistance
Figure 11.
Figure 12.
Power Dissipation vs Output Power
VDD = 5V
Power Derating Curve
Figure 13.
Figure 14.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Power Dissipation vs Output Power
VDD = 3.3V
Power Dissipation vs Output Power
VDD = 2.6V
Figure 15.
Figure 16.
Supply Current vs Shutdown Voltage
LM4878 @ VDD = 5/3.3/2.6Vdc
Clipping Voltage vs Supply Voltage
Figure 17.
Figure 18.
Frequency Response vs Input Capacitor Size
Power Supply Rejection Ratio
Figure 19.
Figure 20.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Open Loop Frequency Response
Noise Floor
Figure 21.
Figure 22.
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APPLICATION INFORMATION
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4878 has two operational amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier's gain is externally configurable, while the second amplifier is internally fixed in
a unity-gain, inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of Rf to
Ri while the second amplifier's gain is fixed by the two internal 10 kΩ resistors. Figure 1 shows that the output of
amplifier one serves as the input to amplifier two which results in both amplifiers producing signals identical in
magnitude, but out of phase by 180°. Consequently, the differential gain for the IC is
AVD= 2 *(Rf/Ri)
(1)
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier
configuration where one side of its load is connected to ground.
A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides
differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable
output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-
loop gain without causing excessive clipping, please refer to the AUDIO POWER AMPLIFIER DESIGN section.
A bridge configuration, such as the one used in LM4878, also creates a second advantage over single-ended
amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across
the load. This eliminates the need for an output coupling capacitor which is required in a single supply, single-
ended amplifier configuration. Without an output coupling capacitor, the half-supply bias across the load would
result in both increased internal IC power dissipation and also possible loudspeaker damage.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an
increase in internal power dissipation. Since the LM4878 has two operational amplifiers in one package, the
maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power dissipation
for a given application can be derived from the power dissipation graphs or from Equation 1.
PDMAX = 4*(VDD)2/(2π2RL)
(2)
It is critical that the maximum junction temperature TJMAX of 150°C is not exceeded. TJMAX can be determined
from the power derating curves by using PDMAX and the PC board foil area. By adding additional copper foil, the
thermal resistance of the application can be reduced from a free air value of 150°C/W, resulting in higher PDMAX
.
Additional copper foil can be added to any of the leads connected to the LM4878. It is especially effective when
connected to VDD, GND, and the output pins. Refer to the application information on the LM4878 reference design
board for an example of good heat sinking. If TJMAX still exceeds 150°C, then additional changes must be made.
These changes can include reduced supply voltage, higher load impedance, or reduced ambient temperature.
The TI Reference Design board using a 5V supply and an 8 ohm load will run in a 110°C ambient environment
without exceeding TJMAX. Internal power dissipation is a function of output power. Refer to the TYPICAL
PERFORMANCE CHARACTERISTICS curves for power dissipation information for different output powers and
output loading.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as
possible. Typical applications employ a 5V regulator with 10 µF Tantalum or electrolytic capacitor and a 0.1 µF
bypass capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of
the LM4878. The selection of a bypass capacitor, especially CB, is dependent upon PSRR requirements, click
and pop performance as explained in the section PROPER SELECTION OF EXTERNAL COMPONENTS,
system cost, and size constraints.
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SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM4878 contains a shutdown pin to externally turn off
the amplifier's bias circuitry. This shutdown feature turns the amplifier off when a logic low is placed on the
shutdown pin. The shutdown pin on the LM4878 has an internal 54K resistor connected to ground that enables
the shutdown feature even if the shutdown pin is not connected to ground. By switching the shutdown pin to
ground, the LM4878 supply current draw will be minimized in idle mode. While the device will be disabled with
shutdown pin voltages less than 0.4VDC, the idle current may be greater than the typical value of 0.01 µA.
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry which
provides a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch to
VDD. When the switch is closed, the shutdown pin is connected to VDD which enables the amplifier. This scheme
ensures that the shutdown pin will not float thus preventing unwanted state changes. J1 operates the shutdown
function as shown in the Applications Circuit Figure 23. J1 must be installed to operate the part. A switch may be
installed in place of J1 for easier evaluation of the shutdown function.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical to optimize
device and system performance. While the LM4878 is tolerant of external component combinations,
consideration to component values must be used to maximize overall system quality.
The LM4878 is unity-gain stable which gives a designer maximum system flexibility. The LM4878 should be used
in low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain
configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1
Vrms are available from sources such as audio codecs. Please refer to the section, AUDIO POWER AMPLIFIER
DESIGN, for a more complete explanation of proper gain selection.
Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the
bandwidth is dictated by the choice of external components shown in Figure 1. The input coupling capacitor, Ci,
forms a first order high pass filter which limits low frequency response. This value should be chosen based on
needed frequency response for a few distinct reasons.
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized
capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers
used in portable systems, whether internal or external, have little ability to reproduce signals below 100 Hz to
150 Hz. Thus, using a large input capacitor may not increase actual system performance.
In addition to system cost and size, click and pop performance is effected by the size of the input coupling
capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally
1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable.
Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be
minimized.
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value.
Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the
LM4878 turns on. The slower the LM4878's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the
smaller the turn-on pop. Choosing CB equal to 1.0 µF along with a small value of Ci (in the range of 0.1 µF to
0.39 µF), should produce a virtually clickless and popless shutdown function. While the device will function
properly, (no oscillations or motorboating), with CB equal to 0.1 µF, the device will be much more susceptible to
turn-on clicks and pops. Thus, a value of CB equal to 1.0 µF is recommended in all but the most cost sensitive
designs.
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LOW VOLTAGE APPLICATIONS ( BELOW 3.0 VDD
)
The LM4878 will function at voltages below 3 volts but this mode of operation requires the addition of a 1kΩ
resistor from each of the differential output pins ( pins 8 and 4 ) directly to ground. The addition of the pair of 1kΩ
resistors ( R4 & R5 ) assures stable operation below 3 Volt Vdd operation. The addition of the two resistors will
however increase the idle current by as much as 5mA. This is because at 0v input both of the outputs of the
LM4878's 2 internal opamps go to 1/2 VDD ( 2.5 volts for a 5v power supply ), causing current to flow through the
1K resistors from output to ground. See Figure 23.
Jumper options have been included on the reference design, Figure 23, to accommodate the low voltage
application. J2 & J3 connect R4 and R5 to the outputs.
AUDIO POWER AMPLIFIER DESIGN
A 1W/8Ω Audio Amplifier
Given:
Power Output
Load Impedance
Input Level
1 Wrms
8Ω
1 Vrms
Input Impedance
Bandwidth
20 kΩ
100 Hz–20 kHz ± 0.25 dB
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating
from the Output Power vs Supply Voltage graphs in the TYPICAL PERFORMANCE CHARACTERISTICS
section, the supply rail can be easily found. A second way to determine the minimum supply rail is to calculate
the required Vopeak using Equation 2 and add the output voltage. Using this method, the minimum supply voltage
would be (Vopeak + (VOD + VODBOT)), where V
and VOD are extrapolated from the Dropout Voltage vs
TOP
BOT
OD
TOP
Supply Voltage curve in the TYPICAL PERFORMANCE CHARACTERISTICS section.
(3)
Using the Output Power vs Supply Voltage graph for an 8Ω load, the minimum supply rail is 4.6V. But since 5V is
a standard voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates headroom
that allows the LM4878 to reproduce peaks in excess of 1W without producing audible distortion. At this time, the
designer must make sure that the power supply choice along with the output impedance does not violate the
conditions explained in the POWER DISSIPATION section.
Once the power dissipation equations have been addressed, the required differential gain can be determined
from Equation 4.
(4)
Rf/Ri = AVD/2
(5)
From Equation 3, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20 kΩ, and with a AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results
in an allocation of Ri = 20 kΩ and Rf = 30 kΩ. The final design step is to address the bandwidth requirements
which must be stated as a pair of −3 dB frequency points. Five times away from a −3 dB point is 0.17 dB down
from passband response which is better than the required ±0.25 dB specified.
fL = 100 Hz/5 = 20 Hz
fH = 20 kHz * 5 = 100 kHz
As stated in the External Components Description section, Ri in conjunction with Ci create a highpass filter.
Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF
The high frequency pole is determined by the product of the desired frequency pole, fH, and the differential gain,
AVD. With a AVD = 3 and fH = 100 kHz, the resulting GBWP = 150 kHz which is much smaller than the LM4878
GBWP of 4 MHz. This figure displays that if a designer has a need to design an amplifier with a higher
differential gain, the LM4878 can still be used without running into bandwidth limitations.
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Figure 23. Higher Gain Audio Amplifier
The LM4878 is unity-gain stable and requires no external components besides gain-setting resistors, an input
coupling capacitor, and proper supply bypassing in the typical application. However, if a closed-loop differential
gain of greater than 10 is required, a feedback capacitor may be needed as shown in to bandwidth limit the
amplifier. This feedback capacitor creates a low pass filter that eliminates possible high frequency oscillations.
Care should be taken when calculating the -3dB frequency. An incorrect combination of R3 and C4 can cause a
frequency roll off below 20kHz. A typical combination of feedback resistor and capacitor that will not produce
audio band high frequency rolloff is R3 = 20kΩ and C4 = 25pf. These components result in a -3dB point of
approximately 320 kHz. It is not recommended that the feedback resistor and capacitor be used to implement a
band limiting filter below 100kHZ.
Figure 24. Differential Amplifier Configuration for LM4878
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Silk Screen
Top Layer
Bottom Layer
Inner Layer VDD
Inner Layer Ground
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Figure 25. Reference Design Board and PCB Layout Guidelines
Table 1. Mono LM4878 Reference Design Board - Assembly Part Number: 980011207-100 Revision: A Bill
of Material
Item
Part Number
Part Description
Qty
Ref Designator
1
551011208-001
LM4878 Mono Reference Design
Board PCB etch 001
1
1
10
482911183-001
LM4878 Audio AMP micro SMD 8
Bumps
U1
20
21
25
151911207-001
151911207-002
152911207-001
Cer Cap 0.1uF 50V +80/-20% 1206
Cer Cap 0.39uF 50V Z5U 20% 1210
1
1
1
C1
C2
C3
Tant Cap 1uF 16V 10% Size=A
3216
30
31
35
472911207-001
472911207-002
210007039-002
Res 20K Ohm 1/10W 5% 0805
Res 1K Ohm 1/10W 5% 0805
3
2
3
R2, R3
R4, R5,
J1, J2, J3
Jumper Header Vertical Mount 2X1
0.100
36
210007582-001
Jumper Shunt 2 position 0.100
3
PCB Layout Guidelines
This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power
and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual
results will depend heavily on the final layout.
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General Mixed Signal Layout Recommendation
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the digital power and ground trace paths from the
analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central
point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal
performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even
device. This technique will take require a greater amount of design time but will not increase the final price of the
board. The only extra parts required will be some jumpers.
Single-Point Power / Ground Connections
The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can
be helpful in minimizing High Frequency noise coupling between the analog and digital sections. It is further
recommended to put digital and analog power traces over the corresponding digital and analog ground traces to
minimize noise coupling.
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces should be located as far away as possible from the
analog components and the analog circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB
layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90
degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise
coupling and cross talk.
16
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Product Folder Links: LM4878
OBSOLETE
LM4878
www.ti.com
SNAS056D –OCTOBER 2000–REVISED APRIL 2013
REVISION HISTORY
Changes from Revision C (April 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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