LM4893MAX/NOPB [TI]
IC,AUDIO AMPLIFIER,SINGLE,SOP,8PIN,PLASTIC;
| 型号： | LM4893MAX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC,AUDIO AMPLIFIER,SINGLE,SOP,8PIN,PLASTIC 放大器 光电二极管 商用集成电路 |
| 文件： | 总22页 (文件大小：701K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 2004
LM4893
1.1 Watt Audio Power Amplifier
General Description
Key Specifications
The LM4893 is an audio power amplifier primarily designed
for demanding applications in mobile phones and other por-
table communication device applications. It is capable of
delivering 1.1 watt of continuous average power to an 8Ω
BTL load with less than 1% distortion (THD+N) from a 5VDC
power supply.
j
j
j
j
Improved PSRR at 5V, 3V, & 217Hz
62dB (typ)
1.1W (typ)
Higher Power Output at 5V & 1% THD
Higher Power Output at 3V & 1% THD 350mW (typ)
Shutdown Current 0.1µA (typ)
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4893 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for lower-power portable applications where
minimal space and power consumption are primary require-
ments.
Features
n No output coupling capacitors, snubber networks or
bootstrap capacitors required
n Unity gain stable
n Ultra low current shutdown mode
n Instantaneous turn-on time
The LM4893 features a low-power consumption global shut-
down mode, which is achieved by driving the shutdown pin
with logic low. Additionally, the LM4893 features an internal
thermal shutdown protection mechanism.
n BTL output can drive capacitive loads up to 100pF
n Advanced pop & click circuitry eliminates noises during
turn-on and turn-off transitions
n 2.2V - 5.5V operation
n Available in space-saving µSMD, SO, and MSOP
packages
The LM4893 contains advanced pop & click circuitry which
eliminates noises which would otherwise occur during
turn-on and turn-off transitions.
The LM4893 is unity-gain stable and can be configured by
external gain-setting resistors.
Applications
n Mobile Phones
n PDAs
n Portable electronic devices
Typical Application
20038001
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS200380
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Connection Diagrams
9 Bump micro SMD Marking
9 Bump micro SMD
20038087
Top View
X - Date Code
T - Die Traceability
G - Boomer Family
93 - LM4893ITL
20038086
Top View
SO Marking
Order Number LM4893ITL, LM4893ITLX
See NS Package Number TLA09AAA
Small Outline (SO) Package
20038092
Top View
XY - Date Code
TT - Die Traceability
Bottom 2 lines - Part Number
20038091
Top View
MSOP Marking
Order Number LM4893MA
See NS package Number M08A
Mini Small Outline (MSOP) Package
20038085
Top View
G - Boomer Family
93 - LM4893MM
20038084
Top View
NC = No Connect
Order Number LM4893MM
See NS Package Number MUB10A
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2
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
θJA (TLA09AAA)
θJC (MUB10A)
θJA (MUB10A)
θJC (M08A)
180˚C/W (Note 10)
56˚C/W
190˚C/W
35˚C/W
Supply Voltage (Note 9)
Storage Temperature
Input Voltage
6.0V
−65˚C to +150˚C
−0.3V to VDD +0.3V
Internally Limited
2000V
θJA (M08A)
150˚C/W
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
Power Dissipation (Note 3)
ESD Susceptibility (Note 4)
ESD Susceptibility (Note 5)
Junction Temperature
Thermal Resistance
−40˚C ≤ TA ≤ 85˚C
2.2V ≤ VDD ≤ 5.5V
200V
150˚C
Electrical Characteristics VDD = 5V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25˚C.
LM4893
Units
(Limits)
Symbol
IDD
Parameter
Conditions
VIN = 0V, 8Ω BTL
Typical
Limit
(Note 6)
(Notes 7, 8)
Quiescent Power Supply Current
Shutdown Current
5
0.1
10
2.0
40
mA (max)
µA (max)
mV (max)
W (min)
%
ISD
Vshutdown = GND
VOS
Po
Output Offset Voltage
Output Power
5
THD = 1% (max); f = 1kHz
Po = 0.4Wrms; f = 1kHz
Vripple = 200mVsine p-p, CB
1.0µF
1.1
0.9
THD+N
Total Harmonic Distortion+Noise
0.1
=
68 (f = 1kHz)
62 (f =
217Hz)
PSRR
Power Supply Rejection Ratio
55
dB (min)
Input terminated with 10Ω to
ground
VSDIH
VSDIL
Shutdown High Input Voltage
Shutdown Low Input Voltage
1.4
0.4
V (min)
V (max)
A-Weighted; Measured across 8Ω
BTL
NOUT
Output Noise
26
µVRMS
Input terminated with 10Ω to
ground
Electrical Characteristics VDD = 3.0V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25˚C.
LM4893
Units
(Limits)
Symbol
IDD
Parameter
Conditions
VIN = 0V, 8Ω BTL
Typical
(Note 6)
4.5
Limit
(Notes 7, 8)
Quiescent Power Supply Current
Shutdown Current
9
mA (max)
µA (max)
mV (max)
mW
ISD
Vshutdown = GND
0.1
2.0
40
VOS
Po
Output Offset Voltage
Output Power
5
THD = 1% (max); f = 1kHz
Po = 0.15Wrms; f = 1kHz
Vripple = 200mVsine p-p, CB
1.0µF
350
320
THD+N
Total Harmonic Distortion+Noise
0.1
%
=
68 (f = 1kHz)
62 (f =
217Hz)
PSRR
Power Supply Rejection Ratio
55
dB (min)
Input terminated with 10Ω to
ground
VSDIH
VSDIL
Shutdown High Input Voltage
Shutdown Low Input Voltage
1.4
0.4
V (min)
V (max)
3
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Electrical Characteristics VDD = 3.0V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA
25˚C. (Continued)
=
LM4893
Units
(Limits)
Symbol
Parameter
Conditions
Typical
Limit
(Note 6)
(Notes 7, 8)
A-Weighted; Measured across 8Ω
BTL
NOUT
Output Noise
26
µVRMS
Input terminated with 10Ω to
ground
Electrical Characteristics VDD = 2.6V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25˚C.
LM4893
Units
(Limits)
Symbol
IDD
Parameter
Conditions
VIN = 0V, 8Ω BTL
Typical
(Note 6)
3.5
Limit
(Notes 7, 8)
Quiescent Power Supply Current
Shutdown Current
mA
µA
ISD
Vshutdown = GND
0.1
VOS
Output Offset Voltage
5
mV
THD = 1% (max); f = 1kHz
RL = 8Ω
Po
Output Power
250
350
mW
%
RL = 4Ω
THD+N
Total Harmonic Distortion+Noise
Po = 0.1Wrms; f = 1kHz
Vripple = 200mVsine p-p, CB
1.0µF
0.1
=
55 (f = 1kHz)
55 (f =
217Hz)
PSRR
Power Supply Rejection Ratio
dB
Input terminated with 10Ω to
ground
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
A
JMAX JA
allowable power dissipation is P
= (T
–T )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4893, see power derating
DMAX
JMAX A JA
curves for additional information.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Machine Model, 220pF–240pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I by a maximum of 2µA.
SD
Note 9: If the product is in shutdown mode, and V exceeds 6V (to a max of 8V V ), then most of the excess current will flow through the ESD protection circuits.
DD
DD
If the source impedance limits the current to a max of 10ma, then the part will be protected. If the part is enabled when V
be curtailed or the part may be permanently damaged.
is above 6V, circuit performance will
DD
Note 10: All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance.
Note 11: Maximum power dissipation (P
) in the device occurs at an output power level significantly below full output power. P
can be calculated using
DMAX
DMAX
Equation 1 shown in the Application section. It may also be obtained from the power dissipation graphs.
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4
External Components Description
(Figure 1)
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with Ci at fC= 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
3.
4.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
5.
CB
Typical Performance Characteristics
THD+N vs Frequency
THD+N vs Frequency
at VDD = 5V, 8Ω RL, and PWR = 250mW
at VDD = 3.0V, 8Ω RL, and PWR = 150mW
20038037
20038038
THD+N vs Frequency
THD+N vs Frequency
at VDD = 2.6V, 8Ω RL, and PWR = 100mW
at VDD = 2.6V, 4Ω RL, and PWR = 100mW
20038039
20038040
5
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Typical Performance Characteristics (Continued)
THD+N vs Power Out
VDD = 5V, 8Ω RL, 1kHz
THD+N vs Power Out
VDD = 3.0V, 8Ω RL, 1kHz
@
@
20038041
20038042
THD+N vs Power Out
VDD = 2.6V, 8Ω RL, 1kHz
THD+N vs Power Out
VDD = 2.6V, 4Ω RL, 1kHz
@
@
20038043
20038044
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6
Typical Performance Characteristics (Continued)
@
@
Power Supply Rejection Ratio (PSRR) VDD = 5V
Power Supply Rejection Ratio (PSRR) VDD = 3V
20038045
20038073
Input terminated with 10Ω R
Input terminated with 10Ω R
@
@
Power Supply Rejection Ratio (PSRR) VDD = 2.6V
Power Dissipation vs Output Power VDD = 5V
20038046
20038047
Input terminated with 10Ω R
7
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Typical Performance Characteristics (Continued)
Power Dissipation vs
Output Power
Power Dissipation vs
Output Power
@
VDD = 3.0V
VDD = 2.6V
20038049
20038048
Power Derating - MSOP
Power Derating - SOP
PDMAX = 670mW for 5V, 8Ω
PDMAX = 670mW for 5V, 8Ω
20038079
20038093
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Typical Performance Characteristics (Continued)
Power Derating - 9 Bump µSMD
Output Power vs
Supply Voltage
PDMAX = 670mW for 5V, 8Ω
20038051
20038081
Output Power vs
Supply Voltage
Output Power vs
Load Resistance
20038050
20038074
9
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Typical Performance Characteristics (Continued)
Clipping (Dropout) Voltage vs
Supply Voltage
Supply Current vs
Shutdown Voltage
20038075
20038052
Shutdown Hysterisis Voltage
VDD = 5V
Shutdown Hysterisis Voltage
VDD = 3V
20038076
20038077
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Typical Performance Characteristics (Continued)
Shutdown Hysterisis Voltage
VDD = 2.6V
Open Loop Frequency Response
20038078
20038054
Frequency Response vs
Input Capacitor Size
20038056
11
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duced supply voltage, higher load impedance, or reduced
ambient temperature. Internal power dissipation is a function
of output power. Refer to the Typical Performance Charac-
teristics curves for power dissipation information for differ-
ent output powers and output loading.
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4893 has two operational
amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier’s gain is externally config-
urable, while the second amplifier is internally fixed in a
unity-gain, inverting configuration. The closed-loop gain of
the first amplifier is set by selecting the ratio of Rf to Ri while
the second amplifier’s gain is fixed by the two internal 20 kΩ
resistors. Figure 1 shows that the output of amplifier one
serves as the input to amplifier two which results in both
amplifiers producing signals identical in magnitude, but out
of phase by 180˚. Consequently, the differential gain for the
IC is
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the device as possible. Typical appli-
cations employ a 5V regulator with 10 µF tantalum or elec-
trolytic capacitor and a ceramic bypass capacitor which aid
in supply stability. This does not eliminate the need for
bypassing the supply nodes of the LM4893. The selection of
a bypass capacitor, especially CB, is dependent upon PSRR
requirements, click and pop performance (as explained in
the section, Proper Selection of External Components),
system cost, and size constraints.
AVD= 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and
Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configura-
tion where one side of the load is connected to ground.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4893 contains a SHUTDOWN pin to externally turn off the
amplifier’s bias circuitry. This shutdown feature turns the
amplifier off when a logic low is placed on the SHUTDOWN
pin. By switching the SHUTDOWN pin to ground, the
LM4893 supply current draw will be minimized in idle mode.
While the device will be disabled with SHUTDOWN pin
voltages less than 0.4VDC, the idle current may be greater
than the typical value of 0.1µA. (Idle current is measured
with the SHUTDOWN pin tied to ground).
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same con-
ditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing ex-
cessive clipping, please refer to the Audio Power Amplifier
Design section.
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry to provide a
quick, smooth transition into shutdown. Another solution is to
use a single-pole, single-throw switch in conjunction with an
external pull-up resistor. When the switch is closed, the
SHUTDOWN pin is connected to ground which disables the
amplifier. If the switch is open, then the external pull-up
resistor to VDD will enable the LM4893. This scheme guar-
antees that the SHUTDOWN pin will not float thus prevent-
ing unwanted state changes.
A bridge configuration, such as the one used in LM4893,
also creates a second advantage over single-ended amplifi-
ers. Since the differential outputs, Vo1 and Vo2, are biased
at half-supply, no net DC voltage exists across the load. This
eliminates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configura-
tion. Without an output coupling capacitor, the half-supply
bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
POWER DISSIPATION
PROPER SELECTION OF EXTERNAL COMPONENTS
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Since the LM4893 has two opera-
tional amplifiers in one package, the maximum internal
power dissipation is 4 times that of a single-ended amplifier.
The maximum power dissipation for a given application can
be derived from the power dissipation graphs or from Equa-
tion 1.
Proper selection of external components in applications us-
ing integrated power amplifiers is critical to optimize device
and system performance. While the LM4893 is tolerant of
external component combinations, consideration to compo-
nent values must be used to maximize overall system qual-
ity.
The LM4893 is unity-gain stable which gives the designer
maximum system flexibility. The LM4893 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1 Vrms are available
from sources such as audio codecs. Please refer to the
section, Audio Power Amplifier Design, for a more com-
plete explanation of proper gain selection.
PDMAX = 4*(VDD)2/(2π2RL)
(1)
It is critical that the maximum junction temperature (TJMAX
)
of 150˚C is not exceeded. TJMAX can be determined from the
power derating curves by using PDMAX and the PC board foil
area. By adding additional copper foil, the thermal resistance
of the application can be reduced from a free air value of
150˚C/W, resulting in higher PDMAX. Additional copper foil
can be added to any of the leads connected to the LM4893.
It is especially effective when connected to VDD, GND, and
the output pins. Refer to the application information on the
LM4893 reference design board for an example of good heat
sinking. If TJMAX still exceeds 150˚C, then additional
changes must be made. These changes can include re-
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. To a large extent, the band-
width is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor, Ci, forms a
first order high pass filter which limits low frequency re-
sponse. This value should be chosen based on needed
frequency response for a few distinct reasons.
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12
Application Information (Continued)
AUDIO POWER AMPLIFIER DESIGN
Selection Of Input Capacitor Size
A 1W/8Ω Audio Amplifier
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenu-
ation. But in many cases the speakers used in portable
systems, whether internal or external, have little ability to
reproduce signals below 100 Hz to 150 Hz. Thus, using a
large input capacitor may not increase actual system perfor-
mance.
Given:
Power Output
Load Impedance
Input Level
1 Wrms
8Ω
1 Vrms
20 kΩ
Input Impedance
Bandwidth
100 Hz–20 kHz 0.25 dB
In addition to system cost and size, click and pop perfor-
mance is effected by the size of the input coupling capacitor,
Ci. A larger input coupling capacitor requires more charge to
reach its quiescent DC voltage (nominally 1/2 VDD). This
charge comes from the output via the feedback and is apt to
create pops upon device enable. Thus, by minimizing the
capacitor size based on necessary low frequency response,
turn-on pops can be minimized.
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Per-
formance Characteristics section, the supply rail can be
easily found. A second way to determine the minimum sup-
ply rail is to calculate the required Vopeak using Equation 2
and add the output voltage. Using this method, the minimum
Besides minimizing the input capacitor size, careful consid-
eration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize
turn-on pops since it determines how fast the LM4893 turns
on. The slower the LM4893’s outputs ramp to their quiescent
DC voltage (nominally 1/2 VDD), the smaller the turn-on pop.
Choosing CB equal to 1.0 µF along with a small value of Ci
(in the range of 0.1 µF to 0.39 µF), should produce a virtually
clickless and popless shutdown function. While the device
will function properly, (no oscillations or motorboating), with
CB equal to 0.1 µF, the device will be much more susceptible
to turn-on clicks and pops. Thus, a value of CB equal to
1.0 µF is recommended in all but the most cost sensitive
designs.
supply voltage would be (Vopeak + (VOD
+ VODBOT)), where
VOD
and VOD
are extrapolated frToOmP the Dropout Volt-
TOP
age BvOsT Supply Voltage curve in the Typical Performance
Characteristics section.
(2)
5V is a standard voltage, in most applications, chosen for the
supply rail. Extra supply voltage creates headroom that al-
lows the LM4893 to reproduce peaks in excess of 1W with-
out producing audible distortion. At this time, the designer
must make sure that the power supply choice along with the
output impedance does not violate the conditions explained
in the Power Dissipation section.
Figure 2 shows the LM4893’s turn-on characteristics when
coming out of shutdown mode. Trace B is the differential
output signal across a BTL 8Ω load. The LM4893’s active-
low SHUTDOWN pin is driven by the logic signal shown in
Trace A. Trace C is the Vo1- output signal and Trace D is the
Vo2+ output signal. A shown in Figure 2, the differential
output signal Trace B appears just as Trace A transitions
from logic low to logic high (turn-on condition).
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 3.
(3)
AVD = (Rf/Ri) 2
From Equation 3, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20 kΩ, and with a
AVD of 3, a ratio of 1.5:1 of Rf to Ri results in an allocation of
Ri = 20 kΩ and Rf = 30 kΩ. The final design step is to
address the bandwidth requirements which must be stated
as a pair of −3 dB frequency points. Five times away from a
−3 dB point is 0.17 dB down from passband response which
is better than the required 0.25 dB specified.
fL = 100 Hz/5 = 20 Hz
fH = 20 kHz * 5 = 100 kHz
As stated in the External Components section, Ri in con-
junction with Ci create a highpass filter.
Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF
The high frequency pole is determined by the product of the
20038097
desired frequency pole, fH, and the differential gain, AVD
.
With a AVD = 3 and fH = 100 kHz, the resulting GBWP =
300 kHz which is much smaller than the LM4893 GBWP of
10 MHz. This figure displays that if a designer has a need to
design an amplifier with a higher differential gain, the
LM4893 can still be used without running into bandwidth
limitations.
FIGURE 2. LM4893 Turn-on Characteristics
Differential output signal (Trace B) is devoid of
transients. The SHUTDOWN pin is driven by a
shutdown signal (Trace A). The inverting output (Trace
C) and the non-inverting output (Trace D) are applied
across an 8Ω BTL load.
13
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Application Information (Continued)
20038088
FIGURE 3. HIGHER GAIN AUDIO AMPLIFIER
nates possible high frequency oscillations. Care should be
taken when calculating the -3dB frequency in that an incor-
rect combination of R3 and C4 will cause rolloff before
20kHz. A typical combination of feedback resistor and ca-
pacitor that will not produce audio band high frequency rolloff
is R3 = 20kΩ and C4 = 25pf. These components result in a
-3dB point of approximately 320 kHz.
The LM4893 is unity-gain stable and requires no external
components besides gain-setting resistors, an input coupling
capacitor, and proper supply bypassing in the typical appli-
cation. However, if a closed-loop differential gain of greater
than 10 is required, a feedback capacitor (C4) may be
needed as shown in Figure 2 to bandwidth limit the amplifier.
This feedback capacitor creates a low pass filter that elimi-
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14
Application Information (Continued)
20038089
FIGURE 4. DIFFERENTIAL AMPLIFIER CONFIGURATION FOR LM4893
20038090
FIGURE 5. REFERENCE DESIGN BOARD and LAYOUT - micro SMD
15
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Application Information (Continued)
LM4893 SO BOARD ARTWORK
Silk Screen
20038098
20038095
20038096
Top Layer
Bottom Layer
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Application Information (Continued)
20038068
FIGURE 6. REFERENCE DESIGN BOARD and PCB LAYOUT GUIDELINES - MSOP & SO Boards
17
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Application Information (Continued)
LM4893 MSOP DEMO BOARD ARTWORK
Silk Screen
20038065
Top Layer
20038066
Bottom Layer
20038067
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Application Information (Continued)
Mono LM4893 Reference Design Boards
Bill of Material for all 3 Demo Boards
Item
1
Part Number
Part Description
Qty
1
Ref Designator
551011208-001 LM4893 Mono Reference Design Board
482911183-001 LM4893 Audio AMP
10
20
21
25
30
35
1
U1
151911207-001 Tant Cap 1uF 16V 10
1
C1
151911207-002 Cer Cap 0.39uF 50V Z5U 20% 1210
152911207-001 Tant Cap 1.0uF 16V 10
1
C2
1
C3
472911207-001 Res 20K Ohm 1/10W 5
3
R1, R2, R3
J1, J2
210007039-002 Jumper Header Vertical Mount 2X1 0.100
2
PCB LAYOUT GUIDELINES
analog and digital sections. It is further recommended to put
digital and analog power traces over the corresponding digi-
tal and analog ground traces to minimize noise coupling.
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
PLACEMENT OF DIGITAL AND ANALOG
COMPONENTS
All digital components and high-speed digital signals traces
should be located as far away as possible from analog
components and circuit traces.
General Mixed Signal Layout Recommendations
POWER AND GROUND CIRCUITS
AVOIDING TYPICAL DESIGN / LAYOUT PROBLEMS
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bring-
ing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a
major impact on low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
take require a greater amount of design time but will not
increase the final price of the board. The only extra parts
required may be some jumpers.
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and cross talk.
SINGLE-POINT POWER / GROUND CONNECTIONS
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing high frequency noise coupling between the
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Physical Dimensions inches (millimeters) unless otherwise noted
9-Bump micro SMD
Order Number LM4893ITL, LM4893ITLX
NS Package Number TLA09AAA
X1 = 1.514 0.03 X2 = 1.514 0.03 X3 = 0.60 0.075
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
SO
Order Number LM4893MA
NS Package Number M08A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
MSOP
Order Number LM4893MM
NS Package Number MUB10A
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