LM4924MMX/NOPB [TI]
IC,AUDIO AMPLIFIER,SINGLE,TSSOP,10PIN,PLASTIC;
| 型号： | LM4924MMX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC,AUDIO AMPLIFIER,SINGLE,TSSOP,10PIN,PLASTIC 放大器 光电二极管 商用集成电路 |
| 文件： | 总17页 (文件大小：456K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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October 2004
LM4924
2 Cell Battery, 40mW Per Channel Output Capacitor-Less
(OCL) Stereo Headphone Audio Amplifier
General Description
Key Specifications
n OCL output power
The LM4924 is a Output Capacitor-Less (OCL) stereo head-
phone amplifier, which when connected to a 3.0V supply,
delivers 40mW per channel to a 16Ω load with less than 1%
THD+N.
n
(RL = 16Ω, VDD = 3.0V, THD+N = 1%)
40mW (typ)
0.1µA (typ)
n Micropower shutdown current
n Supply voltage operating range
n PSRR 100Hz, VDD = 3.0V, AV = 2.5
<
<
1.5V VDD 3.6V
66dB (typ)
With the LM4924 packaged in the MM and SD packages, the
customer benefits include low profile and small size. These
packages minimizes PCB area and maximizes output power.
Features
The LM4924 features circuitry that reduces output transients
(“clicks” and “pops”) during device turn-on and turn-off, and
Mute On and Off. An externally controlled, low-power con-
sumption, active-low shutdown mode is also included in the
LM4924. Boomer audio power amplifiers are designed spe-
cifically to use few external components and provide high
quality output power in a surface mount packages.
n 2-cell 1.5V to 3.6V battery operation
n OCL mode for stereo headphone operation
n Unity-gain stable
n “Click and pop” suppression circuitry for shutdown On
and Off transients
n Active low micropower shutdown
n Thermal shutdown protection circuitry
Applications
n Portable two-cell audio products
n Portable two-cell electronic devices
Typical Application
20121057
FIGURE 1. Block Diagram
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS201210
www.national.com
Connection Diagrams
MSOP Package
MSOP Marking
20121006
Z- Plant Code
X - Date Code
T - Die Traceability
G - Boomer Family
B7 - LM4924MM
20121058
Top View
Order Number LM4924MM
See NS Package Number MUB10A for MSOP
SD Package
SD Marking
20121007
Z - Plant Code
X - Date Code
T - Die Traceability
Bottom Line - Part Number
20121052
Top View
Order Number LM4924SD
See NS Package Number SDA10A
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2
Typical Connections
20121059
FIGURE 2. Typical OCL Output Configuration Circuit
3
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Infrared (15 sec)
220˚C
See AN-450 “Surface Mounting and their Effects on
Product Reliablilty” for other methods of soldering
surface mount devices.
Supply Voltage
3.8V
−65˚C to +150˚C
−0.3V to VDD +0.3V
Internally limited
2000V
Thermal Resistance
Storage Temperature
Input Voltage
θJA (typ) MUB10A
θJA (typ) SDA10A
175˚C/W
73˚C/W
Power Dissipation (Note 2)
ESD Susceptibility(Note 3)
ESD Susceptibility on pin 7, 8, and
9 (Note 3)
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
2kV
200V
−40˚C ≤ TA ≤ +85˚C
1.5V ≤ VDD ≤ 3.6V
ESD Susceptibility (Note 4)
Junction Temperature
Solder Information
150˚C
Small Outline Package Vapor
Phase (60sec)
215˚C
Electrical Characteristics VDD = 3.0V (Notes 1, 5)
The following specifications apply for the circuit shown in Figure 2, unless otherwise specified. AV = 2.5, RL
=
16Ω.Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4924
Units
(Limits)
Typical
Limit
(Note 7)
1.9
(Note 6)
∞
IDD
Quiescent Power Supply Current VIN = 0V, IO = 0A, RL
=
(Note 8)
1.5
0.1
1
mA (max)
µA (max)
ISD
Shutdown Current
VSHUTDOWN = GND
1
VOS
Output Offset Voltage
10
mV (max)
f = 1kHz, per channel
PO
Output Power (Note 9)
Output Voltage Noise
OCL (Figure 2), THD+N = 1%
20Hz to 20kHz, A-weighted, Figure 2
PO = 10mW
40
13
0.1
45
30
mW (min)
µVRMS
%
VNO
THD
0.5
35
Crosstalk
Freq = 1kHz
dB (min)
VRIPPLE = 200mVP-P sine wave
Freq = 100Hz, OCL
PSRR
Power Supply Rejection Ratio
66
58
dB (min)
msec
TWAKE-UP
VIH
Wake-Up Time
1.5V ≤ VDD ≤ 3.6V, Fig 2
1.5V ≤ VDD ≤ 3.6V
230
Control Logic High
Control Logic Low
0.7VDD
0.3VDD
70
V (min)
V (max)
dB
VIL
1.5V ≤ VDD ≤ 3.6V
Mute
1VPP Reference, RIN = 20k, RFB = 50k
90
Attenuation
Electrical Characteristics VDD = 1.8V (Notes 1, 5)
The following specifications apply for the circuit shown in Figure 2, unless otherwise specified. AV = 2.5, RL = 16Ω.
Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4924
Units
(Limits)
Typical
Limit
(Note 6)
(Note 7)
∞
IDD
Quiescent Power Supply Current VIN = 0V, IO = 0A, RL
=
(Note 8)
1.4
0.1
1
mA (max)
µA (max)
ISD
Shutdown Current
VSHUTDOWN = GND
VOS
Output Offset Voltage
mV (max)
f = 1kHz
PO
Output Power (Note 9)
Output Voltage Noise
OCL Per channel, Fig. 2, Freq = 1kHz
THD+N = 1%
10
10
mW
VNO
20Hz to 20kHz, A-weighted, Figure 2
µVRMS
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4
Electrical Characteristics VDD = 1.8V (Notes 1, 5) (Continued)
The following specifications apply for the circuit shown in Figure 2, unless otherwise specified. AV = 2.5, RL = 16Ω.
Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4924
Units
(Limits)
Typical
Limit
(Note 6)
0.1
(Note 7)
THD
PO = 5mW
%
Crosstalk
Freq = 1kHz
45
dB (min)
VRIPPLE = 200mVP-P sine wave
Freq = 100Hz, OCL
PSRR
Power Supply Rejection Ratio
66
dB
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 2: The maximum power dissipation is dictated by T
, θ , and the ambient temperature T and must be derated at elevated temperatures. The maximum
JMAX JA
A
allowable power dissipation is P
= (T
− T )/θ . For the LM4924, T
= 150˚C. For the θ s, please see the Application Information section or the
DMAX
JMAX
A
JA
JMAX
JA
Absolute Maximum Ratings section.
Note 3: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 4: Machine model, 220pF–240pF discharged through all pins.
Note 5: All voltages are measured with respect to the ground (GND) pins unless otherwise specified.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 8: The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
Note 9: Output power is measured at the device terminals.
5
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Typical Performance Characteristics
THD+N vs Frequency
THD+N vs Frequency
VDD = 1.8V, PO = 5mW, RL = 16Ω
VDD = 1.8V, PO = 5mW, RL = 32Ω
20121013
20121014
THD+N vs Frequency
THD+N vs Frequency
VDD = 3.0V, PO = 10mW, RL = 16Ω
VDD = 3.0V, PO = 10mW, RL = 32Ω
20121015
20121016
THD+N vs Output Power
THD+N vs Output Power
VDD = 1.8V, RL = 16Ω, f = 1kHz
VDD = 1.8V, RL = 32Ω, f = 1kHz
20121017
20121018
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6
Typical Performance Characteristics (Continued)
THD+N vs Output Power
THD+N vs Output Power
VDD = 3.0V, RL = 16Ω, f = 1kHz
VDD = 3.0V, RL = 32Ω, f = 1kHz
20121019
20121020
Power Supply Rejection Ratio
Power Supply Rejection Ratio
VDD = 1.8V, RL = 16Ω,
Vripple = 200mVp-p, Input Terminated into 10Ω load
VDD = 3.0V, RL = 16Ω,
Vripple = 200mVp-p, Input Terminated into 10Ω load
20121011
20121012
Noise Floor
Noise Floor
VDD = 1.8V, RL = 16Ω
VDD = 3.0V, RL = 16Ω
20121009
20121010
7
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Typical Performance Characteristics (Continued)
Output Power vs Load Resistance
f = 1kHz. from top to bottom:
Channel Sepration
VDD = 3.0V, 10%THD+N; VDD = 3.0V, 1%THD+N
VDD = 1.8V, 10%THD+N; VDD = 1.8V, 1%THD+N
RL = 16Ω
20121008
20121021
Output Power vs Supply Voltage
RL = 16Ω, from top to bottom:
THD+N = 10%; THD+N = 1%
Output Power vs Supply Voltage
RL = 32Ω, from top to bottom:
THD+N = 10%; THD+N = 1%
20121022
20121023
Power Dissipation vs Output Power
VDD = 1.8V, f = 1kHz, from top to bottom:
RL = 16Ω; RL = 32Ω
Power Dissipation vs Output Power
VDD = 3.0V, f = 1kHz, from top to bottom:
RL = 16Ω; RL = 32Ω
20121024
20121025
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8
Typical Performance Characteristics (Continued)
Supply Current vs Supply Voltage
20121026
9
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of CBYPASS and the turn-on time. Here are some typical
turn-on times for various values of CBYPASS
Application Information
.
ELIMINATING OUTPUT COUPLING CAPACITORS
AMPLIFIER CONFIGURATION EXPLANATION
Typical single-supply audio amplifiers that drive single-
ended (SE) headphones use a coupling capacitor on each
SE output. This output coupling capacitor blocks the half-
supply voltage to which the output amplifiers are typically
biased and couples the audio signal to the headphones. The
signal return to circuit ground is through the headphone
jack’s sleeve.
As shown in Figure 1, the LM4924 has three operational
amplifiers internally. Two of the amplifier’s have externally
configurable gain while the other amplifier is internally fixed
at the bias point acting as a unity-gain buffer. The closed-
loop gain of the two configurable amplifiers is set by select-
ing the ratio of Rf to Ri. Consequently, the gain for each
channel of the IC is
The LM4924 eliminates these output coupling capacitors.
VoC is internally configured to apply a 1/2VDD bias voltage to
a stereo headphone jack’s sleeve. This voltage matches the
quiescent voltage present on the VoA and VoB outputs that
drive the headphones. The headphones operate in a manner
similar to a bridge-tied-load (BTL). The same DC voltage is
applied to both headphone speaker terminals. This results in
no net DC current flow through the speaker. AC current flows
through a headphone speaker as an audio signal’s output
amplitude increases on the speaker’s terminal.
AV = -(Rf/Ri)
By driving the loads through outputs VO1 and VO2 with VO3
acting as a buffered bias voltage the LM4924 does not
require output coupling capacitors. The typical single-ended
amplifier configuration where one side of the load is con-
nected to ground requires large, expensive output coupling
capacitors.
The headphone jack’s sleeve is not connected to circuit
ground. Using the headphone output jack as a line-level
output will place the LM4924’s bandgap 1/2VDD bias on a
plug’s sleeve connection. This presents no difficulty when
the external equipment uses capacitively coupled inputs. For
the very small minority of equipment that is DC-coupled, the
LM4924 monitors the current supplied by the amplifier that
drives the headphone jack’s sleeve. If this current exceeds
500mAPK, the amplifier is shutdown, protecting the LM4924
and the external equipment.
A configuration such as the one used in the LM4924 has a
major advantage over single supply, single-ended amplifiers.
Since the outputs VO1, VO2, and VO3 are all biased at 1/2
VDD, no net DC voltage exists across each load. This elimi-
nates the need for output coupling capacitors that are re-
quired in a single-supply, single-ended amplifier configura-
tion. Without output coupling capacitors in a typical single-
supply, single-ended amplifier, the bias voltage is placed
across the load resulting in both increased internal IC power
dissipation and possible loudspeaker damage.
BYPASS CAPACITOR VALUE SELECTION
POWER DISSIPATION
Besides minimizing the input capacitor size, careful consid-
eration should be paid to value of CBYPASS, the capacitor
connected to the BYPASS pin. Since CBYPASS determines
how fast the LM4924 settles to quiescent operation, its value
is critical when minimizing turn-on pops. The slower the
LM4924’s outputs ramp to their quiescent DC voltage (nomi-
nally VDD/2), the smaller the turn-on pop. Choosing CB equal
to 4.7µF along with a small value of Ci (in the range of 0.1µF
to 0.47µF), produces a click-less and pop-less shutdown
function. As discussed above, choosing Ci no larger than
necessary for the desired bandwidth helps minimize clicks
and pops. This ensures that output transients are eliminated
when power is first applied or the LM4924 resumes opera-
tion after shutdown.
Power dissipation is a major concern when designing a
successful amplifier. A direct consequence of the increased
power delivered to the load by a bridge amplifier is an
increase in internal power dissipation. The maximum power
dissipation for a given application can be derived from the
power dissipation graphs or from Equation 1.
2
PDMAX = 4(VDD
)
/ (π2RL)
(1)
It is critical that the maximum junction temperature TJMAX of
150˚C is not exceeded. Since the typical application is for
headphone operation (16Ω impedance) using a 3.3V supply
the maximum power dissipation is only 138mW. Therefore,
power dissipation is not a major concern.
OPTIMIZING CLICK AND POP REDUCTION
PERFORMANCE
The LM4924 contains circuitry that eliminates turn-on and
shutdown transients ("clicks and pops"). For this discussion,
turn-on refers to either applying the power supply voltage or
when the micro-power shutdown mode is deactivated.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is important
for low noise performance and high power supply rejection.
The capacitor location on the power supply pins should be
as close to the device as possible.
As the VDD/2 voltage present at the BYPASS pin ramps to its
final value, the LM4924’s internal amplifiers are configured
as unity gain buffers. An internal current source charges the
capacitor connected between the BYPASS pin and GND in a
controlled, linear manner. Ideally, the input and outputs track
the voltage applied to the BYPASS pin. The gain of the
internal amplifiers remains unity until the voltage on the
bypass pin reaches VDD/2. As soon as the voltage on the
bypass pin is stable, the device becomes fully operational
and the amplifier outputs are reconnected to their respective
output pins. Although the BYPASS pin current cannot be
modified, changing the size of CBYPASS alters the device’s
turn-on time. There is a linear relationship between the size
Typical applications employ a 3.0V regulator with 10µF tan-
talum or electrolytic capacitor and a ceramic bypass capaci-
tor which aid in supply stability. This does not eliminate the
need for bypassing the supply nodes of the LM4924. A
bypass capacitor value in the range of 0.1µF to 1µF is
recommended for CS.
MICRO POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the
LM4924’s shutdown function. Activate micro-power shut-
down by applying a logic-low voltage to the SHUTDOWN
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10
USING EXTERNAL POWERED SPEAKERS
Application Information (Continued)
The LM4924 is designed specifically for headphone opera-
tion. Often the headphone output of a device will be used to
drive external powered speakers. The LM4924 has a differ-
ential output to eliminate the output coupling capacitors. The
result is a headphone jack sleeve that is connected to VO3
instead of GND. For powered speakers that are designed to
have single-ended signals at the input, the click and pop
circuitry will not be able to eliminate the turn-on/turn-off click
and pop. Unless the inputs to the powered speakers are fully
differential the turn-on/turn-off click and pop will be very
large.
pin. When active, the LM4924’s micro-power shutdown fea-
ture turns off the amplifier’s bias circuitry, reducing the sup-
ply current. The trigger point is 0.4V (max) for a logic-low
level, and 1.5V (min) for a logic-high level. The low 0.1µA
(typ) shutdown current is achieved by applying a voltage that
is as near as ground as possible to the SHUTDOWN pin. A
voltage that is higher than ground may increase the shut-
down current.
There are a few ways to control the micro-power shutdown.
These include using a single-pole, single-throw switch, a
microprocessor, or a microcontroller. When using a switch,
connect an external 100kΩ pull-up resistor between the
SHUTDOWN pin and VDD. Connect the switch between the
SHUTDOWN pin and ground. Select normal amplifier opera-
tion by opening the switch. Closing the switch connects the
SHUTDOWN pin to ground, activating micro-power shut-
down. The switch and resistor guarantee that the SHUT-
DOWN pin will not float. This prevents unwanted state
changes. In a system with a microprocessor or microcontrol-
ler, use a digital output to apply the control voltage to the
SHUTDOWN pin. Driving the SHUTDOWN pin with active
circuitry eliminates the pull-up resistor.
AUDIO POWER AMPLIFIER DESIGN
A 30mW/32Ω Audio Amplifier
Given:
Power Output
Load Impedance
Input Level
30mWrms
32Ω
1Vrms
Input Impedance
20kΩ
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Per-
formance Characteristics section, the supply rail can be
easily found.
SELECTING EXTERNAL COMPONENTS
Selecting proper external components in applications using
integrated power amplifiers is critical to optimize device and
system performance. While the LM4924 is tolerant of exter-
nal component combinations, consideration to component
values must be used to maximize overall system quality.
Since 3.3V is a standard supply voltage in most applications,
it is chosen for the supply rail in this example. Extra supply
voltage creates headroom that allows the LM4924 to repro-
duce peaks in excess of 30mW without producing audible
distortion. At this time, the designer must make sure that the
power supply choice along with the output impedance does
no violate the conditions explained in the Power Dissipa-
tion section.
The LM4924 is unity-gain stable which gives the designer
maximum system flexibility. The LM4924 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1Vrms are available
from sources such as audio codecs. Very large values
should not be used for the gain-setting resistors. Values for
Ri and Rf should be less than 1MΩ. Please refer to the
section, Audio Power Amplifier Design, for a more com-
plete explanation of proper gain selection
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 2.
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. The input coupling capacitor,
Ci, forms a first order high pass filter which limits low fre-
quency response. This value should be chosen based on
needed frequency response and turn-on time.
(2)
From Equation 2, the minimum AV is 0.98; use AV = 1. Since
the desired input impedance is 20kΩ, and with AV equal to 1,
a ratio of 1:1 results from Equation 1 for Rf to Ri. The values
are chosen with Ri = 20kΩ and Rf = 20kΩ.
SELECTION OF INPUT CAPACITOR SIZE
Amplifiying the lowest audio frequencies requires a high
value input coupling capacitor, Ci. A high value capacitor can
be expensive and may compromise space efficiency in por-
table designs. In many cases, however, the headphones
used in portable systems have little ability to reproduce
signals below 60Hz. Applications using headphones with this
limited frequency response reap little improvement by using
a high value input capacitor.
The last step in this design example is setting the amplifier’s
−3dB frequency bandwidth. To achieve the desired 0.25dB
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
both response limits is 0.17dB, well within the 0.25dB
desired limit. The results are an
In addition to system cost and size, turn-on time is affected
by the size of the input coupling capacitor Ci. A larger input
coupling capacitor requires more charge to reach its quies-
cent DC voltage. This charge comes from the output via the
feedback Thus, by minimizing the capacitor size based on
necessary low frequency response, turn-on time can be
minimized. A small value of Ci (in the range of 0.1µF to
0.39µF), is recommended.
fL = 100Hz/5 = 20Hz
(3)
(4)
and an
fH = 20kHz x 5 = 100kHz
11
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1/(2π*20kΩ*20Hz) = 0.397µF
Use a 0.39µF capacitor, the closest standard value.
Application Information (Continued)
As mentioned in the Selecting Proper External Compo-
nents section, Ri and Ci create a highpass filter that sets the
amplifier’s lower bandpass frequency limit. Find the coupling
capacitor’s value using Equation (3).
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AV. With
an AV = 1 and fH = 100kHz, the resulting GBWP = 100kHz
which is much smaller than the LM4924 GBWP of 11MHz.
This figure displays that if a designer has a need to design
an amplifier with higher differential gain, the LM4924 can still
be used without running into bandwidth limitations.
Ci ≥ 1/(2πR f )
i L
(5)
The result is
HIGHER GAIN AUDIO AMPLIFIER
20121029
FIGURE 3.
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12
ates a low pass filter that eliminates possible high frequency
oscillations. Care should be taken when calculating the -3dB
frequency in that an incorrect combination of Rf and Cf will
cause frequency response roll off before 20kHz. A typical
combination of feedback resistor and capacitor that will not
produce audio band high frequency roll off is Rf = 20kΩ and
Cf = 25pF. These components result in a -3dB point of
approximately 320kHz.
Application Information (Continued)
The LM4924 is unity-gain stable and requires no external
components besides gain-setting resistors, input coupling
capacitors, and proper supply bypassing in the typical appli-
cation. However, if a very large closed-loop differential gain
is required, a feedback capacitor (Cf) may be needed to
bandwidth limit the amplifier. This feedback capacitor cre-
REFERENCE DESIGN BOARD and LAYOUT GUIDELINES
MSOP & SD BOARDS
20121030
FIGURE 4.
(Note: RPU2 is not required. It is used for test measurement purposes only.)
13
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daisy chaining traces together in a serial manner) can
greatly enhance low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
require a greater amount of design time but will not increase
the final price of the board. The only extra parts required may
be some jumpers.
Application Information (Continued)
PCB LAYOUT GUIDELINES
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
Single-Point Power / Ground Connections
Minimization of THD
The analog power traces should be connected to the digital
traces through a single point (link). A "PI-filter" can be helpful
in minimizing high frequency noise coupling between the
analog and digital sections. Further, place digital and analog
power traces over the corresponding digital and analog
ground traces to minimize noise coupling.
PCB trace impedance on the power, ground, and all output
traces should be minimized to achieve optimal THD perfor-
mance. Therefore, use PCB traces that are as wide as
possible for these connections. As the gain of the amplifier is
increased, the trace impedance will have an ever increasing
adverse affect on THD performance. At unity-gain (0dB) the
parasitic trace impedance effect on THD performance is
reduced but still a negative factor in the THD performance of
the LM4924 in a given application.
Placement of Digital and Analog Components
All digital components and high-speed digital signal traces
should be located as far away as possible from analog
components and circuit traces.
GENERAL MIXED SIGNAL LAYOUT
RECOMMENDATION
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and cross talk.
Power and Ground Circuits
For two layer mixed signal design, it is important to isolate
the digital power and ground trace paths from the analog
power and ground trace paths. Star trace routing techniques
(bringing individual traces back to a central point rather than
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14
Physical Dimensions inches (millimeters) unless otherwise noted
MSOP Package
Order Number LM4924MM
NS Package Number MUB10A
SD Package
Order Number LM4924SD
NS Package Number SDA10A
15
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Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
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