LM4954TLX/NOPB [TI]
AUDIO AMPLIFIER;
| 型号： | LM4954TLX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | AUDIO AMPLIFIER 放大器 商用集成电路 |
| 文件： | 总23页 (文件大小：1414K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM4954
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SNAS292B –JUNE 2005–REVISED APRIL 2013
LM4954 Boomer™ Audio Power Amplifier Series High Voltage 3 Watt Audio Power
Amplifier
Check for Samples: LM4954
1
FEATURES
DESCRIPTION
The LM4954 is an audio power amplifier primarily
designed for demanding applications in mobile
phones and other portable communication device
applications. It is capable of delivering 2.4 Watts of
continuous average power to an 8Ω BTL load with
less than 1% THD+N from a 7VDC power supply.
23
•
No Output Coupling Capacitors, Snubber
Networks or Bootstrap Capacitors Required
•
•
•
•
Unity Gain Stable
Externally Configurable Gain
Ultra Low Current Active Low Shutdown Mode
Boomer audio power amplifiers are designed
specifically to provide high quality output power with a
minimal number of external components. The
LM4954 does not require output coupling capacitors
or bootstrap capacitors, and therefore is ideally suited
for lower-power portable applications where minimal
space and power consumption are primary
requirements.
BTL Output can Drive Capacitive Loads Up to
100pF
•
•
•
“Click and Pop” Suppression Circuitry
2.7V - 9.0V Operation
Available in Space-Saving DSBGA Package
APPLICATIONS
The LM4954 features a low-power consumption
global shutdown mode which is achieved by driving
the shutdown pin with logic low. Additionally, the
LM4954 features an internal thermal shutdown
protection mechanism.
•
•
Mobile Phones
PDAs
KEY SPECIFICATIONS
•
Wide Power Supply Voltage Range, 2.7 ≤ VDD ≤
9V
The LM4954 contains advanced pop & click circuitry
which eliminates noises that would otherwise occur
during turn-on and turn-off transitions.
•
Output Power: VDD = 7V, 1% THD+N, 2.4W
(Typ)
The LM4954 is unity-gain stable and can be
configured by external gain-setting resistors.
•
•
•
Quiescent Power Supply Current, 3mA (Typ)
PSRR: VDD = 5V and 3V at 217Hz, 80dB (Typ)
Shutdown Power Supply Current, 0.01µA (Typ)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
Boomer is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated
LM4954
SNAS292B –JUNE 2005–REVISED APRIL 2013
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Typical Application
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram
Figure 2. 9 Bump DSBGA
Top View
See Package Number YZR0009
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings(1)(2)(3)
Supply Voltage(1)
9.5V
−65°C to +150°C
−0.3V to VDD +0.3V
Internally Limited
2000V
Storage Temperature
Input Voltage
Power Dissipation(4)
ESD Susceptibility(5)
ESD Susceptibility(6)
Junction Temperature
Thermal Resistance
200V
150°C
θJA (DSBGA)(7)
180°C/W
Soldering Information See AN-112 (SNAA002) “DSBGA Wafers Level Chip Scale Package.”
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LM4954, see power derating curves for additional information.
(5) Human body model, 100pF discharged through a 1.5kΩ resistor.
(6) Machine Model, 220pF – 240pF discharged through all pins.
(7) All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. The θJA given in the
Absolute Maximum Ratings section under Thermal Resistance is for the ITL package without any heat spreading planes on the PCB.
Operating Ratings(1)(2)
Temperature Range
TMIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ 85°C
2.7V ≤ VDD ≤ 9V
Supply Voltage
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
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Electrical Characteristics VDD = 7V(1)(2)
The following specifications apply for VDD = 7V, AV-BTL = 6dB, and RL = 8Ω unless otherwise specified. Limits apply for TA =
25°C.
LM4954
Units
(Limits)
Symbol
Parameter
Conditions
Typical(3)
Limit(4)(5)
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, RL = 8Ω BTL
VSD = GND(6)
3
5
1
mA (max)
µA (max)
mV (max)
W (min)
W
ISD
0.01
10
VOS
Output Offset Voltage
25
2.2
THD+N = 1% (max); f = 1kHz
THD+N = 10% (max); f = 1kHz
2.4
3.0
Po
Output Power(7)
PO = 1Wrms; f = 1kHz
AV-BTL = 6dB
0.1
0.4
%
%
THD+N
Total Harmonic Distortion + Noise
PO = 1Wrms; f = 1kHz
AV-BTL = 26dB
VRipple = 200mVsine p-p,
CB = 2.2µF, Input terminated
with 10Ω to GND
71
71
54
55
dB (min)
dB (min)
fRipple = 217Hz, Input Referred
PSRR
Power Supply Rejection Ratio
VRipple = 200mVsine p-p,
CB = 2.2µF, Input terminated
with 10Ω to ground
fRipple = 1kHz, Input Referred
VSDIH
VSDIL
TWU
Shutdown High Input Voltage
Shutdown Low Input Voltage
Wake-up Time
1.2
0.4
V (min)
V (max)
ms
CB = 2.2µF
130
20
A-Wtg, AV-BTL = 6dB
Input terminated with 10Ω to GND,
Output Referred
µVRMS
∈
OUT
Output Noise
A-Wtg, AV-BTL = 26dB
Input terminated with 10Ω to GND,
Output Referred
100
75
µVRMS
RPD
Pull Down Resistor on Shutdown
kΩ
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typical specifications are specified at 25°C and represent the parametric norm.
(4) Tested limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) Shutdown current is measured in a normal room environment. Exposure to direct sunlight in the TL package will increase ISD by a
minimum of 2μA.
(7) The demo board shown has 1.1in2 (710mm2) heat spreading planes on the two internal layers and the bottom layer. The bottom internal
layer is electrically VDD while the top internal and bottom layers are electrically GND. Thermal performance for the demo board is found
on the Power Derating graph in the Typical Performance Characteristics section. 7V operation requires heat spreading planes for the
thermal stability.
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Electrical Characteristics VDD = 5V(1)(2)
The following specifications apply for VDD = 5V, AV-BTL = 6dB, and RL = 8Ω unless otherwise specified. Limits apply for TA =
25°C.
LM4954
Units
(Limits)
Symbol
Parameter
Conditions
Typical(3)
Limit(4)(5)
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, RL = 8Ω BTL
VSD = GND(6)
2.7
0.01
8
5
1
mA (max)
µA (max)
mV (max)
W (min)
%
ISD
VOS
Po
Output Offset Voltage
25
1.1
Output Power
THD+N = 1% (max); f = 1kHz
PO = 600mWrms; f = 1kHz
1.2
0.1
THD+N
Total Harmonic Distortion + Noise
Vripple = 200mVsine p-p,
CB = 2.2µF, Input terminated
with 10Ω to GND
80
80
63
dB (min)
dB
fRipple = 217Hz, Input Referred
PSRR
Power Supply Rejection Ratio
Vripple = 200mVsine p-p,
CB = 2.2µF, Input terminated
with 10Ω to GND
fRipple = 1kHz, Input Referred
VSDIH
VSDIL
TWU
Shutdown High Input Voltage
Shutdown Low Input Voltage
Wake-up Time
1.2
0.4
V (min)
V (max)
ms
CB = 2.2µF
130
20
A-Wtg, Input terminated with 10Ω to
GND,
∈
OUT
Output Noise
µVRMS
Output referred
RPD
Pul Down Resistor on Shutdown
75
kΩ
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typical specifications are specified at 25°C and represent the parametric norm.
(4) Tested limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) Shutdown current is measured in a normal room environment. Exposure to direct sunlight in the TL package will increase ISD by a
minimum of 2μA.
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Electrical Characteristics VDD = 3V(1)(2)
The following specifications apply for VDD = 3V, AV-BTL = 6dB, and RL = 8Ω unless otherwise specified. Limits apply for TA =
25°C.
LM4954
Units
(Limits)
Symbol
Parameter
Conditions
Typical(3)
Limit(4)(5)
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, RL = 8Ω BTL
VSD = GND(6)
2.5
0.01
5
5
1
mA (max)
µA (max)
mV (max)
mW (min)
%
ISD
VOS
Po
Output Offset Voltage
25
360
Output Power
THD+N = 1% (max); f = 1kHz
Po = 100mWrms; f = 1kHz
380
0.18
THD+N
Total Harmonic Distortion + Noise
Vripple = 200mVsine p-p,
CB = 2.2µF, Input teiminated
with 10Ω to GND,
80
80
63
dB (min)
dB
fRipple = 217Hz, Input referred
PSRR
Power Supply Rejection Ratio
Vripple = 200mVsine p-p,
CB = 2.2µF, Input teiminated
with 10Ω to GND,
fRipple = 1kHz, Input referred
VSDIH
VSDIL
TWU
Shutdown High Input Voltage
Shutdown Low Input Voltage
Wake-Up Time
1.2
0.4
V (min)
V (max)
ms
CB = 2.2μF
130
20
A-Wtg, Input terminated with 10Ω to
GND,
Output referred
∈
OUT
Output Noise
μVRMS
kΩ
RPD
Pull Down Resistor on Shutdown
75
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typical specifications are specified at 25°C and represent the parametric norm.
(4) Tested limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) Shutdown current is measured in a normal room environment. Exposure to direct sunlight in the TL package will increase ISD by a
minimum of 2μA.
External Components Description
(See Figure 1)
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high pass
filter with Ci at fC = 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter with
Ri at fc = 1/(2π RiCi). Refer to the section, PROPER SELECTION OF EXTERNAL COMPONENTS, for an explanation
of how to determine the value of Ci.
3.
4.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri. AVD = 2 * (Rf/Ri).
CS
Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for
information concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, PROPER SELECTION OF EXTERNAL
COMPONENTS, for information concerning proper placement and selection of CB.
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Typical Performance Characteristics
THD+N vs Output Power
VDD = 7V, RL = 8Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 7V, RL = 8Ω, AV = 6dB,
POUT = 600mW, 80kHz BW
Figure 3.
Figure 4.
THD+N vs Output Power
VDD = 7V, RL = 8Ω, AV = 26dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 7V, RL = 8Ω, AV = 26dB,
POUT = 600mW, 80kHz BW
Figure 5.
Figure 6.
THD+N vs Output Power
VDD = 5V, RL = 4Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 5V, RL = 4Ω, AV = 6dB,
POUT = 100mW, 80kHz BW
Figure 7.
Figure 8.
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Typical Performance Characteristics (continued)
THD+N vs Output Power
THD+N vs Frequency
VDD = 5V, RL = 8Ω, AV = 6dB,
POUT = 100mW, 80kHz BW
VDD = 5V, RL = 8Ω, AV = 6dB,
f = 1kHz, 80kHz BW
Figure 9.
Figure 10.
THD+N vs Output Power
VDD = 3V, RL = 4Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 3V, RL = 4Ω, AV = 6dB,
POUT = 100mW, 80kHz BW
Figure 11.
Figure 12.
THD+N vs Output Power
VDD = 3V, RL = 8Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 3V, RL = 8Ω, AV = 6dB,
POUT = 100mW, 80kHz BW
Figure 13.
Figure 14.
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Typical Performance Characteristics (continued)
THD+N vs Differential Gain
VDD = 7V, RL = 8Ω,
POUT = 600mW, 80kHz BW
PSRR vs Frequency
VDD = 7V, VRIPPLE = 200mVP-P
Input Terminated, 80kHz BW
Figure 15.
Figure 16.
PSRR vs Frequency
VDD = 5V, VRIPPLE = 200mVP-P
Input Terminated, 80kHz BW
PSRR vs Frequency
VDD = 3V, VRIPPLE = 200mVP-P
Input Terminated, 80kHz BW
Figure 17.
Figure 18.
Output Power vs Supply Voltage
RL = 4Ω, AV = 6dB, 80kHz BW
Output Power vs Supply Voltage
RL = 8Ω, AV = 6dB, 80kHz BW
Figure 19.
Figure 20.
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Typical Performance Characteristics (continued)
Power Dissipation vs Output Power
Power Dissipation vs Output Power
VDD = 5V, AV = 6dB,
VDD = 7V, AV = 6dB,
THD+N ≤ 1%, 80kHz BW
THD+N ≤ 1%, 80kHz BW
Figure 21.
Figure 22.
Power Dissipation vs Output Power
VDD = 3V, AV = 6dB,
Power Derating – 9 bump DSBGA
PDMAX = 1.26W, VDD = 7V,
(1)(2)
THD+N ≤ 1%, 80kHz BW
RL = 8Ω
Figure 23.
Figure 24.
(1) All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. The θJA given in the
Absolute Maximum Ratings section under Thermal Resistance is for the ITL package without any heat spreading planes on the PCB.
(2) The demo board shown has 1.1in2 (710mm2) heat spreading planes on the two internal layers and the bottom layer. The bottom internal
layer is electrically VDD while the top internal and bottom layers are electrically GND. Thermal performance for the demo board is found
on the Power Derating graph in the Typical Performance Characteristics section. 7V operation requires heat spreading planes for the
thermal stability.
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Typical Performance Characteristics (continued)
Shutdown Threshold vs Supply Voltage
Supply Current vs Supply Voltage
RL = 8Ω, AV = 6dB, 80kHz BW
RL = 8Ω
Figure 25.
Figure 26.
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APPLICATION INFORMATION
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4954 has two operational amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier's gain is externally configurable, while the second amplifier is internally fixed in
a unity-gain, inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of Rf to
Ri while the second amplifier's gain is fixed by the two internal 20kΩ resistors. Figure 1 shows that the output of
amplifier one serves as the input to amplifier two which results in both amplifiers producing signals identical in
magnitude, but out of phase by 180°. Consequently, the differential gain for the IC is
AVD = 2 *(Rf/Ri)
(1)
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier
configuration where one side of the load is connected to ground.
A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides
differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable
output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-
loop gain without causing excessive clipping, please refer to the AUDIO POWER AMPLIFIER DESIGN section.
A bridge configuration, such as the one used in LM4954, also creates a second advantage over single-ended
amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across
the load. This eliminates the need for an output coupling capacitor which is required in a single supply, single-
ended amplifier configuration. Without an output coupling capacitor, the half-supply bias across the load would
result in both increased internal IC power dissipation and also possible loudspeaker damage.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an
increase in internal power dissipation. Since the LM4954 has two operational amplifiers in one package, the
maximum internal power dissipation is four times that of a single-ended amplifier. The maximum power
dissipation for a given application can be derived from the power dissipation graphs or from Equation 2.
PDMAX = 4*(VDD)2/(2π2RL)
(2)
It is critical that the maximum junction temperature (TJMAX) of 150°C is not exceeded. TJMAX can be determined
from the power derating curves by using PDMAX and the PC board foil area. By adding additional copper foil, the
thermal resistance of the application can be reduced from the free air value, resulting in higher PDMAX. Additional
copper foil can be added to any of the leads connected to the LM4954. It is especially effective when connected
to VDD, GND, and the output pins. Refer to the application information on the LM4954 reference design board for
an example of good heat sinking. If TJMAX still exceeds 150°C, then additional changes must be made. These
changes can include reduced supply voltage, higher load impedance, or reduced ambient temperature. Internal
power dissipation is a function of output power. Refer to the Typical Performance Characteristics curves for
power dissipation information for different output powers and output loading.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as
possible. Typical applications employ a 5V regulator with 10µF tantalum or electrolytic capacitor and a ceramic
bypass capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of
the LM4954. The selection of a bypass capacitor, especially CB, is dependent upon PSRR requirements, click
and pop performance (as explained in the section, PROPER SELECTION OF EXTERNAL COMPONENTS),
system cost, and size constraints.
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SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM4954 contains a shutdown pin to externally turn off
the amplifier's bias circuitry. This shutdown feature turns the amplifier off when a logic low is placed on the
shutdown pin. By switching the shutdown pin to ground, the LM4954 supply current draw will be minimized in idle
mode. While the device will be disabled with shutdown pin voltages less than 0.4VDC, the idle current may be
greater than the typical value of 0.01µA. (Idle current is measured with the shutdown pin tied to ground). The
LM4954 has an internal 75kΩ pull-down resistor. If the shutdown pin is left floating the IC will automatically enter
shutdown mode.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical to optimize
device and system performance. While the LM4954 is tolerant of external component combinations,
consideration to component values must be used to maximize overall system quality.
The LM4954 is unity-gain stable which gives the designer maximum system flexibility. The LM4954 should be
used in low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain
configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1
Vrms are available from sources such as audio codecs. Please refer to the section, AUDIO POWER AMPLIFIER
DESIGN, for a more complete explanation of proper gain selection.
Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the
bandwidth is dictated by the choice of external components shown in Figure 1. The input coupling capacitor, Ci,
forms a first order high pass filter which limits low frequency response. This value should be chosen based on
needed frequency response for a few distinct reasons.
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized
capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers
used in portable systems, whether internal or external, have little ability to reproduce signals below 100Hz to
150Hz. Thus, using a large input capacitor may not increase actual system performance.
In addition to system cost and size, click and pop performance is affected by the size of the input coupling
capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally
1/2VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable.
Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be
minimized.
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value.
Choosing CB equal to 2.2µF along with a small value of Ci (in the range of 0.1µF to 0.39µF), should produce a
virtually clickless and popless shutdown function. While the device will function properly, (no oscillations or
motorboating), with CB equal to 0.1µF.
AUDIO POWER AMPLIFIER DESIGN
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating
from the Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section, the supply
rail can be easily found.
At this time, the designer must make sure that the power supply choice along with the output impedance does
not violate the conditions explained in the POWER DISSIPATION section.
Once the power dissipation equations have been addressed, the required differential gain can be determined
from Equation 3 and Equation 4.
(3)
AVD = (Rf/Ri) 2
(4)
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Figure 27. HIGHER GAIN AUDIO AMPLIFIER
The LM4954 is unity-gain stable and requires no external components besides gain-setting resistors, an input
coupling capacitor, and proper supply bypassing in the typical application. However, if a closed-loop differential
gain of greater than 10 is required, a feedback capacitor (CF) may be needed as shown in Figure 27 to
bandwidth limit the amplifier. This feedback capacitor creates a low pass filter that eliminates possible high
frequency oscillations. Care should be taken when calculating the -3dB frequency in that an incorrect
combination of RF and CF will cause rolloff before 20kHz. A typical combination of feedback resistor and
capacitor that will not produce audio band high frequency rolloff is RF = 20kΩ and CF = 25pf. These components
result in a -3dB point of approximately 320 kHz. To calculate the value of the capacitor for a given -3dB point,
use Equation 5 below:
CF = 1/(2πf3dBRF) (F)
(5)
Figure 28. DIFFERENTIAL AMPLIFIER CONFIGURATION FOR LM4954
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Figure 29. REFERENCE DESIGN BOARD SCHEMATIC
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LM4954 DSBGA BOARD ARTWORK(3)
Figure 30. Composite View
Figure 31. Silk Screen
Figure 32. Top Layer
Figure 33. Internal Layer 1, GND
Figure 34. Internal Layer 2, VDD
Figure 35. Bottom Layer
(3) All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. The θJA given in the
Absolute Maximum Ratings section under Thermal Resistance is for the ITL package without any heat spreading planes on the PCB.
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SNAS292B –JUNE 2005–REVISED APRIL 2013
Table 1. Mono LM4954 Reference Design Boards Bill of Materials
Designator
Value
20kΩ
Tolerance
1%
Part Description
Comment
Ri
RF
1/10W, 1% 0805 Resistor
1/10W, 1% 0805 Resistor
Ceramic 1206 Capacitor, 10%
20kΩ
1%
Ci
0.39μF
10%
CF
Part not used
CS
2.2μF
2.2μF
10%
10%
16V Tantalum 1210 Capacitor
16V Tantalum 1210 Capacitor
0.100” 1x2 header, vertical mount
0.100” 1x3 header, vertical mount
CB
J1, J3, J4
J2
Input, Output, Vdd/GND
Shutdown control
PCB LAYOUT GUIDELINES
This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power
and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual
results will depend heavily on the final layout.
GENERAL MIXED SIGNAL LAYOUT RECOMMENDATIONS
Power and Ground Circuits
For a two layer mixed signal design, it is important to isolate the digital power and ground trace paths from the
analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central
point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal
performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even
device. This technique requires a greater amount of design time but will not increase the final price of the board.
The only extra parts required may be some jumpers.
Single-Point Power / Ground Connections
The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can
be helpful in minimizing high frequency noise coupling between the analog and digital sections. It is further
recommended to put digital and analog power traces over the corresponding digital and analog ground traces to
minimize noise coupling.
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces should be located as far away as possible from
analog components and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB
layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90
degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise
coupling and cross talk.
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REVISION HISTORY
Rev
Date
Description
1.1
4/29/05
Added curves 71 and 72. Edited Note 10. Changed Av =
26dB to 6dB under 7V EC table. Edited SHUTDOWN
FUNCTION under the Application section.
1.2
1.3
6/08/05
6/15/05
Removed all the LLP pkg references. Changed TLA09XXX
into YZR0009. Changed X1 and X2 measurements.
Fixed some typos.
Initial WEB release.
1.4
1.5
6/20/05
6/22/05
Replaced curve 20129170 with 20129192.
Split Note 10 and added Note 11. Re-released to the WEB.
Changes from Revision A (April 2013) to Revision B
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 17
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PACKAGE OPTION ADDENDUM
www.ti.com
9-Aug-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
LM4954TL/NOPB
ACTIVE
DSBGA
YZR
9
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
G
F2
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM4954TL/NOPB
DSBGA
YZR
9
250
178.0
8.4
1.7
1.7
0.76
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
DSBGA YZR
SPQ
Length (mm) Width (mm) Height (mm)
210.0 185.0 35.0
LM4954TL/NOPB
9
250
Pack Materials-Page 2
MECHANICAL DATA
YZR0009xxx
D
0.600±0.075
E
TLA09XXX (Rev C)
D: Max = 1.51 mm, Min = 1.45 mm
E: Max = 1.51 mm, Min = 1.45 mm
4215046/A
12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
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