LM5008MMEP [TI]
High Voltage (100V) Step Down Switching Regulator; 高电压（ 100V ）降压开关稳压器
| 型号： | LM5008MMEP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | High Voltage (100V) Step Down Switching Regulator |
| 文件： | 总16页 (文件大小：384K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM5008EP
LM5008EP High Voltage (100V) Step Down Switching Regulator
Literature Number: SNVS445A
OBSOLETE
August 30, 2011
LM5008EP
High Voltage (100V) Step Down Switching Regulator
General Description
Features
The LM5008EP Step Down Switching Regulator features all
of the functions needed to implement a low cost, efficient,
Buck bias regulator. This high voltage regulator contains an
100 V N-Channel Buck Switch. The device is easy to imple-
ment and is provided in the MSOP-8 and the thermally en-
hanced LLP-8 packages. The regulator is based on a
hysteretic control scheme using an ON time inversely pro-
portional to VIN. This feature allows the operating frequency
to remain relatively constant. The hysteretic control requires
no loop compensation. An intelligent current limit is imple-
mented with forced OFF time, which is inversely proportional
to Vout. This scheme ensures short circuit protection while
providing minimum foldback. Other protection features in-
clude: Thermal Shutdown, VCC under-voltage lockout, Gate
drive under-voltage lockout, and Max Duty Cycle limiter
Integrated 100V, N-Channel buck switch
■
■
■
■
■
■
Internal VCC regulator
No loop compensation required
Ultra-Fast transient response
On time varies inversely with line voltage
Operating frequency remains constant with varying line
voltage and load current
Adjustable outpuoltage
■
■
■
■
■
■
Highly efficieneran
Precision internaenc
Low bias rrent
Intelligrent limit protection
Thermal shut
ENHANCED PLASTIC
•
•
•
•
•
•
Extended Temperature Performance of −40°C to +125°C
Baseline Control - Single Fab & Assembly Site
Process Change Notification (PCN)
Qualification & Reliability Data
Solder (PbSn) Lead Finish is standard
TyicaApplications
Sd Mry Applications
■
■
■
Selectionics Applications
Non-Isolated Telecommunication Buck Regulator
Secdary High Voltage Post Regulator
Enhanced Diminishing Manufacturing Sources (DMS)
Support
Package
MSOP - 8
■
LLP - 8 (4mm x 4mm)
Ordering Information
Part Numr VID PaNumber NS Package Number (Note 3)
LM50
(Note
V62/06618–01
TBD
MUA08A
TBD
Note 1: For the following (Enhancersion, ck for availability: - LM5008MMXEP, LM5008SDEP, LM5008SDXEP.
Note 2: FOR ADDITIONAL ORDODUCT INFORMATION, PLEASE VISIT THE ENHANCED PLASTIC WEB SITE AT: www.national.com/
mil
Note 3: Refer to package details Dimensions
Connection Diagram
20187602
8-Lead MSOP, LLP
© 2011 National Semiconductor Corporation
201876
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201876 Version 2 Revision 4 Print Date/Time: 2011/08/30 23:05:33
Typical Application Circuit and Block Diagram
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Pin Descriptions
Pin
Name
Description
Application Information
1
SW
Switching Node
Power switching node. Connect to the output inductor,
re-circulating diode, and bootstrap capacitor.
2
3
BST
RCL
Boost Pin (Boot–strap capacitor input)
An external capacitor is required between the BST
and the SW pins. A 0.01µF ceramic capacitor is
recommended. An internal diode charges the
capacitor from VCC
.
Current Limit OFF time set pin
Toff = 10-5 / (0.285 + (FB / 6.35 x 10− 6 x RCL))
A resistor between this pin and RTN sets the off-time
when current limit is detected. The off-time is preset
to 35µs if FB = 0V.
4
5
RTN
FB
Ground pin
Ground for the entire circuit.
Feedback input from Regulated Output
This pin is connected to the inverting input of the
internal regtion comparator. The regulation
threshold 2.5V
6
7
RON/SD
On time set pin
Ton = 1.25 x 10-10 RON / VIN
A resistor bn thpin and VIN sets the switch on
time a functiIN. The minimum recommended
ois 400ns at the maximum input voltage. This
pn can sed for remote shutdown.
VCC
Output from the internal high voltage series pass If an auxiliarvoltage is available to raise the voltage
regulator. Regulated at 7.0V.
ohis pin, above the regulation setpoint (7V), the
ernaeries pass regulator will shutdown, reducing
power dissipation. Do not exceed 14V. This
voltge provides gate drive power for the internal Buck
itch. An internal diode is provided between this pin
and the BST pin. A local 0.1µF decoupling capacitor
is recommended. Series pass regulator is current
limited to 10mA.
8
VIN
Input voltage
Recommended operating range: 9.5V to 95V.
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BST to SW
VCC to GND
14V
14V
Absolute Maximum Ratings (Note 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
All Other Inputs to GND
Lead Temperature (Soldering 4 sec)
Storage Temperature Range
-0.3 to 7V
200°C
-55°C to +150°C
VIN to GND
-0.3V to 100V
-0.3V to 114V
-1V
BST to GND
Operating Ratings (Note 4)
VIN
SW to GND (Steady State)
ESD Rating (Note 8)
Human Body Model
BST to VCC
9.5V to 95V
−40°C to + 125°C
Operating Junction Temperature
1.5kV
100V
Electrical Characteristics (Note 10)
Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Tem-
perature range. VIN = 48V, unless otherwise stated (Note 6).
Symbol
VCC Supply
VCC Reg
Parameter
Conditions
Min
Typ
Max
Units
VCC Regulator Output
VCC Current Limit
6.6
7
7.4
V
mA
V
(Note 7)
6.3
VCC undervoltage Lockout
Voltage (VCC increasing)
VCC Undervoltage Hysteresis
VCC UVLO Delay (filter)
IIN Operating Current
200
10
mV
µs
100mV overdrive
Non-Switching, FB = 3V
RON/SD = 0V
485
76
675
150
µA
µA
IIN Shutdown Current
Switch Characteristics
Buck Switch Rds(on)
ITEST = 20(Note
1.15
4.5
2.47
5.5
Ω
V
Gate Drive UVLO
VBST −
3.4
Gate Drive UVLO Hysteresis
430
mV
Current Limit
Current Limit Threshold
0.41
0.51
400
0.61
A
Current Limit Response Time
vive = 0.1A Time
to Switcff
ns
OFF time generator (test
OFF time generator (tes
FB=0VRCL = 100K
35
µs
µs
2.3V, RCL = 100K
2.56
On Time Generator
TON - 1
Vin = 10V
Ron = 200K
2.15
200
2.77
300
3.5
420
1.05
µs
ns
TON - 2
Vin = 95V
Ron = 200K
Remote Shutdown Threshold
Remote Shutdown Hysteresis
Rising
0.40
0.70
35
V
mV
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Symbol
Parameter
Conditions
FB = 0V
Min
Typ
300
2.5
Max
Units
ns
Minimum Off Time
Minimum Off Timer
Regulation and OV Comparators
FB Reference Threshold
Internal reference
2.445
2.550
V
Trip point for switch ON
FB Over-Voltage Threshold
FB Bias Current
Trip point for switch OFF
2.875
100
V
nA
Thermal Shutdown
Tsd
Thermal Shutdown Temp.
165
25
°C
°C
Thermal Shutdown Hysteresis
Thermal Resistance
Junction to Ambient
MUA Package
SDC Package
°C/W
°C/W
θJA
200
40
Note 4: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating are ctions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electl Charti
Note 5: For detailed information on soldering plastic MSOP and LLP packages, refer to the Packg Data Book lable from National Semiconductor
Corporation.
Note 6: All limits are guaranteed. All electrical characteristics having room temperature limits e testeng production with TA = TJ = 25°C. All hot and cold
limits are guaranteed by correlating the electrical characteristics to process and temperatvariations anlying statistical process control.
Note 7: The VCC output is intended as a self bias for the internal gate drive power and rol cicuits. Device thermal limitations limit external loading.
Note 8: The human body model is a 100pF capacitor discharged through a 1.5kΩ reintach pin.
Note 9: For devices procured in the LLP-8 package the Rds(on) limits are guaranteed by n chterization data only.
Note 10: "Testing and other quality control techniques are used to the extent deemed necessnsure product performance over the specified temperature
range. Product may not necessarily be tested across the full temperature ranand all parametermay not necessarily be tested. In the absence of specific
PARAMETRIC testing, product performance is assured by characterization adesign."
5
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Typical Performance
Characteristics
20187611
FIGURE 4. Mum quency vs VOUT and VIN
20187609
FIGURE 2. ICC Current vs Applied VCC Voltage
20187612
FIGURE 5. Current Limit Off-Time vs VFB and RCL
0187610
FIGURE 3. ON-Time ge and RON
20187623
FIGURE 6. Efficiency vs VIN
(Circuit of Figure 13)
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down, VCC under-voltage lockout, Gate drive under-voltage
lockout, Max Duty Cycle limit timer and the intelligent current
limit off timer.
Hysteretic Control Circuit Overview
The LM5008EP is a Buck DC-DC regulator that uses a control
scheme in which the on-time varies inversely with line voltage
(VIN). Control is based on a comparator and the on-time one-
shot, with the output voltage feedback (FB) compared to an
internal reference (2.5V). If the FB level is below the reference
the buck switch is turned on for a fixed time determined by the
line voltage and a programming resistor (RON). Following the
ON period the switch will remain off for at least the minimum
off-timer period of 300ns. If FB is still below the reference at
that time the switch will turn on again for another on-time pe-
riod. This will continue until regulation is achieved.
The LM5008EP opates in discontinuous conduction mode
at light load currts, and continuous conduction mode at
heavy load curIn scontinuous conduction mode, cur-
rent through the oinduor starts at zero and ramps up
to a peak dng the othen ramps back to zero before
the end off-time. Te next on-time period starts when
the volte afalls below the internal reference - until then
the inductor curremains zero. In this mode the operating
freency is lower tan in continuous conduction mode, and
ves wload current. Therefore at light loads the conver-
siiencs maintained, since the switching losses re-
duce treduction in load and frequency. The discon-
tinuous oating frequency can be calculated as follows:
20187627
FIGURE 7. Efficiency vs Load Current vs VIN
(Circuit of Figure 13)
where RL = the load resistance
In continuous conduction mode, current flows continuously
through the inductor and never ramps down to zero. In this
mode the operating frequency is greater than the discontinu-
ous mode frequency and remains relatively constant with load
and line variations. The approximate continuous mode oper-
ating frequency can be calculated as follows:
201876
FIGURE 8. Output Voltage nt
(Circuit of Figure
(1)
Functional Descr
The output voltage (VOUT) can be programmed by two exter-
nal resistors as shown in Figure 1. The regulation point can
be calculated as follows:
The LM5008EP Step Down ulator features all
the functions needed to implecost, efficient, Buck
bias power converter. This high e regulator contains a
100 V N-Channel Buck Switch, is easy to implement and is
provided in the MSOP-8 and the thermally enhanced LLP-8
packages. The regulator is based on a hysteretic control
scheme using an on-time inversely proportional to VIN. The
hysteretic control requires no loop compensation. Current
limit is implemented with forced off-time, which is inversely
proportional to VOUT. This scheme ensures short circuit pro-
tection while providing minimum foldback. The Functional
Block Diagram of the LM5008EP is shown in Figure 1.
VOUT = 2.5 x (R1 + R2) / R2
All hysteretic regulators regulate the output voltage based on
ripple voltage at the feedback input, requiring a minimum
amount of ESR for the output capacitor C2. A minimum of
25mV to 50mV of ripple voltage at the feedback pin (FB) is
required for the LM5008EP. In cases where the capacitor
ESR is too small, additional series resistance may be required
(R3 in Figure 1).
For applications where lower output voltage ripple is required
the output can be taken directly from a low ESR output ca-
pacitor, as shown in Figure 9. However, R3 slightly degrades
the load regulation.
The LM5008EP can be applied in numerous applications to
efficiently regulate down higher voltages. This regulator is
well suited for 48 Volt Telecom and the new 42V Automotive
power bus ranges. Protection features include: Thermal Shut-
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20187605
FIGURE 9. Low Ripple Output Configuration
In applications lvia high value for VIN, where power
dissipation in the gulais a concern, an auxiliary volt-
age can biode ced to the VCC pin. Setting the
auxiliary ge to 8.0 -1V will shut off the internal regulator,
reducinntpower dissipation. See Figure 10. The cur-
rent required intVCC pin is shown in Figure 2.
High Voltage Start-Up Regulator
The LM5008EP contains an internal high voltage startup reg-
ulator. The input pin (VIN) can be connected directly to the line
voltages up to 95 Volts, with transient capability to 100 volts.
The regulator is internally current limited to 9.5mA at VCC
.
Upon power up, the regulator sources current into the external
capacitor at VCC (C3). When the voltage on the VCC pin reach-
es the under-voltage lockout threshold of 6.3V, the buck
switch is enabled.
20187606
FIGURE 10. Self Biased Configuration
Regulation Comparator
Over-Voltage Comparator
The feedback voltage at FB is compared to an internal 2.5V
reference. In normal operation (the output voltage is regulat-
ed), an on-time period is initiated when the voltage at FB falls
below 2.5V. The buck switch will stay on for the on-time,
causing the FB voltage to rise above 2.5V. After the on-time
period, the buck switch will stay off until the FB voltage again
falls below 2.5V. During start-up, the FB voltage will be below
2.5V at the end of each on-time, resulting in the minimum off-
time of 300 ns. Bias current at the FB pin is nominally 100 nA.
The feedback voltage at FB is compared to an internal 2.875V
reference. If the voltage at FB rises above 2.875V the on-time
pulse is immediately terminated. This condition can occur if
the input voltage, or the output load, change suddenly. The
buck switch will not turn on again until the voltage at FB falls
below 2.5V.
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201876 Version 2 Revision 4 Print Date/Time: 2011/08/30 23:05:33
operation. This requirement limits the maximum frequency for
each application, depending on VIN and VOUT. See Figure 4.
On-Time Generator and Shutdown
The on-time for the LM5008EP is determined by the RON re-
sistor, and is inversely proportional to the input voltage (Vin),
resulting in a nearly constant frequency as Vin is varied over
its range. The on-time equation for the LM5008EP is:
The LM5008EP can be remotely disabled by taking the RON
/
SD pin to ground. See Figure 11. The voltage at the RON/SD
pin is between 1.5 and 3.0 volts, depending on Vin and the
value of the RON resistor.
TON = 1.25 x 10-10 x RON / VIN
(2)
See Figure 3. RON should be selected for a minimum on-time
(at maximum VIN) greater than 400 ns, for proper current limit
607
FIGURE 11. Shutdown Immentation
Current Limit
TheProtection
The LM5008EP contains an intelligent current limit OFF timer.
If the current in the Buck switch exceeds 0.5A the present
cycle is immediately terminated, and a non-resetable OFF
timer is initiated. The length of off-time is controlled by a
ternal resistor (RCL) and the FB voltage (see Figure 5)
FB = 0V, a maximum off-time is required, and the time
set to 35µs. This condition occurs when the output is sh
and during the initial part of start-up. This amouof time e
sures safe short circuit operation up to the ximum input
voltage of 95V. In cases of overload where ths
above zero volts (not a short circuit) the current limit off-e
will be less than 35µs. Reducing the ofduring lese-
vere overloads reduces the amoun, recovery
time, and the start-up time. The off-tifrom the
following equation:
The LM5008EP should be operated so the junction tempera-
ture ds not exceed 125°C during normal operation. An
l Thermal Shutdown circuit is provided to protect the
LM008EP in the event of a higher than normal junction tem-
perature. When activated, typically at 165°C, the controller is
forced into a low power reset state, disabling the buck switch
and the VCC regulator. This feature prevents catastrophic fail-
ures from accidental device overheating. When the junction
temperature reduces below 140°C (typical hysteresis = 25°
C), the Vcc regulator is enabled, and normal operation is re-
sumed.
Applications Information
SELECTION OF EXTERNAL COMPONENTS
TOFF = 10-5 / (0.285 + (VF10-6 x CL))
(3)
A guide for determining the component values will be illus-
trated with a design example. Refer to Figure 1. The following
steps will configure the LM5008EP for:
The current limit sensing circor the first 50-70ns
of each on-time so it is not fay the current surge
which occurs at turn-on. The e is required by the
re-circulating diode (D1) for its turecovery.
•
•
•
Input voltage range (Vin): 12V to 95V
Output voltage (VOUT1): 10V
Load current (for continuous conduction mode): 100 mA
to 300 mA
N - Channel Buck Switch and Driver
•
Maximum ripple at VOUT2: 100 mVp-p at maximum input
voltage
The LM5008EP integrates an N-Channel Buck switch and
associated floating high voltage gate driver. The gate driver
circuit works in conjunction with an external bootstrap capac-
itor and an internal high voltage diode. A 0.01µF ceramic
capacitor (C4) connected between the BST pin and SW pin
provides the voltage to the driver during the on-time.
R1 and R2: From Figure 1, VOUT1 = VFB x (R1 + R2) / R2, and
since VFB = 2.5V, the ratio of R1 to R2 calculates as 3:1.
Standard values of 3.01 kΩ (R1) and 1.00 kΩ (R2) are cho-
sen. Other values could be used as long as the 3:1 ratio is
maintained. The selected values, however, provide a small
amount of output loading (2.5 mA) in the event the main load
is disconnected. This allows the circuit to maintain regulation
until the main load is reconnected.
During each off-time, the SW pin is at approximately 0V, and
the bootstrap capacitor charges from Vcc through the internal
diode. The minimum OFF timer, set to 300ns, ensures a min-
imum time each cycle to recharge the bootstrap capacitor.
Fs and RON: The recommended operating frequency range
for the LM5008EP is 50kHz to 600 kHz. Unless the application
requires a specific frequency, the choice of frequency is gen-
erally a compromise since it affects the size of L1 and C2, and
An external re-circulating diode (D1) carries the inductor cur-
rent after the internal Buck switch turns off. This diode must
be of the Ultra-fast or Schottky type to minimize turn-on losses
and current over-shoot.
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the switching losses. The maximum allowed frequency,
based on a minimum on-time of 400 ns, is calculated from:
without saturating, since the current limit is reached during
startup.
The DC resistance of the inductor should be as low as pos-
sible. For example, if the inductor’s DCR is one ohm, the
power dissipated at maximum load current is 0.09W. While
small, it is not insignificant compared to the load power of 3W.
FMAX = VOUT / (VINMAX x 400ns)
For this exercise, Fmax = 263kHz. From equation 1, RON cal-
culates to 304 kΩ. A standard value 357 kΩ resistor will be
used to allow for tolerances in equation 1, resulting in a fre-
quency of 224kHz.
C3: The capacitor on the VCC output provides not only noise
filtering and stability, but its primary purpose is to prevent false
triggering of the VCC UVLO at the buck switch on/off transi-
tions. For this reason, C3 should be no smaller than 0.1 µF.
L1: The main parameter affected by the inductor is the output
current ripple amplitude. The choice of inductor value there-
fore depends on both the minimum and maximum load cur-
rents, keeping in mind that the maximum ripple current occurs
at maximum Vin.
C2, and R3: When selecting the output filter capacitor C2, the
items to consider are ripple voltage due to its ESR, ripple
voltage due to its capacitance, and the nature of the load.
a) Minimum load current: To maintain continuous conduc-
tion at minimum Io (100 mA), the ripple amplitude (IOR) must
be less than 200 mA p-p so the lower peak of the waveform
does not reach zero. L1 is calculated using the following
equation:
a) ESR and R3: A low ESR for C2 is generally desirable so
as to minimize power losses and heating within the capacitor.
However, a hysteretic regulator requires a minimum amount
of ripple voltage at e feedback input for proper loop opera-
tion. For the LM58EP the minimum ripple required at pin 5
is 25 mV p-p, reing minimum ripple at VOUT1 of 100 mV.
Since the minimule cent (at minimum Vin) is 34 mA
p-p, the mium ESired at VOUT1 is 100mV/34mA =
2.94Ω. Squality capcitors for SMPS applications have
an ESR onably less than this, R3 is inserted as shown
in Figure 1. R3’ue, along with C2’s ESR, must result in
at lst 25 mV p-p ripple at pin 5. Generally, R3 will be 0.5 to
3.
At Vin = 95V, L1(min) calculates to 200 µH. The next larger
standard value (220 µH) is chosen and with this value IOR
calculates to 181 mA p-p at Vin = 95V, and 34 mA p-p at Vin
= 12V.
b) e ohe Load: The load can be connected to
VOUT1 T2. VOUT1 provides good regulation, but with a
ripple volte which ranges from 100 mV (@ Vin = 12V) to
500mV (@Vin = 95V). Alternatively, VOUT2 provides low rip-
e, lower regulation due to R3.
b) Maximum load current: At a load current of 300 mA, the
peak of the ripple waveform must not reach the minimum
guaranteed value of the LM5008EP’s current limit threshold
(410 mA). Therefore the ripple amplitude must be less than
220 mA p-p, which is already satisfied in the above calcu
tion. With L1 = 220 µH, at maximum Vin and Io, the p
the ripple will be 391 mA. While L1 must carry this pe
rent without saturating or exceeding its temperature r
also must be capable of carrying the maximum guaran
value of the LM5008EP’s current limit thresh(610 mA)
Fmaximum allowed ripple voltage of 100 mVp-p at
VOUT2 (@ Vin = 95V), assume an ESR of 0.4Ω for C2. At
maximum Vin, the ripple current is 181 mAp-p, creating a rip-
ple voltage of 72 mVp-p. This leaves 28 mVp-p of ripple due
to the capacitance. The average current into C2 due to the
ripple current is calculated using the waveform in Figure 12.
20187626
FIGURE 12. Inductor Current Waveform
Starting when the current reaches Io (300 mA in Figure 12)
half way through the on-time, the current continues to in-
crease to the peak (391 mA), and then decreases to 300 mA
half way through the off-time. The average value of this por-
tion of the waveform is 45.5mA, and will cause half of the
voltage ripple, or 14 mV. The interval is one half of the fre-
quency cycle time, or 2.23 µs. Using the capacitor’s basic
equation:
provides a practical minimum value for C2 based on its ESR,
and the target spec. To allow for the capacitor’s tolerance,
temperature effects, and voltage effects, a 15 µF, X7R ca-
pacitor will be used.
c) In summary: The above calculations provide a minimum
value for C2, and a calculation for R3. The ESR is just as
important as the capacitance. The calculated values are
guidelines, and should be treated as starting points. For each
application, experimentation is needed to determine the op-
timum values for R3 and C2.
C = I x Δt / ΔV
the minimum value for C2 is 7.2 µF. The ripple due to C2’s
capacitance is 90° out of phase from the ESR ripple, and the
two numbers do not add directly. However, this calculation
RCL: When a current limit condition is detected, the minimum
off-time set by this resistor must be greater than the maximum
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normal off-time which occurs at maximum Vin. Using equation
2, the minimum on-time is 0.470 µs, yielding a maximum off-
time of 3.99 µs. This is increased by 117 ns (to 4.11 µs) due
to a ±25% tolerance of the on-time. This value is then in-
creased to allow for:
which is dominant in this case. To allow for the capacitor’s
tolerance, temperature effects, and voltage effects, a 1.0 µF,
100V, X7R capacitor will be used.
C4: The recommended value is 0.01µF for C4, as this is ap-
propriate in the majority of applications. A high quality ceramic
capacitor, with low ESR is recommended as C4 supplies the
surge current to charge the buck switch gate at turn-on. A low
ESR also ensures a quick recharge during each off-time. At
minimum Vin, when the on-time is at maximum, it is possible
during start-up that C4 will not fully recharge during each 300
ns off-time. The circuit will not be able to complete the start-
up, and achieve output regulation. This can occur when the
frequency is intended to be low (e.g., RON = 500K). In this
case C4 should be increased so it can maintain sufficient
voltage across the buck switch driver during each on-time.
The response time of the current limit detection loop
(400ns),
The off-time determined by equation 3 has a ±25% toler-
ance,
tOFFCL(MIN) = (4.11 µs + 0.40µs) x 1.25 = 5.64 µs
Using equation 3, RCL calculates to 264kΩ (at VFB = 2.5V).
The closest standard value is 267 kΩ.
D1: The important parameters are reverse recovery time and
forward voltage. The reverse recovery time determines how
long the reverse current surge lasts each time the buck switch
is turned on. The forward voltage drop is significant in the
event the output is short-circuited as it is only this diode’s
voltage which forces the inductor current to reduce during the
forced off-time. For this reason, a higher voltage is better, al-
though that affects efficiency. A good choice is an ultrafast
power diode, such as the MURA110T3 from ON Semicon-
ductor. Its reverse recovery time is 30ns, and its forward
voltage drop is approximately 0.72V at 300 mA at 25°C. Other
types of diodes may have a lower forward voltage drop, but
may have longer recovery times, or greater reverse leakage.
D1’s reverse voltage rating must be at least as great as the
maximum Vin, and its current rating be greater than the max-
imum current limit threshold (610 mA).
C5: This capacitor helps avoid supply voltage transients and
ringing due to long lead inductance at VIN. A low ESR, 0.1µF
ceramic chip capaor is recommended, located close to the
LM5008EP.
FINAL CIRCIT
The final cit is showFigure 13. The circuit was tested,
and the g performance is shown in Figure 6 through
Figure 8 .
PC OARD LAYOUT
LM08EP regulation and over-voltage comparators are
ver, anas such will respond to short duration noise
pulsesut considerations are therefore critical for opti-
mum perfomance. The components at pins 1, 2, 3, 5, and 6
should e as physically close as possible to the IC, thereby
niing noise pickup in the PC tracks. The current loop
fod by D1, L1, and C2 should be as small as possible. The
ground connection from C2 to C1 should be as short and di-
rect as possible.
C1: This capacitor’s purpose is to supply most of the switch
current during the on-time, and limit the voltage ripple at Vin,
on the assumption that the voltage source feeding Vin has an
output impedance greater than zero. At maximum load
rent, when the buck switch turns on, the current into pi
suddenly increase to the lower peak of the output
waveform, ramp up to the peak value, then drop to z
turn-off. The average input current during this time is t
load current (300 mA). For a worst case calcuon, C1 must
supply this average load current during the man-e.
To keep the input voltage ripple to less than 2V (for thix-
ercise), C1 calculates to:
If the internal dissipation of the LM5008EP produces exces-
sive junction temperatures during normal operation, good use
of the pc board’s ground plane can help considerably to dis-
sipate heat. The exposed pad on the bottom of the LLP-8
package can be soldered to a ground plane on the PC board,
and that plane should extend out from beneath the IC to help
dissipate the heat. Additionally, the use of wide PC board
traces, where possible, can also help conduct heat away from
the IC. Judicious positioning of the PC board within the end
product, along with use of any available air flow (forced or
natural convection) can help reduce the junction tempera-
tures.
Quality ceramic capacitors in e a low ESR which
adds only a few millivolts to is the capacitance
11
201876 Version 2 Revision 4 Print Date/Time: 2011/08/30 23:05:33
www.national.com
20187622
FIGURE 13. LM5008EP EmplCircuit
Bill of Materials (Circuit of Figu13)
Item
C1
C2
C3
C4
C5
D1
L1
Description
Nuer
Value
Ceramic Capacitor
Ceramic Capacitor
Ceramic Capacitor
Ceramic Capacior
Ceramic Capitor
UltraFast Pode
Power Inductor
TDK 32X7R2A105M
DK C4532X7R1E156M
met C1206C104K5RAC
emet C1206C103K5RAC
TDK C3216X7R2A104M
ON Semi MURA110T3
Coilcraft DO3316-224 or
TDK SLF10145T-221MR65
Vishay CRCW12063011F
Vishay CRCW12061001F
Vishay CRCW12062R00F
Vishay CRCW12063573F
Vishay CRCW12062673F
1µF, 100V
15µF, 25V
0.1µF, 50V
0.01µF, 50V
0.1µF, 100V
100V, 1A
220 µH
R1
Re
3.01 kΩ
1.0 kΩ
2.0 Ω
R2
Resistor
R3
r
RON
RCL
U1
357 kΩ
267 kΩ
Switching Regulator
National Semiconductor
LM5008EP
www.national.com
12
201876 Version 2 Revision 4 Print Date/Time: 2011/08/30 23:05:33
Physical Dimensions inches (millimeters) unless otherwise noted
8-LeOP Page
NS Paber MUA08A
8-Lead LLP Package
NS Package Number SDC08A
13
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201876 Version 2 Revision 4 Print Date/Time: 2011/08/30 23:05:33
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相关型号：
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IC 0.61 A SWITCHING REGULATOR, 600 kHz SWITCHING FREQ-MAX, PDSO8, PLASTIC, MSOP-8, Switching Regulator or Controller
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