LM6511IMX/NOPB [TI]
180 ns 3V 比较器 | D | 8 | -40 to 85;
| 型号： | LM6511IMX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 180 ns 3V 比较器 | D | 8 | -40 to 85 比较器 |
| 文件： | 总16页 (文件大小：1075K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM6511
www.ti.com
SNOS695C –JUNE 1999–REVISED MARCH 2013
LM6511 180 ns 3V Comparator
Check for Samples: LM6511
1
FEATURES
DESCRIPTION
The LM6511 voltage comparator is ideal for analog-
digital interface circuitry when only a +3V or +3.3V
supply is available. The open-collector output permits
signal compatibility with a wide variety of digital
families: +5V CMOS, +3V CMOS, TTL and so on.
Supply voltage may range from 2.7V to 36V between
supply voltage leads. The LM6511 operates with little
power consumption (Pdiss < 9.45 mW at V+ = +2.7V
and V− = 0V).
2
•
•
•
(Typical Unless Otherwise Noted)
Operates at +2.7V, +3V, +3.3V, +5V
Low Power Consumption <9.45 mW @ V+ =
2.7V (max)
•
Fast Response Time of 180 ns
APPLICATIONS
•
•
•
Portable Equipment
Cellular Phones
This voltage comparator offers many features that are
available in traditional sub-microsecond comparators:
output sync strobe, inputs and output may be isolated
from system ground, and wire-ORing. Also, the
Digital Level Shifting
LM6511
uses
the
industry-standard,
single
comparator pinout configuration.
Connection Diagram
Figure 1. 8-Pin SOIC
See Package Number D
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated
LM6511
SNOS695C –JUNE 1999–REVISED MARCH 2013
www.ti.com
Absolute Maximum Ratings(1)(2)
Supply Voltage
−0.3 to +36V
50V
Output to Negative Supply Voltage
Ground to Negative Supply Voltage
Differential Input Voltage
30V
±30V
Input Voltage
See(1)
Storage Temperature Range
Soldering Information:
−65°C to +150°C
215°C
SOIC Package (Vapor Phase in 60 sec)
SOIC Package (Infrared in 15 sec)
220°C
Power Dissipation
500 mW
10s
Output Short Circuit Duration
Junction Temperature
150°C
ESD Rating (C = +100 pF, R = 1.5 kΩ)
300V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions the
device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions,
see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Operating Ratings(1)
Supply Voltage
2.5V to 30V
−40°C ≤ TJ ≤ +85°C
170°C/W
Temperature Range
Thermal Resistance (θJA
)
SOIC Package
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions the
device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions,
see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 2.7V,
V− = 0V, 50Ω ≤ RL ≤ 50kΩ, and IL = 1.0 mA unless otherwise specified
Symbol
Parameter
Conditions
S ≤ 50 kΩ(1)
Typical
1.5
LM6511I
Limit
5
Units
(Limits)
VOS
Offset Voltage
R
mV
8
max
IB
Input Bias Current
38
130
200
20
nA
max
IOS
Input Offset Current
Positive Supply Current
Negative Supply Current
Saturation Voltage
R
S ≤ 50 kΩ(1)
1.5
nA
max
50
IS
2.7
3.5
5
mA
max
1.5
2.0
2.5
0.4
0.4
VSAT
VIN ≤ 10 mV
0.23
V
ISINK = 8 mA
max
V/mV
dB
AV
Large Signal Voltage Gain
Common Mode Rejection Ratio
Strobe ON Current
ΔVOUT = 2V
40
72
CMRR
ISTROBE
See(2)
2.0
5.0
mA
max
(1) The offset voltage and offset current limits are the maximum values required to drive the output within a volt of either supply with a 1 mA
load. Therefore, these parameters define an error band and take into account the worst-case effects of voltage gain and input
impedance.
(2) This specification gives the range of current which must be drawn from the strobe pin to ensure the output is properly disabled. Do not
short the strobe pin to ground; it should be current driven at 3 mA to 5 mA.
2
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Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: LM6511
LM6511
www.ti.com
SNOS695C –JUNE 1999–REVISED MARCH 2013
DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 2.7V,
V− = 0V, 50Ω ≤ RL ≤ 50kΩ, and IL = 1.0 mA unless otherwise specified
Symbol
Parameter
Conditions
Typical
LM6511I
Limit
Units
(Limits)
VIN
Input Voltage Range
0.50
V min
V+ − 1.25
V max
Output Leakage Current
V
IN ≥ 10 mV, VOUT = 35V,
nA
max
0.2
ISTROBE = 3 mA
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 2.7V,
V− = 0V, 50Ω ≤ RL ≤ 50kΩ, and IL = 1.0 mA unless otherwise specified
Symbol
Parameter
Conditions
Typical
LM6511I
Limit
Units
(Limits)
TR
Response Time
See(1)
180
ns
(1) This specification is for a 100 mV input step with a 25 mV overdrive.
Copyright © 1999–2013, Texas Instruments Incorporated
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3
Product Folder Links: LM6511
LM6511
SNOS695C –JUNE 1999–REVISED MARCH 2013
www.ti.com
LM6511 Typical Performance Characteristics
VS = 3V unless otherwise noted
Input Bias Current
Input Offset Current
Figure 2.
Figure 3.
Input Current
vs. Input Voltage
Common Mode Limits
Figure 4.
Figure 5.
Transfer Function
Output Saturation Voltage
Figure 6.
Figure 7.
4
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Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: LM6511
LM6511
www.ti.com
SNOS695C –JUNE 1999–REVISED MARCH 2013
LM6511 Typical Performance Characteristics (continued)
VS = 3V unless otherwise noted
Supply Current
vs. Temperature
Output Current Limiting
Figure 8.
Figure 9.
Propagation Delay
vs. Overdrive
Output Leakage Current
Figure 10.
Figure 11.
Typical Application
Notes: Because of the very wide operating and output voltage range, the LM6511 may be used to shift logic levels
from 3V to TTL or CMOS to the other way around. By biasing the input to ½ of the input logic supply (VA), this
assures that this input remains within the input voltage range. The pull-up resistor should go to the output logic supply
(VB).
Figure 12. Universal Logic Level Shifter
Copyright © 1999–2013, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links: LM6511
LM6511
SNOS695C –JUNE 1999–REVISED MARCH 2013
www.ti.com
Schematic Diagram
6
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Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: LM6511
LM6511
www.ti.com
SNOS695C –JUNE 1999–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision B (March 2013) to Revision C
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................ 6
Copyright © 1999–2013, Texas Instruments Incorporated
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7
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PACKAGE OPTION ADDENDUM
www.ti.com
30-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM6511IM
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
95
Non-RoHS
& Green
Call TI
Level-1-235C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
LM65
11IM
LM6511IM/NOPB
LM6511IMX/NOPB
ACTIVE
ACTIVE
95
RoHS & Green
SN
SN
LM65
11IM
2500 RoHS & Green
LM65
11IM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Sep-2021
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM6511IMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
LM6511IMX/NOPB
D
8
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LM6511IM
LM6511IM
D
D
D
SOIC
SOIC
SOIC
8
8
8
95
95
95
495
495
495
8
8
8
4064
4064
4064
3.05
3.05
3.05
LM6511IM/NOPB
Pack Materials-Page 3
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
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