LM71QCIMFX/NOPB [TI]
具有 SPI 接口的汽车级 ±1.5°C 温度传感器 | DBV | 5 | -40 to 150;
| 型号： | LM71QCIMFX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 SPI 接口的汽车级 ±1.5°C 温度传感器 | DBV | 5 | -40 to 150 温度传感 输出元件 传感器 换能器 温度传感器 |
| 文件： | 总21页 (文件大小：960K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM71, LM71-Q1
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
LM71/LM71-Q1 SPI/MICROWIRE 13 位加号温度传感器
1 特性
2 应用
1
•
LM71Q 符合 AEC-Q100 0 级标准并且采用汽车级
工艺流程制造
•
•
•
•
•
•
•
•
系统热管理
个人计算机
便携式电子设备
磁盘驱动器
办公电子设备
电子测试设备
自动售货机
汽车
•
•
•
•
5 引脚 SOT-23 封装或 6 引脚无后拉 WSON 封装
在 −40°C 至 +150°C 整个温度范围内正常工作
SPI 和 MICROWIRE 总线接口
主要规格：
–
–
电源电压：2.65V 至 5.5V
电源电流
–
–
工作电流：300µA（典型值）
550µA（最大值）
3 说明
LM71 是一款低功耗、高分辨率数字温度传感器，具有
SPI 和 MICROWIRE 兼容接口，采用 5 引脚 SOT-23
或 6 引脚 WSON（无后拉）封装。主机可随时查询
LM71 以读取温度。其低工作电流在低功耗至关重要的
系统中很有用。
–
–
温度精度
–
–
−10°C 至 +65°C：±1.5°C（最大值）
−40°C 至 150°C：+3/− 2°C（最大值）
温度分辨率：31.25m°C
LM71 具有 13 位加号温度分辨率（每 LSB 0.03125°
C），工作温度范围为 −40°C 至 +150°C。
LM71 的 2.65V 至 5.5V 电源电压范围、快速转换速
率、低电源电流和简单 SPI 接口使其成为各种应用的
理想 之选。LM71Q 仅采用 5 引线 SOT-23 封装。
简化方框图
2.65V to 5.5V
14-Bit
Delta-Sigma
A/D Converter
Temperature
Sensor
Circuitry
LM71
Control
Logic
Temperature
Register
Manufacturer's
ID Register
SI/O
SC
Three-Wire
Serial Interface
CS
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important
disclaimers. PRODUCTION DATA.
English Data Sheet: SNIS125
LM71, LM71-Q1
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
www.ti.com.cn
3.1 Connection Diagram
SC
GND
SI/O
1
2
3
6
5
4
V+
CS
GND
SI/O
1
2
3
5
4
V+
GND
CS
LM71
LM71
SC
Figure 1. 5-Pin SOT-23
See Package Number DBV
Figure 2. 6-Pin WSON No Pull-Back
See Package Number NGG0006A
Table 1. PIN DESCRIPTIONS
Label
Pin Number
Function
Typical Connection
SOT-23-5
WSON-6
CS
1
2
4
Chip Select input
From controller
GND
2, 5
Power Supply Ground
Connect all GND Pins to ground
Slave Input/Output - Serial bus bi-directional
data line. Schmitt trigger input.
SI/O
SC
V+
3
4
5
3
1
6
From and to controller
Slave Clock - Serial bus clock Schmitt trigger
input line
From controller
DC voltage from 2.65V to 5.5V. Bypass with
a 0.1 μF ceramic capacitor.
Positive Supply Voltage Input
3.2 Typical Application
Figure 3. COP Microcontroller Interface
3.1 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
3.2 Trademarks
All trademarks are the property of their respective owners.
2
Copyright © 2004–2018, Texas Instruments Incorporated
LM71, LM71-Q1
www.ti.com.cn
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
4 Absolute Maximum Ratings(1)
Supply Voltage
−0.3V to 6.0V
−0.3V to V+ + 0.3V
5 mA
Voltage at any Pin
Input Current at any Pin(2)
Storage Temperature
−65°C to +150°C
Vapor Phase (60 seconds)
215°C
220°C
215°C
2000V
200V
SOT-23-5 Package
Soldering Information, Lead Temperature
ESD Susceptibility(3)
Infrared (15 seconds)
Infrared (5 seconds)
WSON-6 Package
Human Body Model
Machine Model
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not
apply when operating the device beyond its rated operating conditions.
(2) When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > +VS) the current at that pin should be limited to 5
mA.
(3) Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin.
5 Operating Ratings
Specified Temperature Range(1) (TMIN to TMAX
Supply Voltage Range (+VS)
)
LM71CIMF, LM71CISD, LM71QCIMF
LM71CIMF, LM71CISD, LM71QCIMF
−40°C to +150°C
+2.65V to +5.5V
(1) The life expectancy of the LM71 will be reduced when operating at elevated temperatures. LM71 θJA (thermal resistance, junction-to-
ambient) when attached to a printed circuit board with 2 oz. foil is summarized in the table below:
Copyright © 2004–2018, Texas Instruments Incorporated
3
LM71, LM71-Q1
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
www.ti.com.cn
Device Number
Thermal Resistance (θJA
250°C/W
)
LM71CIMF/LM71QCIMF
LM71CISD
57.6°C/W
6 Temperature-to-Digital Converter Characteristics
Unless otherwise noted, these specifications apply for V+ = 2.65V to 3.6V(1). Boldface limits apply for TA = TJ = TMIN to
TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.
LM71CIMF
LM71CISD
Limits(3)
Units
(Limit)
Parameter
Conditions
Typical(2)
TA = −10°C to +65°C
±1.5
±2.0
°C (max)
°C (max)
°C (max)
Temperature Error(1)(4)
Resolution
TA = −40°C to +85°C
TA = −40°C to +150°C
+3/−2
14
0.03125
Bits
°C
Temperature Conversion Time
Quiescent Current
See(5)
200
300
270
550
ms (max)
Serial Bus Inactive
μA (max)
(1) The LM71 will operate properly over the V+ supply voltage range of 2.65V to 5.5V.
(2) Typicals are at TA = 25°C and represent most likely parametric norm.
(3) Limits are ensured to AOQL (Average Outgoing Quality Level).
(4) For best accuracy, minimize output loading. Higher sink currents can affect sensor accuracy with internal heating. This can cause an
error of 0.64°C at full rated sink current and saturation voltage based on junction-to-ambient thermal resistance.
(5) Following a power on reset, the user must allow at least 270 ms before making the first read transaction to ensure a first valid
temperature read. After the first read, in order to ensure an accurate temperature result, the time interval between any two consecutive
temperature reads must be greater than the maximum conversion time of 270 ms. For more information, refer to SNLA296.
7 Logic Electrical Characteristics
DIGITAL DC CHARACTERISTICS
Unless otherwise noted, these specifications apply for V+ = 2.65V to 3.6V(1). Boldface limits apply for TA = TJ = TMIN to
TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.
Symbol
Parameter
Conditions
Typical(2)
Limits(3)
V+ × 0.7
V+ + 0.3
−0.3
Units (Limit)
V (min)
V (max)
V (min)
V (max)
V (min)
μA (max)
μA (min)
pF
VIN(1)
Logical “1” Input Voltage
VIN(0)
Logical “0” Input Voltage
V+ × 0.3
Input Hysteresis Voltage
Logical “1” Input Current
Logical “0” Input Current
All Digital Inputs
V+ = 3.0V to 3.6V
VIN = V+
0.4
0.005
−0.005
20
0.33
IIN(1)
IIN(0)
CIN
3.0
VIN = 0V
−3.0
VOH
VOL
High Level Output Voltage
Low Level Output Voltage
IOH = −400 μA
2.4
0.4
V (min)
V (max)
IOL = +2 mA
VO = GND
VO = V+
−1
+1
μA (min)
μA (max)
IO_TRI-STATE
TRI-STATE Output Leakage Current
(1) The LM71 will operate properly over the V+ supply voltage range of 2.65V to 5.5V.
(2) Typicals are at TA = 25°C and represent most likely parametric norm.
(3) Limits are ensured to AOQL (Average Outgoing Quality Level).
4
Copyright © 2004–2018, Texas Instruments Incorporated
LM71, LM71-Q1
www.ti.com.cn
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
SERIAL BUS DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for V+ = 2.65V to 3.6V(1); CL (load capacitance) on output lines = 100 pF
unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless
otherwise noted.
Units
(Limit)
Symbol
t1
Parameter
Conditions
Typical(2)
Limits(3)
0.16
DC
μs (min)
(max)
SC (Clock) Period
t2
t3
t4
t5
t6
t7
tr
CS Low to SC (Clock) High Set-Up Time
CS Low to Data Out (SO) Delay
SC (Clock) Low to Data Out (SO) Delay
CS High to Data Out (SO) TRI-STATE
SC (Clock) High to Data In (SI) Hold Time
Data In (SI) Set-Up Time to SC (Clock) High
SC (Clock) Rise Time
100
70
ns (min)
ns (max)
ns (max)
ns (max)
ns (min)
ns (min)
ns (max)
ns (max)
70
200
50
30
100
100
tf
SC (Clock) Fall Time
(1) The LM71 will operate properly over the V+ supply voltage range of 2.65V to 5.5V.
(2) Typicals are at TA = 25°C and represent most likely parametric norm.
(3) Limits are ensured to AOQL (Average Outgoing Quality Level).
70%
30%
70%
30%
70%
SC
30%
t
4
t
2
t
4
t
f
t
r
70%
30%
CS
t
3
70%
SO
30%
Figure 4. Data Output Timing Diagram
SC
70%
CS
t
5
70%
30%
SO
Figure 5. TRI-STATE Data Output Timing Diagram
Copyright © 2004–2018, Texas Instruments Incorporated
5
LM71, LM71-Q1
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
www.ti.com.cn
70%
SC
CS
SI
30%
t
7
t
6
70%
30%
Figure 6. Data Input Timing Diagram
Figure 7. Temperature-to-Digital Transfer Function (Non-linear scale for clarity)
Figure 8. TRI-STATE Test Circuit
6
Copyright © 2004–2018, Texas Instruments Incorporated
LM71, LM71-Q1
www.ti.com.cn
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
8 Typical Performance Characteristics
Figure 9. Static Supply Current vs. Temperature
Figure 10. Temperature Error
Copyright © 2004–2018, Texas Instruments Incorporated
7
LM71, LM71-Q1
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
www.ti.com.cn
9 Functional Description
The LM71 temperature sensor incorporates a temperature sensor and 13-bit plus sign ΔΣ ADC (Delta-Sigma
Analog-to-Digital Converter). Compatibility of the LM71's three wire serial interface with SPI and MICROWIRE
allows simple communications with common microcontrollers and processors. Shutdown mode can be used to
optimize current drain for different applications. A Manufacture's/Device ID register identifies the LM71 as TI
product.
9.1 POWER UP AND POWER DOWN
The LM71 always powers up in a known state. The power up default condition is continuous conversion mode.
Immediately after power up the LM71 will output an erroneous code until the first temperature conversion has
completed.
When the supply voltage is less than about 1.6V (typical), the LM71 is considered powered down. As the supply
voltage rises above the nominal 1.6V power up threshold, the internal registers are reset to the power up default
state described above.
9.2 SERIAL BUS INTERFACE
The LM71 operates as a slave and is compatible with SPI or MICROWIRE bus specifications. Data is clocked
out on the falling edge of the serial clock (SC), while data is clocked in on the rising edge of SC. A complete
transmit/receive communication will consist of 32 serial clocks. The first 16 clocks comprise the transmit phase of
communication, while the second 16 clocks are the receive phase.
When CS is high SI/O will be in TRI-STATE. Communication should be initiated by taking chip select (CS) low.
This should not be done when SC is changing from a low to high state. Once CS is low the serial I/O pin (SI/O)
will transmit the first bit of data. The master can then read this bit with the rising edge of SC. The remainder of
the data will be clocked out by the falling edge of SC. CS can be taken high at any time during the transmit
phase. If CS is brought low in the middle of a conversion the LM71 will complete the conversion and the output
shift register will be updated after CS is brought back high.
The receive phase of a communication starts after 16 SC periods. CS can remain low for 32 SC cycles. The
LM71 will read the data available on the SI/O line on the rising edge of the serial clock. Input data is to an 8-bit
shift register. The part will detect the last eight bits shifted into the register. The receive phase can last up to 16
SC periods. All ones must be shifted in order to place the part into shutdown. All zeros must be shifted in order to
place the LM71 into continuous conversion mode. Only the following codes should be transmitted to the LM71:
•
•
00 hex for continuous conversion
FF hex for shutdown
Another code may place the part into a test mode. Test modes are used by TI to thoroughly test the function of
the LM71 during production testing. Only eight bits have been defined above since only the last eight transmitted
are detected by the LM71, before CS is taken HIGH.
The following communication can be used to determine the Manufacturer's/Device ID and then immediately place
the part into continuous conversion mode. With CS continuously low:
•
•
•
•
•
Read 16 bits of temperature data
Write 16 bits of data commanding shutdown
Read 16 bits of Manufacture's/Device ID data
Write 8 to 16 bits of data commanding Conversion Mode
Take CS HIGH.
Note that 300 ms will have to pass for a conversion to complete before the LM71 actually transmits temperature
data.
8
Copyright © 2004–2018, Texas Instruments Incorporated
LM71, LM71-Q1
www.ti.com.cn
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
9.3 TEMPERATURE DATA FORMAT
Temperature data is represented by a 14-bit, two's complement word with an LSB (Least Significant Bit) equal to
0.03125°C:
Digital Output
Temperature
Binary
Hex
4B03
3E83
0C83
0007
0003
FFFF
F383
EC03
+150°C
+125°C
+25°C
0100 1011 0000 0011
0011 1110 1000 0011
0000 1100 1000 0011
0000 0000 0000 0111
0000 0000 0000 0011
1111 1111 1111 1111
1111 0011 1000 0011
1110 1100 0000 0011
+0.03125°C
0°C
−0.03125°C
−25°C
−40°C
The first data byte is the most significant byte with most significant bit first, permitting only as much data as
necessary to be read to determine temperature condition. For instance, if the first four bits of the temperature
data indicate an overtemperature condition, the host processor could immediately take action to remedy the
excessive temperatures.
9.4 SHUTDOWN MODE/MANUFACTURER'S ID
Shutdown mode is enabled by writing XX FF to the LM71 as shown in Figure 13. The serial bus is still active
when the LM71 is in shutdown. When in shutdown mode the LM71 always will output 1000 0000 0000 1111. This
is the manufacturer's/Device ID information. The first 5-bits of the field (1000 0XXX) are reserved for
manufacturer's ID.
9.5 INTERNAL REGISTER STRUCTURE
The LM71 has three registers, the temperature register, the configuration register and the manufacturer's/device
identification register. The temperature and manufacturer's/device identification registers are read only. The
configuration register is write only.
9.5.1 Configuration Register
(Selects shutdown or continuous conversion modes):
Table 2. (Write Only):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
X
X
X
X
X
X
X
Shutdown
D0–D15 set to XX FF hex enables shutdown mode.
D0–D15 set to 00 00 hex sets Continuous conversion mode.
Note: setting D0-D15 to any other values may place the LM70 into a manufacturer's test mode, upon which the
LM71 will stop responding as described. These test modes are to be used for TI production testing only. See
SERIAL BUS INTERFACE for a complete discussion.
Copyright © 2004–2018, Texas Instruments Incorporated
9
LM71, LM71-Q1
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
www.ti.com.cn
9.5.2 Temperature Register
Table 3. (Read Only):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MSB
Bit 12 Bit 11 Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit1
LSB
1
1
D0–D1: Logic 1 will be output on SI/0.
D2–D15: Temperature Data. One LSB = 0.03125°C. Two's complement format.
9.5.3 Manufacturer/Device ID Register
Table 4. (Read Only):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
D0–D1: Logic 1 will be output on SI/0.
D2–D15: Manufacturer's/Device ID Data. This register is accessed whenever the LM71 is in shutdown mode.
9.6 Serial Bus Timing Diagrams
Figure 11. Reading Continuous Conversion - Single Eight-Bit Frame
Figure 12. Reading Continuous Conversion - Two Eight-Bit Frames
Figure 13. Writing Shutdown Control
10
Copyright © 2004–2018, Texas Instruments Incorporated
LM71, LM71-Q1
www.ti.com.cn
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
9.7 Application Hints
To get the expected results when measuring temperature with an integrated circuit temperature sensor like the
LM71, it is important to understand that the sensor measures its own die temperature. For the LM71, the best
thermal path between the die and the outside world is through the LM71's pins. In the SOT-23 package, all the
pins on the LM71 will have an equal effect on the die temperature. Because the pins represent a good thermal
path to the LM71 die, the LM71 will provide an accurate measurement of the temperature of the printed circuit
board on which it is mounted. There is a less efficient thermal path between the plastic package and the LM71
die. If the ambient air temperature is significantly different from the printed circuit board temperature, it will have
a small effect on the measured temperature.
In probe-type applications, the LM71 can be mounted inside a sealed-end metal tube, and can then be dipped
into a bath or screwed into a threaded hole in a tank. As with any IC, the LM71 and accompanying wiring and
circuits must be kept insulated and dry, to avoid leakage and corrosion. This is especially true if the circuit may
operate at cold temperatures where condensation can occur. Printed-circuit coatings and varnishes such as
Humiseal and epoxy paints or dips are often used to insure that moisture cannot corrode the LM71 or its
connections.
9.8 Typical Applications
Figure 14. Temperature monitor using Intel 196 processor
Figure 15. LM71 digital input control using micro-controller's general purpose I/O.
Copyright © 2004–2018, Texas Instruments Incorporated
11
LM71, LM71-Q1
ZHCSIO1E –MARCH 2004–REVISED AUGUST 2018
www.ti.com.cn
10 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (March 2013) to Revision E
Page
•
Added SNLA296 ulink to the temperature conversion time tablenote.................................................................................... 4
Changes from Revision C (March 2013) to Revision D
Page
•
Changed layout of National Semiconductor Data Sheet to TI format .................................................................................. 11
12
版权 © 2004–2018, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
4-May-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM71CIMF
NRND
SOT-23
DBV
5
1000
Non-RoHS
& Green
Call TI
Level-1-260C-UNLIM
T16C
LM71CIMF/NOPB
LM71CIMFX/NOPB
LM71CISD/NOPB
LM71QCIMF/NOPB
LM71QCIMFX/NOPB
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
WSON
DBV
DBV
NGG
DBV
DBV
5
5
6
5
5
1000 RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
SN
SN
SN
SN
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
T16C
T16C
L71CI
T16Q
T16Q
Samples
Samples
Samples
Samples
Samples
-40 to 150
-40 to 150
-40 to 150
-40 to 150
SOT-23
SOT-23
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-May-2022
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM71, LM71-Q1 :
Catalog : LM71
•
Automotive : LM71-Q1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM71CIMF
SOT-23
SOT-23
SOT-23
WSON
DBV
DBV
DBV
NGG
DBV
DBV
5
5
5
6
5
5
1000
1000
3000
1000
1000
3000
178.0
178.0
178.0
178.0
178.0
178.0
8.4
8.4
8.4
12.4
8.4
8.4
3.2
3.2
3.2
3.3
3.2
3.2
3.2
3.2
3.2
3.3
3.2
3.2
1.4
1.4
1.4
1.0
1.4
1.4
4.0
4.0
4.0
8.0
4.0
4.0
8.0
8.0
8.0
12.0
8.0
8.0
Q3
Q3
Q3
Q1
Q3
Q3
LM71CIMF/NOPB
LM71CIMFX/NOPB
LM71CISD/NOPB
LM71QCIMF/NOPB
LM71QCIMFX/NOPB
SOT-23
SOT-23
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM71CIMF
SOT-23
SOT-23
SOT-23
WSON
DBV
DBV
DBV
NGG
DBV
DBV
5
5
5
6
5
5
1000
1000
3000
1000
1000
3000
208.0
208.0
208.0
208.0
208.0
208.0
191.0
191.0
191.0
191.0
191.0
191.0
35.0
35.0
35.0
35.0
35.0
35.0
LM71CIMF/NOPB
LM71CIMFX/NOPB
LM71CISD/NOPB
LM71QCIMF/NOPB
LM71QCIMFX/NOPB
SOT-23
SOT-23
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
1.45
0.90
B
A
PIN 1
INDEX AREA
1
2
5
(0.1)
2X 0.95
1.9
3.05
2.75
1.9
(0.15)
4
3
0.5
5X
0.3
0.15
0.00
(1.1)
TYP
0.2
C A B
NOTE 5
0.25
GAGE PLANE
0.22
0.08
TYP
8
0
TYP
0.6
0.3
TYP
SEATING PLANE
4214839/G 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
5. Support pin may differ or may not be present.
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EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214839/G 03/2023
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/G 03/2023
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
MECHANICAL DATA
NGG0006A
SDE06A (Rev A)
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