LM7322MA/NOPB [TI]
双路、32V、20MHz 运算放大器 | D | 8 | -40 to 125;
| 型号： | LM7322MA/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 双路、32V、20MHz 运算放大器 | D | 8 | -40 to 125 放大器 光电二极管 运算放大器 放大器电路 |
| 文件： | 总35页 (文件大小：1334K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM7321, LM7322
www.ti.com
SNOSAW8D –MAY 2008–REVISED MARCH 2013
LM7321/LM7321Q Single/ LM7322/LM7322Q Dual Rail-to-Rail Input/Output ±15V, High
Output Current and Unlimited Capacitive Load Operational Amplifier
Check for Samples: LM7321, LM7322
1
FEATURES
DESCRIPTION
The LM7321/LM7321Q/LM7322/LM7322Q are rail-to-
rail input and output amplifiers with wide operating
2
•
(VS = ±15, TA = 25°C, Typical Values Unless
Specified.)
voltages
and
high
output
currents.
The
•
•
•
•
•
•
Wide Supply Voltage Range 2.5V to 32V
Output Current +65 mA/−100 mA
Gain Bandwidth Product 20 MHz
Slew Rate 18 V/µs
LM7321/LM7321Q/LM7322/LM7322Q are efficient,
achieving 18 V/µs slew rate and 20 MHz unity gain
bandwidth while requiring only 1 mA of supply current
per
op
amp.
The
LM7321/LM7321Q/LM7322/LM7322Q performance is
fully specified for operation at 2.7V, ±5V and ±15V.
Capacitive Load Tolerance Unlimited
Input Common Mode Voltage 0.3V Beyond
Rails
The
designed to drive unlimited capacitive loads without
oscillations. All LM7321/LM7321Q and
LM7321/LM7321Q/LM7322/LM7322Q
are
•
•
•
•
•
•
Input Voltage Noise 15 nV/√Hz
Input Current Noise 1.3 pA/√Hz
Supply Current/Channel 1.1 mA
Distortion THD+Noise −86 dB
Temperature Range −40°C to 125°C
LM7322/LM732Q parts are tested at −40°C, 125°C,
and 25°C, with modern automatic test equipment.
High performance from −40°C to 125°C, detailed
specifications, and extensive testing makes them
suitable
for
industrial,
automotive,
and
communications applications.
Tested at −40°C, 25°C and 125°C at 2.7V, ±5V,
Greater than rail-to-rail input common mode voltage
range with 50 dB of common mode rejection across
this wide voltage range, allows both high side and low
side sensing. Most device parameters are insensitive
to power supply voltage, and this makes the parts
easier to use where supply voltage may vary, such as
automotive electrical systems and battery powered
equipment. These amplifiers have true rail-to-rail
output and can supply a respectable amount of
current (15 mA) with minimal head- room from either
rail (300 mV) at low distortion (0.05% THD+Noise).
There are several package options for each part.
Standard SOIC versions of both parts make
upgrading existing designs easy. LM7322LM7322Q
are offered in a space saving 8-Pin VSSOP package.
The LM7321/LM7321Q are offered in small SOT-23
package, which makes it easy to place this part close
to sensors for better circuit performance.
±15V.
•
LM7321Q/LM7322Q are Automotive Grade
Products that are AEC-Q100 Grade 1 Qualified.
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
Driving MOSFETs and Power Transistors
Capacitive Proximity Sensors
Driving Analog Optocouplers
High Side Sensing
Below Ground Current Sensing
Photodiode Biasing
Driving Varactor Diodes in PLLs
Wide Voltage Range Power supplies
Automotive
International Power Supplies
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LM7321, LM7322
SNOSAW8D –MAY 2008–REVISED MARCH 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS
10
1
12,200 pF
8,600 pF
V
= ±15V
S
V
= ±15V, A = +1
V
S
125°C
2,200 pF
85°C
10 pF
0.1
25°C
-40°C
INPUT
0.01
0.1
1
I
10
(mA)
100
5 ms/DIV
SOURCE
Figure 1. Output Swing vs. Sourcing Current
Figure 2. Large Signal Step Response
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)(2)
Absolute Maximum Ratings
Human Body Model
Machine Model
2 kV
200V
1 kV
(3)
ESD Tolerance
Charge-Device Model
VIN Differential
±10V
(4)
Output Short Circuit Current
Supply Voltage (VS = V+ - V−)
Voltage at Input/Output pins
Storage Temperature Range
See
35V
V+ +0.8V, V− −0.8V
−65°C to 150°C
150°C
(5)
Junction Temperature
Soldering Information:
Infrared or Convection (20 sec.)
Wave Soldering (10 sec.)
235°C
260°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Rating indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Short circuit test is a momentary test. Output short circuit duration is
infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.
(5) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX)) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.
Operating Ratings
Supply Voltage (VS = V+ - V−)
2.5V to 32V
−40°C to 125°C
325°C/W
(1)
Temperature Range
(1)
Package Thermal Resistance, θJA
,
5-Pin SOT-23
8-Pin VSSOP
8-Pin SOIC
235°C/W
165°C/W
(1) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX)) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.
2
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Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM7321 LM7322
LM7321, LM7322
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SNOSAW8D –MAY 2008–REVISED MARCH 2013
(1)
2.7V Electrical Characteristics
Unless otherwise specified, all limits ensured for TA = 25°C, V+ = 2.7V, V− = 0V, VCM = 0.5V, VOUT = 1.35V, and RL > 1 MΩ to
1.35V. Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
VOS
TC VOS
Parameter
Input Offset Voltage
Condition
Units
mV
(2)
(3)
(2)
−5
−6
+5
+6
VCM = 0.5V & VCM = 2.2V
±0.7
VCM = 0.5V & VCM = 2.2V
Input Offset Voltage Temperature Drift
Input Bias Current
±2
µV/C
(4)
VCM = 0.5V
−2.0
−2.5
−1.2
(5)
IB
µA
nA
dB
dB
V
VCM = 2.2V
0.45
20
1.0
1.5
(5)
200
300
IOS
Input Offset Current
VCM = 0.5V and VCM = 2.2V
0V ≤ VCM ≤ 1.0V
70
60
100
70
CMRR
PSRR
CMVR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Common Mode Voltage Range
55
50
0V ≤ VCM ≤ 2.7V
78
74
104
−0.3
3.0
72
2.7V ≤ VS ≤ 30V
−0.1
0.0
CMRR > 50 dB
2.8
2.7
0.5V ≤ VO ≤ 2.2V
65
RL = 10 kΩ to 1.35V
62
AVOL
Open Loop Voltage Gain
dB
0.5V ≤ VO ≤ 2.2V
59
66
RL = 2 kΩ to 1.35V
55
RL = 10 kΩ to 1.35V
50
150
VID = 100 mV
160
Output Voltage Swing
High
RL = 2 kΩ to 1.35V
VID = 100 mV
100
20
250
280
mV from
either rail
VOUT
RL = 10 kΩ to 1.35V
VID = −100 mV
120
150
Output Voltage Swing
Low
RL = 2 kΩ to 1.35V
VID = −100 mV
40
120
150
Sourcing
VID = 200 mV, VOUT = 0V
30
20
48
(6)
IOUT
Output Current
Supply Current
mA
mA
Sinking
VID = −200 mV, VOUT = 2.7V
40
30
65
(6)
0.95
2.0
1.3
1.9
LM7321
LM7322
IS
2.5
3.8
(7)
SR
fu
Slew Rate
AV = +1, VI = 2V Step
8.5
7.5
V/µs
MHz
Unity Gain Frequency
RL = 2 kΩ, CL = 20 pF
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA.
(2) All limits are ensured by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(4) Offset voltage temperature drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
(5) Positive current corresponds to current flowing into the device.
(6) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Short circuit test is a momentary test. Output short circuit duration is
infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.
(7) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.
Copyright © 2008–2013, Texas Instruments Incorporated
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LM7321, LM7322
SNOSAW8D –MAY 2008–REVISED MARCH 2013
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2.7V Electrical Characteristics (1) (continued)
Unless otherwise specified, all limits ensured for TA = 25°C, V+ = 2.7V, V− = 0V, VCM = 0.5V, VOUT = 1.35V, and RL > 1 MΩ to
1.35V. Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
Parameter
Condition
Units
(2)
(3)
(2)
GBW
Gain Bandwidth
f = 50 kHz
f = 2 kHz
f = 2 kHz
16
11.9
0.5
MHz
nV/
en
in
Input Referred Voltage Noise Density
Input Referred Current Noise Density
pA/
V+ = 1.9V, V− = −0.8V
f = 1 kHz, RL = 100 kΩ, AV = +2
VOUT = 210 mVPP
THD+N
CT Rej.
Total Harmonic Distortion + Noise
−77
dB
dB
Crosstalk Rejection
f = 100 kHz, Driver RL = 10 kΩ
60
(1)
±5V Electrical Characteristics
Unless otherwise specified, all limited ensured for TA = 25°C, V+ = 5V, V− = −5V, VCM = 0V, VOUT = 0V, and RL > 1 MΩ to 0V.
Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
VOS
Parameter
Input Offset Voltage
Condition
Units
mV
(2)
(3)
(2)
−5
−6
±0.7
+5
+6
VCM = −4.5V and VCM = 4.5V
VCM = −4.5V and VCM = 4.5V
TC VOS
Input Offset Voltage Temperature Drift
Input Bias Current
±2
µV/°C
(4)
VCM = −4.5V
−2.0
−2.5
−1.2
(5)
IB
µA
nA
dB
dB
V
VCM = 4.5V
0.45
20
1.0
1.5
(5)
200
300
IOS
Input Offset Current
VCM = −4.5V and VCM = 4.5V
−5V ≤ VCM ≤ 3V
80
70
100
80
CMRR
PSRR
CMVR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Common Mode Voltage Range
65
62
−5V ≤ VCM ≤ 5V
78
74
104
−5.3
5.3
80
2.7V ≤ VS ≤ 30V, VCM = −4.5V
−5.1
−5.0
CMRR > 50 dB
5.1
5.0
−4V ≤ VO ≤ 4V
74
RL = 10 kΩ to 0V
70
AVOL
Open Loop Voltage Gain
dB
−4V ≤ VO ≤ 4V
RL = 2 kΩ to 0V
68
65
74
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA.
(2) All limits are ensured by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(4) Offset voltage temperature drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
(5) Positive current corresponds to current flowing into the device.
4
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Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM7321 LM7322
LM7321, LM7322
www.ti.com
SNOSAW8D –MAY 2008–REVISED MARCH 2013
±5V Electrical Characteristics (1) (continued)
Unless otherwise specified, all limited ensured for TA = 25°C, V+ = 5V, V− = −5V, VCM = 0V, VOUT = 0V, and RL > 1 MΩ to 0V.
Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
Parameter
Condition
Units
(2)
(3)
(2)
RL = 10 kΩ to 0V
VID = 100 mV
100
160
35
250
280
Output Voltage Swing
High
RL = 2 kΩ to 0V
VID = 100 mV
350
450
mV from
either rail
VOUT
RL = 10 kΩ to 0V
VID = −100 mV
200
250
Output Voltage Swing
Low
RL = 2 kΩ to 0V
VID = −100 mV
80
200
250
Sourcing
VID = 200 mV, VOUT = −5V
35
20
70
(6)
(6)
IOUT
Output Current
Supply Current
mA
mA
Sinking
VID = −200 mV, VOUT = 5V
50
30
85
1.0
2.3
1.3
2
LM7321
LM7322
IS
VCM = −4.5V
2.8
3.8
(7)
SR
fu
Slew Rate
AV = +1, VI = 8V Step
RL = 2 kΩ, CL = 20 pF
f = 50 kHz
12.3
9
V/µs
MHz
MHz
nV/
Unity Gain Frequency
GBW
en
Gain Bandwidth
16
Input Referred Voltage Noise Density
Input Referred Current Noise Density
f = 2 kHz
14.3
1.35
in
f = 2 kHz
pA/
f = 1 kHz, RL = 100 kΩ, AV = +2
VOUT = 8 VPP
THD+N
CT Rej.
Total Harmonic Distortion + Noise
Crosstalk Rejection
−79
dB
dB
f = 100 kHz, Driver RL = 10 kΩ
60
(6) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Short circuit test is a momentary test. Output short circuit duration is
infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.
(7) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.
(1)
±15V Electrical Characteristics
Unless otherwise specified, all limited ensured for TA = 25°C, V+ = 15V, V− = −15V, VCM = 0V, VOUT = 0V, and RL > 1MΩ to
15V. Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
VOS
TC VOS
Parameter
Input Offset Voltage
Condition
Units
mV
(2)
(3)
(2)
−6
−8
±0.7
+6
+8
VCM = −14.5V and VCM = 14.5V
VCM = −14.5V and VCM = 14.5V
Input Offset Voltage Temperature Drift
Input Bias Current
±2
µV/°C
(4)
VCM = −14.5V
−2
−2.5
−1.1
(5)
IB
µA
nA
VCM = 14.5V
0.45
30
1.0
1.5
(5)
300
500
IOS
Input Offset Current
VCM = −14.5V and VCM = 14.5V
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA.
(2) All limits are ensured by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(4) Offset voltage temperature drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
(5) Positive current corresponds to current flowing into the device.
Copyright © 2008–2013, Texas Instruments Incorporated
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LM7321, LM7322
SNOSAW8D –MAY 2008–REVISED MARCH 2013
www.ti.com
±15V Electrical Characteristics (1) (continued)
Unless otherwise specified, all limited ensured for TA = 25°C, V+ = 15V, V− = −15V, VCM = 0V, VOUT = 0V, and RL > 1MΩ to
15V. Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
CMRR
PSRR
Parameter
Condition
−15V ≤ VCM ≤ 12V
Units
(2)
(3)
(2)
80
75
100
80
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Common Mode Voltage Range
dB
72
70
−15V ≤ VCM ≤ 15V
78
74
100
−15.3
15.3
85
2.7V ≤ VS ≤ 30V, VCM = −14.5V
dB
−15.1
−15
CMVR
CMRR > 50 dB
V
15.1
15
−13V ≤ VO ≤ 13V
RL = 10 kΩ to 0V
75
70
AVOL
Open Loop Voltage Gain
dB
−13V ≤ VO ≤ 13V
RL = 2 kΩ to 0V
70
65
78
RL = 10 kΩ to 0V
VID = 100 mV
150
250
60
300
350
Output Voltage Swing
High
RL = 2 kΩ to 0V
VID = 100 mV
550
650
mV from
either rail
VOUT
RL = 10 kΩ to 0V
VID = −100 mV
200
250
Output Voltage Swing
Low
RL = 2 kΩ to 0V
VID = −100 mV
130
65
300
400
Sourcing
VID = 200 mV, VOUT = −15V
40
60
(6)
IOUT
Output Current
Supply Current
mA
mA
Sinking
VID = −200 mV, VOUT = 15V
100
1.1
(6)
1.7
2.4
LM7321
LM7322
IS
VCM = −14.5V
2.5
4
5.6
(7)
SR
fu
Slew Rate
AV = +1, VI = 20V Step
RL = 2 kΩ, CL = 20 pF
f = 50 kHz
18
11.3
20
V/µs
MHz
MHz
nV/
Unity Gain Frequency
GBW
en
Gain Bandwidth
Input Referred Voltage Noise Density
Input Referred Current Noise Density
f = 2 kHz
15
in
f = 2 kHz
1.3
pA/
f = 1 kHz, RL 100 kΩ,
AV = +2, VOUT = 23 VPP
THD+N
CT Rej.
Total Harmonic Distortion +Noise
Crosstalk Rejection
−86
dB
dB
f = 100 kHz, Driver RL = 10 kΩ
60
(6) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Short circuit test is a momentary test. Output short circuit duration is
infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.
(7) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.
6
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Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM7321 LM7322
LM7321, LM7322
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SNOSAW8D –MAY 2008–REVISED MARCH 2013
CONNECTION DIAGRAMS
1
8
+
1
8
OUT A
5
1
V
+
N/C
N/C
OUT
V
A
7
6
5
2
3
4
2
3
4
7
6
5
+
OUT B
-IN B
-IN A
-IN
V
-
-
2
3
-
V
+
B
-
+IN A
+IN
OUT
N/C
-
4
-IN
+IN
-
-
+IN B
V
V
Figure 3. 5-Pin SOT-23
Top View
Figure 4. 8-Pin SOIC
Top View
Figure 5. 8-Pin VSSOP/SOIC
Top View
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SNOSAW8D –MAY 2008–REVISED MARCH 2013
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Typical Performance Characteristics
Unless otherwise specified: TA = 25°C.
Output Swing vs. Sourcing Current
Output Swing vs. Sinking Current
10
1
10
V
S
= 2.7V
V
S
= 2.7V
1
125°C
125°C
85°C
85°C
0.1
0.1
0.01
25°C
25°C
10
-40°C
-40°C
0.01
0.1
1
I
10
(mA)
100
100
100
0.1
1
100
I
(mA)
SOURCE
SINK
Figure 6.
Figure 7.
Output Swing vs. Sourcing Current
Output Swing vs. Sinking Current
10
1
10
1
V
= ±5V
S
V
= ±5V
S
125°C
125°C
-40°C
85°C
0.1
0.1
85°C
25°C
25°C
10
-40°C
0.01
0.01
0.1
1
I
10
(mA)
0.1
1
100
I
(mA)
SOURCE
SINK
Figure 8.
Figure 9.
Output Swing vs. Sourcing Current
Output Swing vs. Sinking Current
10
1
10
1
V
= ±15V
V = ±15V
S
S
125°C
125°C
-40°C
85°C
0.1
0.1
25°C
85°C
-40°C
25°C
10
0.01
0.01
0.1
1
I
10
(mA)
0.1
1
100
I
(mA)
SOURCE
SINK
Figure 10.
Figure 11.
8
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LM7321, LM7322
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SNOSAW8D –MAY 2008–REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
VOS Distribution
VOS vs. VCM (Unit 1)
12
-0.5
-0.7
-0.9
-1.1
-1.3
-1.5
-1.7
-1.9
-2.1
-2.3
-2.5
V
= 2.7V
S
V
= ±5V
S
10
8
-40°C
6
25°C
85°C
4
2
125°C
0
-1
-1
-6
0
1
2
3
4
4
6
-3
-2
-1
0
1
2
3
V
(mV)
V
(V)
OS
CM
Figure 12.
VOS vs. VCM (Unit 2)
= 2.7V
Figure 13.
VOS vs. VCM (Unit 3)
= 2.7V
0
-0.5
-0.7
-0.9
-1.1
-1.3
-1.5
-1.7
-1.9
-2.1
-2.3
-2.5
V
S
V
S
-0.1
-0.2
-40°C
-0.3
-0.4
-0.5
25°C
85°C
85°C
-40°C
125°C
-0.6
25°C
125°C
125°C
-0.7
-0.8
-40°C
-1
0
1
2
3
4
0
1
2
3
V
(V)
CM
V
(V)
CM
Figure 14.
VOS vs. VCM (Unit 1)
= ±5V
Figure 15.
VOS vs. VCM (Unit 2)
= ±5V
-1
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
V
S
V
S
-1.25
-1.5
-1.75
-2
-40°C
85°C
25°C
-40°C
125°C
25°C
85°C
125°C
-2.25
-2.5
-6
-4
-2
2
4
6
0
-4
-2
0
0
4
V
CM
(V)
V
(V)
CM
Figure 16.
Figure 17.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
VOS vs. VCM (Unit 2)
VOS vs. VCM (Unit 1)
= ±15V
-0.5
-1
-1.25
-1.5
V
V
= ±5V
S
S
-0.75
-1
-40°C
-40°C
-1.25
-1.5
-1.75
-2
25°C
25°C
-1.75
-2
85°C
85°C
125°C
125°C
-2.25
-2.5
-2.25
-6
-4
-2
2
4
6
0
-20 -15 -10 -5
0
5
10 15 20
VCM (V)
V
CM
(V)
Figure 18.
Figure 19.
VOS vs. VCM (Unit 2)
= ±15V
VOS vs. VCM (Unit 3)
V = ±15V
S
0
-0.1
-0.2
-0.5
-0.7
-0.9
V
S
-40°C
125°C
125°C
85°C
-0.3
-0.4
-1.1
-1.3
25°C
25°C
-0.5
-1.5
-40°C
-0.6
-0.7
-1.7
-1.9
85°C
-0.8
-2.1
-0.9
-1
-2.3
-2.5
-20 -15 -10 -5
0
5
10 15 20
-20 -15 -10 -5
0
5
10 15 20
V
CM
(V)
V
CM
(V)
Figure 20.
Figure 21.
VOS vs. VS (Unit 1)
VOS vs. VS (Unit 2)
-1.1
-1.3
-1.5
0
-
-
V
= V +0.5V
CM
V
= V +0.5V
CM
-40°C
-0.1
-0.2
25°C
-1.7
-1.9
-2.1
-0.3
-0.4
-0.5
-0.6
-0.7
85°C
85°C
125°C
25°C
-40°C
-2.3
-2.5
125°C
0
5
10 15 20 25 30 35 40
(V)
0
10
20
(V)
30
40
V
V
S
S
Figure 22.
Figure 23.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
VOS vs. VS (Unit 3)
VOS vs. VS (Unit 1)
-1
-1.2
-1.4
0
-
= V +0.5V
+
V
V
= V -0.5V
CM
CM
-0.5
-1
-40°C
-40°C
25°C
-1.6
-1.8
-1.5
-2
25°C
85°C
85°C
125°C
125°C
-2
-2.5
0
5
10 15 20 25 30 35 40
0
0
0
5
10 15 20 25 30 35 40
(V)
V
S
(V)
V
S
Figure 24.
Figure 25.
VOS vs. VS (Unit 2)
VOS vs. VS (Unit 3)
-1
0
-0.1
-0.2
+
V
= V -0.5V
V
= V+ -0.5V
CM
CM
-1.2
-40°C
-0.3
-0.4
-1.4
-1.6
-1.8
85°C
-0.5
25°C
125°C
-0.6
-0.7
25°C
-0.8
85°C
-2
-40°C
-0.9
-1
125°C
10 15 20 25 30 35 40
(V)
-2.2
0
5
5
10 15 20 25 30 35 40
(V)
V
V
S
S
Figure 26.
Figure 27.
IBIAS vs. VCM
IBIAS vs. VCM
1
1
V
= 2.7V
S
V
= ±5V
-40°C
S
25°C
0.5
0.5
85°C
125°C
0
-0.5
-1
0
-0.5
-1
125°C
85°C
25°C
-40°C
-1.5
-1.5
0.5
1
1.5
(V)
2
2.5
3
-5
-3
-1
1
3
5
V
V
CM
(V)
CM
Figure 28.
Figure 29.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
IBIAS vs. VCM
IBIAS vs. VS
-1
1
-
V
= ±15V
V
= V +0.5V
S
CM
-1.1
0.5
85°C
125°C
25°C
-1.2
-1.3
-1.4
0
-0.5
-1
-40°C
85°C
125°C
-1.5
-1.6
-40°C
25°C
-1.5
-15
0
5
10 15 20 25 30 35 40
(V)
-10
-5
0
5
10
15
40
4
V
S
V
(V)
CM
Figure 30.
Figure 31.
IBIAS vs. VS
IS vs. VCM (LM7321)
0.7
0.65
0.6
1.8
1.6
1.4
1.2
+
V
= V -0.5V
V
= 2.7V
S
125°C
CM
85°C
25°C
-40°C
0.55
0.5
1
0.8
0.6
0.4
0.2
0
25°C
-40°C
85°C
0.45
125°C
30
0.4
0.35
0.3
0
10
20
(V)
-1
0
1
2
3
4
V
S
V
CM
(V)
Figure 32.
Figure 33.
IS vs. VCM (LM7321)
= ±5V
IS vs. VCM (LM7322)
3.5
3
2
1.8
1.6
1.4
1.2
1
V
125°C
S
85°C
25°C
2.5
2
125°C
85°C
-40°C
1.5
1
25°C
0.8
0.6
0.4
0.2
0
-40°C
0.5
0
V
= 2.7V
S
-1
0
1
2
3
-6
-4
-2
0
2
4
6
V
(V)
CM
V
CM
(V)
Figure 34.
Figure 35.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
IS vs. VCM (LM7322)
IS vs. VCM (LM7321)
4
2.5
2
V
= ±5V
S
V
= ±15V
S
3.5
3
2.5
2
125°C
1.5
125°C
85°C
85°C
25°C
1
1.5
1
25°C
-40°C
-40°C
0.5
0.5
0
0
-6
-4
-2
2
4
6
0
-20 -15 -10 -5
0
5
10 15 20
V
(V)
CM
V
CM
(V)
Figure 36.
Figure 37.
IS vs. VCM (LM7322)
IS vs. VS (LM7321)
4.5
4
1.6
1.4
1.2
-
V
= ±15V
25°C
S
V
= V +0.5V
CM
125°C
3.5
3
85°C
1
0.8
0.6
2.5
25°C
85°C
-40°C
2
25°C
1.5
-40°C
0.4
1
0.5
0
0.2
0
-20 -15 -10 -5
0
5
10 15 20
5
15
25
30
0
10
20
(V)
30
40
V
CM
(V)
V
S
Figure 38.
IS vs. VS (LM7322)
Figure 39.
IS vs. VS (LM7321)
2.5
2
4.5
4
+
V
= V -0.5V
CM
125°C
3.5
85°C
125°C
3
85°C
1.5
1
25°C
2.5
25°C
-40°C
2
-40°C
1.5
1
0.5
0
0.5
0
+
V
= V -0.5V
CM
5
5
15
25
35
0
10 15 20 25 30 35 40
(V)
0
10
20
(V)
30
40
V
V
S
S
Figure 40.
Figure 41.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
IS vs. VS (LM7322)
Positive Output Swing vs. Supply Voltage
0.3
3
85°C
R
L
= 2 kW
125°C
125°C
2.5
0.25
0.2
85°C
25°C
2
1.5
1
25°C
-40°C
0.15
0.1
-40°C
0.05
0.5
0
-
= V +0.5V
V
CM
5
0
0
10 15 20 25 30 35 40
(V)
0
10
20
(V)
30
40
V
S
V
S
Figure 42.
Figure 43.
Positive Output Swing vs. Supply Voltage
Negative Output Swing vs. Supply Voltage
0.16
0.16
125°C
R
= 2 kW
R
= 10 kW
125°C
L
L
0.14
0.12
0.1
0.14
0.12
85°C
25°C
85°C
0.1
0.08
0.06
25°C
-40°C
0.08
0.06
0.04
0.02
0
-40°C
0.04
0.02
0
0
5
10 15 20 25 30 35 40
(V)
0
10
20
30
40
V
S
V
(V)
S
Figure 44.
Figure 45.
Open Loop Frequency Response with Various Capacitive
Load
Negative Output Swing vs. Supply Voltage
0.07
0.06
0.05
140
120
100
80
158
135
113
90
V
R
= ê15V
= 10 MW
S
R
= 10 kW
L
L
125°C
25°C
1000 pF
500 pF
200 pF
PHASE
GAIN
85°C
100 pF
50 pF
0.04
0.03
0.02
60
68
20 pF
-40°C
40
45
50 pF
100 pF
200 pF
500 pF
1000 pF
20
23
0.01
0
0
0
-20
-23
0
10
20
(V)
30
40
1k
10k
100k
1M
10M
100M
V
S
FREQUENCY (Hz)
Figure 46.
Figure 47.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
Open Loop Frequency Response with Various Resistive
Open Loop Frequency Response with Various Supply
Voltage
Load
140
120
100
80
140
120
100
80
158
135
113
90
158
135
113
90
V
C
= ê15V
= 20 pF
R
C
= 2 kW
= 20 pF
PHASE
S
L
L
L
PHASE
10 kW
600W
600W
V
= 30V
S
2 kW
GAIN
V
= 10V
S
V
= 2.7V
S
60
60
68
68
V
= 30V
GAIN
S
100 kW
10 MW
40
40
45
45
V
= 2.7V
S
2 kW
20
20
23
23
0
0
0
0
V
= 10V
1M
S
-20
-23
100M
-20
-23
100M
1k
10k
100k
1M
10M
1k
10k
100k
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 48.
Figure 49.
Phase Margin vs. Capacitive Load
CMRR vs. Frequency
70
60
50
40
100
90
V
S
= ±15V
R
= 600W
L
80
70
R
L
= 2 kW
60
50
40
30
20
10
30
20
10
R
= 10 MW, 10 kW, 100 kW
L
V
= ±15V
S
0
10
0
10k
100k
100
1k
1M
10
1000
100
FREQUENCY (Hz)
CAPACITIVE LOAD (pF)
Figure 50.
Figure 51.
+PSRR vs. Frequency
−PSRR vs. Frequency
120
100
100
90
V
V
= 2.7V
V
V
= 30V
S
S
= 0.7V
= 2V
CM
CM
80
70
V
V
= 10V
S
V
V
= 10V
S
= 8V
CM
80
60
= 2V
V
V
= 2.7V
CM
S
60
50
V
= 30V
S
= 2V
CM
V
= 28V
CM
40
30
40
20
20
10
0
0
10
10k
100
1k
100k
1M
10k
1k
100k
1M
10
100
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 52.
Figure 53.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
Small Signal Step Response
Large Signal Step Response
12,200 pF
V
= ±5V
S
V
A
= +1
1000 pF
8,600 pF
2,200 pF
750 pF
500 pF
V
= ±15V, A = +1
V
S
330 pF
100 pF
10 pF
10 pF
INPUT
INPUT
200 ns/DIV
Figure 54.
5 ms/DIV
Figure 55.
Input Referred Noise Density vs. Frequency
Input Referred Noise Density vs. Frequency
1000
100
10
1
1000
100
10
100
10
1
V
= ±5V
V
= 2.7V
S
S
100
10
1
CURRENT
VOLTAGE
VOLTAGE
CURRENT
0.1
100k
0.1
100k
1
1
10
100
1k
10k
1
10
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 56.
Figure 57.
Input Referred Noise Density vs. Frequency
THD+N vs. Frequency
= +2
1000
100
10
1
0
A
V
V
V
= ±15V
S
-10
= 520 mV
IN
PP
R
= 100 kW
L
-20
-30
-40
-50
-60
-70
-80
100
10
1
CURRENT
VOLTAGE
V
= 2.7V, V = 0.8V
CM
S
V
= ±5V
S
V
S
= ±15V
10k
0.1
100k
1
10
100
1k
10k
1k
100k
1M
10
100
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 58.
Figure 59.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
THD+N vs. Output Amplitude
THD+N vs. Output Amplitude
0
0
-10
-20
V
V
= 2.7V
S
V
= ±5V
f = 1 kHz
S
-10
-20
-30
-40
-50
-60
-70
-80
-90
= 0.8V
CM
f = 1 kHz
R
A
= 100 kW
L
R
= 100 kW
= +2
L
V
-30
-40
-50
A
= +2
V
-60
-70
-80
-90
1
0.001
0.01
0.1
1
10
0.1
10
100
0.001 0.01
OUTPUT AMPLITUDE (V
)
OUTPUT AMPLITUDE (V
)
PP
PP
Figure 60.
Figure 61.
THD+N vs. Output Amplitude
Crosstalk Rejection vs. Frequency
0
90
80
70
V
= ±15V
S
-10
-20
f = 1 kHz
R
= 100 kW
L
A
= +2
V
V
= ±15V
S
-30
-40
-50
60
50
40
30
V
= ±5V
+
S
V
V
= 1.8V
= 0.9V
-60
CM
-70
-80
20
10
0
-90
1
1k
10k
100k
1M
10M
100M
0.1
10
100
0.001 0.01
FREQUENCY (Hz)
OUTPUT AMPLITUDE (V
)
PP
Figure 62.
Figure 63.
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APPLICATION INFORMATION
DRIVING CAPACITIVE LOADS
The LM7321/LM7321Q/LM7322/LM7322Q are specifically designed to drive unlimited capacitive loads without
oscillations as shown in Figure 64.
Figure 64. ±5% Settling Time vs. Capacitive Load
In addition, the output current handling capability of the device allows for good slewing characteristics even with
large capacitive loads as shown in Figure 65 and Figure 66.
Figure 65. +SR vs. Capacitive Load
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Figure 66. −SR vs. Capacitive Load
The combination of these features is ideal for applications such as TFT flat panel buffers, A/D converter input
amplifiers, etc.
However, as in most op amps, addition of a series isolation resistor between the op amp and the capacitive load
improves the settling and overshoot performance.
Output current drive is an important parameter when driving capacitive loads. This parameter will determine how
fast the output voltage can change. Referring to the Slew Rate vs. Capacitive Load Plots (Typical Performance
Characteristics section), two distinct regions can be identified. Below about 10,000 pF, the output Slew Rate is
solely determined by the op amp’s compensation capacitor value and available current into that capacitor.
Beyond 10 nF, the Slew Rate is determined by the op amp’s available output current. Note that because of the
lower output sourcing current compared to the sinking one, the Slew Rate limit under heavy capacitive loading is
determined by the positive transitions. An estimate of positive and negative slew rates for loads larger than 100
nF can be made by dividing the short circuit current value by the capacitor.
For the LM7321/LM7321Q/LM7322/LM7322Q, the available output current increases with the input overdrive.
Referring to Figure 67 and Figure 68, Output Short Circuit Current vs. Input Overdrive, it can be seen that both
sourcing and sinking short circuit current increase as input overdrive increases. In a closed loop amplifier
configuration, during transient conditions while the fed back output has not quite caught up with the input, there
will be an overdrive imposed on the input allowing more output current than would normally be available under
steady state condition. Because of this feature, the op amp’s output stage quiescent current can be kept to a
minimum, thereby reducing power consumption, while enabling the device to deliver large output current when
the need arises (such as during transients).
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Figure 67. Output Short Circuit Sourcing Current vs. Input Overdrive
Figure 68. Output Short Circuit Sinking Current vs. Input Overdrive
Figure 69 shows the output voltage, output current, and the resulting input overdrive with the device set for AV =
+1 and the input tied to a 1 VPP step function driving a 47 nF capacitor. As can be seen, during the output
transition, the input overdrive reaches 1V peak and is more than enough to cause the output current to increase
to its maximum value (see Figure 67 and Figure 68 plots). Note that because of the larger output sinking current
compared to the sourcing one, the output negative transition is faster than the positive one.
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Figure 69. Buffer Amplifier Scope Photo
ESTIMATING THE OUTPUT VOLTAGE SWING
It is important to keep in mind that the steady state output current will be less than the current available when
there is an input overdrive present. For steady state conditions, the Output Voltage vs. Output Current plot
(Typical Performance Characteristics section) can be used to predict the output swing. Figure 70 and Figure 71
show this performance along with several load lines corresponding to loads tied between the output and ground.
In each cases, the intersection of the device plot at the appropriate temperature with the load line would be the
typical output swing possible for that load. For example, a 1 kΩ load can accommodate an output swing to within
250 mV of V− and to 330 mV of V+ (VS = ±15V) corresponding to a typical 29.3 VPP unclipped swing.
Figure 70. Output Sourcing Characteristics with Load Lines
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Figure 71. Output Sinking Characteristics with Load Lines
SETTLING TIME WITH LARGE CAPACITIVE LOADS
Figure 72 below shows a typical application where the LM7321/LM7321Q/LM7322/LM7322Q is used as a buffer
amplifier for the VCOM signal employed in a TFT LCD flat panel:
Figure 72. VCOM Driver Application Schematic
Figure 73 shows the time domain response of the amplifier when used as a VCOM buffer/driver with VREF at
ground. In this application, the op amp loop will try and maintain its output voltage based on the voltage on its
non-inverting input (VREF) despite the current injected into the TFT simulated load. As long as this load current is
within the range tolerable by the LM7321/LM7321Q/LM7322/LM7322Q (45 mA sourcing and 65 mA sinking for
±5V supplies), the output will settle to its final value within less than 2 μs.
22
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LM7321, LM7322
www.ti.com
SNOSAW8D –MAY 2008–REVISED MARCH 2013
Figure 73. VCOM Driver Performance Scope Photo
OUTPUT SHORT CIRCUIT CURRENT AND DISSIPATION ISSUES
The LM7321/LM7321Q/LM7322/LM7322Q output stage is designed for maximum output current capability. Even
though momentary output shorts to ground and either supply can be tolerated at all operating voltages, longer
lasting short conditions can cause the junction temperature to rise beyond the absolute maximum rating of the
device, especially at higher supply voltage conditions. Below supply voltage of 6V, the output short circuit
condition can be tolerated indefinitely.
With the op amp tied to a load, the device power dissipation consists of the quiescent power due to the supply
current flow into the device, in addition to power dissipation due to the load current. The load portion of the
power itself could include an average value (due to a DC load current) and an AC component. DC load current
would flow if there is an output voltage offset, or the output AC average current is non-zero, or if the op amp
operates in a single supply application where the output is maintained somewhere in the range of linear
operation.
Therefore:
PTOTAL = PQ + PDC + PAC
PQ = IS · VS
Op Amp Quiescent Power Dissipation
DC Load Power
PDC = IO · (Vr - Vo)
PAC = See Table 1
AC Load Power
where:
IS: Supply Current
VS: Total Supply Voltage (V+ − V−)
VO: Average Output Voltage
Vr: V+ for sourcing and V− for sinking current
Table 1 shows the maximum AC component of the load power dissipated by the op amp for standard Sinusoidal,
Triangular, and Square Waveforms:
Table 1. Normalized AC Power Dissipated in the Output Stage for Standard Waveforms
PAC (W.Ω/V2)
Sinusoidal
50.7 x 10−3
Triangular
46.9 x 10−3
Square
62.5 x 10−3
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2
The table entries are normalized to VS /RL. To figure out the AC load current component of power dissipation,
2
simply multiply the table entry corresponding to the output waveform by the factor VS /RL. For example, with
±12V supplies, a 600Ω load, and triangular waveform power dissipation in the output stage is calculated as:
PAC = (46.9 x 10−3) · (242/600) = 45.0 mW
(1)
The maximum power dissipation allowed at a certain temperature is a function of maximum die junction
temperature (TJ(MAX)) allowed, ambient temperature TA, and package thermal resistance from junction to ambient,
θJA.
TJ(MAX) - TA
PD(MAX)
=
qJA
(2)
For the LM7321/LM7321Q/LM7322/LM7322Q, the maximum junction temperature allowed is 150°C at which no
power dissipation is allowed. The power capability at 25°C is given by the following calculations:
For VSSOP package:
150°C œ 25°C
= 0.53W
PD(MAX)
=
235°C/W
(3)
(4)
For SOIC package:
150°C œ 25°C
PD(MAX)
=
= 0.76W
165°C/W
Similarly, the power capability at 125°C is given by:
For VSSOP package:
150°C œ 125°C
PD(MAX)
=
= 0.11W
235°C/W
(5)
(6)
For SOIC package:
150°C œ 125°C
PD(MAX)
=
= 0.15W
165°C/W
Figure 74 shows the power capability vs. temperature for VSSOP and SOIC packages. The area under the
maximum thermal capability line is the operating area for the device. When the device works in the operating
area where PTOTAL is less than PD(MAX), the device junction temperature will remain below 150°C. If the
intersection of ambient temperature and package power is above the maximum thermal capability line, the
junction temperature will exceed 150°C and this should be strictly prohibited.
1.4
1.2
1
0.8
0.6
0.4
0.2
Operating area
0
-40 -20
0
20 40 60 80 100 120 140 160
TEMPERATURE (°C)
Figure 74. Power Capability vs. Temperature
When high power is required and ambient temperature can't be reduced, providing air flow is an effective
approach to reduce thermal resistance therefore to improve power capability.
24
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Product Folder Links: LM7321 LM7322
LM7321, LM7322
www.ti.com
SNOSAW8D –MAY 2008–REVISED MARCH 2013
Other Application Hints
The use of supply decoupling is mandatory in most applications. As with most relatively high speed/high output
current Op Amps, best results are achieved when each supply line is decoupled with two capacitors; a small
value ceramic capacitor (∼0.01 μF) placed very close to the supply lead in addition to a large value Tantalum or
Aluminum (> 4.7 μF). The large capacitor can be shared by more than one device if necessary. The small
ceramic capacitor maintains low supply impedance at high frequencies while the large capacitor will act as the
charge "bucket" for fast load current spikes at the op amp output. The combination of these capacitors will
provide supply decoupling and will help keep the op amp oscillation free under any load.
SIMILAR HIGH OUTPUT DEVICES
The LM7332 is a dual rail-to-rail amplifier with a slightly lower GBW capable of sinking and sourcing 100 mA. It is
available in SOIC and VSSOP packages.
The LM4562 is dual op amp with very low noise and 0.7 mV voltage offset.
The LME49870 and LME49860 are single and dual low noise amplifiers that can work from ±22 volt supplies.
OTHER HIGH PERFORMANCE SOT-23 AMPLIERS
The LM7341 is a 4 MHz rail-to-rail input and output part that requires only 0.6 mA to operate, and can drive
unlimited capacitive load. It has a voltage gain of 97 dB, a CMRR of 93 dB, and a PSRR of 104 dB.
The LM6211 is a 20 MHz part with CMOS input, which runs on ±12 volt or 24 volt single supplies. It has rail-to-
rail output and low noise.
The LM7121 has a gain bandwidth of 235 MHz.
Detailed information on these parts can be found at www.ti.com.
Copyright © 2008–2013, Texas Instruments Incorporated
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SNOSAW8D –MAY 2008–REVISED MARCH 2013
www.ti.com
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 25
26
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Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM7321 LM7322
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
LM7321MA/NOPB
LM7321MAX/NOPB
LM7321MF/NOPB
LM7321MFE/NOPB
LM7321MFX/NOPB
LM7321QMF/NOPB
LM7321QMFE/NOPB
LM7321QMFX/NOPB
LM7322MA/NOPB
LM7322MAX/NOPB
LM7322MM/NOPB
LM7322MME/NOPB
LM7322MMX/NOPB
LM7322QMA/NOPB
LM7322QMAX/NOPB
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
SOIC
SOIC
D
8
8
5
5
5
5
5
5
8
8
8
8
8
8
8
95
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
LM732
1MA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
2500
1000
250
Green (RoHS
& no Sb/Br)
LM732
1MA
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOIC
DBV
DBV
DBV
DBV
DBV
DBV
D
Green (RoHS
& no Sb/Br)
AU4A
AU4A
AU4A
AR8A
AR8A
AR8A
Green (RoHS
& no Sb/Br)
3000
1000
250
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
3000
95
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
LM732
2MA
SOIC
D
2500
1000
250
Green (RoHS
& no Sb/Br)
LM732
2MA
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
D
Green (RoHS
& no Sb/Br)
AZ4A
AZ4A
AZ4A
Green (RoHS
& no Sb/Br)
3500
95
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
LM732
2QMA
SOIC
D
2500
Green (RoHS
& no Sb/Br)
LM732
2QMA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM7321, LM7321-Q1, LM7322, LM7322-Q1 :
Catalog: LM7321, LM7322
•
Automotive: LM7321-Q1, LM7322-Q1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM7321MAX/NOPB
LM7321MF/NOPB
SOIC
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOIC
D
8
5
5
5
5
5
5
8
8
8
8
8
2500
1000
250
330.0
178.0
178.0
178.0
178.0
178.0
178.0
330.0
178.0
178.0
330.0
330.0
12.4
8.4
6.5
3.2
3.2
3.2
3.2
3.2
3.2
6.5
5.3
5.3
5.3
6.5
5.4
3.2
3.2
3.2
3.2
3.2
3.2
5.4
3.4
3.4
3.4
5.4
2.0
1.4
1.4
1.4
1.4
1.4
1.4
2.0
1.4
1.4
1.4
2.0
8.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
12.0
8.0
Q1
Q3
Q3
Q3
Q3
Q3
Q3
Q1
Q1
Q1
Q1
Q1
DBV
DBV
DBV
DBV
DBV
DBV
D
LM7321MFE/NOPB
LM7321MFX/NOPB
LM7321QMF/NOPB
LM7321QMFE/NOPB
LM7321QMFX/NOPB
LM7322MAX/NOPB
LM7322MM/NOPB
LM7322MME/NOPB
LM7322MMX/NOPB
LM7322QMAX/NOPB
8.4
8.0
3000
1000
250
8.4
8.0
8.4
8.0
8.4
8.0
3000
2500
1000
250
8.4
8.0
12.4
12.4
12.4
12.4
12.4
12.0
12.0
12.0
12.0
12.0
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
D
3500
2500
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM7321MAX/NOPB
LM7321MF/NOPB
SOIC
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOIC
D
8
5
5
5
5
5
5
8
8
8
8
8
2500
1000
250
367.0
210.0
210.0
210.0
210.0
210.0
210.0
367.0
210.0
210.0
367.0
367.0
367.0
185.0
185.0
185.0
185.0
185.0
185.0
367.0
185.0
185.0
367.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
DBV
DBV
DBV
DBV
DBV
DBV
D
LM7321MFE/NOPB
LM7321MFX/NOPB
LM7321QMF/NOPB
LM7321QMFE/NOPB
LM7321QMFX/NOPB
LM7322MAX/NOPB
LM7322MM/NOPB
LM7322MME/NOPB
LM7322MMX/NOPB
LM7322QMAX/NOPB
3000
1000
250
3000
2500
1000
250
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
D
3500
2500
Pack Materials-Page 2
IMPORTANT NOTICE
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
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