LM96530_14 [TI]
Ultrasound Transmit/Receive Switch;
| 型号： | LM96530_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Ultrasound Transmit/Receive Switch |
| 文件： | 总16页 (文件大小：391K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM96530
LM96530 Ultrasound Transmit/Receive Switch
Literature Number: SNAS499E
September 19, 2011
LM96530
Ultrasound Transmit/Receive Switch
General Description
Features
■
The LM96530 is an eight-channel monolithic high-voltage,
high-speed T/R (Transmit/Receive) switch for multi-channel
medical ultrasound applications. It is well-suited for use with
National’s LM965XX series chipset which offers a complete
medical ultrasound solution targeted towards low-power,
portable systems.
8-channel high-voltage receive side switches without
charge-injection
Can be used for receive protection and/or receive
multiplexing with SPI™ compatible bus control
■
Channel bandwidth supports 1MHz to 20MHz transducers
■
■
Input accepts pulses and continuous-wave signals within
±60V
The LM96530 contains eight high-voltage T/R switches with
integrated clamping diodes. This chip protects the inputs of
the receive channel's LNA (Low Noise Amplifier) from the
high-voltage pulses of the transmit channel. Advanced fea-
tures include a diode bridge with internal current sources that
are programmable via an external resistor. Low-power oper-
ation is enabled via per-channel-selectable switching.
Integrated output clamping diodes limit output to ±0.7V
Low harmonic distortion HD2 at -75dBc at 5MHz
Continuous-wave operation
■
■
■
■
Soft-switcher based on a diode bridge architecture
yielding better noise performance and faster turn-on and -
off times than competing T-gate switch architectures
National Semiconductor also offers a development package
for sale which includes a driver hardware and software pack-
age with a graphical user interface for configuration and mon-
itoring.
2.5V to 3.3V CMOS SPI™ compatible logic interface with
daisy chain capability
Bias current source (IS) can be scaled between 0 and 8mA
via an external resistor
■
■
Applications
■
Key Specifications
Ultrasound Imaging
Input voltage
±60
±0.7
18
V
V
Output voltage
clamp ( IS= 1mA)
On-resistance
Off-isolation @
5MHz
Ω
-58
dB
Noise spectral
density @ 5MHz
Harmonic
0.5
nV/√Hz
distortion
HD2
-75
-75
dB
dB
HD3
Channel crosstalk
@ 5MHz
-73
dB
°C
Operating Temp.
0 to +70
© 2011 National Semiconductor Corporation
301220
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Block Diagram
30122002
ꢀ
Typical Application
8-Channel Transmit/Receive Chipset
30122007
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2
Pin Diagram
30122001
FIGURE 1. Pin Diagram of LM96530
Ordering Information
Part Number
LM96530SQ
LM96530SQE
LM96530SQX
Package Type
60 Lead LLP
NSC Package Drawing
Supplied As
1000
SQA60A
250
2000
3
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TABLE 1. Pin Descriptions
Pin No.
Name
Type
Function and Connection
1, 3, 5, 7, 9, 11, 13,
15
INn
n=0,...,7
Input
High-voltage input
45, 43, 41, 39, 37,
35, 33, 31
OUTn
n=0,...
Output
Output
Input
Low-voltage output
External resistor to AGND. Used to set internal current sources.
RREF = 6.25 kΩ → IS = 8mA;
RREF = 12.5 kΩ → IS = 4mA;
RREF = 25 kΩ → IS = 2mA;
RREF = 50 kΩ → IS = 1mA
25
59
RREF
1 = Switch all channels OFF
0 = Use SPI™ to control switch
SW_OFF
SPI_EN
SCSI
1 = Enable the SPI™ Interface
0 = Disable the SPI™ Interface and presets SPI™ registers for all
switches ON.
60
58
Input
Input
SPI™ chip select input,
0 = Chip Select
57
SCKI
SDI
Input
Input
SPI™ compatible clock input
56
SPI™ compatible data input
53
SDO
SCKO
SCSO
VDD
VSS
Output
Output
Output
Power
Power
Power
Power
SPI™ compatible data buffered output
SPI™ compatible clock buffered output
SPI™ chip select buffered output
Positive analog supply voltage (+5V)
Negative analog supply voltage (-5V)
Logic voltage supply (+2.5 to 3.3V)
Negative high voltage supply (-65V)
52
51
26, 27, 49, 50
28, 29, 47, 48
54
VLL
0, 17
VSUB
2, 4, 6, 8, 10, 12,
14, 16, 55
HVGND
AGND
Ground
Ground
High voltage reference potential (0V)
All others
Analog and logic low voltage reference input, logic ground (0V)
SPI™ is a trademark of Motorola, Inc.
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4
Voltage at High Voltage Analog Inputs
Voltage at Logic Inputs (SCLKI, SDI
SCSI, SW_OFF)
−70V to 70V
−0.3V to VLL
+0.3v
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings
Operation Junction Temperature
VDD, −VSS, Analog Supply
VLL, Logic Supply
Maximum Junction Temperature (TJMAX
Storage Temperature Range
Supply Voltage (VDD)
)
+150°C
−40°C to +125°C
+0.3V to +5.5V
+0.3V and −5.5V
0°C to + 70°C
+4.7V to 5.3V
+2.4V to 3.5V
Supply Voltage (VSS)
High Voltage Analog Inputs
−60V to +60V,
VSUB must be most
negative supply
Supply Voltage (VSUB)
−70V (Must
always be most
negative voltage)
VSUB, Substrate bias supply
−50V to −65V
20°C/W
IO Supply Voltage (VLL)
−0.3V to +3.6V
Package Thermal Resistance (θJA
ESD Tolerance
)
Human Body Model
Machine Model
Charge Device Model
2kV
150V
750V
Analog Characteristics
Unless otherwise stated, the following conditions apply.
VLL = +2.5V, VDD = −VSS = 5V, VSUB = −60V, RREF = 50 kΩ, RT = 50Ω, fIN = 5 MHz, SW_OFF = SPI_EN = 0V, TA = 25°C.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VSUB must be most negative voltage.
See (Note 2)
VIN
High Voltage Analog Inputs
-60
+60
V
en
Voltage Noise
at 5MHz
0.8
150
-60
-65
-69
2
nV/√Hz
MHz
dBc
dBc
dB
BW
-3dB Bandwidth
HD2
Second harmonic distortion
Third harmonic distortion
Channel crosstalk
Turn-on time
HD3
0.1VPP 5MHz tone applied as input
XTALK
TON
µs
TOFF
µs
Turn-off time
0.2
-55
125
-5.5
±0.7
0.03
14
Iso_off
RON
Off isolation
0.1Vpp 5MHz tone is applied as input
fIN = 5MHz
dB
On resistance of TR switch
Insertion Loss
Ω
dB
IL
VCLAMP
IMISMATCH
VDD & VSS
VLL
Output clamped voltage
Current source mis-match
V
0.2
20
mA
mA
µA
Power Supply Current
5
VSUB
0.45
mA
5
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Unless otherwise stated, the following conditions apply
VLL = +2.5V, VDD = −VSS = 5V, VSUB = −60V, RREF = 25 kΩ, RT = 50Ω, fIN = 5MHz, SW_OFF = SPI_EN = 0V, TA = 25°C.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VSUB must be most negative voltage.
See (Note 2)
VIN
High Voltage Analog Inputs
-60
+60
V
en
Voltage Noise
at 5MHz
0.7
150
-67
-70
-73
2
nV/√Hz
MHz
dBc
dBc
dB
BW
-3dB Bandwidth
HD2
Second harmonic distortion
Third harmonic distortion
Channel crosstalk
Turn-on time
HD3
0.1VPP 5MHz tone applied as input
XTALK
TON
µs
TOFF
Turn-off time
0.2
-58
48
µs
Iso_off
RON
Off isolation
0.1Vpp 5MHz tone is applied as input
fIN = 5MHz
dB
On resistance of TR switch
Insertion Loss
Ω
dB
IL
-4
VCLAMP
IMISMATCH
VDD & VSS
VLL
Output clamped voltage
Current source mis-match
±0.75
0.1
23
V
0.35
30
mA
mA
µA
Power Supply Current
5
VSUB
1
mA
Unless otherwise stated, the following conditions apply
VLL = +2.5V, VDD = −VSS = 5V, VSUB = −60V, RREF = 12.5 kΩ, RT = 50Ω, fIN = 5MHz, SW_OFF = SPI_EN = 0V, TA = 25°C.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VSUB must be most negative voltage.
See (Note 2)
VIN
High Voltage Analog Inputs
-60
+60
V
en
Voltage Noise
at 5MHz
0.55
180
-73
-75
-73
2
nV/√Hz
MHz
dBc
dBc
dB
BW
-3dB Bandwidth
HD2
Second harmonic distortion
Third harmonic distortion
Channel crosstalk
Turn-on time
HD3
0.1VPP 5MHz tone applied as input
XTALK
TON
µs
TOFF
Turn-off time
0.2
-58
27
µs
Iso_off
RON
Off isolation
0.1Vpp 5MHz tone is applied as input
fIN = 5MHz
dB
On resistance of TR switch
Insertion Loss
Ω
dB
IL
-3
VCLAMP
IMISMATCH
VDD & VSS
VLL
Output clamped voltage
Current source mis-match
±0.78
0.25
40
V
0.6
49
mA
mA
µA
Power Supply Current
5
VSUB
2.2
mA
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6
Unless otherwise stated, the following conditions apply
VLL = +2.5V, VDD = −VSS = 5V, VSUB = −60V, RREF = 6.25 kΩ, RT = 50Ω, fIN = 5MHz, SW_OFF = SPI_EN = 0V, TA = 25°C.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VSUB must be most negative voltage.
See (Note 2)
VIN
High Voltage Analog Inputs
-60
+60
V
en
Voltage Noise
at 5MHz
0.5
180
-75
-75
-73
2
nV/√Hz
MHz
dBc
dBc
dB
BW
-3dB Bandwidth
HD2
Second harmonic distortion
Third harmonic distortion
Channel crosstalk
Turn-on time
HD3
0.1VPP 5MHz tone applied to input
XTALK
TON
µs
TOFF
Turn-off time
0.2
-58
18
µs
Iso_off
RON
Off isolation
0.1Vpp 5MHz tone is applied as input
fIN = 5MHz
dB
On resistance of TR switch
Insertion Loss
Ω
dB
IL
-2.5
±0.8
0.6
75
VCLAMP
IMISMATCH
VDD & VSS
VLL
Output clamped voltage
Current source mis-match
V
1.2
86
mA
mA
µA
Power Supply Current
5
VSUB
5
mA
7
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Digital Characteristics
Unless otherwise stated, the following conditions apply.
VLL = +2.5V, VDD = −VSS = 5V, VSUB = −60V, RREF = 50 kΩ, RT = 50Ω, SW_OFF = 0V, SPI_EN = 2.5V, TA = 25°C.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
VIH
VIL
Logical Input “HI” Voltage
Logical Input “LO” Voltage
Logic Input Current
2
0.5
+1
V
IIN-H/L
VOH
-1
0.2
µA
V
Logical Output “HI” Voltage
Logical Output “LO” Voltage
SPI™ SCSI Setup Time
SPI™ SCSI Hold Time
SPI™ SCSI HI Time
2.2
VOL
0.3
V
tSSELS
tSSELH
tSSELHI
tWS
11
11
ns
ns
ns
ns
ns
250
SPI™ SDI Setup Time
SPI™ SDI Hold Time
11
11
tWH
tOD
SPI™ SCLKI to SDO
Propagation Delay
CL = 5 pF
25
ns
tVALID
tSCLK
SPI™ SCSI to T/R Switch
State Change Delay
30
ns
ns
SPI™ SCLKI Period
100
45
% of CLK
Period
SPI™ SCLKI Duty Cycle
See (Note 5)
55
12
12
12
12
SPI™ SCLKI-HI to SCLKO-
HI Propagation Delay
ns
ns
ns
ns
tSCLKOD-H
tSCLKOD-L
tSCSOD-H
tSCSOD-L
SPI™ SCLKI-LO to SCLKO-
LO Propagation Delay
SPI™ SCSI-HI to SCSO-HI
Propagation Delay
SPI™ SCLSI-LO to SCLSO-
LO Propagation Delay
Maximum Number of Daisy-
Chained devices
SCLKI Freq. = 10MHz
16
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is guaranteed to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical
Characteristics.
Note 2: Total input signal levels, including any transient voltage overshoots, must be within this maximum voltage range.
Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 4: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5: Guarantee by design
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8
SPI™ Timing
30122005
FIGURE 2. SPI™ Timing Diagram
9
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Typical Performance Characteristics
VLL = +2.5V, VDD = −VSS = 5V, VSUB = −60V, RREF = 50 kΩ, RT = 50Ω, fIN = 5 MHz, TA = 25°C.
Input Referred Noise vs Rref
2nd Harmonic Distortion vs Rref
-55
-60
-65
-70
-75
-80
0.80
0.75
0.70
0.65
0.60
0.56
0.50
0.45
0
10
20
REF
30
(K Ω)
40
50
0
10
20
REF
30
(KΩ)
40
50
R
R
30122009
30122010
Crosstalk vs frequency
Isolation vs Frequency
-30
-40
-50
-60
-70
-80
-20
-30
-40
-50
-60
-70
-80
1M
10M
F requency (Hz)
100M
1M
10M
F requency (Hz)
100M
30122011
30122012
Turn On Respone
Turn Off Response
30122016
30122015
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10
Its diode-bridge-based architecture allows high-speed low-
distortion channel designs targeting low-power, portable sys-
tems. A complete system can be designed using National’s
companion LM965XX chipset.
Functional Description
The LM96530 RX switch provides an 8-channel receive side
interface solution for medical ultrasound applications suitable
for integration into multi-channel (128 / 256 channel) systems.
30122002
FIGURE 3. Block Diagram of T/R Channel
A functional block diagram of the IC is shown in . Each RX
switch channel on the IC has a high-voltage input that can be
directly connected to a transducer driven by a high-voltage
pulser, such as the LM96550. The input feeds into a diode
bridge with its output being diode-clamped to ± 0.7V. The
diode bridge bias current is set to 1 mA with Rref = 50KΩ.
Therefore, the output can be directly connected to a low noise
amplifier (LNA) stage which must be protected from the high-
voltage signals on the transducer.
SERIAL INTERFACE OPERATION
The digital interface is comprised of an 8-bit shift register and
a latch. Each bit controls one T/R switch channel, where the
MSB bit, i.e., the first bit written (D7) controls channel 7, and
the LSB bit (D0) controls channel 0. The three input pins, SDI,
SCSI and SCKl, are all Schmitt Trigger inputs with 0.5V typical
hysteresis. The output pins SDO, SCSO, and SCLKO are
SPI™ compatible. The serial data input SDI is synchronously
read into the shift register on the rising edge of the clock SCKI.
When SCSI changes from low to high, the data in the shift
register is transferred to the latch circuit, and output on the
parallel data signals P0 through P7 which drive the switched
bias current sources for channels n=0,…, 7, respectively.
When SCSI changes from high to low, the latch output Pn,
and thus the biasing condition, does not change.
The bias current of the bridge is determined by two equally-
sized current sources with their current value ranging be-
tween 0 and 8mA depending on the external resistor Rref at
the input of the bandgap reference block. While the bias cur-
rent is the same value for all channels on the IC, each channel
can be switched on and off individually with an 8–bit shift reg-
ister that is programmed via a SPI™ compatible bus.
The on-chip analog circuitry requires dual 5V supplies VDD
and VSS, a single logic supply VLL, and a high voltage neg-
ative bias, VSUB.
11
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DAISY CHAINING MULTIPLE LM96530 ICs
ICs. For example, if 3 LM96530 ICs are daisy-chained, one
can picture a 24–bit shift register. Thus, the MSB or first bit
written on the SDI line (D23) will control channel 7 of the last
LM96530, i.e., the IC that is daisy-chained the farthest away
from the SPI master. The LSB or last bit written on the SDI
line (D0) will control channel 0 of the first LM96530, i.e., the
IC that is closest to the SPI master. It is important to note that
If only one particular channel of an IC in the daisy-chain re-
quires updating, all of the ICs, i.e., the entire shift register,
must be written to.
For connecting multiple T/R switch ICs, the LM965XX SPI™-
compatible bus can be daisy-chained up to 16 ICs at 10MHz
SCLKI for easy PCB routing. The inputs SDI, SCSI and SCLKI
are daisy-chained together with SDO, SCSO and SCLKO.
Therefore, the next IC’s SDI is connected to the previous IC’s
SDO. Similarly, the next IC’s SCSI is connected to the previ-
ous IC’s SCSO, and the next IC’s SCLKI is connected to the
previous IC’s SCLKO, as shown in . Daisy-chaining multiple
LM96530 devices amounts to one large shift register with the
number of bits being equal to 8 times the number of LM96530
30122006
FIGURE 4. 16 LM96530 Devices Daisy Chained @ SCLKI = 16MHz
BASIC OPERATION WITHOUT SERIAL INTERFACE
COMMUNICATION
POWER-UP AND POWER-DOWN SEQUENCES
VSUB needs to always be the most negative supply – equal
to or more negative than VSS or the most negative transmit
pulse at all times. The power sequence should be to ap-
plied to VSUB first, followed by the remaining supplies in
any order.
To disable the SPI™ compatible interface, connect the pin
SPI_EN to AGND. To reverse bias all 8 channels of the T/R
switch, connect the pin, SW_OFF to VLL. To forward bias all
8 channels of the T/R switch, connect the pin, SW_OFF to
AGND.
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Physical Dimensions inches (millimeters) unless otherwise noted
60-Lead LLP Package
NS Package Number SQA60A
13
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and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
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TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Audio
Applications
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
www.ti.com/industrial
www.ti.com/medical
www.ti.com/security
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
Medical
Security
Logic
Space, Avionics and Defense www.ti.com/space-avionics-defense
Transportation and Automotive www.ti.com/automotive
Power Mgmt
Microcontrollers
RFID
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Video and Imaging
www.ti.com/video
OMAP Mobile Processors www.ti.com/omap
Wireless Connectivity www.ti.com/wirelessconnectivity
TI E2E Community Home Page
e2e.ti.com
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