LMC6762BIMX [TI]
具有推挽输出的双路微功耗耗轨到轨输入 CMOS 比较器 | D | 8 | -40 to 85;
| 型号： | LMC6762BIMX |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有推挽输出的双路微功耗耗轨到轨输入 CMOS 比较器 | D | 8 | -40 to 85 放大器 光电二极管 比较器 |
| 文件： | 总24页 (文件大小：822K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMC6762
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SNOS739D –JULY 1997–REVISED MARCH 2013
LMC6762 Dual MicroPower Rail-To-Rail Input CMOS Comparator with Push-Pull Output
Check for Samples: LMC6762
1
FEATURES
DESCRIPTION
The LMC6762 is an ultra low power dual comparator
with a maximum supply current of 10 μA/comparator.
It is designed to operate over a wide range of supply
voltages, from 2.7V to 15V. The LMC6762 has
ensured specifications at 2.7V to meet the demands
of 3V digital systems.
2
•
(Typical Unless Otherwise Noted)
•
Low Power Consumption (Max): IS = 10
μA/comp
•
•
Wide Range of Supply Voltages: 2.7V to 15V
Rail-To-Rail Input Common Mode Voltage
Range
The LMC6762 has an input common-mode voltage
range which exceeds both supplies. This is a
significant advantage in low-voltage applications. The
LMC6762 also features a push-pull output that allows
direct connections to logic devices without a pull-up
resistor.
•
Rail-To-Rail Output Swing (Within 100 mV of
the Supplies, @ V+ = 2.7V, and ILOAD = 2.5 mA)
•
•
Short Circuit Protection: 40 mA
Propagation Delay (@ V+ = 5V, 100 mV
Overdrive): 4 μs
A quiescent power consumption of 50 μW/amplifier
(@ V+
= 5V) makes the LMC6762 ideal for
APPLICATIONS
applications in portable phones and hand-held
electronics. The ultra-low supply current is also
independent of power supply voltage. Ensured
operation at 2.7V and a rail-to-rail performance
makes this device ideal for battery-powered
applications.
•
•
•
•
•
•
•
Laptop Computers
Mobile Phones
Metering Systems
Hand-Held Electronics
RC Timers
Refer to the LMC6772 datasheet for an open-drain
version of this device.
Alarm and Monitoring Circuits
Window Comparators, Multivibrators
Connection Diagram
Typical Application
8-Pin PDIP/SOIC
Top View
Zero Crossing Detector
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2013, Texas Instruments Incorporated
LMC6762
SNOS739D –JULY 1997–REVISED MARCH 2013
www.ti.com
Absolute Maximum Ratings(1)(2)
ESD Tolerance(3)
2 KV
(V+)+0.3V to (V−)−0.3V
(V+)+0.3V to (V−)−0.3V
16V
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+–V−)
Current at Input Pin
±5 mA
Current at Output Pin(4)(5)
±30 mA
Current at Power Supply Pin, LMC6762
Lead Temperature (Soldering, 10 seconds)
Storage Temperature Range
Junction Temperature(6)
40 mA
260°C
−65°C to +150°C
150°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the electrical characteristics.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) Human body model, 1.5 kΩ in series with 100 pF.
(4) Do not short circuit output to V+, when V+ is greater than 12V or reliability will be adversely affected.
(5) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(6) The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(max) – TA)/θJA.All numbers apply for packages soldered directly into a PC board.
Operating Ratings(1)
Supply Voltage
2.7 ≤ VS ≤ 15V
−40°C ≤ TJ ≤ +85°C
100°C/W
Junction Temperature Range
LMC6762AI, LMC6762BI
Thermal Resistance (θJA
)
P0008E Package, 8-Pin PDIP
D0008A Package, 8-Pin SOIC
172°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the electrical characteristics.
2.7V Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
LMC6762AI
LMC6762BI
Limit(2)
15
Units
Symbol
Parameter
Input Offset Voltage
Conditions
Typ(1)
Limit(2)
VOS
3
5
mV
max
8
18
TCVOS Input Offset Voltage
Temperature Drift
2.0
3.3
μV/°C
Input Offset Voltage
Average Drift
See(3)
μV/Month
IB
Input Current
0.02
0.01
75
pA
pA
dB
dB
dB
IOS
Input Offset Current
CMRR Common Mode Rejection Ratio
PSRR
AV
Power Supply Rejection Ratio
Voltage Gain
±1.35V < VS < ±7.5V
(By Design)
80
100
(1) Typical Values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
(3) Input Offset Voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.
The Input Offset Voltage Average Drift represents the input offset voltage change at worst-case input conditions.
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2.7V Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
LMC6762AI
Limit(2)
2.9
LMC6762BI
Limit(2)
2.9
Units
Symbol
Parameter
Conditions
CMRR > 55 dB
Typ(1)
VCM
Input Common-Mode
Voltage Range
3.0
V
min
V
2.7
2.7
−0.3
2.5
0.2
12
−0.2
0.0
−0.2
0.0
max
V
VOH
VOL
IS
Output Voltage High
Output Voltage Low
Supply Current
ILOAD = 2.5 mA
ILOAD = 2.5 mA
2.4
2.4
2.3
2.3
min
V
0.3
0.3
0.4
0.4
max
μA
max
For Both Comparators
(Output Low)
20
20
25
25
5.0V and 15.0V Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5.0V and 15.0V, V− = 0V, VCM = V+/2. Boldface limits apply
at the temperature extremes.
LMC6762AI
LMC6762BI
Limit(1)
15
Symbol
Parameter
Input Offset Voltage
Conditions
Typ(1)
Units
Limit(2)
VOS
3
5
mV
max
8
18
TCVOS
Input Offset Voltage
Temperature Drift
Input Offset Voltage
Average Drift
V+ = 5V
V+ = 15V
V+ = 5V(3)
V+ = 15V(3)
V = 5V
V+ = 5V
V+ = 5V
V+ = 15V
2.0
4.0
3.3
4.0
0.04
0.02
75
μV/°C
μV/Month
IB
Input Current
pA
pA
dB
dB
dB
dB
V
IOS
Input Offset Current
Common Mode
CMRR
Rejection Ratio
82
PSRR
AV
Power Supply Rejection Ratio
Voltage Gain
±2.5V < VS < ±5V
(By Design)
V+ = 5.0V
CMRR > 55 dB
80
100
5.3
VCM
Input Common-Mode
Voltage Range
5.2
5.0
5.2
5.0
min
V
−0.3
15.3
−0.3
4.8
−0.2
0.0
−0.2
0.0
max
V
V+ = 15.0V
15.2
15.0
−0.2
0.0
15.2
15.0
−0.2
0.0
CMRR > 55 dB
min
V
max
V
VOH
Output Voltage High
V+ = 5V
4.6
4.6
ILOAD = 5mA
V+ = 15V
4.45
14.6
14.45
4.45
14.6
14.45
min
V
14.8
ILOAD = 5 mA
min
(1) Typical Values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
(3) Input Offset Voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.
The Input Offset Voltage Average Drift represents the input offset voltage change at worst-case input conditions.
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5.0V and 15.0V Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5.0V and 15.0V, V− = 0V, VCM = V+/2. Boldface limits apply
at the temperature extremes.
LMC6762AI
Limit(2)
0.4
LMC6762BI
Limit(1)
0.4
Symbol
Parameter
Output Voltage Low
Conditions
Typ(1)
Units
VOL
V+ = 5V
0.2
V
ILOAD = 5 mA
V+ = 15V
0.55
0.55
max
V
0.2
12
0.4
0.4
ILOAD = 5 mA
For Both Comparators
(Output Low)
Sourcing
0.55
0.55
max
μA
IS
Supply Current
20
20
25
25
max
mA
ISC
Short Circuit Current
30
45
Sinking, VO = 12V(4)
(4) Do not short circuit output to V+, when V+ is greater than 12V or reliability will be adversely affected.
AC Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2. Boldface limits apply at the
temperature extreme.
Symbol
Parameter
Conditions
Typ(1)
0.3
LMC6762AI
Limit(2)
LMC6762BI
Limit(2)
Units
μs
tRISE
Rise Time
f = 10 kHz, CL = 50 pF,
Overdrive = 10 mV(3)(4)
f = 10 kHz, CL = 50 pF,
Overdrive = 10 mV(3)(4)
f = 10 kHz,
CL = 50 pF(3)(4)
V+ = 2.7V,
tFALL
Fall Time
0.3
μs
tPHL
Propagation Delay
(High to Low)
Overdrive = 10 mV
Overdrive = 100 mV
Overdrive = 10 mV
10
4
μs
μs
μs
10
f = 10 kHz,
CL = 50 pF(3)(4)
Overdrive = 100 mV
Overdrive = 10 mV
Overdrive = 100 mV
Overdrive = 10 mV
4
6
4
7
μs
μs
μs
μs
tPLH
Propagation Delay
(Low to High)
f = 10 kHz,
CL = 50 pF(3)(4)
V+ = 2.7V,
f = 10 kHz,
CL = 50 pF(3)(4)
Overdrive = 100 mV
4
μs
(1) Typical Values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
(3) CL includes the probe and jig capacitance.
(4) The rise and fall times are measured with a 2V input step. The propagation delays are also measured with a 2V input step.
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Typical Performance Characteristics
V+ = 5V, Single Supply, TA = 25°C unless otherwise specified
Supply Current
Supply Current
vs
vs
Supply
Voltage (Output High)
Supply
Voltage (Output Low)
Figure 1.
Figure 2.
Input Current vs
Common-Mode Voltage
Input Current vs
Common-Mode Voltage
Figure 3.
Figure 4.
Input Current vs
Common-Mode Voltage
Input Current
vs Temperature
Figure 5.
Figure 6.
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Typical Performance Characteristics (continued)
V+ = 5V, Single Supply, TA = 25°C unless otherwise specified
ΔVOS
ΔVOS
vs
ΔVCM
vs
ΔVCM
Figure 7.
Figure 8.
ΔVOS
vs
ΔVCM
Output Voltage vs
Output Current (Sourcing)
Figure 9.
Figure 10.
Output Voltage vs
Output Current (Sourcing)
Output Voltage vs
Output Current (Sourcing)
Figure 11.
Figure 12.
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Typical Performance Characteristics (continued)
V+ = 5V, Single Supply, TA = 25°C unless otherwise specified
Output Voltage vs
Output Current (Sinking)
Output Voltage vs
Output Current (Sinking)
Figure 13.
Figure 14.
Output Voltage vs
Output Current (Sinking)
Output Short Circuit Current
vs Supply Voltage (Sourcing)
Figure 15.
Figure 16.
Output Short Circuit Current
vs Supply Voltage (Sinking)
Response Time for
Overdrive (tPLH
)
Figure 17.
Figure 18.
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Typical Performance Characteristics (continued)
V+ = 5V, Single Supply, TA = 25°C unless otherwise specified
Response Time for
Response Time for
Overdrive (tPLH
Overdrive (tPHL
)
)
Figure 19.
Figure 20.
Response Time for
Overdrive (tPHL
Response Time for
Overdrive (tPLH
)
)
Figure 21.
Figure 22.
Response Time for
Overdrive (tPHL
Response Time vs
Capacitive Load
)
Figure 23.
Figure 24.
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SNOS739D –JULY 1997–REVISED MARCH 2013
APPLICATION HINTS
Input Common-Mode Voltage Range
At supply voltages of 2.7V, 5V and 15V, the LMC6762 has an input common-mode voltage range which exceeds
both supplies. As in the case of operational amplifiers, CMVR is defined by the VOS shift of the comparator over
the common-mode range of the device. A CMRR (ΔVOS/ΔVCM) of 75 dB (typical) implies a shift of < 1 mV over
the entire common-mode range of the device. The absolute maximum input voltage at V+ = 5V is 200 mV beyond
either supply rail at room temperature.
Figure 25. An Input Signal Exceeds the LMC6762 Power Supply Voltages
with No Output Phase Inversion
A wide input voltage range means that the comparator can be used to sense signals close to ground and also to
the power supplies. This is an extremely useful feature in power supply monitoring circuits.
An input common-mode voltage range that exceeds the supplies, 20 fA input currents (typical), and a high input
impedance makes the LMC6762 ideal for sensor applications. The LMC6762 can directly interface to sensors
without the use of amplifiers or bias circuits. In circuits with sensors which produce outputs in the tens to
hundreds of millivolts, the LMC6762 can compare the sensor signal with an appropriately small reference
voltage. This reference voltage can be close to ground or the positive supply rail.
Low Voltage Operation
Comparators are the common devices by which analog signals interface with digital circuits. The LMC6762 has
been designed to operate at supply voltages of 2.7V without sacrificing performance to meet the demands of 3V
digital systems.
At supply voltages of 2.7V, the common-mode voltage range extends 200 mV (ensured) below the negative
supply. This feature, in addition to the comparator being able to sense signals near the positive rail, is extremely
useful in low voltage applications.
Figure 26. Even at Low-Supply Voltage of 2.7V,
an Input Signal which Exceeds the Supply Voltages Produces No Phase Inversion at the Output
At V+ = 2.7V, propagation delays are tPLH = 4 μs and tPHL = 4 μs with overdrives of 100 mV. Please refer to the
performance curves for more extensive characterization.
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Shoot-Through Current
The shoot-through current is defined as the current surge, above the quiescent supply current, between the
positive and negative supplies of a device. The current surge occurs when the output of the device switches
states. This transient switching current results in glitches in the supply voltage. Usually, glitches in the supply
lines are compensated by bypass capacitors. When the switching currents are minimal, the values of the bypass
capacitors can be reduced considerably.
Figure 27. LMC6762 Circuit for Measurement of the Shoot-Through Current
Figure 28. Measurement of the Shoot-Through Current
From Figure 27 and Figure 28 the shoot-through current for the LMC6762 can be approximated to be 0.2 mA
(200 mV/1 kΩ). The duration of the transient is measured as 1 μs. The values needed for the local bypass
capacitors can be calculated as follows:
Area of Δ = ½ (1 μs × 200 μA)
= 100 pC
If the local bypass capacitor has to provide this charge of 100 pC, the minimum value of the local capacitor to
prevent local degradation of VCC can be calculated. Suppose that the maximum voltage droop that the system
can tolerate is 100mV,
ΔQ = C * (ΔV)
→C = (ΔQ/ΔV)
= 100 pC/100 mV
= 0.001 μF
The low internal feedthrough current of the LMC6762 thus requires lower values for the local bypass capacitors.
In applications where precision is not critical, this is a significant advantage, as lower values of capacitors result
in savings of board space, and cost.
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It is worth noting here that the delta shift of the power supply voltage due to the transient currents causes a
threshold shift of the comparator. This threshold shift is reduced by the high PSRR of the comparator. However,
the value of the PSRR applicable in this instance is the transient PSRR and not the DC PSRR. The transient
PSRR is significantly lower than the DC PSRR.
Generally, it is a good goal to reduce the delta voltage on the power supply to a value equal to or less than the
hysteresis of the comparator. For example, if the comparator has 50 mV of hysteresis, it would be reasonable to
increase the value of the local bypass capacitor to 0.01 μF to reduce the voltage delta to 10 mV.
Output Short Circuit Current
The LMC6762 has short circuit protection of 40 mA. However, it is not designed to withstand continuous short
circuits, transient voltage or current spikes, or shorts to any voltage beyond the supplies. A resistor is series with
the output should reduce the effect of shorts. For outputs which send signals off PC boards additional protection
devices, such as diodes to the supply rails, and varistors may be used.
Hysteresis
If the input signal is very noisy, the comparator output might trip several times as the input signal repeatedly
passes through the threshold. This problem can be addressed by making use of hysteresis as shown below.
Figure 29. Canceling the Effect of Input Capacitance
The capacitor added across the feedback resistor increases the switching speed and provides more short term
hysteresis. This can result in greater noise immunity for the circuit.
Spice Macromodel
A Spice Macromodel is available for the LMC6762. The model includes a simulation of:
•
•
•
Input common-mode voltage range
Quiescent and dynamic supply current
Input overdrive characteristics
and many more characteristics as listed on the macromodel disk.
A SPICE macromodel of this and many other op amps is available at no charge from the WEBENCH Design
Center Team at http://www.ti.com/ww/en/analog/webench/
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Typical Applications
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One-Shot Multivibrator
Figure 30. One-Shot Multivibrator
A monostable multivibrator has one stable state in which it can remain indefinitely. It can be triggered externally
to another quasi-stable state. A monostable multivibrator can thus be used to generate a pulse of desired width.
The desired pulse width is set by adjusting the values of C2 and R4. The resistor divider of R1 and R2 can be
used to determine the magnitude of the input trigger pulse. The LMC6762 will change state when V1 < V2. Diode
D2 provides a rapid discharge path for capacitor C2 to reset at the end of the pulse. The diode also prevents the
non-inverting input from being driven below ground.
Bi-Stable Multivibrator
Figure 31. Bi-Stable Multivibrator
A bi-stable multivibrator has two stable states. The reference voltage is set up by the voltage divider of R2 and
R3. A pulse applied to the SET terminal will switch the output of the comparator high. The resistor divider of R1,
R4, and R5 now clamps the non-inverting input to a voltage greater than the reference voltage. A pulse applied to
RESET will now toggle the output low.
Zero Crossing Detector
Figure 32. Zero Crossing Detector
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A voltage divider of R4 and R5 establishes a reference voltage V1 at the non-inverting input. By making the series
resistance of R1 and R2 equal to R5, the comparator will switch when VIN = 0. Diode D1 insures that V3 never
drops below −0.7V. The voltage divider of R2 and R3 then prevents V2 from going below ground. A small amount
of hysteresis is setup to ensure rapid output voltage transitions.
Oscillator
Figure 33. Square Wave Generator
Figure 33 shows the application of the LMC6762 in a square wave generator circuit. The total hysteresis of the
loop is set by R1, R2 and R3. R4 and R5 provide separate charge and discharge paths for the capacitor C. The
charge path is set through R4 and D1. So, the pulse width t1 is determined by the RC time constant of R4 and C.
Similarly, the discharge path for the capacitor is set by R5 and D2. Thus, the time t2 between the pulses can be
changed by varying R5, and the pulse width can be altered by R4. The frequency of the output can be changed
by varying both R4 and R5.
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Figure 34. Time Delay Generator
The circuit shown above provides output signals at a prescribed time interval from a time reference and
automatically resets the output when the input returns to ground. Consider the case of VIN = 0. The output of
comparator 4 is also at ground. This implies that the outputs of comparators 1, 2, and 3 are also at ground.
When an input signal is applied, the output of comparator 4 swings high and C charges exponentially through R.
This is indicated above.
The output voltages of comparators 1, 2, and 3 switch to the high state when VC1 rises above the reference
voltage VA, VB and VC. A small amount of hysteresis has been provided to insure fast switching when the RC
time constant is chosen to give long delay times.
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SNOS739D –JULY 1997–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 14
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PACKAGE OPTION ADDENDUM
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6-Nov-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LMC6762AIM
LMC6762AIM/NOPB
LMC6762AIMX
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
D
8
8
8
8
8
8
8
8
95
Non-RoHS
& Green
Call TI
Level-1-235C-UNLIM
Level-1-260C-UNLIM
Level-1-235C-UNLIM
Level-1-260C-UNLIM
Level-1-235C-UNLIM
Level-1-260C-UNLIM
Level-1-235C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
LMC67
62AIM
Samples
Samples
Samples
Samples
Samples
Samples
Samples
Samples
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
95
RoHS & Green
SN
Call TI
SN
LMC67
62AIM
2500
Non-RoHS
& Green
LMC67
62AIM
LMC6762AIMX/NOPB
LMC6762BIM
2500 RoHS & Green
LMC67
62AIM
95
95
Non-RoHS
& Green
Call TI
SN
LMC67
62BIM
LMC6762BIM/NOPB
LMC6762BIMX
RoHS & Green
LMC67
62BIM
2500
Non-RoHS
& Green
Call TI
SN
LMC67
62BIM
LMC6762BIMX/NOPB
2500 RoHS & Green
LMC67
62BIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Nov-2022
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMC6762AIMX
LMC6762AIMX/NOPB
LMC6762BIMX
SOIC
SOIC
SOIC
SOIC
D
D
D
D
8
8
8
8
2500
2500
2500
2500
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
6.5
6.5
6.5
6.5
5.4
5.4
5.4
5.4
2.0
2.0
2.0
2.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
LMC6762BIMX/NOPB
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LMC6762AIMX
LMC6762AIMX/NOPB
LMC6762BIMX
SOIC
SOIC
SOIC
SOIC
D
D
D
D
8
8
8
8
2500
2500
2500
2500
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
35.0
35.0
35.0
35.0
LMC6762BIMX/NOPB
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LMC6762AIM
LMC6762AIM
D
D
D
D
D
D
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
8
8
8
8
8
8
95
95
95
95
95
95
495
495
495
495
495
495
8
8
8
8
8
8
4064
4064
4064
4064
4064
4064
3.05
3.05
3.05
3.05
3.05
3.05
LMC6762AIM/NOPB
LMC6762BIM
LMC6762BIM
LMC6762BIM/NOPB
Pack Materials-Page 3
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022, Texas Instruments Incorporated
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