LMH34400 [TI]
具有集成钳位和环境光消除功能的 240MHz 单端跨阻放大器;
| 型号： | LMH34400 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有集成钳位和环境光消除功能的 240MHz 单端跨阻放大器 放大器 |
| 文件： | 总29页 (文件大小：1702K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMH34400
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
LMH34400 具有集成钳位的240MHz 单端跨阻放大器
1 特性
3 说明
• 积分增益：40kΩ
• 性能，CPD = 1pF：
LMH34400 是业内超小型固定增益、单端跨阻放大
器，适用于光探测和测距 (LIDAR) 应用和激光测距系
统。LMH34400 可产生 1.0VPP 的输出摆幅，并具有
50nARMS 的输入参考噪声。
– 带宽：240MHz
– 输入参考噪声：50nARMS
– 上升、下降时间：1.5ns
• 集成式环境光消除
• 集成式100mA 保护钳位
• 静态电流：20mA
• 低功耗模式电流：1.5mA
• 温度范围：–40°C 至+125°C
LMH34400 具有集成的 100mA 电流钳位，可保护放大
器， 使其在出现过载输入时能迅速恢复正常。
LMH34400 还有一个集成式环境光消除 (ALC) 电路，
可取代光电二极管与放大器之间的交流耦合，从而节省
布板空间和系统成本。在需要测量低于 400kHz 的频率
信号分量时，应禁用ALC 环路。
2 应用
当不使用放大器时，可以使用 EN 引脚将 LMH34400
置于低功耗模式，以节省能源。此功能允许将多个
LMH34400 放大器多路复用至接收信号链下一级的输
入，同时 EN 控制引脚提供多路复用器选择功能。
LMH34400 提供单端输出并经过优化，可与基于时数
转换器(TDC) 的LIDAR 系统一同使用。
• 机械扫描激光雷达
• 固态扫描激光雷达
• 激光测距仪
• 光学ToF 位置传感器
• 无人机视觉
• 工业机器人激光雷达
• 移动机器人激光雷达
• 扫地机器人激光雷达
封装信息(1)
封装尺寸（标称值）
器件型号
LMH34400
封装
DRL（SOT563，6） 1.60mm × 1.20mm
.
(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。
.
.
.
.
VDD
EN
95
100-mA
Clamp
92
89
86
83
80
12.2 k
IN
10
3.6x
TIA
OUT
Ambient Light
Cancellation
VBIAS
IDC EN
CIN = 1.0 pF
77
1M
10M
100M
1G
Frequency (Hz)
GND
跨阻带宽与频率间的关系
简化版方框图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
Table of Contents
7.4 Device Functional Modes..........................................13
8 Application and Implementation..................................15
8.1 Application Information............................................. 15
8.2 Typical Application.................................................... 16
8.3 Typical Application.................................................... 18
8.4 Power Supply Recommendations.............................19
8.5 Layout....................................................................... 20
9 Device and Documentation Support............................21
9.1 Device Support......................................................... 21
9.2 Documentation Support............................................ 21
9.3 Receiving Notification of Documentation Updates....21
9.4 支持资源....................................................................21
9.5 Trademarks...............................................................21
9.6 静电放电警告............................................................ 21
9.7 术语表....................................................................... 21
10 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Electrical Characteristics: Logic Threshold and
Switching Characteristics.............................................. 6
6.7 Typical Characteristics................................................7
7 Detailed Description......................................................12
7.1 Overview...................................................................12
7.2 Functional Block Diagram.........................................12
7.3 Feature Description...................................................13
Information.................................................................... 21
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision A (August 2022) to Revision B (March 2023)
Page
• Added the Typical Application, Design Requirements, and Detailed Design Procedure sections....................18
Changes from Revision * (March 2022) to Revision A (August 2022)
Page
• 将数据表的状态从预告信息 更改为量产数据 .....................................................................................................1
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SBOSA56
2
Submit Document Feedback
Product Folder Links: LMH34400
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
5 Pin Configuration and Functions
1
IN
VDD
EN
6
IDC_EN
2
3
GND
OUT
5
4
图5-1. DRL Package,
6-Pin SOT563
(Top View)
表5-1. Pin Functions
PIN
TYPE(2)
DESCRIPTION
NAME
EN
NO.
3
I
I
Device enable pin. EN = logic low = normal operation (default)(1); EN = logic high = low-power mode.
Amplifier ground.
GND
5
Ambient light cancellation loop enable. IDC_EN = logic low = enable DC cancellation (default)(1)
IDC_EN = logic high = disable DC cancellation.
;
IDC_EN
6
I
IN
1
4
2
I
O
I
Transimpedance amplifier input.
Amplifier output.
OUT
VDD
Positive power supply.
(1) TI recommends driving a digital pin with a low-impedance source rather than leaving the pin floating because fast-moving transients
can couple into the pin and inadvertently change the logic level.
(2) I = input, O = output
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
3.65
VDD
VDD
25
UNIT
V
VDD
Total supply voltage
Voltage at output pin
0
V
Voltage at logic pins
V
–0.25
IIN
Continuous current into IN
Continuous output current
Junction temperature
Operating free-air temperature
Storage temperature
mA
mA
°C
°C
°C
IOUT
TJ
35
150
125
150
TA
–40
–65
Tstg
(1) If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001, all pins(1)
±1000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per ANSI/ESDA/
JEDEC JS-002, all pins((2))
±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
3
NOM
MAX
3.45
125
UNIT
V
VDD
TA
Total supply voltage
3.3
Operating free-air temperature
°C
–40
6.4 Thermal Information
LMH34400
THERMAL METRIC(1)
DRL (SOT-563)
6 PINS
201.2
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
101.5
83.2
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
5.4
ΨJT
82.4
ΨJB
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SBOSA56
4
Submit Document Feedback
Product Folder Links: LMH34400
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
6.5 Electrical Characteristics
VDD = 3.3 V, CPD (1) = 1 pF, EN = 0 V, IDC_EN = 3.3 V, RL = 100 Ω(Output is AC-coupled for AC performance parameters;
for DC performance parameters load is referenced to 1V), and TA = 25℃(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
SSBW
LSBW
tR, tF
Small-signal bandwidth
Large-signal bandwidth
Rise and fall time
VOUT = 100 mVPP
240
240
1.5
470
18
MHz
MHz
ns
VOUT = 1 VPP
VOUT = 100 mVPP, pulse width = 10 ns
VOUT = 1 VPP, pulse width = 10 ns
IIN = 10 mA, pulse width = 10 ns
IIN = 10 mA, pulse width = 10 ns
f = 10 MHz
Slew rate (2)
V/µs
ns
Overload recovery time (1% settling)
Overload pulse extension (3)
Output noise density
3
ns
eN
94
nV/√Hz
nARMS
Ω
iN
Integrated input-referred noise
Closed-loop output impedance
f = DC to 250 MHz
50
ZOUT
f = 50 MHz
10
DC PERFORMANCE
Z21
VO
Small-signal transimpedance gain (4)
33
40
1
46
kΩ
Default output voltage
Output voltage drift
IIN = 0 µA
0.93
1.07
V
ΔVO/
ΔTA
±20
µV/°C
INPUT PERFORMANCE
RIN
VIN
Input Resistance
50
100
2.5
150
Ω
Default input bias voltage
Input pin floating
Input pin floating
2.44
2.55
V
ΔVIN/
ΔTA
Default input bias voltage drift
DC input current range
1.1
34
mV/°C
µA
Z21 < 3-dB degradation from
IIN = 5 µA
IIN
27
OUTPUT PERFORMANCE
VOH
Output voltage swing (high) (5)
2.05
2.3
2.3
0.4
0.45
19
V
V
V
V
TA = –40°C to 125°C
0.6
22
VOL
Output voltage swing (low) (6)
Linear output drive (source)
TA = –40°C to 125°C
16
7
IIN = 15 µA, RL = 25 Ω
IOUT
19
mA
TA = –40°C, IIN = 15 µA, RL = 25 Ω
TA = 125°C, IIN = 15 µA, RL = 25 Ω
19
ISC
Output short-circuit current (7)
85
mA
ZOUT
DC output impedance (amplifier enabled)
10
13
Ω
AMBIENT LIGHT CANCELLATION PERFORMANCE (IDC_EN = 0 V) (8)
6
35
3
µs
µs
IIN = 0 µA →100 µA
Settling time
IIN = 100 µA →0 µA
Ambient light current cancellation range
POWER SUPPLY
Output offset shift from IDC = 5 µA < ±10 mV
2
mA
16
20
22.5
18
24
TA = 125°C
IQ
Quiescent current
mA
TA = –40°C
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
5
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
6.5 Electrical Characteristics (continued)
VDD = 3.3 V, CPD (1) = 1 pF, EN = 0 V, IDC_EN = 3.3 V, RL = 100 Ω(Output is AC-coupled for AC performance parameters;
for DC performance parameters load is referenced to 1V), and TA = 25℃(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SHUTDOWN
1.2
1.5
1.4
1.6
65
1.7
IQ
Disabled quiescent current (EN = VDD
)
mA
µA
TA = –40°C
TA = 125°C
EN and IDC_EN pins input bias current
90
(1) Input capacitance of photodiode.
(2) Average of rising and falling slew rate.
(3) Pulse width extension measured at 50% of pulse height of square wave.
(4) Gain measured at the amplifier output pin when driving a 100-Ω resistive load. At higher resistor loads the gain increases.
(5) Photodiode anode biased to a negative voltage
(6) Photodiode cathode biased to a positive voltage
(7) Device cannot withstand continuous short-circuit.
(8) Enabling the ambient light cancellation loop adds noise to the system.
6.6 Electrical Characteristics: Logic Threshold and Switching Characteristics
VDD = 3.3 V, CPD ((1)) = 1 pF, EN = 0 V, IDC_EN = 3.3 V, RL = 100 Ω(Output is AC-coupled for AC performance parameters;
for DC performance parameters load is referenced to 1V), and TA = 25℃(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LOGIC THRESHOLD PERFORMANCE
Amplifier disabled above this voltage
Amplifier enabled below this voltage
1.6
1.2
2
V
V
EN control threshold voltage
0.8
Ambient light cancellation loop disabled
above this voltage
1.6
1.2
2
V
V
IDC_EN control threshold voltage
Ambient light cancellation loop enabled
below this voltage
0.8
EN CONTROL TRANSIENT PERFORMANCE
Ambient loop disabled, fIN = 25 MHz, VOUT
= 1 VPP, IDC = 0 µA
Enable transition-time (1% settling)
200
3.5
10
ns
ns
µs
ns
Ambient loop disabled, fIN = 25 MHz, VOUT
= 1 VPP, IDC = 0 µA
Disable transition-time (1% settling)
Enable transition-time (1% settling)
Disable transition-time (1% settling)
(1) Input capacitance of photodiode.
Ambient loop enabled, fIN = 25 MHz, VOUT
1 VPP, IDC = 100 µA
=
=
Ambient loop enabled, fIN = 25 MHz, VOUT
1 VPP, IDC = 100 µA
3.5
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SBOSA56
6
Submit Document Feedback
Product Folder Links: LMH34400
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
6.7 Typical Characteristics
At VDD = 3.3 V, CPD = 1 pF, EN = 0 V (enabled), IDC_EN = 3.3 V (disabled), RL = 100 Ω, and TA = 25°C (unless otherwise
noted)
95
92
89
86
83
80
77
95
92
89
86
83
80
77
CIN = PCB Only
CIN = 0.5 pF
CIN = 1.0 pF
CIN = 2.2 pF
CIN = 4.7 pF
CIN = 10 pF
CIN = PCB Only
CIN = 0.5 pF
CIN = 1.0 pF
CIN = 2.2 pF
CIN = 4.7 pF
CIN = 10 pF
1M
10M
100M
1G
1M
10M
100M
1G
Frequency (Hz)
Frequency (Hz)
VOUT = 100 mVPP
VOUT = 1 VPP
图6-1. Small-Signal Response vs Input Capacitance
图6-2. Large-Signal Response vs Input Capacitance
95
92
89
86
83
80
77
TA = -40 C
TA = 25 C
TA = 85 C
TA = 125 C
1M
10M
100M
1G
Frequency (Hz)
VOUT = 100 mVPP
VOUT = 1 VPP
图6-3. Small-Signal Response vs Ambient Temperature
图6-4. Large-Signal Response vs Ambient Temperature
1
Amplifier Enabled
Amplifier Disabled
0
-1
-2
-3
-4
10k
1k
100
10
-5
ALC Disabled
ALC Enabled
-6
1M
10M
Frequency (Hz)
100M
1M
10M
Frequency (Hz)
.
IDC_IN = 100 μA
图6-6. Closed-Loop Output Impedance vs Frequency
图6-5. Low-side Frequency Response vs Ambient Light
Cancellation
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
7
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
6.7 Typical Characteristics (continued)
At VDD = 3.3 V, CPD = 1 pF, EN = 0 V (enabled), IDC_EN = 3.3 V (disabled), RL = 100 Ω, and TA = 25°C (unless otherwise
noted)
10
10
CPD = none
CPD = 0.5 pF
CPD = 1 pF
CPD = 2 pF
CPD = 4.7 pF
CPD = 10 pF
TA = -40 C
TA = 25 C
TA = 85 C
TA = 125 C
1
10k
1
10k
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
Frequency (Hz)
Frequency (Hz)
.
.
图6-7. Input Noise Density vs Ambient Temperature
IDC = 0 A
图6-8. Input Noise Density vs Input Capacitance
2.5
0.1 VPP
IDC = 10 A
IDC = 100 A
IDC = 1 mA
1.0 VPP
1.2Vpp
2.25
2
10
1.75
1.5
1.25
1
0.75
1
Time (5 ns/div)
.
10k
100k
1M
10M
100M
1G
Frequency (Hz)
IDC_EN = 0 V
图6-10. Pulse Response vs Output Swing
图6-9. Input Noise Density vs Ambient Light DC Current
2.5
3.5
3
IIN = 25 A
IIN = 1 mA
EN
Output
2.25
2
2.5
2
1.75
1.5
1.25
1
1.5
1
0.5
0
0.75
0.5
-0.5
Time (5 ns/div)
.
Time (50 ns/div)
.
图6-11. Overloaded Pulse Response
图6-12. Turn-On Time
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SBOSA56
8
Submit Document Feedback
Product Folder Links: LMH34400
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
6.7 Typical Characteristics (continued)
At VDD = 3.3 V, CPD = 1 pF, EN = 0 V (enabled), IDC_EN = 3.3 V (disabled), RL = 100 Ω, and TA = 25°C (unless otherwise
noted)
3.5
3
2.5
2.25
2
2.5
2
1.75
1.5
1.25
1
EN
Output
1.5
1
0.5
0
0.75
0.5
-0.5
Time (1 s/div)
Time (50 ns/div)
.
IDC_IN = 0 µA →100 µA
图6-14. Ambient Loop Cancellation Settling Time
图6-13. Turn-Off Time
1.5
1.25
1
0.75
0.5
0.25
0
Time (1 s/div)
IDC_IN = 100 µA →0 µA
positive current is sinking current into the photodiode's
cathode
图6-15. Ambient Loop Cancellation Settling Time
图6-16. Transimpedance Gain vs Input Current
2.7
2.65
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
2.6
2.55
2.5
2.45
Unit 1
Unit 2
Unit 3
2.4
-40
-20
0
20
40
60
80
100 120 140
0
0.5
1
1.5
2
2.5
3
3.5
Temperature (C)
Supply Voltage (V)
.
.
图6-18. Input Bias Voltage vs Ambient Temperature
图6-17. Input Bias Voltage vs Supply Voltage
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
9
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
6.7 Typical Characteristics (continued)
At VDD = 3.3 V, CPD = 1 pF, EN = 0 V (enabled), IDC_EN = 3.3 V (disabled), RL = 100 Ω, and TA = 25°C (unless otherwise
noted)
25
24
23
22
21
20
19
18
17
30
25
20
15
10
5
Unit 1
Unit 2
Unit 3
TA = -40 C
TA = 25 C
TA = 125 C
0
-40
-20
0
20
40
60
80
100 120 140
0
0.5
1
1.5
2
2.5
3
3.5
Temperature (C)
Supply Voltage (V)
.
.
图6-19. Quiescent Current vs Ambient Temperature
图6-20. Quiescent Current vs Supply Voltage
2.5
25
20
15
10
5
TA = -40 C
TA = 25 C
2.25
TA = 125 C
2
1.75
1.5
1.25
1
0
0
10
20
30
40
50
60
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
3
3.3
Input Current (A)
Enable Voltage (EN) (V)
.
.
图6-21. Output Voltage vs Input Current
图6-22. Logic Threshold vs Ambient Temperature
1750
1500
1250
1000
750
500
250
0
16
17
18
19
20
21
22
23
24
Quiescent Current (mA)
μ= 21.1 mA, σ= 0.38 mA
图6-23. Quiescent Current Distribution
μ= 38.5 kΩ, σ= 1.2 kΩ
图6-24. Transimpedance Gain Distribution
Copyright © 2023 Texas Instruments Incorporated
10
Submit Document Feedback
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
6.7 Typical Characteristics (continued)
At VDD = 3.3 V, CPD = 1 pF, EN = 0 V (enabled), IDC_EN = 3.3 V (disabled), RL = 100 Ω, and TA = 25°C (unless otherwise
noted)
1500
1250
1000
750
500
250
0
1250
1000
750
500
250
0
0.93
0.95
0.97
0.99
1.01
1.03
1.05
1.07
9
9.5
10
10.5
11
11.5
12
12.5
13
Default Output Voltage (V)
Output Impedance ()
μ= 0.99 V, σ= 0.0073 V
μ= 11 Ω, σ= 0.38 Ω, Device Enabled
图6-26. Output Impedance (ZOUT) Distribution
图6-25. Default Output Voltage Distribution
μ= 1.6 kΩ, σ= 0.013 kΩ, Device Disabled
图6-27. Output Impedance (ZOUT) Distribution
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
11
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
7 Detailed Description
7.1 Overview
The LMH34400 is a single-channel, single-ended output, high-speed transimpedance amplifier (TIA) and
features several integrated functions geared towards light detection and ranging (LIDAR) and pulsed time-of-
flight (ToF) systems. The LMH34400 is designed to work with photodiodes (PDs) whose anodes are biased to a
negative voltage and cathodes tied to the amplifier input so that the amplifier sources the photocurrent. The
LMH34400 is offered in a space-saving 1.60 mm × 1.20 mm, 6-pin SOT563 package and is rated over a
temperature range from –40°C to +125°C.
7.2 Functional Block Diagram
VDD
100-mA
Clamp
RT
Difference Amplifier (3.6x)
Mid-scale
buffer
RG
RF
VDC = 1.0 V
IN
TIA
Photodiode
+
-
Ambient Light
Cancella on
OUT
10
IDC EN
-VBIAS
RG
TIA
RF
Mid-scale
buffer
RT
GND
EN
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SBOSA56
12
Submit Document Feedback
Product Folder Links: LMH34400
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
7.3 Feature Description
7.3.1 Clamping and Input Protection
The LMH34400 is designed to work with photodiode (PD) configurations that can source or sink current; the
LMH34400, however, is optimized for a sinking current configuration. It is assumed that the LMH34400 device is
being used with a PD that is configured with its cathode tied to the amplifier input and the anode tied to a
negative supply voltage, unless stated otherwise.
The LMH34400 features two internal clamps, a fast recovery clamp and a soft clamp. The fast recovery clamp is
the active clamp when the photodiode is sinking a photocurrent. The soft clamp is the active clamp when the
photodiode is sourcing a photocurrent.
Stray reflections from nearby objects with high reflectivity can produce large output current pulses from the PD.
The linear input range of the LMH34400 is approximately 30 µA. Input currents in excess of the linear current
range cause the internal nodes of the amplifier to saturate, which increases the amplifier recovery time. The end
result is a broadening of the output pulse leading to blind zones in the system. To protect against this condition,
the LMH34400 features an integrated clamp that absorbs and diverts the excess current to the positive supply
(VDD) when the amplifier detects its nodes entering a saturated condition. The integrated clamp minimizes the
pulse extension to less than a few nanoseconds for input pulses up to 100 mA. When the amplifier is in low-
power mode, the clamp circuitry is still active, thereby protecting the TIA input.
7.3.2 ESD Protection
All LMH34400 IO pins excluding (VDD and GND) have an internal electrostatic discharge (ESD) protection diode
to the positive and negative supply rails to protect the amplifier from ESD events.
7.3.3 Single-Ended Output Stage
The output stage of the LMH34400 has a 10-Ω series resistor on its output to isolate the amplifier output stage
transistors from the package bond-wire inductance and printed circuit board (PCB) capacitance. The net gain of
the LMH34400 (TIA + output stage) is 40 kΩ when driving an external 100-Ω resistor. When the external load
resistor is increased above 100 Ω, the effective gain from the IN pin to the output pin increases. Consequently,
when the external load resistor is decreased to less than 100 Ω, the effective gain from the IN pin to the output
pin decreases as a result of the larger voltage drop across the internal 10-Ω resistor. When there is no load
resistor connected to the output pin, the effective TIA gain is 44 kΩ. The output voltage of the LMH34400 is set
to a fixed value of 1.0 V when there is no current flowing into the amplifier. The output swings above and below
1.0 V when the photodiode sinks and sources current, respectively.
7.4 Device Functional Modes
7.4.1 Ambient Light Cancellation Mode
The LMH34400 has an integrated DC cancellation loop that can used to cancel any voltage offsets resulting from
ambient light. The DC cancellation loop is enabled by setting IDC_EN low. Incident ambient light on a
photodiode produces a DC current resulting in an offset voltage at the output of the TIA stage. If the photodiode
produces a DC output current resulting from ambient light, then the output of the level-shift buffer stage is offset
from the reference voltage VREF. The ALC loop detects this offset and produces an opposing DC current to
compensate for the differential offset voltage at its input. The loop has a high-pass cutoff frequency of 400 kHz.
The ambient light cancellation loop is disabled when the amplifier is placed in low-power mode.
The shot noise current introduced by the DC cancellation loop increases the overall amplifier noise. So, if the
ambient light level is negligible, then disable the loop to improve SNR. The cancellation loop helps save PCB
space and system costs by eliminating the need for external AC coupling passive components. Additionally, the
extra trace inductance and PCB capacitance introduced by using external AC coupling components degrades
the LMH34400 dynamic performance.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
13
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
7.4.2 Power-Down Mode (Multiplexer Mode)
The LMH34400 can be placed in low-power mode by setting EN high, which helps in saving system power.
Enabling low-power mode puts the outputs of the internal amplifiers in the LMH34400 in a high-impedance state.
图 7-1 shows how this device feature can further save board space and cost by eliminating the need for a
discrete high-speed multiplexer, if a system consists of several photodiode and amplifier channels multiplexed to
single time-of-flight detector circuit. The disabled channel outputs are not an ideal open circuit so as the number
of multiplexed channels increases, the disabled channels begin to load the enabled channel. An additional
isolation resistor can help reduce the impact of reflections from disabled channels. Multiplexing more than four
channels in parallel will degrade the performance of the enabled channel.
When the amplifier is in its low-power mode, the clamp circuitry is still active thereby protecting the TIA input.
The ambient light cancellation loop is disabled when the amplifier is placed in power-down mode. When the
LMH34400 device is brought out of power-down operation, the ambient light cancellation loop requires several
time constants to settle. The time constant is based on the 400-kHz cutoff frequency of the loop.
EN = 3.3 V
DISABLED AMPLIFIER
100-mA
Clamp
12.2 k
IN
10
RISO
3.6x
TIA
Ambient Light
Cancellation
VBIAS
TDC
or
+
–
FPGA
EN = 0V
TLV3801
VREF
ENABLED AMPLIFER
100-mA
Clamp
12.2 k
IN
10
RISO
3.6x
TIA
Ambient Light
Cancellation
VBIAS
图7-1. Configuring Two LMH34400 Devices in Multiplexer Mode
Copyright © 2023 Texas Instruments Incorporated
14
Submit Document Feedback
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
8 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
8.1 Application Information
The high gain and single-ended output of the LMH34400 is well suited to be used in connection with a time-to-
digital converter (TDC) for a time-of-flight (ToF) based receiver in a LIDAR system. The TDC function can be
implemented using a stand-alone TDC or using a FPGA. ToF receive circuits that use TDC are significantly less
expensive and consume considerably less power when compared to an Analog-to-Digital Converter (ADC)
based solution. The output of the LMH34400 presents an analog representation of the returned light pulse. It is
common practice to use a time-discriminator circuit before the TDC to precisely use a deterministic part of the
returned waveform to stop the TDC. The most straightforward method to accomplish this action is called leading-
edge discrimination. This method uses a high-speed comparator with a low propagation delay to stop the TDC
when the waveform crosses a chosen incoming light amplitude value.
In many applications, the amplitude of the returned pulse can vary considerably due to the difference in target
reflectivity or simply the light source spreading out to a target moving to longer distances. For this reason, it is it
is also important to choose a compartor with low dispersion. If the dispersion is high, then the amplitude variation
in the returned signal will be converted to a variation in the timing signal presented to the TDC. This behavior is
known as a walk error. 图 8-1 shows the LMH34400 connected to the TLV3801 high speed comparator. In this
configuration, an incoming optical pulse will source current out of the amplifier’s input pin and deliver a
proportional voltage pulse to the comparator input. As the amplifier’s output has 1.0 V DC with no input current,
the reference voltage of the comparator should be set to a level above 1.0 V. For example, if the desire is to
have the comparator to change states when the input rises above 10 μA of current, then the VREF voltage
should be set to 1.0 V + (40 kΩ×10 μA) = 1.4 V.
VDD
EN
100-mA
Clamp
12.2 k
TIA
IN
10
OUT
TDC
or
3.6x
+
–
FPGA
Ambient Light
Cancellation
VBIAS
TLV3801
VREF
GND
图8-1. LMH34400 to Interface to Comparator and TDC
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
15
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
8.2 Typical Application
图8-2 shows the circuit used to test the LMH34400 with a voltage source.
VDD
EN
100-mA
Clamp
4 k
12.2 k
TIA
50
10
50
OUT
50
3.6x
Instrument
1 μF
Ambient Light
Cancellation
Bias-T
VBIAS
Source
+
–
GND
图8-2. LMH34400 Test Circuit
8.2.1 Design Requirements
The objective is to design a low-noise, wideband output transimpedance amplifier. The design requirements are
as follows:
• Amplifier supply voltage: 3.3 V
• Transimpedance gain: 40 kΩ
• Photodiode capacitance: CPD = 1 pF
• Target bandwidth: 240 MHz
• Integrated input-referred noise: 50 nARMS (noise bandwidth = 250 MHz)
8.2.2 Detailed Design Procedure
图8-2 shows the LMH34400 test circuit used to evaluate various bandwidth without using an optical input signal.
The voltage source is DC biased close to the input bias voltage of the LMH34400 (approximately 2.5 V). The
LMH34400 internal design is optimized to only source current out of the input pin (pin 1). When testing the
LMH34400 with a network analyzer or other AC source, the DC bias should be controlled such that the sum of
the input AC and DC components does not result in a sourcing current into the amplifier input.
In the configuration shown in 图 8-2, there is a 50 Ω series resistor that helps with any reflection into the
observing instrument. The instrument could be any 50 Ω impedance input device such as vector network
analyzer (VNA) or oscilloscope. This setup creates a voltage divider on the output and reduces the TIA's
amplitude by a factor of two. This factor must be considered when interpreting the measured results.
The bandwidth of a transimpedance amplifier strongly depends on the capacitance of the photodiode (CPD) that
is connected to the input pin of the amplifier. The larger the capacitance, the lower the closed loop bandwidth. 图
8-3 shows when the CPD connected to the LMH34400 is between 0 pF –10 pF.
While bandwidth is inversely proportional to the photodiode capacitance, the input-referred current noise and
photodiode capacitance are directly proportional. To measure the output noise, the same circuit in 图 8-2 can be
used with a simple modification. In this case, all components on the input pin should be removed except CPD. 图
8-4 shows the impact of the input-referred noise density as the CPD is varied from 0 pF to 10 pF. As the
capacitance increases, the amplitude and breadth of the high frequency noise increases significantly.
图 8-5 shows the impact of an increasing photodiode capacitance on these two parameters in one plot. In this
plot, the integrated input-referred noise is calcuated over a fixed range of DC to 250 MHz. Both the small-signal
bandwidth and integrated input-referred noise trend toward poorer performance as the capacitance increases.
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SBOSA56
16
Submit Document Feedback
Product Folder Links: LMH34400
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
For the highest level of performance, the photodiode capacitance should be minimized. As the photodiode
capacitance is proportional to its light capturing area, the optimum value chosen will be a compromise of several
system variables and will differ between applications.
8.2.3 Application Curves
95
92
89
86
83
80
77
10
CIN = PCB Only
CIN = 0.5 pF
CIN = 1.0 pF
CIN = 2.2 pF
CIN = 4.7 pF
CIN = 10 pF
CPD = none
CPD = 0.5 pF
CPD = 1 pF
CPD = 2 pF
CPD = 4.7 pF
CPD = 10 pF
1
10k
1M
10M
Frequency (Hz)
100M
1G
100k
1M
10M
100M
1G
Frequency (Hz)
图8-3. Small-Signal Response vs Input
图8-4. Input Noise Density vs Input Capacitance
Capacitance
300
280
260
240
220
200
180
160
140
120
165
Bandwidth
Noise (DC to 250 MHz)
150
135
120
105
90
75
60
45
30
0
1
2
3
4
5
6
7
8
9
10
Photodiode Capacitance (pF)
图8-5. Bandwidth and Noise vs Input Capacitance
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
17
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
8.3 Typical Application
A common application for the LMH34400 is as a transimpedance front-end driving a comparator, which can then
connect to a time-to-digital converter to calculate distances from pulse-based time-of-flight measurements. 图
8-6 shows the test circuit with a Hamamatsu™ GN8195-12 photodiode input connected to the LMH34400, which
is then driving TI’s TLV3601 comparator.
TLV3601
G8195
Oscilloscope
Optical Pulse
Generator
LMH34400
-12 V
Vref = 1.65 V
图8-6. LMH34400 Signal Chain With Comparator
8.3.1 Design Requirements
The objective is to design a transimpedance front-end that can receive a 10 ns wide pulse, amplify the pulse
through the LMH34400, and then drive the output through a comparator. The design requirements are as
follows:
• Supply voltage 3.3 V
• Photodiode capacitance 1 pF
• Pulse width 10 ns
• Input current pulse edge rate 1 ns
• Input peak current 25 µA
8.3.2 Detailed Design Procedure
The circuit in 图 8-6 shows a photodiode anode connected to the LMH34400 which is followed by a comparator.
To create the 10 ns, 25 µA input current pulses, the GN8195 photodiode is chosen because it provides low input
capacitance with minimal biasing requirements and allows for easy optical coupling through fiber. Given the 40
kΩ gain from the LMH34400, the expected output voltage with 25 µA input current would be a 1 V peak signal.
With input pulse edge rates of 1 ns, it was expected that the LMH34400 would produce slower pulse edges
because the input slew rate is higher than the capabilities of the device. To increase the edge rates of the
LMH34400 output signal, the TLV3601 comparator is added after the LMH34400 because it has a rise and fall
time of 750 ps.
For a simple time-of-flight application, the output of the comparator could be connected to a time-to-digital
converter (TDC) to perform a simple distance calculation. Using this method, the distance is calculated by
measuring the time between outgoing and incoming pulse edges and multiplying by two. In the signal chain, the
LMH34400 provides the initial signal amplification and conversion to a voltage, then the TLV3601 further
increases the output amplitude as well as provides a clean, fast edge to a following time-to-digital converter.
In the circuit design, the interface between the LMH34400 and the TLV3601 does not require any additional
biasing or level shifting, because the LMH34400 default output bias interfaces easily with the comparator.
Additionally, this 1 V bias level allows for a setting the threshold voltage of half the supply voltage which keeps it
close to the center of the comparator’s bias range as possible. However, this threshold can be set at any value
above 1 V to adjust for the application’s dynamic range requirements. In this realization, the output of the
TLV3601 was connected to a 50 Ω series output resistance to properly interface with 50 Ω terminated test
equipment.
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SBOSA56
18
Submit Document Feedback
Product Folder Links: LMH34400
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
8.3.3 Application Curves
图 8-7 through 图 8-9 show the control signal input, LMH34400 output, and TLV3601 output, respectively, with a
10 ns wide, 1 ns edge rate input current pulse. The figures show the ability of the LMH34400 to convert a small
25 µA input signal to a 1-V output and then use the TLV3601 to increase the edge rate and amplitude of the
received pulse. Also, the shape of this output pulse stays approximately constant over a large range of optical
input power levels. In this specific case, note the output swing of the TLV3601 is limited because it is driving a
matched 100 Ω load to interface with the test equipment.
30
27
24
21
18
15
12
9
2.2
2
1.8
1.6
1.4
1.2
1
6
3
0.8
0.6
0
-3
0
5
10
15
20
25
Time (ns)
30
35
40
45
50
0
5
10
15
20
25
Time (ns)
30
35
40
45
50
图8-8. LMH34400 Output Voltage
图8-7. Equivalent Input Current Signal to
LMH34400
2.5
2.25
2
1.75
1.5
1.25
1
0.75
0.5
0.25
0
-0.25
0
5
10
15
20
25
30
35
40
45
50
Time (ns)
图8-9. TLV3601 Output Voltage Driving 100 Ω Load
8.4 Power Supply Recommendations
The LMH34400 operates on a single 3.3-V power supply. As a low power-supply source impedance must be
maintained across frequency, use multiple bypass capacitors in parallel. Place the bypass capacitors as close to
the supply pin as possible and place the smallest capacitor on the same side of the PCB as the LMH34400.
Preferably, the larger valued bypass capacitors should be places on the same side of the PCB as well. However,
the capacitors can be positioned on the opposite side of the PCB using multiple vias if layout space is overly
constrained.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
19
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
8.5 Layout
8.5.1 Layout Guidelines
Achieving optimum performance with a high-frequency amplifier such as the LMH34400 requires careful
attention to board layout parasitics and external component types. Recommendations that optimize performance
include:
• Minimize parasitic capacitance from the signal I/O pins to ac ground. Parasitic capacitance on the
output pins can cause instability whereas parasitic capacitance on the input pin reduces the amplifier
bandwidth. To reduce unwanted capacitance, cut out the power and ground traces under the signal input and
output pins. Otherwise, ground and power planes must be unbroken elsewhere on the board.
• Minimize the distance from the power-supply pins to high-frequency bypass capacitors. Use high
quality, 100-pF to 0.1-µF, C0G and NPO-type decoupling capacitors with voltage ratings at least three times
greater than the amplifiers maximum power supplies. Place the smallest value capacitors on the same side
as the DUT. If possible, use low equivalent series impedance capacitors to further reduce the parasitic
impedance. If space constraints force the larger value bypass capacitors to be placed on the opposite side of
the PCB, then use multiple vias on the supply and ground side of the capacitors. This configuration ensures
that there is a low-impedance path to the amplifiers power-supply pins across the amplifiers gain bandwidth
specification. Avoid narrow power and ground traces to minimize inductance between the pins and the
decoupling capacitors. Larger (2.2-µF to 6.8-µF) decoupling capacitors that are effective at lower frequency
must be used on the supply pins. Place these decoupling capacitors further from the device.
8.5.2 Layout Example
Optional isolation resistor to
Remove GND and power plane
between IN and APD to minimize
parasitic capacitance
dampen resonance due to bond
wire inductances and component
capacitances.
IN
1
IDC_EN
6
− VBIAS
VDD
2
GND
5
Route ground plane as
close as possible to GND
pin with multiple VIAs to
reduce inductance.
EN
3
OUT
4
Place multiple bypass capacitors in low
ESR packages close to VDD pin as
possible. Use multiple VIAs to connect to
power plane.
Remove GND and power plane
near output pin to minimize
parasitic PCB capacitance.
Optional isolation resistor can be
used to further isolate parasitics.
图8-10. Layout Recommendation
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SBOSA56
20
Submit Document Feedback
Product Folder Links: LMH34400
LMH34400
www.ti.com.cn
ZHCSMM2B –MARCH 2022 –REVISED MARCH 2023
9 Device and Documentation Support
9.1 Device Support
9.1.1 Development Support
• Texas Instruments, LIDAR-Pulsed Time-of-Flight Reference Design Using High-Speed Data Converters
design guide
• Texas Instruments, LIDAR Pulsed Time of Flight Reference Design design guide
• Texas Instruments, Optical Front-End System Reference Design design guide
9.2 Documentation Support
9.2.1 Related Documentation
For related documentation, see the following:
• Texas Instruments, LMH34400DRL Evaluation Module user's guide
• Texas Instruments, What You Need To Know About Transimpedance Amplifiers –Part 1 blog
• Texas Instruments, What You Need To Know About Transimpedance Amplifiers –Part 2 blog
• Texas Instruments, Training Video: How to Design Transimpedance Amplifier Circuits
• Texas Instruments, Training Video: High-Speed Transimpedance Amplifier Design Flow
• Texas Instruments, Training Video: How to Convert a TINA-TI Model into a Generic SPICE Model
• Texas Instruments, Transimpedance Considerations for High-Speed Amplifiers application report
9.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
9.4 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
9.5 Trademarks
Hamamatsu™ is a trademark of Hamamatsu Photonics K.K.
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
9.6 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
9.7 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
10 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
21
Product Folder Links: LMH34400
English Data Sheet: SBOSA56
PACKAGE OPTION ADDENDUM
www.ti.com
3-Feb-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LMH34400IDRLR
XLMH34400IDRLR
ACTIVE
ACTIVE
SOT-5X3
SOT-5X3
DRL
DRL
6
6
4000 RoHS & Green
4000 TBD
NIPDAUAG
Level-2-260C-1 YEAR
Call TI
-40 to 125
-40 to 125
1M5
Samples
Samples
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
3-Feb-2023
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Feb-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMH34400IDRLR
SOT-5X3
DRL
6
4000
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Feb-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOT-5X3 DRL
SPQ
Length (mm) Width (mm) Height (mm)
202.0 201.0 28.0
LMH34400IDRLR
6
4000
Pack Materials-Page 2
PACKAGE OUTLINE
DRL0006A
SOT - 0.6 mm max height
S
C
A
L
E
8
.
0
0
0
PLASTIC SMALL OUTLINE
1.7
1.5
PIN 1
ID AREA
A
1
6
4X 0.5
1.7
1.5
2X 1
NOTE 3
4
3
1.3
1.1
0.3
6X
0.05
TYP
0.00
B
0.1
0.6 MAX
C
SEATING PLANE
0.05 C
0.18
0.08
6X
SYMM
SYMM
0.27
0.15
6X
0.1
0.05
C A B
0.4
0.2
6X
4223266/C 12/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-293 Variation UAAD
www.ti.com
EXAMPLE BOARD LAYOUT
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MIN
AROUND
0.05 MAX
AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDERMASK DETAILS
4223266/C 12/2021
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. Land pattern design aligns to IPC-610, Bottom Termination Component (BTC) solder joint inspection criteria.
www.ti.com
EXAMPLE STENCIL DESIGN
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4223266/C 12/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明