LMH6647MF/NOPB [TI]
具有关断功能的单通道 2.7V、650µA、55MHz、轨到轨输入和输出放大器 | DBV | 6 | -40 to 85;
| 型号： | LMH6647MF/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有关断功能的单通道 2.7V、650µA、55MHz、轨到轨输入和输出放大器 | DBV | 6 | -40 to 85 放大器 |
| 文件： | 总42页 (文件大小：2193K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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LMH6645, LMH6646, LMH6647
SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
LMH664x 2.7 V, 650 μA, 55 MHz, Rail-to-Rail Input and Output Amplifiers
with Shutdown Option
1 Features
3 Description
•
(VS = 2.7V, TA = 25°C, RL = 1kΩ to V+/2, AV = +1.
The LMH6645 (single) and LMH6646 (dual), rail-to-
rail input and output voltage feedback amplifiers, offer
high speed (55 MHz), and low voltage operation (2.7
V) in addition to micro-power shutdown capability
(LMH6647, single).
1
Typical Values Unless Specified.
•
•
•
•
•
•
•
•
•
•
−3dB BW 55 MHz
Supply Voltage Range 2.5 V to 12 V
Slew Rate 22 V/μs
Input common mode voltage range exceeds either
supply by 0.3 V, enhancing ease of use in multitude
of applications where previously only inferior devices
could be used. Output voltage range extends to
within 20 mV of either supply rails, allowing wide
dynamic range especially in low voltage applications.
Even with low supply current of 650 μA/amplifier,
output current capability is kept at a respectable ±20
mA for driving heavier loads. Important device
parameters such as BW, Slew Rate and output
current are kept relatively independent of the
operating supply voltage by a combination of process
enhancements and design architecture.
Supply Current 650 μA/channel
Output Short Circuit Current 42 mA
Linear Output Current ±20 mA
Input Common Mode Voltage 0.3 V Beyond Rails
Output Voltage Swing 20 mV from Rails
Input Voltage Noise 17 nV/√Hz
Input Current Noise 0.75 pA/√Hz
2 Applications
•
•
•
•
•
Active Filters
Device Information(1)
High Speed Portable Devices
Multiplexing Applications (LMH6647)
Current Sense Buffer
PART NUMBER
PACKAGE
SOT-23 (5)
SOIC (8)
BODY SIZE (NOM)
2.90 mm × 1.60 mm
4.90 mm × 3.91 mm
4.90 mm × 3.91 mm
3.00 mm × 3.00 mm
2.92 mm × 1.60 mm
4.90 mm × 3.91 mm
LMH6645
High Speed Transducer Amp
SOIC (8)
LMH6646
LMH6647
VSSOP (8)
SOT-23 (6)
SOIC (8)
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Closed Loop Frequency Response
for Various Temperature
Frequency Response for Various AV
A
= +2
V
GAIN
A
= +1
V
0
-2
-4
GAIN
85°C
0
-2
-4
25°C
A
= +10
V
0
0
PHASE
50
PHASE
50
100
100
A
= +5
V
-40°C
1M
10M
Frequency (Hz)
200M
100k
100M 200M
100k
1M
10M
Frequency (Hz)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMH6645, LMH6646, LMH6647
SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
www.ti.com
Table of Contents
8.2 Functional Block Diagram ....................................... 18
8.3 Feature Description................................................. 19
8.4 Device Functional Modes........................................ 20
Application and Implementation ........................ 22
9.1 Application Information............................................ 22
9.2 Typical Application .................................................. 22
1
2
3
4
5
6
7
Features.................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Revision History..................................................... 2
Description (continued)......................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ..................................... 4
7.2 Handling Ratings....................................................... 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics 2.7 V ................................. 5
7.6 Electrical Characteristics 5V .................................... 7
7.7 Electrical Characteristics ±5V .................................. 9
7.8 Typical Performance Characteristics ...................... 11
Detailed Description ............................................ 18
8.1 Overview ................................................................. 18
9
10 Power Supply Recommendations ..................... 23
11 Layout................................................................... 24
11.1 Layout Guidelines ................................................. 24
11.2 Layout Example .................................................... 24
12 Device and Documentation Support ................. 25
12.1 Documentation Support ........................................ 25
12.2 Related Links ........................................................ 25
12.3 Trademarks........................................................... 25
12.4 Electrostatic Discharge Caution............................ 25
12.5 Glossary................................................................ 25
8
13 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (April 2013) to Revision D
Page
•
Added, updated, or renamed the following sections: Device Information Table, Pin Configuration and Functions,
Application and Implementation; Power Supply Recommendations; Layout; Device and Documentation Support;
Mechanical, Packaging, and Ordering Information................................................................................................................. 1
Changes from Revision B (April 2013) to Revision C
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................. 1
2
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Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6645 LMH6646 LMH6647
LMH6645, LMH6646, LMH6647
www.ti.com
SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
5 Description (continued)
In portable applications, the LMH6647 provides shutdown capability while keeping the turn-off current to less
than 50 μA. Both turn-on and turn-off characteristics are well behaved with minimal output fluctuations during
transitions. This allows the part to be used in power saving mode, as well as multiplexing applications. Miniature
packages (SOT-23, VSSOP-8, and SOIC-8) are further means to ease the adoption of these low power high
speed devices in applications where board area is at a premium.
6 Pin Configuration and Functions
SOT-23-5 (LMH6645)
Package DBV05A
Top View
SOIC-8 (LMH6645)
Package D08A
Top View
SOIC-8 and VSSOP-8 (LMH6646)
Packages D08A and DGK08A
Top View
1
8
1
2
8
+
+
5
1
OUT A
V
V
N/C
N/C
OUTPUT
A
+
7
6
5
-
V
-
+
-IN
2
3
4
7
6
5
-IN A
+IN A
OUT B
-IN B
-
2
V
3
4
OUTPUT
N/C
+
+IN
-
+
B
4
3
-IN
-
+IN
+
-
V
-
+IN B
V
SOT-23-6 (LMH6647)
Package DBV06A
Top View
SOIC-8 (LMH6647)
Package D08A
Top View
1
8
6
5
+
1
SD
N/C
V
OUTPUT
+
2
3
4
7
6
5
V
-IN
-
SD
-
2
V
-
OUTPUT
N/C
+IN
+
+
3
4
-IN
-
+IN
V
Pin Functions
PIN
NUMBER
I/O
DESCRIPTION
NAME
LMH6645
LMH6646
DGK08A
LMH6647
DBV05A
D08A
DBV06A
D08A
-IN
4
3
2
3
4
3
2
3
I
I
Inverting input
+IN
Non-inverting input
-IN A
+IN A
-IN B
+IN B
N/C
2
3
6
5
I
Inverting Input Channel A
Non-inverting input Channel A
Inverting input Channel B
Non-inverting input Channel B
No Connection
I
I
I
1,5,8
6
1,5
6
––
O
O
O
I
OUTPUT
OUT A
OUT B
SD
1
1
Output
1
7
Output Channel A
Output Channel B
Shutdown
5
2
6
8
4
7
V-
2
5
4
7
4
8
I
Negative Supply
V+
I
Positive Supply
Copyright © 2001–2014, Texas Instruments Incorporated
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SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
www.ti.com
7 Specifications
(1)(2)
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
See (3) and
±2.5
UNIT
(4)
Output short circuit duration
VIN differential
V
V
V
V+ +0.8,
Voltage at input/output pins
V− −0.8
Supply voltage (V+ - V−)
Junction temperature(5)
12.6
+150
235
Infrared or Convection (20 sec)
Soldering Information
°C
Wave Soldering (10 sec)
260
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C.
(4) Output short circuit duration is infinite for VS < 6 V at room temperature and below. For VS > 6 V, allowable short circuit duration is 1.5
ms.
(5) The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) - TA)/ RθJA. All numbers apply for packages soldered directly onto a PC board.
7.2 Handling Ratings
MIN
MAX
+150
2000
UNIT
Tstg
Storage temperature range
−65
°C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins(1)
Machine model (MM)(2)
V(ESD)
Electrostatic discharge
V
200
(1) JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process. Human body
model, 1.5 kΩ in series with 100pF.
(2) JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process. Machine model, 0 Ω
in series with 200 pF.
7.3 Recommended Operating Conditions(1)
over operating free-air temperature range (unless otherwise noted)
MIN
2.5
MAX
12
UNIT
V
Supply Voltage (V+ – V−)
Temperature Range(2)
−40
+85
°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2) The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) - TA)/ RθJA . All numbers apply for packages soldered directly onto a PC board.
7.4 Thermal Information
LMH6645
SOT-23
LMH6646
LMH6647
THERMAL METRIC(1)
SOIC-8
VSSOP-8
8 PINS
235
SOT-23
SOIC-8
8 PINS
190
UNIT
5 PINS
265
8 PINS
8 PINS
6 PINS
RθJA
Junction-to-ambient thermal resistance
190
190
265
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
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Product Folder Links: LMH6645 LMH6646 LMH6647
LMH6645, LMH6646, LMH6647
www.ti.com
SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
7.5 Electrical Characteristics 2.7 V
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = VO = V+/2, and Rf = 2kΩ, and RL =
1kΩ to V+/2.
PARAMETER
−3dB BW
TEST CONDITIONS
AV = +1, VOUT = 200 mVPP
VCM = 0.7 V
f = 100 kHz
f = 1 kHz
MIN(1)
TYP(2) MAX(1) UNIT
,
BW
en
40
55
MHz
17
25
Input-referred voltage noise
Input-referred current noise
nV/√Hz
f = 100 kHz
f = 1 kHz
0.75
1.20
in
pA/√Hz
Cross-talk rejection
(LMH6646 only)
f = 5MHz, Receiver:
Rf = Rg = 510 Ω, AV = +2
CT Rej.
SR
47
22
dB
V/μs
ns
AV = −1, VO = 2 VPP
Slew rate
15
(3) (4)
See
,
Turn-on time
(LMH6647 only)
TON
250
560
1.95
Turn-off time
(LMH6647 only)
TOFF
THSD
ISD
ns
Shutdown threshold
(LMH6647 only)
IS ≤ 50μA
2.30
V
Shutdown pin input current
(LMH6647 only)
(5)
See
−20
μA
−3
−4
±1
3
4
VOS
Input offset voltage
0V ≤ VCM ≤ 2.7 V
mV
-40°C ≤ TJ ≤ 85°C
(6)
TC VOS Input offset average drift
See
±5
μV/°C
0.40
2
2.2
(5)
VCM = 2.5 V
-40°C ≤ TJ ≤ 85°C
-40°C ≤ TJ ≤ 85°C
IB
Input bias current
Input offset current
μA
−0.68
−2
(5)
VCM = 0.5 V
−2.2
500
IOS
RIN
0 V ≤ VCM ≤ 2.7 V
1
3
nA
Common mode input
resistance
MΩ
Common mode input
capacitance
CIN
2
pF
−0.5
−0.3
−0.1
-40°C ≤ TJ ≤ 85°C
-40°C ≤ TJ ≤ 85°C
Input common-mode
voltage range
CMVR
CMRR ≥ 50dB
V
3.0
2.8
46
3.2
VCM Stepped from 0 V to 2.7 V
VCM Stepped from 0 V to 1.55 V
77
76
87
Common mode rejection
ratio
CMRR
AVOL
dB
dB
V
58
76
Large signal voltage gain
Output swing high
VO = 0.35 V to 2.35 V
-40°C ≤ TJ ≤ 85°C
74
RL = 1k to V+/2
RL = 10k to V+/2
RL = 1k to V+/2
RL = 10k to V+/2
2.55
2.66
2.68
40
VO
150
Output swing low
mV
20
(1) All limits are ensured by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Slew rate is the average of the rising and falling slew rates.
(4) ensured based on characterization only.
(5) Positive current corresponds to current flowing into the device.
(6) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Copyright © 2001–2014, Texas Instruments Incorporated
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SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
www.ti.com
Electrical Characteristics 2.7 V (continued)
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = VO = V+/2, and Rf = 2kΩ, and RL =
1kΩ to V+/2.
PARAMETER
TEST CONDITIONS
MIN(1)
TYP(2) MAX(1) UNIT
Sourcing to V−
VID = 200mV
43
(7)(8)
ISC
Output short circuit current
mA
Sinking to V+
VID = −200mV
42
(7)(8)
IOUT
Output current
VOUT = 0.5V from rails
±20
83
mA
dB
V+ = 2.7V to 3.7V or
PSRR
Power supply rejection ratio
75
V− = 0V to −1V
Normal Operation
650
15
1250
50
Supply current
(per channel)
IS
μA
Shutdown Mode (LMH6647 only)
(7) Short circuit test is a momentary test.
(8) Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.
6
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Product Folder Links: LMH6645 LMH6646 LMH6647
LMH6645, LMH6646, LMH6647
www.ti.com
SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
7.6 Electrical Characteristics 5V
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2, and Rf = 2kΩ, and RL =
1kΩ to V+/2.
PARAMETER
−3dB BW
TEST CONDITIONS
AV = +1, VOUT = 200 mVPP
MIN(1)
TYP(2) MAX(1) UNIT
BW
en
40
55
17
MHz
f = 100kHz
f = 1kHz
Input-referred voltage noise
Input-referred current noise
nV/√Hz
25
f = 100kHz
f = 1kHz
0.75
1.20
in
pA/√Hz
Cross-talk rejection
(LMH6646 only)
f = 5MHz, Receiver:
Rf = Rg = 510Ω, AV = +2
CT Rej.
SR
47
22
dB
V/μs
ns
AV = −1, VO = 2 VPP
Slew rate
15
(3) (4)
See
,
Turn-on time
(LMH6647 only)
TON
210
500
4.25
Turn-off time
(LMH6647 only)
TOFF
THSD
ISD
ns
Shutdown threshold
(LMH6647 only)
IS ≤ 50μA
4.60
V
(5)
Shutdown pin input current See
(LMH6647 only)
−20
μA
0V ≤ VCM ≤ 5V
−3
−4
±1
3
4
VOS
Input offset voltage
mV
-40°C ≤ TJ ≤ 85°C
(6)
TC VOS Input offset average drift
See
±5
μV/C
VCM = 4.8V(5)
VCM = 0.5V(5)
0V ≤ VCM ≤ 5V
+0.36
+2
−2.2
−2
-40°C ≤ TJ ≤ 85°C
-40°C ≤ TJ ≤ 85°C
IB
Input bias current
Input offset current
μA
−0.68
−2.2
500
IOS
RIN
1
3
nA
Common mode input
resistance
MΩ
Common mode input
capacitance
CIN
2
pF
−0.5
−0.3
−0.1
-40°C ≤ TJ ≤ 85°C
-40°C ≤ TJ ≤ 85°C
Input common-mode
voltage range
CMVR
CMRR ≥ 50dB
V
5.3
5.1
56
66
76
74
5.5
VCM Stepped from 0V to 5V
VCM Stepped from 0V to 3.8V
82
85
85
Common mode rejection
ratio
CMRR
AVOL
dB
dB
Large signal voltage gain
VO = 1.5V to 3.5V
-40°C ≤ TJ ≤ 85°C
(1) All limits are ensured by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Slew rate is the average of the rising and falling slew rates.
(4) ensured based on characterization only.
(5) Positive current corresponds to current flowing into the device.
(6) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
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Electrical Characteristics 5V (continued)
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2, and Rf = 2kΩ, and RL =
1kΩ to V+/2.
PARAMETER
TEST CONDITIONS
MIN(1)
TYP(2) MAX(1) UNIT
RL = 1k to V+/2
RL = 10k to V+/2
RL = 1k to V+/2
RL = 10k to V+/2
Sourcing to V−
4.80
4.95
Output swing high
V
4.98
VO
50
20
200
Output swing low
mV
mA
55
53
(7)(8)
VID = 200mV
ISC
Output short circuit current
Output current
Sinking to V+
VID = −200mV
(7)(8)
IOUT
VOUT = 0.5V From rails
Power supply rejection ratio V+ = 5V to 6V or V− = 0V to −1V
±20
95
mA
dB
PSRR
75
Normal Operation
700
10
1400
50
Supply current (per
channel)
IS
μA
Shutdown Mode (LMH6647 only)
(7) Short circuit test is a momentary test.
(8) Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.
8
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Product Folder Links: LMH6645 LMH6646 LMH6647
LMH6645, LMH6646, LMH6647
www.ti.com
SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
7.7 Electrical Characteristics ±5V
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = −5V, VCM = VO = 0V, Rf = 2kΩ, and RL = 1kΩ to
GND.
PARAMETER
−3dB BW
TEST CONDITIONS
AV = +1, VOUT = 200 mVPP
MIN(1)
TYP(2) MAX(1) UNIT
BW
en
40
55
17
MHz
f = 100 kHz
f = 1 kHz
Input-referred voltage noise
Input-referred current noise
nV/√Hz
25
f = 100 kHz
f = 1 kHz
0.75
1.20
in
pA/√Hz
Cross-talk rejection
(LMH6646 only)
f = 5MHz, Receiver:
Rf = Rg = 510 Ω, AV = +2
CT Rej.
SR
47
22
dB
V/μs
ns
(3)
Slew rate
AV = −1, VO = 2 VPP
15
Turn-on time
(LMH6647 only)
TON
200
Turn-off time
(LMH6647 only)
TOFF
THSD
ISD
700
ns
V
Shutdown threshold
(LMH6647 only)
I
S ≤ 50 μA
4.25
4.60
Shutdown pin input current
(LMH6647 only)
(4)
See
−20
μA
−3
−4
±1
3
4
VOS
Input offset voltage
−5V ≤ VCM ≤ 5 V
mV
-40°C ≤ TJ ≤ 85°C
(5)
TC VOS Input offset average drift
See
±5
μV/°C
+0.40
+2
+2.2
−2
(4)
VCM = 4.8 V
-40°C ≤ TJ ≤ 85°C
-40°C ≤ TJ ≤ 85°C
IB
Input bias current
Input offset current
μA
−0.65
(4)
VCM = −4.5 V
−2.2
500
IOS
RIN
−5V ≤ VCM ≤ 5 V
3
3
nA
Common mode input
resistance
MΩ
Common mode input
capacitance
CIN
2
pF
−5.5
−5.3
−5.1
-40°C ≤ TJ ≤ 85°C
-40°C ≤ TJ ≤ 85°C
Input common-mode
voltage range
CMVR
CMRR ≥ 50dB
V
5.3
5.1
60
66
76
74
5.5
VCM Stepped from −5 V to 5 V
VCM Stepped from −5 V to 3.5 V
84
104
85
Common mode rejection
ratio
CMRR
AVOL
dB
dB
Large signal voltage gain
VO = −2 V to 2 V
-40°C ≤ TJ ≤ 85°C
(1) All limits are ensured by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Slew rate is the average of the rising and falling slew rates.
(4) Positive current corresponds to current flowing into the device.
(5) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Copyright © 2001–2014, Texas Instruments Incorporated
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SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
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Electrical Characteristics ±5V (continued)
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = −5V, VCM = VO = 0V, Rf = 2kΩ, and RL = 1kΩ to
GND.
PARAMETER
TEST CONDITIONS
MIN(1)
TYP(2) MAX(1) UNIT
RL = 1 kΩ
RL = 10 kΩ
RL = 1 kΩ
RL = 10 kΩ
4.70
4.92
Output swing high
V
4.97
VO
−4.93
−4.98
−4.70
Output swing low
V
Sourcing to V−
66
61
VID = 200 mV(6)(7)
ISC
Output short circuit current
Output current
mA
Sinking to V+
VID = −200 mV(6)(7)
IOUT
VOUT = 0.5V from rails
±20
95
mA
dB
PSRR
Power supply rejection ratio V+ = 5 V to 6 V or V− = −5 V to −6 V
76
Normal Operation
725
10
1600
50
Supply current (per
channel)
IS
μA
Shutdown Mode (LMH6647 only)
(6) Short circuit test is a momentary test.
(7) Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.
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7.8 Typical Performance Characteristics
At TJ = 25°C. Unless otherwise specified.
A
= +2
V
GAIN
GAIN
85°C
A
= +1
V
0
-2
-4
0
-2
-4
25°C
A
= +10
V
0
0
PHASE
PHASE
50
50
100
100
-40°C
A
= +5
V
100k
1M
10M
Frequency (Hz)
200M
100M 200M
100k
1M
10M
Frequency (Hz)
VS = ±5 V
RL = 1 kΩ
AV = + 1
VS = ±2.5 V
RL = 1k
VOUT = 200 mVpp
Figure 2. Frequency Response for Various AV
Figure 1. Closed Loop Frequency Response
for Various Temperature
70
-50
-55
-60
-65
60
PHASE
50
40
30
100
80
85°C
85°C
60
40
20
GAIN
-40°C
20
10
0
V
= ±2.5 V
S
V
S
= ±5 V
-70
-75
-80
0
-40°C
10M
-20
100k
1M
100M
1
2
3
4
5
6
7
8
V
(V )
OUT PP
Frequency (Hz)
RL = 500 Ω
f = 100 KHz
AV = +2
VS = ±2.5 V
RL = 2k
Figure 4. THD vs. Output Swing
Figure 3. Open Loop Gain/Phase vs. Frequency
for Various Temperature
-30
10
-35
-40
-45
-50
1
V
= ±5 V
S
-55
-60
V
= ±2.5 V
S
-65
-70
0.1
100k
3
6
1
2
4
5
1M
10M
V
(V )
OUT PP
Frequency (Hz)
RL = 500 Ω
f = 1 MHz
AV = +2
RL = 500 Ω
AV = +2
VS = ±5 V
Rf = Rg = 2K
Figure 5. THD vs. Output Swing
Figure 6. Output Swing vs. Frequency
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Typical Performance Characteristics (continued)
At TJ = 25°C. Unless otherwise specified.
250
1000
10.00
1.00
0.10
±0.1%
200
150
100
CURRENT
VOLTAGE
100
50
±1%
0
10
10
0
1
2
3
)
4
100
1k
10k
100k
Step Amplitude (V
PP
FREQUENCY (Hz)
VS = ±2.5 V
AV = -1
RL = 500 Ω
CL = 13 pF
Figure 7. Settling Time vs. Step Size
Figure 8. Noise vs. Frequency
-40°C
-40°C
10
10
85°C
85°C
1.0
0.1
1.0
0.1
85°C
85°C
25°C
-40°C
-40°C
0.01
.01
0.01
.01
.1
1
10
100
.1
1
10
100
I
(mA)
I
(mA)
SOURCE
SINK
VS = 10 V
VS = 10 V
Figure 9. VOUT from V+ vs. ISOURCE
Figure 10. VOUT from V− vs. ISINK
10k
10k
1k
1k
10 V
10 V
5 V
5 V
100
10
100
10
2.7 V
500
2.7 V
2.5k
1.5k
(:)
0
1k
R
0
500
2k
1.5k
(:)
2k
2.5k
1k
R
L
L
T = 25°C
AV = +1
T = -40°C
AV = +1
Figure 11. Output Swing from V+ vs. RL (tied to VS/2)
Figure 12. Output Swing from V+ vs. RL (Tied to VS/2)
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Typical Performance Characteristics (continued)
At TJ = 25°C. Unless otherwise specified.
10k
10k
1k
1k
10 V
10 V
5 V
5 V
100
10
100
2.7 V
2.7 V
10
2.5k
500
0
1k
1.5k
(:)
2k
1k
1.5k
(:)
0
500
2.5k
2k
R
R
L
L
T = 25°C
AV = +1
T = 85°C
AV = +1
Figure 14. Output Swing from V− vs. RL (Tied to VS/2)
Figure 13. Output Swing from V+ vs. RL (Tied to VS/2)
10k
10k
1k
1k
10 V
10 V
5 V
5 V
100
100
2.7 V
10
2.7 V
10
2.5k
500
1k
1.5k
(:)
2k
0
25k
2k
0
500
1k
1.5k
(:)
R
L
R
L
T = 85°C
AV = +1
T = 40°C
AV = +1
Figure 16. Output Swing from V− vs. RL (Tied to VS/2)
Figure 15. Output Swing from V− vs. RL (Tied to VS/2)
500
10k
10k
100
10
1k
1k
ts
100
100
1.0
C
L
10
1
10
1
0.1
0.02
10k
1M
10M
200M
100k
5
2
3
Closed Loop Gain
4
1
Frequency (Hz)
VS = ±2.5 V
AV = +1
VS = +5 V
200 mVpp STEP
30% OVERSHOOT
Figure 18. ZOUT vs. Frequency
Figure 17. Cap Load Tolerance and Setting Time
vs. Closed Loop Gain
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Typical Performance Characteristics (continued)
At TJ = 25°C. Unless otherwise specified.
110
90
80
70
60
+PSRR
100
90
80
70
-PSRR
60
50
40
30
50
40
30
20
10
20
10
100
1k
10k
100k
1M
10M
1k
100k
10M
10k
1M
Frequency (Hz)
Frequency (Hz)
VS = ±2.5V
RF = 10 kΩ
RG = 1 kΩ
VS = 5 V
Figure 19. PSRR vs. Frequency
Figure 20. CMRR vs. Frequency
100
90
80
70
60
50
40
30
1k
10k
100k
1M
10M
Frequency (Hz)
Receive CH.: AV = +2
Rf = Rg = 510
VS = ±5 V
N = 19k UNITS
σ = 4.6 mV
Figure 21. Crosstalk Rejection vs. Frequency
(Output to Output, LMH6646)
Figure 22. VOS Distribution
0.25
0.2
0.2
-40°C
0.15
-40°C
0.15
0.1
0.1
0.05
25°C
0
0.05
25°C
85°C
-0.05
0
-0.05
-0.1
-0.1
-0.15
85°C
-0.15
-0.2
-0.2
-0.25
-0.3
-0.25
12
-2
0
2
4
6
8
10
2
3
4
6
7
8
9
10 11 12
1
5
V
(V)
OUT
V
(V)
S
VS = 10 V
RL = 10 kΩ to VS/2
VCM = 0.5 V
Figure 24. VOS vs. VOUT (a Typical Unit)
Figure 23. VOS vs. VS (a Typical Unit)
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Typical Performance Characteristics (continued)
At TJ = 25°C. Unless otherwise specified.
0.4
0.6
0.5
0.4
V
= 2.7V
S
-
0.3
40°C
-40°C
0.2
0.1
0
25°C
25°C
85°C
0.
3
-0.1
-0.2
-0.3
-0.4
0.2
0.1
0
85°C
-2
0
2
4
6
8
10
12
1.5
(V)
2
2.5
3
-0.5
0
0.5
1
V
OUT
(V)
V
CM
VS = 10 V
RL = 1 kΩ to VS/2
VS = 2.7 V
Figure 25. VOS vs. VOUT (a Typical Unit)
Figure 26. VOS vs. VCM (a Typical Unit)
0.6
0.5
0.4
0.6
0.5
0.4
-40°C
25°C
0.3
0.2
0.1
0.3
-40°C
0.2
0.1
25°C
0
85°C
-0.1
0
85°C
0
-0.1
-1
-2
0
2
4
6
8
1
2
3
4
5
6
10
12
V
CM
(V)
V
CM
(V)
VS = 5 V
VS = 10 V
Figure 27. VOS vs. VCM (a Typical Unit)
Figure 28. VOS vs. VCM (a Typical Unit)
0.6
0.6
85°C
85°C
0.4
0.4
25°C
25°C
0.2
0.2
-40°C
-40°C
0
0
-0.2
-0.2
-0.4
-0.6
-40°C
25°C
25°C
-40°C
-0.4
-0.6
85°C
-0.8
-1
-0.8
-1
85°C
1
-5
-3
5
0
0.5
1.5
(V)
2
3
-1
1
3
-0.5
2.5
V
CM
(V)
V
CM
VS = ±5 V
VS = 2.7 V
Figure 30. IB vs. VCM
Figure 29. IB vs. VCM
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Typical Performance Characteristics (continued)
At TJ = 25°C. Unless otherwise specified.
-0.50
0.95
0.9
-0.52
-0.54
-0.56
-0.58
-0.60
-0.62
-0.64
-0.66
-0.68
-0.7
85°C
25°C
85°C
25°C
0.85
0.8
0.75
0.7
0.65
0.6
0.55
0.5
-40°C
3
-40°C
-1
0.45
4
6
7
8
9
10
1
2
5
11
12
-7
-5
-3
1
3
5
7
V
(V)
S
V
(V)
CM
VCM = 0.2 V
VS = ±5 V
Figure 31. IB vs. VS
Figure 32. IS vs. VCM
0.9
0.8
0.7
0.6
0.5
0.4
0.9
0.85
0.8
85°C
25°C
85°C
0.75
0.7
-40°C
0.65
0.6
25°C
0.3
0.2
0.1
0.55
0.5
-40°C
0
0.45
-0.1
0.4
1
2
3
4
5
6
7
8
9
10 11 12
2.35 2.85
-0.15 0.35 0.85 1.35 1.85
(V)
V
V
S
(V)
SHUTDOWN
VS = 2.7 V
VS = ±5 V
VCM = 0.2 V
Figure 34. IS vs. VSHUTDOWN (LMH6647)
Figure 33. IS (mA) vs. Vs(V)
0.9
0.9
0.8
0.7
85°C
V
= 5V
S
0.8
85°C
0.7
0.6
0.6
0.
5
25°C
25°C
0.5
-40°C
0.4
0.4
0.3
0.2
0.1
0
-40°C
0.3
0.2
0.1
0
-0.1
-0.1
-0.5
-6
-4
-2
V
0
2
4
6
3.5
(V)
4.5
5.5
0.5
1.5
V
2.5
(V)
SHUTDOWN
SHUTDOWN
VS = ±5 V
VS = 5 V
Figure 36. IS vs. VSHUTDOWN (LMH6647)
Figure 35. IS vs. VSHUTDOWN (LMH6647)
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Typical Performance Characteristics (continued)
At TJ = 25°C. Unless otherwise specified.
1000
-100
85°C
25°C
-40°C
100
-10
I
VCC
SHUTDOWN
PIN CURRENT
-1
10
1
85°C
-40°C
25°C
-0.1
40 mV/DIV
20 ns/DIV
-3.5
-2.5 -1.5 -0.5 0.5
1.5
(V)
2.5 3.5
V
VS = ±5 V
RL = 1kΩ
AV = +1
SHUTDOWN
VS = ±2.5 V
VOUT = 0.2 Vpp
Figure 38. Small Signal Step Response
Figure 37. Shutdown Pin and Supply Current
vs. Shutdown Voltage (LMH6647)
0.2 V/DIV
VS = 5 V
AV = -1
40 ns/DIV
0.2 V/DIV
40 ns/DIV
RL = 1 kΩ
VOUT = 1 Vpp
VS = 2.7 V
AV = +1
RL = 1 kΩ
VOUT = 1 Vpp
Figure 40. Large Signal Step Response
Figure 39. Large Signal Step Response
INPUT
OUTPUT
1 V/DIV
400 ns/DIV
AV = +2
VS = ±2.5 V
RL = 1 kΩ
Rf= Rg = 2 kΩ
Figure 41. Output Overload Recovery
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8 Detailed Description
8.1 Overview
The LMH664x family is based on proprietary VIP10 dielectrically isolated bipolar process.
This device family architecture features the following:
•
•
•
•
Complimentary bipolar devices with exceptionally high ft (∼8 GHz) even under low supply voltage (2.7 V) and
low Collector bias current.
Rail-to-Rail input which allows the input common mode voltage to go beyond either rail by about 0.5 V
typically.
A class A-B “turn-around” stage with improved noise, offset, and reduced power dissipation compared to
similar speed devices (patent pending).
Common Emitter push-pull output stage capable of 20 mA output current (at 0.5 V from the supply rails) while
consuming only ∼700 μA of total supply current per channel. This architecture allows output to reach within
mV of either supply rail at light loads.
•
Consistent performance from any supply voltage (2.7 V to 10 V) with little variation with supply voltage for the
most important specifications (BW, SR, IOUT, for example)
8.2 Functional Block Diagram
R
S
200-400:
INVERTING
INPUT
D4
D3
D1
D2
NON-INVERTING
INPUT
Figure 42. LMH6647 Equivalent Input in Shutdown Mode
During shutdown, the input stage has an equivalent circuit as shown below in Figure 42.
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8.3 Feature Description
8.3.1 LMH6647 Micro-power Shutdown
To keep the output at or near ground during shutdown when there is no other device to hold the output low, a
switch (transistor) could be used to shunt the output to ground. Figure 43 shows a circuit where a NPN bipolar is
used to keep the output near ground (∼ 80 mV):
5V
-
V
OUT
LMH6647
V
IN
+
SD
-
V
SHUTDOWN
INPUT
Q1
R
S
10k
Figure 43. Active Pull-Down Schematic
Figure 44 shows the output waveform.
V
OUT
SD
2.00 µs/DIV
2 V/DIV
Figure 44. Output Held Low by Active Pull-Down Circuit
NOTE
For normal operation, tie the SD pin to V−.
If bipolar transistor power dissipation is not tolerable, the switch could be by a N-channel enhancement mode
MOSFET.
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8.4 Device Functional Modes
The LMH6647 can be shutdown to save power and reduce its supply current to less than 50 μA ensured, by
applying a voltage to the SD pin. The SD pin is “active high” and needs to be tied to V− for normal operation. This
input is low current (< 20 μA, 4 pF equivalent capacitance) and a resistor to V− (≤ 20 kΩ) will result in normal
operation. Shutdown is ensured when SD pin is 0.4V or less from V+ at any operating supply voltage and
temperature.
In the shutdown mode, essentially all internal device biasing is turned off in order to minimize supply current flow
and the output goes into Hi-Z (high impedance) mode. Complete device Turn-on and Turn-off times vary
considerably relative to the output loading conditions, output voltage, and input impedance, but is generally
limited to less than 1μs (see tables for actual data).
As seen in Figure 42 in shutdown, there may be current flow through the internal diodes shown, caused by input
potential, if present. This current may flow through the external feedback resistor and result in an apparent output
signal. In most shutdown applications the presence of this output is inconsequential. However, if the output is
“forced” by another device such as in a multiplexer, the other device will need to conduct the current described in
order to maintain the output potential.
The total input common mode voltage range, which extends from below V− to beyond V+, is covered by both an
NPN and a PNP stage. The NPN stage is switched on whenever the input is less than 1.2 V from V+ and the
PNP stage covers the rest of the range. In terms of the input voltage, there is an overlapping region where both
stages are processing the input signal. This region is about 0.5 V from beginning to the end. As far as the device
application is concerned, this transition is a transparent operation. However, keep in mind that the input bias
current value and direction will depend on which input stage is operating (see Figure 29). For low distortion
applications, it is best to keep the input common mode voltage from crossing this transition point. Low gain
settling applications, which generally encounter larger peak-to-peak input voltages, could be configured as
inverting stages to eliminate common mode voltage fluctuations.
In terms of the output, when the output swing approaches either supply rail, the output transistor will enter a
quasi-saturated state. A subtle effect of this operational region is that there is an increase in supply current in this
state (up to 1 mA). The onset of Quasi-saturation region is a function of output loading (current) and varies from
100 mV at no load to about 1 V when output is delivering 20 mA, as measured from supplies. Both input
common mode voltage and output voltage level affect the supply current (see Figure 32).
With 2.7V supplies and a common mode input voltage range that extends beyond either supply rail, the
LMH664x family is well suited to many low voltage/low power applications. Even with 2.7 V supplies, the -3dB
BW (@ AV = +1) is typically 55 MHz with a tested limit of 45 MHz. Production testing guarantees that process
variations will not compromise speed.
This device family is designed to avoid output phase reversal. With input over-drive, the output is kept near the
supply rail (or as close to it as mandated by the closed loop gain setting and the input voltage). Figure 45, below,
shows the input and output voltage when the input voltage significantly exceeds the supply voltages.
The output does not exhibit any phase reversal as some op amps do. However, if the input voltage range is
exceeded by more than a diode drop beyond either rail, the internal ESD protection diodes will start to conduct.
The current flow in these ESD diodes should be externally limited.
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Device Functional Modes (continued)
Figure 45 demonstrates that the output is well behaved and there are no spikes or glitches due to the switching.
Switching times are approximately around 500 ns based on the time when the output is considered “valid”.
INPUT
OUTPUT
2 V/DIV
10.0 µs/DIV
Figure 45. Input/Output Shown with Exceeded Input CMVR
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The LMH664x family is well suited to many low voltage/low power applications and is designed to avoid output
phase reversal. Figure 45, for example, depicts the Input/Output Shown with Exceeded Input CMVR and
functions as a 2:1 MUX operating on a single 2.7-V power supply by utilizing the shutdown feature of the
LMH6647.
9.2 Typical Application
1/5
1/5
74HC04
74HC04
SELECT
INPUT
2k
2k
2.7V
SHUTDOWN
-
LMH6647
+
INPUT A
R
L
2.7V
SHUTDOWN
+
INPUT B
LMH664
7
-
2k
2k
Figure 46. 2:1 MUX Operating off a 2.7V Single Supply
9.2.1 Design Requirements
This application requires fast, glitch-less transition between selected channels. The LMH6647 turn on and turn off
times are 250 ns and 560 ns respectively. Transition between channels is devoid of any excessive glitches.
9.2.2 Detailed Design Procedure
In this application, the LMH6647 output pins are directly tied to each other. The shutdown pin of each LMH6647
is driven in-opposite sense of the other (that is, “Low” on 1st LMH6647 with “High” on the 2nd LMH6647, and
vice versa). When shutdown is invoked, the device output enters Hi-Z state, while the alternate LMH6647 is
being powered on simultaneously. This way, the shutdown function serves the dual purpose of allowing only the
input associated with device which is not in shutdown to be selected and to appear at the output.
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Typical Application (continued)
9.2.3 Application Curve
Figure 47 shows the MUX output when selecting between a 1 MHz sine and a 250 KHz triangular waveform.
V
OUT
SELECT
1 V/DIV
1 µs/DIV
Figure 47. 2:1 MUX Output
10 Power Supply Recommendations
The LMH664x device family can operate off a single supply or with dual supplies. The input CM capability of the
parts (CMVR) extends covers the entire supply voltage range for maximum flexibility. Supplies should be
decoupled with low inductance, often ceramic, capacitors to ground less than 0.5 inches from the device pins.
The use of ground plane is recommended, and as in most high speed devices, it is advisable to remove ground
plane close to device sensitive pins such as the inputs.
Copyright © 2001–2014, Texas Instruments Incorporated
Submit Documentation Feedback
23
Product Folder Links: LMH6645 LMH6646 LMH6647
LMH6645, LMH6646, LMH6647
SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
www.ti.com
11 Layout
11.1 Layout Guidelines
Generally, a good high-frequency layout will keep power supply and ground traces away from the inverting input
and output pins. Parasitic capacitances on these nodes to ground will cause frequency response peaking and
possible circuit oscillations. For more information, see Application Note OA-15, Frequent Faux Pas in Applying
Wideband Current Feedback Amplifiers (SNOA367).
Another important parameter in working with high speed/high performance amplifiers is the component values
selection. Choosing large valued external resistors will affect the closed loop behavior of the stage because of
the interaction of these resistors with parasitic capacitances. These capacitors could be inherent to the device or
a by-product of the board layout and component placement. Either way, keeping the resistor values lower will
diminish this interaction. On the other hand, choosing very low value resistors could load down nodes and will
contribute to higher overall power dissipation.
11.2 Layout Example
Figure 48. Layer2 Silk (SOT-23 Board Layout)
Figure 49. Layer1 Silk (SOT-23 Board Layout)
24
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6645 LMH6646 LMH6647
LMH6645, LMH6646, LMH6647
www.ti.com
SNOS970D –JUNE 2001–REVISED NOVEMBER 2014
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
•
•
•
Absolute Maximum Ratings for Soldering (SNOA549)
Frequent Faux Pas in Applying Wideband Current Feedback Amplifiers, Application Note OA-15 (SNOA367)
Semiconductor and IC Package Thermal Metrics (SPRA953)
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
PARTS
PRODUCT FOLDER
SAMPLE & BUY
LMH6645
LMH6646
LMH6647
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
12.3 Trademarks
All trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2001–2014, Texas Instruments Incorporated
Submit Documentation Feedback
25
Product Folder Links: LMH6645 LMH6646 LMH6647
PACKAGE OPTION ADDENDUM
www.ti.com
30-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LMH6645MA/NOPB
LMH6645MAX/NOPB
ACTIVE
SOIC
SOIC
D
D
8
8
95
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
LMH66
45MA
ACTIVE
2500 RoHS & Green
SN
LMH66
45MA
LMH6645MF/NOPB
LMH6645MFX/NOPB
LMH6646MA/NOPB
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOIC
DBV
DBV
D
5
5
8
1000 RoHS & Green
3000 RoHS & Green
SN
SN
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
A68A
A68A
95
RoHS & Green
LMH66
46MA
LMH6646MAX/NOPB
LMH6646MM
ACTIVE
NRND
SOIC
D
8
8
2500 RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
LMH66
46MA
VSSOP
DGK
1000
Non-RoHS
& Green
Call TI
A70A
LMH6646MM/NOPB
LMH6646MMX/NOPB
LMH6647MA/NOPB
ACTIVE
ACTIVE
ACTIVE
VSSOP
VSSOP
SOIC
DGK
DGK
D
8
8
8
1000 RoHS & Green
SN
SN
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
A70A
A70A
3500 RoHS & Green
95
RoHS & Green
LMH66
47MA
LMH6647MAX/NOPB
LMH6647MF
ACTIVE
NRND
SOIC
D
8
6
2500 RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
LMH66
47MA
SOT-23
DBV
1000
Non-RoHS
& Green
Call TI
A69A
LMH6647MF/NOPB
LMH6647MFX/NOPB
ACTIVE
ACTIVE
SOT-23
SOT-23
DBV
DBV
6
6
1000 RoHS & Green
SN
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
A69A
A69A
3000 RoHS & Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Sep-2021
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMH6645MAX/NOPB
LMH6645MF/NOPB
LMH6645MFX/NOPB
LMH6646MAX/NOPB
LMH6646MM
SOIC
SOT-23
SOT-23
SOIC
D
8
5
5
8
8
8
8
8
6
6
6
2500
1000
3000
2500
1000
1000
3500
2500
1000
1000
3000
330.0
178.0
178.0
330.0
178.0
178.0
330.0
330.0
178.0
178.0
178.0
12.4
8.4
6.5
3.2
3.2
6.5
5.3
5.3
5.3
6.5
3.2
3.2
3.2
5.4
3.2
3.2
5.4
3.4
3.4
3.4
5.4
3.2
3.2
3.2
2.0
1.4
1.4
2.0
1.4
1.4
1.4
2.0
1.4
1.4
1.4
8.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
4.0
4.0
4.0
12.0
8.0
Q1
Q3
Q3
Q1
Q1
Q1
Q1
Q1
Q3
Q3
Q3
DBV
DBV
D
8.4
8.0
12.4
12.4
12.4
12.4
12.4
8.4
12.0
12.0
12.0
12.0
12.0
8.0
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
D
LMH6646MM/NOPB
LMH6646MMX/NOPB
LMH6647MAX/NOPB
LMH6647MF
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
LMH6647MF/NOPB
LMH6647MFX/NOPB
8.4
8.0
8.4
8.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LMH6645MAX/NOPB
LMH6645MF/NOPB
LMH6645MFX/NOPB
LMH6646MAX/NOPB
LMH6646MM
SOIC
SOT-23
SOT-23
SOIC
D
8
5
5
8
8
8
8
8
6
6
6
2500
1000
3000
2500
1000
1000
3500
2500
1000
1000
3000
367.0
208.0
208.0
367.0
208.0
208.0
367.0
367.0
208.0
208.0
208.0
367.0
191.0
191.0
367.0
191.0
191.0
367.0
367.0
191.0
191.0
191.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
DBV
DBV
D
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
D
LMH6646MM/NOPB
LMH6646MMX/NOPB
LMH6647MAX/NOPB
LMH6647MF
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
LMH6647MF/NOPB
LMH6647MFX/NOPB
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LMH6645MA/NOPB
LMH6646MA/NOPB
LMH6647MA/NOPB
D
D
D
SOIC
SOIC
SOIC
8
8
8
95
95
95
495
495
495
8
8
8
4064
4064
4064
3.05
3.05
3.05
Pack Materials-Page 3
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
1.45
0.90
B
A
PIN 1
INDEX AREA
1
2
5
(0.1)
2X 0.95
1.9
3.05
2.75
1.9
(0.15)
4
3
0.5
5X
0.3
0.15
0.00
(1.1)
TYP
0.2
C A B
NOTE 5
0.25
GAGE PLANE
0.22
0.08
TYP
8
0
TYP
0.6
0.3
TYP
SEATING PLANE
4214839/G 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
5. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214839/G 03/2023
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/G 03/2023
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/C 06/2021
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated
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