LMH9135IRRLR [TI]
具有集成平衡-非平衡变压器的 3.2GHz 至 4.2GHz 差分至单端放大器 | RRL | 12 | -40 to 105;
| 型号： | LMH9135IRRLR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有集成平衡-非平衡变压器的 3.2GHz 至 4.2GHz 差分至单端放大器 | RRL | 12 | -40 to 105 变压器 放大器 |
| 文件： | 总21页 (文件大小：1184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ZHCSLR5 – AUGUST 2020
LMH9135
具有集成平衡-非平衡变压器的 LMH9135 3.2GHz 至 4.2GHz 差分至单端放大器
1 特性
3 说明
•
单通道、窄带差分输入至单端输出射频增益块放大
器
LMH9135 是一款高性能、单通道、差分输入至单端输
出传输射频增益块放大器，支持 3.2GHz 至 4.2GHz 频
段。该器件可满足下一代 5G 有源天线系统 (AAS) 或
小型蜂窝应用的要求，同时可驱动功率放大器 (PA) 输
入端。该射频放大器可提供 18dB 的典型增益，并具有
+31.5dBm 输出 IP3 的出色线性性能，同时在整个 1dB
带宽内保持小于 4dB 的噪声系数。该器件内部匹配
100Ω 差分输入阻抗，可轻松与输入端的射频采样或零
中频模拟前端 (AFE) 相连。此外，该器件内部匹配
50Ω 单端输出阻抗，可与后置放大器、表面声波
(SAW) 滤波器或功率放大器 (PA) 轻松交互。
•
•
支持 3.2GHz 至 4.2GHz 1dB BW 典型值
在整个频带内具有 18dB 的典型增益
• 3.8dB 噪声系数
• 31.5dBm OIP3
• 18dBm 输出 P1dB
• +3.3V 单电源供电，具有 395mW 功耗
•
工作温度高达 105°C TC
2 应用
该器件使用 3.3V 单电源供电，其典型有功功率约为
395mW，因此适用于高密度 5G 大规模 (MIMO) 应
用。此外，该器件采用节省空间的 2mm x 2mm、12
引脚 QFN 封装。该器件的额定工作温度高达 105°C，
可提供稳健的系统设计。该器件具有符合 JEDEC 标准
的 1.8V 断电引脚，可为该器件快速断电和上电，适用
于时分双工 (TDD) 系统。
•
•
•
•
适用于 GSPS DAC 的差分 DAC 输出驱动器
差分至单端放转换
平衡-非平衡变压器替代产品
小型蜂窝或 m-MIMO 基站
• 5G 有源天线系统 (AAS)
无线蜂窝基站
•
器件信息 (1)
封装尺寸（标称值）
器件型号
封装
LMH9135
WQFN (12)
2.00mm × 2.00mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
f = 3.2 œ 4.2 GHz
Analog Front-End
LMH9135
DAC
PA
ZIN = 100Ω
ZOUT = 50Ω
LMH9135：差分至单端放大器
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBOS997
LMH9135
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Table of Contents
7.4 Device Functional Modes..........................................10
8 Application and Implementation..................................10
8.1 Application Information............................................. 10
8.2 Typical Application.................................................... 10
9 Power Supply Recommendations................................13
10 Layout...........................................................................14
10.1 Layout Guidelines................................................... 14
10.2 Layout Example...................................................... 14
11 Device and Documentation Support..........................15
11.1 Documentation Support.......................................... 15
11.2 Receiving Notification of Documentation Updates..15
11.3 Support Resources................................................. 15
11.4 Trademarks............................................................. 15
11.5 Electrostatic Discharge Caution..............................15
11.6 Glossary..................................................................15
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
Pin Functions.................................................................... 3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Typical Characteristics................................................6
7 Detailed Description........................................................9
7.1 Overview.....................................................................9
7.2 Functional Block Diagram...........................................9
7.3 Feature Description.....................................................9
Information.................................................................... 15
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
DATE
REVISION
NOTES
August 2020
*
Initial Release
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5 Pin Configuration and Functions
NC VDD
11
12
VSS
1
2
3
10 VSS
OUTP
INP
INM
VSS
9
8
7
Thermal Pad
VSS
VSS
4
5
6
VSS
PD
图 5-1. RRL Package 12-Pin WQFN Top View
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
VSS
INP
1
Power
Input
Ground
2
RF differential positive input into amplifier
3
INM
VSS
VSS
PD
Power
Power
Power
Input
RF differential negative input into amplifier
4
Ground
Ground
5
6
Power down connection. PD = 0 V = normal operation; PD = 1.8 V = power off mode
7
VSS
VSS
OUTP
VSS
VDD
NC
Power
Output
Output
Power
Power
—
Ground
8
Ground
9
RF single-ended output from amplifier
Ground
10
11
Positive supply voltage (3.3 V)
Do not connect this pin
Connect the thermal pad to Ground
12
Thermal Pad
—
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.3
MAX
3.6
UNIT
Supply voltage VDD
V
V
V
RF Pins
INP, INM, OUTP
VDD
VDD
Digital Input PIN PD
Continuous
wave (CW)
input
T = 25 °C
18
dBm
TJ
Junction temperature
Storage temperature
150
150
°C
°C
Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001, allpins(1)
±1000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC
specificationJESD22-C101, all pins(2)
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
3.15
–40
–40
NOM
MAX
3.45
105
UNIT
V
VDD
TC
Supply voltage
3.3
Case (bottom) temperature
Junction temperature
°C
TJ
125
°C
6.4 Thermal Information
DEVICE
THERMAL METRIC(1)
PKG DES (PKG FAM)
UNIT
PINS
74.8
72.4
37.1
3.2
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ΨJT
37.1
14.2
ΨJB
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
TA = +25°C, VDD = 3.3V, Frequency (fin) = 3.5 GHz, Differential Input Impedance (ZIN) = 100 Ω, Output Load (ZLOAD) = 50
Ω (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RF PERFORMANCE - LMH9135
FRF
RF frequency range
1dB Bandwidth
Gain
3200
4200
MHz
MHz
dB
BW1dB
S21
1000
18
NF
Noise Figure
Output P1dB
3.8
18
dB
RS = 100 Ω differential
OP1dB
dBm
ZLOAD = 50 Ω
fin = 3.5 GHz ± 5 MHz Spacing, POUT/
TONE = 2 dBm
OIP3
Output IP3
31.5
dBm
Differential Input Gain Imbalance
Differential Input Phase Imbalance
±0.5
±4
dB
degree
dB
fin = 3.3 - 3.8 GHz
fin = 3.3 - 4.2 GHz
fin = 3.3 - 3.8 GHz
fin = 3.3 - 4.2 GHz
-10
-10
-10
-10
35
S11
S22
Input return loss (1)
Output return loss (1)
dB
dB
dB
S12
Reverse isolation
dB
CMRR
Common Mode Rejection Ratio (2)
30
dB
Switching and Digital input characteristics
tON
tOFF
VIH
VIL
Turn-ON time
50% VPD to 90% RF
50% VPD to 10% RF
PD pin
0.2
0.2
µs
µs
V
Tun-OFF time
High-Level Input Voltage
Low-Level Input Voltage
1.4
PD pin
0.5
V
DC current and Power Consumption
IVDD_ON Supply Current
120
10
mA
mA
mW
IVDD_PD Power Down Current
Pdis
Power Dissipation
395
(1) Reference impedance: Input = 100 Ω differential, Output = 50 Ω single-ended
(2) CMRR is calculated using (S12 - S13)/(S12 + S13) for Transmit (1 is output port, 2 & 3 are differential input ports)
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6.6 Typical Characteristics
At TA = 25°C, VDD = 3.3 V, differential input impedance (ZIN) = 100 Ω, single-ended output impedance (ZLOAD
)
= 50 Ω (unless otherwise noted).
20
18
16
14
12
10
20
19
18
17
16
15
14
TA = -40 o
C
TA = 25 o
TA = 85 o
C
C
VDD = 3.15V
VDD = 3.3V
VDD = 3.45V
TA = 105 o
C
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
POUT = 2 dBm
POUT = 2 dBm
图 6-1. Gain vs Frequency and Temperature
图 6-2. Gain vs Frequency and Supply Voltage
0
0
TA = -40 o
C
TA = 25 o
TA = 85 o
C
C
-2
-4
-5
TA = 105 o
C
-10
-15
-20
-25
-30
-6
-8
-10
-12
-14
-16
-18
-20
TA = -40 o
C
TA = 25 o
TA = 85 o
C
C
-35
-40
TA = 105 o
C
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
图 6-3. Input Return Loss vs Frequency
图 6-4. Output Return Loss vs Frequency
-20
40
38
36
34
32
30
28
26
-25
-30
-35
-40
TA = -40 o
C
TA = -40 o
C
24
22
20
TA = 25 o
TA = 85 o
C
C
TA = 25 o
TA = 85 o
C
C
-45
TA = 105 o
C
TA = 105 o
C
-50
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
POUT/TONE = 2 dBm, 10-MHz tone spacing
图 6-5. Reverse Isolation vs Frequency
图 6-6. Output IP3 vs Frequency and Temperature
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40
40
38
36
34
32
30
28
26
24
22
20
38
36
34
32
30
28
26
24
22
20
TA = -40 o
C
VDD = 3.15V
VDD = 3.3V
VDD = 3.45V
TA = 25 o
TA = 85 o
C
C
TA = 105 o
C
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
0
2
4
Output power / tone (dBm)
6
8
10
12
POUT/TONE = 2 dBm, 10-MHz tone spacing
f = 3.5 GHz, 10-MHz tone spacing
图 6-7. Output IP3 vs Frequency and Supply
图 6-8. Output IP3 vs Output Power per Tone
Voltage
40
38
36
34
32
30
28
26
22
20
18
16
TA = -40 o
C
24
14
Tone Spacing = 1MHz
Tone Spacing = 10MHz
TA = 25 o
TA = 85 o
C
C
22
Tone Spacing = 100MHz
20
TA = 105 o
C
12
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
POUT/TONE = 2 dBm
图 6-10. Output P1dB vs Frequency and
Temperature
图 6-9. Output IP3 vs Frequency and Tone Spacing
22
6
5
4
3
2
20
18
16
TA = -40 o
C
14
VDD = 3.15V
TA = 25 o
TA = 85 o
C
C
1
VDD = 3.3V
VDD = 3.45V
12
TA = 105 o
C
0
3000
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
3200
3400
3600 3800
Frequency (MHz)
4000
4200
图 6-11. Output P1dB vs Frequency and Supply
ZSOURCE = 100-Ω differential
Voltage
图 6-12. Noise Figure vs Frequency and
Temperature
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70
1
0.5
0
TA = -40 o
C
TA = 25 o
TA = 85 o
C
C
65
60
55
50
45
40
35
30
25
20
TA = 105 o
C
TA = -40 o
C
-0.5
TA = 25 o
TA = 85 o
C
C
TA = 105 o
C
-1
3000
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
3200
3400
3600 3800
Frequency (MHz)
4000
4200
图 6-13. Common-mode Rejection Ratio vs
图 6-14. Gain Imbalance vs Frequency and
Frequency
Temperature
4
TA = -40 o
C
TA = 25 o
TA = 85 o
C
C
3
2
TA = 105 o
C
1
0
-1
-2
-3
-4
3000
3200
3400
3600 3800
Frequency (MHz)
4000
4200
图 6-15. Phase Imbalance vs Frequency and Temperature
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7 Detailed Description
7.1 Overview
The LMH9135 device is a differential input to single-ended output narrow-band RF amplifier used in transmitter
applications. The device provides 18 dB fixed power gain with excellent linearity and noise performance across
the frequency band 3.2 – 4.2 GHz. The device is internally matched for 100-Ω impedance at the differential
input and 50-Ω impedance at the single-ended output, as shown in 图 7-1.
LMH9135 have on-chip active bias circuitry to maintain device performance over a wide temperature and supply
voltage range. The included power down function allows the amplifier to shut down saving power when the
amplifier is not needed. Fast shut down and start up enable the amplifier to be used in a host of time division
duplex applications.
Operating on a single 3.3 V supply and 120 mA of typical supply current, the devices are available in a 2 mm x 2
mm 12-pin QFN package.
7.2 Functional Block Diagram
VDD
Active Bias and
Temperature
Compensation
Power Down (PD)
Balanced RF INP (0•)
Single-Ended RF Output (OUTP)
Balanced RF INM (180•)
LMH9135
Zout = 50 Ω
VSS (GND)
Zin (diff) = 100 Ω
图 7-1. Functional Block Diagram
7.3 Feature Description
The LMH9135 device is a differential input to single-ended output RF amplifier for narrow band active balun
implementation. The device integrates the functionality of a single-ended RF amplifier and passive balun in
traditional transmitter applications achieving small form factor with comparable linearity and noise performance,
as shown in 图 7-2.
The active balun implementation coupled with higher operating temperature of 105°C allows for more robust
receiver system implementation compared to passive balun that is prone to reliability failures at high
temperatures. The robust operation is achieved by the on-chip active bias circuitry which maintains device
performance over a wide temperature and supply voltage range.
LMH9135
RF INP
RF OUT
RF INM
GND
图 7-2. Differential Input to Single-Ended Output, Active Balun Implementation
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7.4 Device Functional Modes
LMH9135 features a PD pin which should be connected to GND for normal operation. To power down the
device, connect the PD pin to a logic high voltage of 1.8 V.
8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
8.1 Application Information
LMH9135 is a differential to single-ended RF gain block amplifier, which works as an active balun in the transmit
path of a 3.3-GHz to 3.8-GHz 5G, TDD m-MIMO or small cell base station. The device replaces the traditional
passive balun and single-ended RF amplifier offering a smaller footprint solution to the customer. TI
recommends following good RF layout and grounding techniques to maximize the device performance.
8.2 Typical Application
LMH9135 is typically used in a four transmit and four receive (4T/4R) array of active antenna system for 5G,
TDD, wireless base station applications. Such a system is shown in 图 8-1, where the LMH9135 is used in the
transmit path as an active balun that converts differential DAC output from Tx AFE to single-ended signal. Also
shown in the figure is the application of LMH9235 chip, which is the counter-part of LMH9135 in the Receive
path.
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Transceiver Board
LMH9235
LNA
DC-DC Converter
LDO
+3.3 V
LMH9235
LNA
+3.3 V
LMH9135
Tx AFE
Tx AFE
PA
f = 3.3 GHz œ 3.8 GHz
LMH9135
PA
PA
Analog Front End
LMH9135
LMH9135
fO
Tx AFE
Tx AFE
+3.3 V
PA
LNA
LMH9235
DC-DC Converter
LDO
+3.3 V
LNA
LMH9235
图 8-1. LMH9135 in a 4T/4R 5G Active Antenna System
The 4T/4R system can be scaled to 16T/16R, 64T/64R, or higher antenna arrays that result in proportional
scaling of the overall system power dissipation. As a result of the proportional scaling factor for multiple channels
in a system, the individual device power consumption must be reduced to dissipate less overall heat in the
system. Operating on a single 3.3-V supply, the LMH9135 consumes only about 400 mW and therefore provides
power saving to the customer. Multiple LMH9135 devices can be powered from a single DC/DC converter or a
low-dropout regulator (LDO) operating on a 3.3-V supply. A DC/DC converter provides the most power efficient
way of generating the 3.3-V supply. However, care must be taken when using the DC/DC converter to minimize
the switching noise using inductor chokes and adequate isolation must be provided between the analog and
digital power domains.
8.2.1 Design Requirements
Input of LMH9135 is matched to 100 Ω and therefore can be directly driven by a DAC that has 100 Ω source
impedance without any external matching network. If a DAC with different impedance is used, then it should be
appropriately matched to get the best RF performance.
The example in 图 8-2 shows how LMH9135 can be matched to a DAC that has 200-Ω differential termination.
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Vdd
C1
C2
INP
100 Ω
100 Ω
OUTP
L1
LMH9135
DAC
C2
INM
C1
Z = 100 Ω
Z = 200 Ω
图 8-2. LMH9135 Driven by a DAC with 200-Ω Termination
8.2.2 Detailed Design Procedure
A simple differential LC network is used here as the matching network. In 图 8-2, shunt inductor L1 and series
capacitors C2 form the matching network. The series capacitors C1 act as the DC-blocking capacitors. 表 8-1
shows the matching network component values.
表 8-1. Matching Network Component Values for 200-Ω Termination
COMPONENT
VALUE
5.6 pF
6.8 nH
0.8 pF
C1
L1
C2
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8.2.3 Application Curves
The graphs given below show the gain, input return loss, and output return loss of the design with different DAC
terminations.
20
19
18
17
16
15
14
0
-5
-10
-15
-20
-25
-30
-35
-40
100-ohm without matching components
200-ohm with matching components
100-ohm without matching components
200-ohm with matching components
3200
3400
3600 3800
Frequency (MHz)
4000
4200
3200
3400
3600 3800
Frequency (MHz)
4000
4200
图 8-3. Gain vs Frequency for Different DAC
图 8-4. Input Return Loss vs Frequency for
Terminations
Different DAC Terminations
0
-5
100-ohm without matching components
200-ohm with matching components
-10
-15
-20
3200
3400
3600 3800
Frequency (MHz)
4000
4200
图 8-5. Output Return Loss vs Frequency for Different DAC Terminations
9 Power Supply Recommendations
The LMH9135 device operates on a common nominal 3.3 V supply voltage. It is recommended to isolate the
supply voltage through decoupling capacitors placed close to the device. Select capacitors with self resonant
frequency above the application frequency. When multiple capacitors are used in parallel to create a broadband
decoupling network, place the capacitor with the higher self-resonant frequency closer to the device.
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10 Layout
10.1 Layout Guidelines
When designing with an RF amplifier operating in the frequency range 3 GHz to 4.2 GHz with relatively high
gain, certain board layout precautions must be taken to ensure stability and optimum performance. TI
recommends that the LMH9135 board be multi-layered to improve thermal performance, grounding, and power-
supply decoupling. 图 10-1 shows a good layout example. In this figure, only the top signal layer is shown.
• Excellent electrical connection from the thermal pad to the board ground is essential. Use the recommended
footprint, solder the pad to the board, and do not include a solder mask under the pad.
• Connect the pad ground to the device terminal ground on the top board layer.
• Ensure that ground planes on the top and any internal layers are well stitched with vias.
• Design the two input and one output RF traces for 50-Ω impedance. TI recommends grounded coplanar
waveguide (GCPW) type transmission lines for the RF traces. Use a PCB trace width calculator tool to design
the transmission lines.
• Avoid routing clocks and digital control lines near RF signal lines.
• Do not route RF or DC signal lines over noisy power planes.
• Place supply decoupling close to the device.
• The differential output traces must be symmetrical in order to achieve the best differential balance and
linearity performance.
See the LMH9135 Evaluation Module user's guide for more details on board layout and design.
10.2 Layout Example
Supply bypass caps
close to the device
Device
Matched differential
input lines
Stitched
vias
图 10-1. Layout Showing Matched Differential Traces and Supply Decoupling
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
• Texas Instruments, LMH9135 Evaluation Module User's Guide
• Texas Instruments, LMH9135 S-parameter Models
• Texas Instruments, LMH9135RRLEVM EU Declaration of Conformity (DoC)
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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重要声明和免责声明
TI 提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没
有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将独自承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。这些资源如有变更，恕不另行通知。TI 授权您仅可
将这些资源用于开发本资源所述的使用 TI 产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三
方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款 () 或 TI.com.cn 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方
式更改 TI 针对 TI 产品发布的适用的担保或担保免责声明。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2020，德州仪器 (TI) 公司
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LMH9135IRRLR
ACTIVE
WQFN
RRL
12
3000 RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 105
35AO
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OUTLINE
RRL0012A
WQFN - 0.8 mm max height
S
C
A
L
E
5
.
0
0
0
PLASTIC QUAD FLATPACK - NO LEAD
2.1
1.9
A
B
PIN 1 INDEX AREA
2.1
1.9
0.8
0.7
C
SEATING PLANE
0.08 C
0.05
0.00
2X 0.5
SYMM
EXPOSED
THERMAL PAD
(0.2) TYP
(0.3) TYP
7
5
6
4
2X 1.5
SYMM
13
0.8 0.1
8X 0.5
10
1
0.3
0.2
12X
12
11
PIN 1 ID
0.1
C A B
0.35
0.25
12X
0.05
4224942/A 04/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
RRL0012A
WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
0.8)
SYMM
12
SEE SOLDER MASK
DETAIL
12X (0.5)
11
10
12X (0.25)
1
SYMM
(1.9)
13
8X (0.5)
(R0.05) TYP
4
7
(
0.2) TYP
VIA
6
5
(1.9)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4224942/A 04/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
RRL0012A
WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
0.76)
11
12X (0.5)
12
12X (0.25)
10
1
SYMM
(1.9)
13
8X (0.5)
4
7
(R0.05) TYP
5
6
SYMM
(1.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 20X
EXPOSED PAD 13
90% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
4224942/A 04/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
重要声明和免责声明
TI 提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没
有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。这些资源如有变更，恕不另行通知。TI 授权您仅可
将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知
识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款 (https:www.ti.com.cn/zh-cn/legal/termsofsale.html) 或 ti.com.cn 上其他适用条款/TI 产品随附的其他适用条款
的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI 产品发布的适用的担保或担保免责声明。IMPORTANT NOTICE
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