LMP8645HVMKE/NOPB [TI]
-2V 至 76V、990kHz、可变增益电流感应放大器 | DDC | 6 | -40 to 125;
| 型号： | LMP8645HVMKE/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | -2V 至 76V、990kHz、可变增益电流感应放大器 | DDC | 6 | -40 to 125 放大器 光电二极管 |
| 文件： | 总33页 (文件大小：1899K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMP8645, LMP8645HV
ZHCSQG1H –NOVEMBER 2009 –REVISED MAY 2022
LMP8645、LMP8645HV 高压电流检测精密放大器
1 特性
3 说明
• 典型值，TA= 25°C
• 高共模电压范围
LMP8645 和 LMP8645HV 器件是精密电流检测放大
器，可在高输入共模电压条件下检测到检测电阻上的小
差分电压。
– LMP8645 –2V 至42V
– LMP8645HV –2V 至76V
• 电源电压范围：2.7V 至12V
• 可通过单个电阻器配置增益
• 最大可变增益精度（使用外部电阻器）为2%
• 跨导：200μA/V
• 低失调电压1mV
• 输入偏置12μA
• PSRR 90dB
• CMRR 95dB
LMP8645 在 2.7V 至 12V 的电源电压范围内工作，可
接受 –2V 至 42V 共模电压范围内的输入信号，而
LMP8645HV 可接受 –2V 至 76V 共模电压范围内的
输入信号。LMP8645 和 LMP8645HV 具有可调增益，
适用于电源电流和高共模电压起决定性作用的应用。增
益由单个电阻器配置，可提供高度灵活性，以及低至
2%（最大值）的精度（增益设置电阻器的精度也是如
此）。输出经缓冲可提供低输出阻抗。这款高侧电流检
测放大器非常适合检测和监控直流或电池供电系统中的
电流，在整个温度范围内具有出色的交流和直流规格，
并可将电流检测环路中的误差保持在最低水平。
LMP8645 是工业、汽车和消费类应用的理想选择，采
用SOT-6 封装。
• 温度范围：-40°C 至125°C
• 6 引脚SOT 封装
2 应用
• 高侧电流感测
• 车辆电流测量
• 电机控制
• 电池监控
• 远程感应
• 电源管理
器件信息(1)
封装尺寸（标称值）
器件型号
LMP8645
LMP8645HV
封装
SOT (6)
1.60mm × 2.90mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
R
S
I
S
+IN
-IN
R
L
o
a
d
LMP8645
R
IN
IN
-
+
+
V
V
A
ADC
V
OUT
+
-
V
R
G
典型应用
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SNOSB29
LMP8645, LMP8645HV
ZHCSQG1H –NOVEMBER 2009 –REVISED MAY 2022
www.ti.com.cn
Table of Contents
7.4 Device Functional Modes..........................................16
8 Application and Implementation..................................21
8.1 Application Information............................................. 21
8.2 Typical Applications.................................................. 21
9 Power Supply Recommendations................................23
10 Layout...........................................................................24
10.1 Layout Guidelines................................................... 24
10.2 Layout Example...................................................... 24
11 Device and Documentation Support..........................25
11.1 Device Support........................................................25
11.2 Documentation Support.......................................... 25
11.3 接收文档更新通知................................................... 25
11.4 支持资源..................................................................25
11.5 Trademarks............................................................. 25
11.6 Electrostatic Discharge Caution..............................25
11.7 术语表..................................................................... 25
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 3
6.1 Absolute Maximum Ratings........................................ 3
6.2 ESD Ratings............................................................... 3
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 2.7-V Electrical Characteristics...................................5
6.6 5-V Electrical Characteristics......................................7
6.7 12-V Electrical Characteristics....................................9
6.8 Typical Characteristics.............................................. 11
7 Detailed Description......................................................14
7.1 Overview...................................................................14
7.2 Functional Block Diagram.........................................15
7.3 Feature Description...................................................15
Information.................................................................... 25
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision G (September 2015) to Revision H (May 2022)
Page
• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1
• Removed Absolute Maximum Ratings tablenote: If Military/Aerospace specified devices are required, contact
the Texas Instruments Sales Office/Distributors for availability and specifications.............................................3
Changes from Revision F (March 2013) to Revision G (September 2015)
Page
• 添加了ESD 等级表、特性说明部分、器件功能模式、应用和实施部分、电源相关建议部分、布局部分、器
件和文档支持部分以及机械、封装和可订购信息部分.......................................................................................1
Changes from Revision E (March 2013) to Revision F (March 2013)
Page
• Changed layout of National Data Sheet to TI format........................................................................................22
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5 Pin Configuration and Functions
+
V
6
5
4
1
2
3
V
OUT
-
LMP8645
LMP8645HV
R
G
V
-IN
+IN
图5-1. DD Package 6-Pin SOT Top View
表5-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
VOUT
V-
NO.
1
O
P
I
Single-ended output
Negative supply voltage
Positive input
2
+IN
-IN
3
4
I
Negative input
RG
5
I/O
P
External gain resistor
Positive supply voltage
V+
6
6 Specifications
6.1 Absolute Maximum Ratings
See (1) (2) (3)
MIN
MAX
13.2
6
UNIT
V
Supply Voltage (VS = V+ - V−)
Differential voltage +IN- (-IN)
V
Voltage at pins +IN, -IN
LMP8645HV
LMP8645
80
V
–6
–6
60
V
Voltage at RG pin
13.2
V+
V
Voltage at OUT pin
V-
V
Junction temperature(2)
150
150
°C
°C
Storage temperature, Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX), RθJA, and the ambient
temperature, TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ RθJA or the number given in Absolute Maximum
Ratings, whichever is lower.
(3) For soldering specifications, refer to SNOA549
6.2 ESD Ratings
VALUE
±2000
±5000
±1250
±200
UNIT
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001(1) (3)
All pins except 3 and 4
Pins 3 and 4
Electrostatic
discharge
V(ESD)
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
Machine Model
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
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(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
6.3 Recommended Operating Conditions
MIN
2.7
MAX UNIT
Supply voltage (VS = V+ –V−)
12
V
Temperature range(1)
125
°C
–40
(1) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX), RθJA, and the ambient
temperature, TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ RθJA or the number given in Absolute Maximum
Ratings, whichever is lower.
6.4 Thermal Information
LMV8645,
LMV8645HV
THERMAL METRIC(1)
UNIT
DDC (SOT)
6 PINS
96
RθJA
Junction-to-ambient thermal resistance(2)
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX), RθJA, and the ambient
temperature, TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ RθJA or the number given in Absolute Maximum
Ratings, whichever is lower.
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6.5 2.7-V Electrical Characteristics
Unless otherwise specified, all limits specified for at TA = 25°C, VS = V+ –V–, V+ = 2.7 V, V− = 0 V, −2 V < VCM < 76 V, RG =
25 kΩ, RL = 10 MΩ.(1)
PARAMETER
TEST CONDITIONS
MIN(3) TYP(2) MAX(3)
UNIT
1
–1
VOS
Input Offset Voltage
VCM = 2.1 V
mV
At the temperature extremes
1.7
7
–1.7
Input Offset Voltage Drift(4)
TCVOS
IB
VCM = 2.1 V
VCM = 2.1 V
μV/°C
μA
(6)
Input Bias Current(7)
Input Voltage Noise(6)
12
20
nV/√
Hz
eni
120
f > 10 kHz, RG = 5 kΩ
VCM = 12 V, RG = 5 kΩ
VSENSE(MA
Max Input Sense Voltage(6)
600
200
mV
X)
Gain AV
Adjustable Gain Setting(6)
Transconductance
VCM = 12 V
VCM = 2.1 V
1
100
V/V
µA/V
2%
–2%
Accuracy
Gm drift(6)
VCM = 2.1 V
Gm
At the temperature extremes
3.4%
–3.4%
140 ppm /°C
dB
−40°C to 125°C, VCM = 2.1 V
Power Supply Rejection
Ratio
PSRR
CMRR
VCM = 2.1 V, 2.7 V < V+ < 12 V
90
LMP8645HV 2.1 V < VCM < 76 V
LMP8645 2.1 V < VCM< 42 V
95
60
Common-Mode Rejection
Ratio
dB
–2 V <VCM < 2 V
RG = 10 kΩ, CG = 4 pF VSENSE = 400 mV,
CL = 30 pF , RL = 1 MΩ
990
260
135
RG = 25 kΩ, CG = 4 pF, VSENSE = 200 mV,
CL = 30 pF, RL = 1 MΩ
−3-dB Bandwidth(6)
BW
kHz
Rg = 50 kΩ, CG = 4 pF, VSENSE = 100 mV,
CL = 30 pF, RL = 1 MΩ
VCM = 5 V, CG = 4 pF, VSENSE from 25 mV
to 175 mV, CL = 30 pF, RL = 1 MΩ
SR
IS
Slew Rate(5) (6)
Supply Current
0.5
V/µs
525
380
VCM = 2.1 V
At the temperature extremes
710
uA
2500
2000
VCM = –2 V
At the temperature extremes
2700
V
Maximum Output Voltage
Minimum Output Voltage
1.2
VCM = 2.1 V, Rg = 500 kΩ
VOUT
VCM = 2.1 V
20
mV
5
5
Sourcing, VOUT = 600 mV, Rg = 150 kΩ
Sinking, VOUT = 600 mV, Rg = 150 kΩ
IOUT
Output current(6)
mA
Max Output Capacitance
Load(6)
CLOAD
30
pF
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables
under conditions of internal self-heating where TJ > TA.
(2) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production
material.
(3) All limits are specified by testing, design, or statistical analysis.
(4) Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
(5) The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
(6) This parameter is specified by design and/or characterization and is not tested in production.
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(7) Positive Bias Current corresponds to current flowing into the device.
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6.6 5-V Electrical Characteristics
Unless otherwise specified, all limits specified for at TA = 25°C, VS = V+ –V–, V+ = 5 V, V− = 0 V, −2 V < VCM < 76 V, Rg =
25 kΩ, RL = 10 MΩ.(1)
PARAMETER
TEST CONDITIONS
MIN(3)
–1
TYP(2) MAX(3) UNIT
1
mV
1.7
VOS
Input Offset Voltage
VCM = 2.1 V
At the temperature extremes
–1.7
Input Offset Voltage Drift(4)
TCVOS
IB
VCM = 2.1 V
VCM = 2.1 V
7
μV/°C
μA
(6)
Input Bias Current(7)
Input Voltage Noise(6)
12.5
120
22
nV/√
Hz
eni
f > 10 kHz, RG = 5 kΩ
VCM = 12 V, RG = 5 kΩ
VSENSE(MA
Max Input Sense Voltage(6)
600
200
mV
X)
Gain AV
Adjustable Gain Setting(6)
Transconductance
VCM = 12 V
VCM = 2.1 V
1
100
V/V
µA/V
2%
–2%
Accuracy
Gm drift(6)
VCM = 2.1 V
Gm
At the temperature extremes
3.4%
–3.4%
140 ppm /°C
dB
−40°C to 125°C, VCM = 2.1 V
Power Supply Rejection
Ratio
PSRR
CMRR
VCM = 2.1 V, 2.7 V < V+ < 12 V
90
LMP8645HV 2.1 V < VCM < 76 V
LMP8645 2.1 V < VCM < 42 V
95
60
Common-Mode Rejection
Ratio
dB
-2 V < VCM < 2 V
RG= 10 kΩ, CG = 4 pF, VSENSE = 400 mV,
CL = 30 pF, RL = 1 MΩ
850
260
140
RG= 25 kΩ, CG = 4 pF, VSENSE = 300 mV,
CL = 30 pF, RL = 1 MΩ
−3-dB Bandwidth(6)
BW
kHz
RG= 50 kΩ, CG = 4 pF, VSENSE = 300 mV,
CL = 30 pF, RL = 1 MΩ
VCM = 5 V, CG = 4 pF, VSENSE from 100 mV
to 500 mV, CL = 30 pF, RL= 1 MΩ
SR
IS
Slew Rate(5) (6)
Supply Current
0.5
V/µs
610
450
VCM = 2.1 V
At the temperature extremes
780
uA
2800
2100
VCM = −2 V
At the temperature extremes
3030
V
Maximum Output Voltage
Minimum Output Voltage
3.3
VCM = 5 V, Rg = 500 kΩ
VOUT
VCM = 2.1 V
22
mV
5
5
Sourcing, VOUT = 1.65 V, Rg = 150 kΩ
Sinking, VOUT = 1.65 V, Rg = 150 kΩ
IOUT
Output current(6)
mA
Max Output Capacitance
Load(6)
CLOAD
30
pF
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables
under conditions of internal self-heating where TJ > TA.
(2) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production
material.
(3) All limits are specified by testing, design, or statistical analysis.
(4) Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
(5) The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
(6) This parameter is specified by design and/or characterization and is not tested in production.
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(7) Positive Bias Current corresponds to current flowing into the device.
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6.7 12-V Electrical Characteristics
Unless otherwise specified, all limits specified for at TA = 25°C, VS = V+ –V-, V+ = 12 V, V− = 0 V, −2 V < VCM < 76 V, Rg= 25
kΩ, RL = 10 MΩ.(1)
PARAMETER
TEST CONDITIONS
MIN(3)
–1
TYP(2) MAX(3) UNIT
1
mV
1.7
VOS
Input Offset Voltage
VCM = 2.1 V
At the temperature extremes
–1.7
Input Offset Voltage Drift(4)
TCVOS
IB
VCM = 2.1 V
VCM = 2.1 V
7
μV/°C
μA
(6)
Input Bias Current(7)
Input Voltage Noise(6)
13
23
nV/√
Hz
eni
120
f > 10 kHz, RG = 5 kΩ
VCM = 12 V, RG = 5 kΩ
VSENSE(MA
Max Input Sense Voltage(6)
600
200
mV
X)
Gain AV
Adjustable Gain Setting(6)
Transconductance
VCM = 12 V
VCM = 2.1 V
1
100
V/V
µA/V
2%
–2%
Accuracy
Gm drift(6)
VCM = 2.1 V
Gm
At the temperature extremes
3.4%
–3.4%
140 ppm /°C
dB
−40°C to 125°C, VCM = 2.1 V
Power Supply Rejection
Ratio
PSRR
CMRR
VCM = 2.1 V, 2.7 V <V+ < 12 V
90
LMP8645HV 2.1 V < VCM < 76 V
LMP8645 2.1 V < VCM< 42 V
95
60
Common-Mode Rejection
Ratio
dB
–2 V < VCM < 2 V
RG = 10 kΩ, CG = 4 pF, VSENSE = 400 mV,
CL = 30 pF, RL = 1 MΩ
860
260
140
RG = 25 kΩ, CG = 4 pF, VSENSE = 400 mV,
CL = 30 pF, RL = 1 MΩ
−3-dB Bandwidth(6)
BW
kHz
RG = 50 kΩ, CG = 4 pF, VSENSE = 400 mV,
CL = 30 pF, RL = 1 MΩ
VCM = 5 V, CG = 4 pF, VSENSE from 100 mV
to 500 mV, CL = 30 pF, RL = 1 MΩ
SR
IS
Slew Rate(5) (6)
Supply Current
0.6
V/µs
765
555
VCM = 2.1 V
At the temperature extremes
920
uA
2900
2200
VCM = −2 V
At the temperature extremes
3110
V
Maximum Output Voltage
Minimum Output Voltage
10.2
VCM = 12 V, RG= 500 kΩ
VOUT
VCM = 2.1 V
24
mV
5
5
Sourcing, VOUT = 5.25 V, Rg = 150 kΩ
Sinking, VOUT = 5.25 V, Rg = 150 kΩ
IOUT
Output current(6)
mA
Max Output Capacitance
Load(6)
CLOAD
30
pF
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables
under conditions of internal self-heating where TJ > TA.
(2) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production
material.
(3) All limits are specified by testing, design, or statistical analysis.
(4) Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
(5) The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
(6) This parameter is specified by design and/or characterization and is not tested in production.
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(7) Positive Bias Current corresponds to current flowing into the device.
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6.8 Typical Characteristics
Unless otherwise specified: TA = 25°C, VS= V+–V–, VSENSE= +IN –(–IN), RL = 10 MΩ.
2400
2300
2200
2100
2300
2100
1900
1700
2000
1900
1800
1500
1300
1100
800
700
600
900
700
500
300
500
400
300
2.7
5.3
8.0
(V)
10.6
13.2
-2 -1
0
1
2
3
4
16 28 40 52 64 76
(V)
V
V
S
CM
图6-1. Supply Current vs. Supply Voltage
图6-2. Supply Current vs. VCM
100
110
VCM = 5V, Rg = 10 kW
V
= 5V, Rg = 10 kΩ
S
90
70
80
60
40
20
50
30
10
1
10
100
FREQUENCY (Hz)
图6-3. AC PSRR vs. Frequency
1k
10k
100k
1
10
100
FREQUENCY (Hz)
图6-4. AC CMRR vs. Frequency
1k
10k 100k
1M
25
150
130
110
90
V
S
= 12V
VS = 5V, VCM = 5V
20
15
10
5
70
50
0
100
1k
10k
100k
1M
10M
-2
11
24
37
(V)
50
63
76
FREQUENCY (Hz)
V
CM
图6-6. CMRR vs. VCM
图6-5. Gain vs. Frequency
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6.8 Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C, VS= V+–V–, VSENSE= +IN –(–IN), RL = 10 MΩ.
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
40
35
30
25
20
15
10
5
VS = 5V, VCM = 12V
V
= 5V, V
10
= 12V
CM
S
0
0
100
200
300
VSENSE (mV)
图6-7. Output Voltage vs. VSENSE
400
500
600
-5
0
5
15
20
V
(mV)
SENSE
图6-8. Output Voltage vs. VSENSE (ZOOM Close to 0 V)
V =12V, V =5V
S CM
V
= 12V, V
CM
= 5V
S
TIME (4 és/div)
TIME (4 és/div)
图6-9. Large Step Response
图6-10. Small Step Response
V
= 12V, V
CM
= 5V
S
TIME (800 ns/DIV)
TIME (800 ns/div)
图6-11. Settling Time (Rise)
图6-12. Settling Time (Fall)
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6.8 Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C, VS= V+–V–, VSENSE= +IN –(–IN), RL = 10 MΩ.
V
S
= 12V
V
S
= 12V
TIME (4 és/DIV)
TIME (4 és/DIV)
图6-13. Common-Mode Step Response (Rise)
图6-14. Common-Mode Step Response (Fall)
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7 Detailed Description
7.1 Overview
Operating from a 2.7-V to 12-V supply range, the LMP8645 accepts input signals with a common-mode voltage
range of –2 V to 42 V, while the LMP8645HV accepts input signals with a common-mode voltage range of –2
V to 76 V. The LMP8645 and LMP8645HV have adjustable gain, set by a single resistor, for applications where
supply current and high common-mode voltage are the determining factors.
7.1.1 Theory of Operation
V
R
= 1/Gm
+IN
SENSE
IN
I
S
R
S
-IN
R
LMP8645
R
IN+
IN-
L
o
a
d
-
+
+
V
•
S
I
V
OUT
+
-
V
R
G
R
GAIN
图7-1. Current Monitor Example Circuit
As seen in 图 7-1, the current flowing through the shunt resistor ( RS) develops a voltage drop equal to VSENSE
across RS. The resulting voltage at the –IN pin will now be less than +IN pin proportional to the VSENSE voltage.
The sense amplifier senses this indifference and increases the gate drive to the MOSFET to increase IS′
current flowing through the RIN+ string until the amplifer inputs are equal. In this way, the voltage drop across
RIN+ now matches the votlage drop across VSENSE
.
The RIN resistors are trimmed to a nominal value of 5 kΩ each. The current IS′ flows through RIN+ , the
MOSFET, and RGAIN to ground. The IS′ current generates the voltage VG across RGAIN. The gain is created
bythe ratio of RGAIN and RIN.
A current proportional to IS is generated according to the following relation:
IS′= VSENSE / RIN = RS × IS / RIN
(1)
where
• RIN = 1 / Gm
This current flows entirely in the external gain resistor developing a voltage drop equal to:
VG = IS′× RGAIN = (VSENSE / RIN) × RGAIN = ( (RS × IS) / RIN ) × RGAIN
(2)
This voltage is buffered and presented at the output with a very low output impedance allowing a very easy
interface to other devices (ADC, μC…).
VOUT = (RS × IS) × G
(3)
where
• G = RGAIN / RIN
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7.2 Functional Block Diagram
+IN
-IN
R
LMP8645
LMP8645HV
R
IN
IN
-
+
+
V
V
OUT
+
-
R
V
G
7.3 Feature Description
7.3.1 Driving ADC
The input stage of an Analog-to-Digital converter can be modeled with a resistor and a capacitance versus
ground. So if the voltage source does not have a low impedance, an error in the measurement of the amplitude
will occur. In this condition a buffer is needed to drive the ADC. The LMP8645 has an internal output buffer able
to drive a capacitance load up to 30 pF or the input stage of an ADC. If required an external lowpass RC filter
can be added at the output of the LMP8645 to reduce the noise and the bandwidth of the current sense. Any
other filter solution that implies a capacitance connected to the RG pin is not suggested due to the high
impedance of that pin.
R
I
S
S
+IN
-IN
R
L
o
a
d
R
IN
IN
LMP8645
-
+
+
V
V
A
RF
ADC
+
V
f
OUT
C
F
-
R
G
V
R
GAIN
= 1/(2pR C )
F F
-3dB
图7-2. LMP8645 to ADC Interface
7.3.2 Applying Input Voltage With No Supply Voltage
The full specified input common-mode voltage range may be applied to the inputs while the LMP8645 power is
off (V+ = 0 V). When the LMP8640 is powered off, the RIN resistors are disconnected internally by MOSFETS
and the leakage currents are very low (sub µA).
The 6-V input differential limit still applies, so at no time should the two inputs be more than 6-V apart. There are
also Zener clamps on the inputs to ground, so do not exceed the input limits specified in the Absolute Maximum
Ratings.
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7.4 Device Functional Modes
7.4.1 Selection of the Gain Resistor
For the LMP8645 and LMP8645HV, the gain is selected through an external gain set resistor connected to the
RG pin. Moreover, the gain resistor RGAIN determines the voltage of the output buffer, which is related to the
supply voltage and also to the common-mode voltage of the input signal.
7.4.2 Gain Range Limitations
The gain resistor must be chosen such that the theoretical maximum output voltage does not exceed the
LMP8645 maximum output voltage rating for a given common-mode voltage. These limits are due to the internal
amplifier bias point and the VCM headroom required to generate the required currents across the RIN and RGAIN
resistors.
The following sections explain how to select the gain resistor for various ranges of the input common-mode
voltage.
7.4.2.1 Range 1: VCM is –2 V to 1.8 V
The maximum voltage at the RG pin is given by the following inequality:
VRG = Vsense × RGAIN × Gm ≤min (1.3 V; Vout_max)
(4)
where
• Vout_max is the maximum allowable output voltage according to the Electrical Tables
All the gain resistors (RGAIN) values which respect the previous inequality are allowed. The graphical
representation of 图7-3 helps in the selection.
All the combinations (VSENSE , RGAIN) below the curve are allowed.
100
10
1
500
50
5
V
= 5V, V = 12V
S
S
V
= 2.7V
S
0
100
200
300
400
500
Vsense (mV)
图7-3. Allowed Gains for Range 1
As a consequence, once selected, the gain (RGAIN) and the VSENSE range is fixed, too.
For example if an application required a Gain of 10, RG will be 50 kΩ and VSENSE will be in the range 10 mV to
100 mV.
7.4.2.2 Range 2: VCM is 1.8 V to VS
In this range, the maximum voltage at the RG pin is related to the common-mode voltage and VSENSE. So all the
RGAIN resistor values which respect the following inequalities are allowed:
VR ≤min (Vout_max; (VCM –Vsense–250 mV))
(5)
G
where
• VRG = VSENSE * RGAIN * Gm
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• Vout_max is the maximum allowable output voltage according to the 2.7-V Electrical Characteristics, 5-V
Electrical Characteristics, and 12-V Electrical Characteristics.
The graphical representation in 图7-4 helps in the selection.
All the combinations (VSENSE, RGAIN) below the curves for given VCM and supply voltage are allowed.
100
10
1
500
50
5
V =12V @ V =6V
CM
s
V =5V @ V =2.5V
s CM
V =2.7V @ V =2V
CM
s
0
100
200
300
400
500
Vsense (mV)
图7-4. Allowed Gains for Range 2
Also in this range, once selected, the RGAIN (Gain) and the VSENSE range is fixed too.
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7.4.2.3 Range 3: VCM is greater than VS
The maximum voltage at the RG pin is Vout_max, it means that:
VOUT = VSENSE × RGAIN / RIN ≤Vout_max
(6)
where
• Vout_max is the maximum allowable output voltage according to the Electrical Tables
So all the RGAIN resistors which respect the previous inequality are allowed. The graphical representation in 图
7-5 helps with the selection.
All the combinations (VSENSE, RGAIN) below the curves are allowed.
100
10
1
500
50
5
V =12V
s
V =5V
s
V =2.7V
s
0
100
200
300
400
500
Vsense (mV)
图7-5. Allowed Gains for Range 3
Also in this range once selected the RGAIN (Gain) the VSENSE range is fixed too.
From the ranges shown above, a good way to maximize the output voltage swing of the LMP8645 is to select the
maximum allowable RGAIN according to the previous equations. For a fixed supply voltage and VSENSE as the
common-mode voltage increases, the maximum allowable RGAIN increases too.
7.4.3 Selection of Sense Resistor
The accuracy of the current measurement highly depends on the value of the shunt resistor RS. Its value
depends on the application and it is a compromise between small-signal accuracy and maximum permissible
voltage (and power) loss in the sense resistor. High values of RS provide better accuracy at lower currents by
minimizing the effects of amplifier offset. Low values of RS minimize voltage and power loss in the supply
section, but at the expense of low current accuracy. For most applications, best performance is obtained with an
RS value that provides a full-scale shunt voltage range of 100 mV to 200 mV.
In applications where a small current is sensed, a larger value of RS is selected to minimize the error in the
proportional output voltage. Higher resistor value improves the signal-to-noise ratio (SNR) at the input of the
current sense amplifier and hence gives a more accurate output.
Similarly when high current is sensed, the power losses in RS can be significant so a smaller value of RS is
desired. In this condition it is also required to take in account also the power rating of RS resistor. The low input
offset and customizable gain of the LMP8645 allows the use of small sense resistors to reduce power dissipation
still providing a good input dynamic range. The input dynamic range is the ratio between the maximum signal
that can be measured and the minimum signal that can be detected, where usually the input offset and amplifier
noise are the principal limiting factors.
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图7-6. Example of a Kelvin (4-Wire) Connection to a Two-Terminal Resistor
The amplifier inputs should be directly connected to the sense resistor pads using Kelvin or 4-wire connection
techniques. The paths of the input traces should be identical, including connectors and vias, so that these errors
will be equal and cancel.
7.4.3.1 Resistor Power Rating and Thermal Issues
The power dissipated by the sense resistor can be calculated from:
PD = IMAX 2 * RS
(7)
where
• PD is the power dissipated by the resistor in Watts
• IMAX is the maximum load current in A
• RS is the sense resistor value in Ω.
The resistor must be rated for more than the expected maximum power (PD), with margin for temperature
derating. Be sure to observe any power derating curves provided by the resistor manufacturer.
Running the resistor at higher temperatures will also affect the accuracy. As the resistor heats up, the resistance
generally goes up, which will cause a change in the measurement. The sense resistor should have as much
heat-sinking as possible to remove this heat through the use of heatsinks or large copper areas coupled to the
resistor pads. A reading drifting slightly after turnon can usually be traced back to sense resistor heating.
7.4.3.2 Using PCB Trace as a Sense Resistor
While it may be tempting to use the resistance of a known area of PCB trace or copper area as a sense resistor,
TI does not recommend this for precision measurements.
The tempco of copper is typically 3300 to 4000 ppm/°K (0.33% to 0.4% per °C), which can vary with PCB
processes.
A typical surface mount sense resistor temperature coefficient (tempco) is in the 50 ppm to 500 ppm per °C
range offering more measurement consistency and accuracy over the copper trace. Special low tempco resistors
are available in a range from 0.1 ppm to 50 ppm, but at a much higher cost.
7.4.4 Sense Line Inputs
The sense lines should be connected to a point on the resistor that is not shared with the main current path, as
shown in 图 7-6. For lowest drift, the amplifier must be mounted away from any heat generating devices, which
may include the sense resistor. The traces should be one continuous trace of copper from the sense resistor pad
to the amplifier input pin pad, and ideally on the same copper layer with minimal vias or connectors. This can be
important around the sense resistor if it is generating any significant heat gradients. Vias in the sense lines
should be formed from continuous plated copper and routing through mating connectors or headers should be
avoided. It is better to extend the sense lines than to place the amplifier in a hostile environment.
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To minimize noise pickup and thermal errors, the input traces should be treated like a high-speed differential
signal pair and routed tightly together with a direct path to the input pins on the same copper layer. They do not
need to be impedance matched, but should follow the same matching rules about vias, spacing and equal
lengths. The input traces should be run away from noise sources, such as digital lines, switching supplies, or
motor drive lines.
Remember that these input traces can contain high voltage (up to 76 V), and should have the appropriate trace
routing clearances to other components, traces and layers. Because the sense traces only carry the amplifier
bias current, the connecting input traces can be thin traces running close together. This can help with routing or
creating the required spacings.
备注
Due to the nature of the device topology, the positive input bias current will vary with VSENSE with an
extra current approximately equivalent to VSENSE / 5 kΩon top of the typical 12 uA bias current.
The negative input bias current is not in the feedback path and will not change over VSENSE. High or miss-
matched source impedances should be avoided as this imbalance will create an additional error term over input
voltage.
7.4.4.1 Effects of Series Resistance on Sense Lines
While the sense amplifier is depicted as a conventional operational amplifier, it really is based on a current-
differencing topology. The input stage uses precision 5-kΩresistors internally to convert the voltage on the input
pin onto a current, so any resistance added in series with the input pins will change this resistance, and thus the
resulting current, causing an error. TI recommends that the total path resistance be less than 10 Ω and equal to
both inputs.
If a resistance is added in series with an input, the gain of that input will not track that of the other input, causing
a constant gain error.
TI does not recommend using external resistance to alter the gain, as external resistors do not have the same
thermal matching and tracking as the internal thin film resistors. Any added resistance will severely degrade the
offset and CMRR specifications.
If resistors are purposely added for filtering, resistance should be added equally to both inputs and be less than
10 Ω, and the user should be aware that the gain will change slightly.
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8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
The LMP8645 device measures the small voltage developed across a current-sensing resistor when current
passes through it in the presence of high common-mode voltage. The gain is set by a single resistor and
buffered to a single-ended output.
8.2 Typical Applications
8.2.1 Typical Current Monitor Application
R
S
I
S
+IN
-IN
R
LMP8645
R
ACTIVE
DEVICE
IN
IN
-
+
+
V
V
A
ADC
V
OUT
+
-
V
R
G
图8-1. LMP8645 in Current Monitor Application
8.2.1.1 Design Requirements
In this example, the LMP8645 is used to monitor the supply current of an active device (Refer to 图 8-1). The
LMP8645 supply voltage is 5 V and the active device is supplied with 12 V. The maximum load current is 1 A.
The LMP8645 will operate in all 3 ranges: in Range 1 when turning on the power of the active device (rising from
0 V to 12 V), while briefly passing through Range 2 as the load supply rises, and finally into Range 3 for normal
load operation.
Because the purpose of the application is monitor the current of the active device in any operating condition
(power on, normal operation, fault, and so forth), the gain resistor will be selected according to Range 1, the
range that puts the most constraints to the maximum output voltage swing of the LMP8645.
8.2.1.2 Detailed Design Procedure
At the start-up of the monitored device, the LMP8645 works at a common-mode voltage of 0 V, which means
that the maximum output limit is 1.3 V (Range 1). To maximize the resolution, the RSENSE value is calculated as
maximum allowed VSENSE (Refer to 图7-3) divided by maximum current (1 A), so RSENSE=0.5 Ω.
Due to the output limitation at low common-mode voltage, the maximum allowed gain will be 2.6 V/V, which
corresponds to RGAIN = 13 kΩ. With this approach the current is monitored correctly at any working condition,
but does not use the full output swing range of the LMP8645.
Alternatively if the monitored device doesn’t sink the full 1 A at any supply voltage, it is possible to design with
the full maximum output voltage of the LMP8645 when operating in Range 3 ( VCM ≥VS ).
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Also in this case it is possible to maximize the resolution using Rsense = 0.5 Ω, and maximize the output
dynamic range with RGAIN=33 kΩ. With this approach the maximum detectable current, when VCM is less than
1.8 V, is about 400 mA. While for common-mode voltages of less than 2.5 V the maximum detectable current is
600 mA (Refer to 图 7-3), and for common-mode voltages at or above the LMP8645 supply voltage, the
maximum current is 1 A.
The second approach maximizes the output dynamic but implies some knowledge on the monitored current.
8.2.1.3 Application Curves
图 8-2 shows the resulting circuit voltages with the input load swept from 0 A to 1 A, with RGAIN= 13 kΩ for
operation in Range 1 (preferring accuracy over all load operating conditions).
Also shown in 图 8-3 is the resulting output voltage with RGAIN = 33 kΩ for operation in Range 3 (sacrificing low
load supply accuracy while optimizing overall resolution at normal load operating conditions).
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Output Voltage (V)
Vsense (V)
RG = 13k
Range 1
RG = 33k
Range 3
Output Voltage (V)
Vsense (V)
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Load Current (A)
Load Current (A)
C002
C001
图8-2. Resulting Input and Output Voltages vs
图8-3. Resulting Input and Output Voltages vs
Load Current for Range 1
Load Current For Range 3
8.2.2 High Brightness LED Driver
The LMP8645 is the right choice in applications which require high-side current sense, such as High Brightness
LED for automotive where the cathode of the LED must be connected to the ground (chassis) of the car. In 图
8-4, the LMP8645 is used to monitor the current High Side in a high brightness LED together with a LM3406
constant current buck regulator LED driver.
L
R
S
V
IN
I
F
SW
LM3406HV
+IN
-IN
R
HB/HP
(3W-25W)
Constant Current
Buck Regulator
LMP8645HV
R
IN
IN
V
CC
-
+
CS
+
V
I
F
= 200 mV/(R *Gain)
S
Gain = R
*Gm
GAIN
V
OUT
+
-
V
R
G
R
GAIN
图8-4. High-Side Current Sensing in Driving HP/HB LED
Even though LMP8645 will work in all 3 Ranges, RGAIN will be calculated according to Range 3 because the
purpose is regulating the current in the LEDs when the external MOSFET is OFF (LMP8645 at high VCM). Even
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if this approach makes the LMP8645 able to sense high peak current only in Range 3 where the dynamic output
is higher than Range 1 the current resolution is maximized. At each switch ON/OFF of the MOSFET the
LMP8645 goes from Range 1 (MOSFET ON, string of LED OFF), to Range 3 (MOSFET OFF, string of LED ON)
passing through Range 2 (MOSFET OFF, string of LED OFF). Because the purpose of the application is to
sense the current with high precision when the LED string is ON, the RGAIN will be calculated according to the
Range 3.
The LMP8645 supply voltage is supplied by the internal LDO of the LM3406 thorough the pin VCC. The LM340x
is expecting a 200-mV feedback signal at the current sense (SNS) pin. The LMP8645 must provide this 200 mV
at the determined current limit.
The current which flows through the LED is programmed according to 方程式8:
IF = VCS / (RS × Gain)
(8)
where:
• Gain = RGAIN × Gm
• VCS = 200 mV
In this application the current which flows in the HB LED is in the Range from 350 mA to 1 A, so to reduce the
power dissipation on the shunt resistor and have a good accuracy, the RS must be in the range from 50 mΩ and
200 mΩ. In 表8-1, two examples are analyzed.
To summarize, calculate the RGAIN according to the range of operation in which the application mainly works.
Once selected, the range considers the more stringent constraint
表8-1. Comparison of Two Ranges
IF=350 mA
IF=1 A
36 kΩ
27 mΩ
27 mW
≊5%
RGAIN
40 kΩ
RS
77 mΩ
9.5 mW
≊5%
Dissipated Power
Total Accuracy
9 Power Supply Recommendations
To decouple the LMP8645 from AC noise on the power supply, TI recommends using a 0.1-μF bypass capacitor
between the VS and GND pins. This capacitor must be placed as close as possible to the supply pins. In some
cases, an additional 10-μF bypass capacitor may further reduce the supply noise.
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10 Layout
10.1 Layout Guidelines
The traces leading to and from the sense resistor can be significant error sources. With small value sense
resistors (< 100 mΩ), any trace resistance shared with the load current can cause significant errors.
The amplifier inputs should be directly connected to the sense resistor pads using Kelvin or 4-wire connection
techniques. The traces should be one continuous piece of copper from the sense resistor pad to the amplifier
input pin pad, and ideally on the same copper layer with minimal vias or connectors. This can be important
around the sense resistor if it is generating any significant heat gradients.
To minimize noise pick-up and thermal errors, the input traces should be treated like a differential signal pair and
routed tightly together with a direct path to the input pins (preferably on the same copper layer). The input traces
should be run away from noise sources, such as digital lines, switching supplies or motor drive lines.
Ensure that the sense traces have the appropriate trace routing clearances for the expected load supply
voltages.
Because the sense traces only carry the amplifier bias current, the connecting input traces can be thinner, signal
level traces. Excessive Resistance in the trace should also be avoided.
The paths of the traces should be identical, including connectors and vias, so that any errors will be equal and
cancel.
The sense resistor will heat up as the load increases. As the resistor heats up, the resistance generally goes up,
which will cause a change in the readings. The sense resistor should have as much heatsinking as possible to
remove this heat through the use of heatsinks or large copper areas coupled to the resistor pads.
The gain set resistor pin is a sensitive node and can pick up noise. Keep the gain set resistor close to the RG pin
and minimize RGAIN trace length. Connect the grounded end of RGAIN directly to the LMP8645 ground pin.
10.2 Layout Example
图10-1. Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
LMP8645 TINA SPICE Model, SNOM087
TINA-TI SPICE-Based Analog Simulation Program, http://www.ti.com/tool/tina-ti
Evaluation Board for the LMP8645, http://www.ti.com/tool/lmp8645mkeval
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation, see the following:
AN-1975 LMP8640 / LMP8645 Evaluation Board User Guide, SNOA546
11.3 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.4 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.7 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2022 Texas Instruments Incorporated
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25
Product Folder Links: LMP8645 LMP8645HV
PACKAGE OPTION ADDENDUM
www.ti.com
19-Apr-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LMP8645HVMK/NOPB
LMP8645HVMKE/NOPB
LMP8645HVMKX/NOPB
LMP8645MK/NOPB
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
DDC
DDC
DDC
DDC
DDC
DDC
6
6
6
6
6
6
1000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
AK6A
AK6A
AK6A
AJ6A
AJ6A
AJ6A
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
3000 RoHS & Green
1000 RoHS & Green
LMP8645MKE/NOPB
LMP8645MKX/NOPB
250
RoHS & Green
3000 RoHS & Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
19-Apr-2022
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jul-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMP8645MK/NOPB
SOT-23-
THIN
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jul-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOT-23-THIN DDC
SPQ
Length (mm) Width (mm) Height (mm)
208.0 191.0 35.0
LMP8645MK/NOPB
6
1000
Pack Materials-Page 2
PACKAGE OUTLINE
DDC0006A
SOT-23 - 1.1 max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
3.05
2.55
1.1
0.7
1.75
1.45
0.1 C
B
A
PIN 1
INDEX AREA
1
6
4X 0.95
1.9
3.05
2.75
4
3
0.5
0.3
0.1
6X
TYP
0.0
0.2
C A B
C
0 -8 TYP
0.25
GAGE PLANE
SEATING PLANE
0.20
0.12
TYP
0.6
0.3
TYP
4214841/C 04/2022
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC MO-193.
www.ti.com
EXAMPLE BOARD LAYOUT
DDC0006A
SOT-23 - 1.1 max height
SMALL OUTLINE TRANSISTOR
SYMM
6X (1.1)
1
6
6X (0.6)
SYMM
4X (0.95)
4
3
(R0.05) TYP
(2.7)
LAND PATTERN EXAMPLE
EXPLOSED METAL SHOWN
SCALE:15X
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
SOLDERMASK DETAILS
4214841/C 04/2022
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DDC0006A
SOT-23 - 1.1 max height
SMALL OUTLINE TRANSISTOR
SYMM
6X (1.1)
1
6
6X (0.6)
SYMM
4X(0.95)
4
3
(R0.05) TYP
(2.7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214841/C 04/2022
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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