LMR70503 [TI]

SIMPLE SWITCHER® Buck-Boost Converter For Negative Output Voltage in μSMD; SIMPLE SWITCHER®降压 - 升压转换器,负输出电压μSMD
LMR70503
型号: LMR70503
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

SIMPLE SWITCHER® Buck-Boost Converter For Negative Output Voltage in μSMD
SIMPLE SWITCHER®降压 - 升压转换器,负输出电压μSMD

转换器 升压转换器
文件: 总19页 (文件大小:2434K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LMR70503  
SIMPLE SWITCHER® Buck-Boost Converter For Negative Output  
Voltage in µSMD  
Small Output Voltage Ripple  
Features  
WEBENCH® Enabled  
Tiny 8-Bump Thin Micro SMD Package: 0.84 mm × 1.615  
mm × 0.6 mm  
Performance Benefits  
2.8 V to 5.5 V Input Voltage Range  
Adjustable Output Voltage: -0.9 V to -5.5 V  
320 mA Switch Current Limit  
Easy To Use  
Tiny Overall Solution Size Reduces System Cost  
500 kHz Minimum Switching Frequency  
Ground Referred Enable Input  
Under Voltage Lock Out (UVLO)  
No External Compensation  
Applications  
General Purpose Negative Voltage Supply  
Negative Rail / Bias Supply For Op-amp And Data  
Converters  
LCD Biasing  
Internal Soft Start  
1 µA Shutdown Supply Current  
System Performance  
Efficiency, VOUT= -5.0 V  
Efficiency, VOUT= -2.5 V  
80  
70  
60  
50  
40  
30  
80  
70  
60  
50  
VIN = 2.8V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
VIN = 2.8V  
VIN = 3.3V  
VIN = 4.0V  
40  
VIN = 5.0V  
VIN = 5.5V  
30  
0
10 20 30 40 50 60 70 80 90 100  
LOAD (mA)  
0
30  
60  
90  
120 150 180  
LOAD (mA)  
30184975  
30184979  
Typical Application Circuit  
30184901  
PRODUCTION DATA information is current as of  
publication date. Products conform to specifications per  
the terms of the Texas Instruments standard warranty.  
Production processing does not necessarily include  
testing of all parameters.  
301849 SNVS850  
Copyright © 1999-2012, Texas Instruments Incorporated  
LMR70503  
Ordering Information  
Order Number  
Supplied As  
Package Type  
Package Drawing  
Package Marking  
LMR70503TM NOPB  
250 Units on Tape and Reel  
Thin Micro SMD  
TMP08BAA  
S3  
LMR70503TMX NOPB 3000 Units on Tape and Reel  
Connection Diagrams  
30184902  
30184903  
LMR70503 Bump Locations - Top View  
LMR70503 Package Marking - Top View  
(Diamond Denotes Bump A1)  
Pin Descriptions  
Pin Number  
Name  
Description  
A1  
VREF  
Reference voltage output; connect to the bottom feedback resistor.  
Active high enable input for the device. Enable voltage level is referred to GND. Device must be enabled  
only with the presence of valid VIN (2.8 V to 5.5 V). The peak of the Enable input voltage must always  
lower than VIN voltage.  
B1  
C1, C2  
D1  
EN  
GND  
SW  
Analog ground for internal bias circuitry.  
Switch node pin, connected to the internal high side MOSFET. The cathode of the external Schottky  
diode must be connected as close as possible to this pin, in order to reduce inductance in the  
discontinuous current path.  
FB is connected to VOUT and VREF through two feedback resistors. It is compared to GND to regulate  
the output voltage.  
A2  
FB  
Output voltage. The anode of the external Schottky diode and output filter capacitor(s) should be  
connected to this pin.  
B2  
D2  
VOUT  
VIN  
Power supply input pin, connected to the internal high side MOSFET and powers the internal circuity.  
2
Copyright © 1999-2012, Texas Instruments Incorporated  
LMR70503  
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for  
availability and specifications.  
VIN to GND  
VOUT to GND  
SW to GND  
EN to GND  
-0.5 V to 6.0 V  
-6.5 V to 0.5 V  
-6.5 V to VIN +0.2 V  
-0.5 V to VIN  
-0.5V to 5.5V  
±2 kV  
FB to GND  
ESD Rating(Note 2)  
Junction Temperature  
Storage Temperature Range  
150 °C  
-65 °C to 150 °C  
For Soldering Specs see:  
http://www.ti.com/lit/an/snoa549c/  
snoa549c.pdf  
Operating Ratings  
Input Voltage Range (VIN)  
2.8 V to 5.5 V  
-0.9 V to -5.5 V  
-40°C to 125°C  
Output Voltage Range (VOUT  
)
Junction Temperature Range (TJ)  
Electrical Characteristics Specifications with standard typeface are for TJ = 25°C only; limits in bold face type  
apply over the operating junction temperature (TJ) range of -40 °C to +125 °C. Typical values represent the most likely parametric  
norm at TJ = 25°C, and are provided for reference purposes only. VIN = 3.3 V, VOUT = -5.0 V, VEN = 1.8 V, unless otherwise indicated  
in the conditions column.  
Min  
(Note 3)  
Typ  
Max  
Symbol  
VREF  
Parameter  
Conditions  
Units  
V
(Note 4) (Note 3)  
Reference Voltage  
Shutdown Current  
RREF=100 kto GND  
1.166  
1.19  
0.01  
1.214  
1
EN = 0 V  
VIN = 5.5 V  
ISD  
µA  
EN = 1.8 V, VIN = 5.5 V,  
No Switching  
IQ  
Quiescent Current  
245  
2.55  
0.13  
300  
2.7  
µA  
V
VIN Under Voltage Lock Out Threshold -  
UVLORISE  
UVLOHYS  
Rising  
VIN Under Voltage Lock Out Hysteresis  
Band  
0.1  
0.1  
V
VEN-RISE  
VEN-HYS  
IEN  
VIN = 5.5 V  
VIN = 5.5 V  
EN Input Voltage Rising Threshold  
EN Input Voltage Threshold Hysteresis  
Enable Current  
1.05  
0.15  
30  
1.2  
V
V
nA  
nA  
kHz  
ns  
IFB  
FB pin current  
10  
FSW-MIN  
TON-MIN  
RDSON  
IPEAK-CL  
TSDTH-HIGH  
TSDHYS  
Minimum Switching frequency  
Minimum High Side Switch On Time  
Switch On State Resistance  
Switch Peak Current limit(Note 5)  
Thermal Shutdown Threshold - Rising  
Thermal Shutdown Hysteresis Band  
400  
270  
500  
70  
Load = 0 A  
VIN = 2.8V  
1.1  
320  
165  
10  
2
mA  
°C  
°C  
370  
Junction Temperature  
Junction Temperature  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/  
or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the  
recommended Operating Ratings is not implied. The recommended Operating Ratings indicate conditions at which the device is functional and should not be  
operated beyond such conditions.  
Note 2: ESD using the human body model which is a 100 pF capacitor discharged through a 1.5 kresistor into each pin. Test method is per JESD22–A114.  
Note 3: Min and Max limits are 100% production tested at an ambient temperature (TA) of 25 °C. Limits over the operating temperature range are guaranteed  
through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).  
Note 4: Typical specifications represent the most likely parametric norm at 25°C operation.  
Note 5: The switch peak current limit is internally trimmed. The actual peak current limit observed on the applications are dependant on the input voltage VIN  
,
inductance value L and junction temperature TJ.  
Copyright © 1999-2012, Texas Instruments Incorporated  
3
 
 
 
 
 
 
LMR70503  
Typical Performance Characteristics Unless otherwise specified, the following conditions apply: VIN  
=
3.3 V, VOUT = -5.0 V, VEN = 1.8 V, CIN = 10 µF 6.3 V X5R ceramic capacitor; COUT = 2 × 22 µF 6.3 V X5R ceramic capacitor; L =  
6.8 µH (VLS2012ET-6R8M); TAMBIENT = 25 °C.  
Efficiency, VOUT = -5.0 V  
Output Regulation, VOUT = -5.0 V  
5.10  
80  
70  
60  
50  
40  
30  
5.08  
5.06  
5.04  
5.02  
5.00  
4.99  
4.96  
4.95  
4.92  
4.90  
VIN = 2.8V  
VIN = 2.8V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
0
0
0
10 20 30 40 50 60 70 80 90 100  
LOAD (mA)  
0
10 20 30 40 50 60 70 80 90 100  
LOAD (mA)  
30184975  
30184976  
Efficiency, VOUT = -3.3 V  
Output Regulation, VOUT = -3.3 V  
3.40  
80  
70  
60  
50  
40  
30  
3.38  
3.36  
3.34  
3.32  
3.30  
3.28  
3.26  
3.24  
3.22  
3.20  
VIN = 2.8V  
VIN = 2.8V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
20  
40  
60  
80 100 120 140  
0
20 40 60 80 100 120 140  
LOAD (mA)  
LOAD (mA)  
30184977  
30184978  
Efficiency, VOUT = -2.5 V  
Output Regulation, VOUT = -2.5 V  
2.60  
80  
70  
60  
50  
40  
30  
2.58  
2.56  
2.54  
2.52  
2.50  
2.48  
2.46  
2.44  
2.42  
2.40  
VIN = 2.8V  
VIN = 2.8V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
30  
60  
90  
120 150 180  
0
30  
60  
90  
120 150 180  
LOAD (mA)  
LOAD (mA)  
30184979  
30184980  
4
Copyright © 1999-2012, Texas Instruments Incorporated  
LMR70503  
Efficiency, VOUT = -1.5 V  
Output Regulation, VOUT = -1.5 V  
1.60  
80  
70  
60  
50  
40  
30  
1.58  
1.56  
1.54  
1.52  
1.50  
1.48  
1.46  
1.44  
1.42  
1.40  
VIN = 2.8V  
VIN = 2.8V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
0
30  
60  
90 120 150 180 210  
LOAD (mA)  
0
30 60 90 120 150 180 210  
LOAD (mA)  
30184981  
30184982  
Efficiency, VOUT = -0.9 V  
Output Regulation, VOUT = -0.9 V  
1.00  
80  
70  
60  
50  
40  
30  
0.98  
0.96  
0.94  
0.92  
0.90  
0.88  
0.86  
0.84  
0.82  
0.80  
VIN = 2.8V  
VIN = 2.8V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
VIN = 3.3V  
VIN = 4.0V  
VIN = 5.0V  
VIN = 5.5V  
0
50  
100  
150  
200  
250  
0
50  
100  
150  
200  
250  
LOAD (mA)  
LOAD (mA)  
30184983  
30184984  
Maximum Load Current  
Minimum Switching Frequency  
600  
250  
200  
150  
100  
50  
580  
560  
540  
520  
500  
480  
460  
VOUT = -5V  
VOUT = -3.3V  
VOUT = -2.5V  
VOUT = -1.5V  
VOUT = -0.9V  
Temp = -40°C  
Temp = 25°C  
Temp = 125°C  
0
2.8 3.2 3.6 4.0 4.4 4.8 5.2  
VIN (V)  
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
30184971  
30184989  
Copyright © 1999-2012, Texas Instruments Incorporated  
5
LMR70503  
No Load Supply Current  
Rds-on  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
Vin = 2.8V  
Vin = 4.0V  
Vin = 5.5V  
2.8 3.2 3.6 4.0 4.4 4.8 5.2  
VIN (V)  
-40 -20  
0
20 40 60 80 100 120 140  
TEMPERATURE (°C)  
30184924  
30184987  
Enable Thresholds  
Soft Start Time (No Load)  
800  
700  
600  
500  
400  
300  
200  
100  
0
Vout = -5.0V  
Vout = -3.3V  
Vout = -2.5V  
Vout = -1.5V  
Vout = -0.9V  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
Rising TH -40°C  
Falling TH -40°C  
Rising TH 25°C  
Falling TH 25°C  
Rising TH 125°C  
Falling TH 125°C  
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
30184988  
30184986  
Soft Start Delay Time  
(From EN Rising Edge)  
Soft Off Time, VOUT = -5.5 V  
(No Load, From EN Falling Edge)  
160  
140  
120  
100  
80  
800  
700  
600  
500  
400  
300  
60  
40  
Temp = -40°C  
Temp = 25°C  
Temp = 125°C  
VIN = 2.8 V  
VIN = 3.0 V  
VIN = 4.0 V  
VIN = 5.0 V  
20  
0
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
0
10 20 30 40 50 60 70 80 90  
TEMP (°C)  
30184985  
30184930  
6
Copyright © 1999-2012, Texas Instruments Incorporated  
LMR70503  
Soft Start And Soft Off Waveform  
VIN = 5.0 V, VOUT = -5.0 V, No Load  
Soft Start And Soft Off Waveform  
VIN = 5.0 V, VOUT = -5.0 V, Load = 50 Ω  
30184951  
30184952  
Typical Switching Waveform  
VIN = 5.0 V, VOUT = -5.0 V, No Load  
Typical Switching Waveform  
VIN = 5.0 V, VOUT = -5.0 V, IOUT = 70 mA  
30184955  
30184954  
Load Transient, VIN = 4.0 V, VOUT = -5.5 V  
Load steps between 2 mA and 50 mA  
Short Circuit Waveform  
VIN = 5.0 V, VOUT = -5.5 V  
30184912  
30184911  
Copyright © 1999-2012, Texas Instruments Incorporated  
7
LMR70503  
Block Diagram  
30184904  
General Description  
The LMR70503 is a buck-boost converter with adjustable negative output voltage in a tiny 8-bump thin micro SMD package. Its  
unique control method is designed to provide fast transient response, low output noise, high efficiency, and tight regulation in the  
smallest possible PCB area. The LMR70503 has built in soft start, peak current limit, minimum switching frequency, and Under  
Voltage Lock Out (UVLO), with no external compensation required. For ease of use, the Enable pin is referred to the IC ground,  
instead of the lowest potential of the IC: the negative output voltage.  
Operating Description  
The LMR70503 integrates an inverting buck-boost controller and a high-side MOSFET in one tiny 8-bump thin micro SMD package.  
A simplified buck-boost converter schematic is shown in Figure 1.  
30184940  
FIGURE 1. Buck Boost Converter  
The LMR70503 controller incorporates a unique peak current mode control method with a minimum switching frequency limit. The  
integrated switch is turned off when its current crosses the peak current limit, while it is turned on when the magnitude of VOUT  
droops below a threshold. When the switch is off, the inductor current goes through the diode and charges the output capacitor(s).  
With fixed peak current limit, the switching frequency decreases with decreased load current. At light load, the switching frequency  
will decrease to the audible frequency range, which is not acceptable in many applications. The LMR70503 is designed to operate  
with peak current mode control and limit the switching frequency to 500 kHz (typical) minimum, to avoid audible frequency inter-  
ference. At light load, when the switching frequency drops to the minimum, the inductor current limit is reduce instead of frequency  
to maintain regulation. The LMR70503 also incorporates an internal dummy load to compensate for the extra charges in the min-  
imum ON-time (TON-MIN) condition. More details on the LMR70503 operation are described in the later sessions. Typical switching  
waveforms in discontinuous conduction mode (DCM) and continuous conduction mode (CCM), including the inductor current, the  
switch node voltage and the output voltage ripple (absolute value), are shown in Figure 2.  
8
Copyright © 1999-2012, Texas Instruments Incorporated  
 
LMR70503  
30184943  
FIGURE 2. Typical Waveforms In Buck Boost Converter  
Figure 3 illustrates the switching frequency, the peak current limit, the output voltage and the dummy load with different load current.  
More details on each operation mode will be described later.  
1. No load to very light load: high side switch is turned on for TON-MIN; switching frequency is limited at the minimum switching  
frequency; and the dummy load is turned on.  
2. Light load: switching frequency is limited at the minimum switching frequency, peak current limit increases with increased load  
current; and the dummy load is off.  
3. Heavy load: peak current equals the maximum peak current limit; switching frequency increases with increased load current;  
and the dummy load is off.  
30184944  
FIGURE 3. The LMR70503 Operation Modes vs. Load Current  
Minimum Switching Frequency Operation  
In a typical peak current mode controlled DC-DC converter, the peak current limit is constant and the switching frequency decreases  
when load current reduces. To maintain low noise operation and avoid audio frequency interference, the minimum switching fre-  
quency of the LMR70503 is limited at 500 kHz typically. At heavy load, the peak current limit remains constant and the switching  
frequency varies with the load to regulate the output voltage. With reduced loading, the absolute output voltage is going to be  
charged higher than regulation if the switching frequency cannot decrease accordingly. Therefore, to regulate the output voltage  
with minimum frequency at light load, the peak current limit is reduced, in proportional to the output voltage offset.  
In this mode, as shown in Figure 3, the switching frequency is fixed to the minimum switching frequency, the peak inductor current  
increases with load current, and the output voltage magnitude has a small offset above regulation.  
Copyright © 1999-2012, Texas Instruments Incorporated  
9
 
 
LMR70503  
Minimum ON-Time and Dummy Load  
When load current is near zero, the peak inductor current can not reduce further due to TON-MIN of the high side switch. Under such  
conditions, an internal dummy load is turned on by sensing excessive output voltage offset, which removes the extra charge from  
the output capacitor(s). In this condition, the switching frequency is fixed to the minimum value. The peak inductor current value is  
at its minimum value, as shown in Figure 3. The dummy load current is zero when the LMR70503 operates with on time higher  
than TON-MIN  
The minimum peak inductor current is determined by  
IPEAK-MIN = TON-MIN × VIN / L  
.
where VIN is the supply voltage and L is the inductance value. The peak inductor current is higher with higher VIN. The inductor  
current falling slew rate is determined by  
SRFALLING = (|VOUT| + VF) / L  
where |VOUT| is the absolute value of the output voltage and VF is the forward voltage drop of the power diode. At lower |VOUT|, it  
takes longer time to discharge the inductor current to zero. Therefore, there is more energy to charge the output capacitor(s). The  
output voltage will have more offset at higher VIN and lower VOUT. The dummy load current is a function of the FB voltage: the more  
the offset at the FB node, the higher the dummy load current, as shown in Figure 4.  
10  
VIN=5.5V -40°C  
VIN=5.5V 25°C  
9
VIN=5.5V 125°C  
VIN=2.8V -40°C  
VIN=2.8V 25°C  
VIN=2.8V 125°C  
8
7
6
5
4
3
2
1
0
-50  
-40  
-30  
-20  
-10  
0
FB VOLTAGE (mV)  
30184972  
FIGURE 4. Dummy Load Current vs. FB Voltage  
Constant Peak Current Operation  
If the load current increases in the minimum switching frequency mode, the peak current limit will reach the maximum peak current  
limit (IPEAK-MAX). After this point, the LMR70503 behaves as a constant peak current converter with frequency modulation. The  
transition load level between the constant frequency mode and the constant peak current mode varies with VIN, VOUT and L.  
The IPEAK-MAX is trimmed to 320 mA in the LMR70503. Due to propagation delays in the comparator and gate drive, the measured  
peak inductor current will be higher than the trimmed value. The additional offset on the maximum peak current is proportional to  
the inductor current rising slope: VIN / L, approximately. For a typical inductor, the inductance will reduce at hot temperature.  
Therefore, IPEAK-MAX is the highest with 5.5 V input voltage at hot temperature.  
In the constant peak current operation mode, the switching frequency will increase with the increased load current, until the high  
side switch off time equals the minimum off-time (TOFF-MIN) limit. If the load keeps increasing when the switch operates with TOFF-  
MIN, VOUT will drop out of regulation due to loading limits of buck-boost type of converters. The maximum loading capability is higher  
with higher VIN, larger L, lower VOUT, and less losses in the converter. Figure 5 shows the measured maximum load current mea-  
sured with the typical BOM shown in Table 1. To increase the maximum loading capability with given VIN and VOUT, one can choose  
a higher inductance value and a diode with lower forward voltage drop VF.  
10  
Copyright © 1999-2012, Texas Instruments Incorporated  
 
LMR70503  
250  
200  
150  
100  
50  
VOUT = -5V  
VOUT = -3.3V  
VOUT = -2.5V  
VOUT = -1.5V  
VOUT = -0.9V  
0
2.8 3.2 3.6 4.0 4.4 4.8 5.2  
VIN (V)  
30184971  
FIGURE 5. LMR70503 Loading Capability vs. VIN, L = 6.8 µH  
The built-in TOFF-MIN time is a function of both VIN and VOUT, as shown in Figure 6.  
900  
800  
700  
600  
500  
400  
300  
VOUT = -0.9V  
200  
100  
0
VOUT = -1.5V  
VOUT = -2.5V  
VOUT = -3.3V  
VOUT = -5.0V  
2.8 3.2 3.6 4.0 4.4 4.8 5.2  
VIN (V)  
30184974  
FIGURE 6. Minimum Off Time vs. VIN at room temperature  
Enable And UVLO  
The LMR70503 features an enable (EN) pin and associated comparator to allow the user to easily sequence the LMR70503 from  
an external voltage rail, or to manually set the input UVLO threshold. Enable threshold levels are referred to the LMR70503 ground,  
instead of the lowest potential: the negative output voltage. Enable turning on (rising) and turning off (falling) thresholds are shown  
in Figure 7.  
Copyright © 1999-2012, Texas Instruments Incorporated  
11  
 
 
LMR70503  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
Rising TH -40°C  
Falling TH -40°C  
Rising TH 25°C  
Falling TH 25°C  
Rising TH 125°C  
Falling TH 125°C  
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
30184988  
FIGURE 7. Enable Rising And Falling Thresholds vs. VIN  
It is important to ensure that a valid input voltage (2.8 V VIN5.5 V) is present on the VIN pin before the EN input is asserted.  
Also, as stated in the Absolute Maximum Ratings section of this data sheet, the voltage on the EN pin must always be less than  
VIN. This applies to both static and dynamic operation, and during start up and shut down sequences. If these precautions are not  
followed, an internal test mode may be activated; possibly damaging the regulator. The EN input must not be left floating. A resistor  
divider can be added from VIN to EN if an external enable signal is not available.  
An input under voltage lock-out (UVLO) circuit prevents the regulator from turning on when the input voltage is not great enough  
to properly bias the internal circuitry. The typical UVLO rising threshold is 2.55 V and typical hysteresis band is 0.13 V.  
Soft Start And Soft Off  
The LMR70503 begins to operate when EN goes high with the presence of valid VIN, or VIN swings below UVLO level and back up  
with the presence of valid EN voltage. The soft start action is inherent with the maximum peak current limit and minimum off time.  
During start up, the inductor current rises to the maximum peak current limit, then the high-side switch is turned off for TOFF-MIN and  
the output capacitor(s) is charged during this time. Then the high-side turns on to repeat the cycle. After the output voltage is  
charged to the regulation level, the LMR70503 will operate in steady state. The soft start time will be longer with more output  
capacitance, and / or lower supply voltage VIN, and / or more loading during start up. Figure 8 shows soft start vs VIN with L= 6.8  
µH and no load. Soft-start is reset any time the part is shut down or a thermal shutdown event occurs.  
800  
Vout = -5.0V  
Vout = -3.3V  
700  
600  
500  
400  
300  
200  
100  
0
Vout = -2.5V  
Vout = -1.5V  
Vout = -0.9V  
2.5  
3.0  
3.5  
4.0  
VIN (V)  
4.5  
5.0  
5.5  
30184986  
FIGURE 8. Soft Start Time (No Load) vs. VIN  
The LMR70503 will shutdown when EN pin voltage goes below the falling threshold, or VIN goes below UVLO falling threshold.  
When shutdown, the LMR70503 incorporates an output voltage discharge feature to bring the output voltage to zero volts, regard-  
less of the load current. When the EN input is taken below its lower threshold, an internal MOSFET turns on and discharges the  
output capacitors. Typical soft off times (from EN falling edge to 10% of Vout ) over VIN and temperature are shown in Figure 9.  
Figure 10 shows the typical off time from 90% to 10% of Vout.  
12  
Copyright © 1999-2012, Texas Instruments Incorporated  
 
 
LMR70503  
800  
700  
600  
500  
400  
300  
VIN = 2.8 V  
VIN = 3.0 V  
VIN = 4.0 V  
VIN = 5.0 V  
0
10 20 30 40 50 60 70 80 90  
TEMP (°C)  
30184930  
FIGURE 9. Soft Off Time (EN Falling Edge To 10% Vout) vs. Temperature, VOUT = -5.5 V, No Load  
800  
700  
600  
500  
400  
VIN = 2.8 V  
VIN = 4.0 V  
VIN = 5.0 V  
300  
0
10 20 30 40 50 60 70 80 90  
TEMPERATURE (°C)  
30184931  
FIGURE 10. Soft Off Time (90% To 10% Vout) vs. Temperature, VOUT = -5.5 V, No Load  
Short Circuit Protection  
Peak current mode control has inherent short circuit protection. The protection level is the maximum inductor current limit level. It  
varies with VIN and temperature due to propagation delays. The minimum off-time limits the current going through the inductor  
during a short circuit condition.  
Over-Temperature Protection  
Internal thermal shutdown (TSD) circuitry protects the LMR70503 should the maximum junction temperature be exceeded. This  
protection is activated at 165 °C (typical), with the result that the regulator will shutdown until the junction temperature drops below  
155 °C (typical). Of course the LMR70503 must not be operated continuously above 125 °C.  
Design Guide  
Output Voltage Setting  
The output voltage of the LMR70503 is programmable by the voltage divider resistors. The reference voltage is typically 1.19 V.  
To avoid overloading the VREF circuity, the resistor RT tied between VREF and FB is recommended to be between 20 kand 100  
k. With a selected RT, RB tied between VOUT and FB can be found by  
RB = RT * |VOUT| / VREF  
A feed-forward capacitor CFF can be used between VOUT and FB nodes to improve transient performance. 10 pF C0G, NP0 type  
of capacitor is recommended in LMR70503 applications.  
Copyright © 1999-2012, Texas Instruments Incorporated  
13  
 
 
LMR70503  
Input Capacitor And Output Capacitor Selection  
The input capacitor selection is based on both input voltage ripple and RMS current. Good quality input capacitors are necessary  
to limit the ripple voltage at the VIN pin while supplying most of the regulator current during switch on-time. Low ESR ceramic  
capacitors are preferred. A minimum value of 10μF at 6.3 V, is required at the input of the LMR70503. Larger values of input  
capacitance are desirable to reduce voltage ripple and noise on the input supply.  
The output capacitor is responsible for filtering the output voltage and suppling load current during transients and during the power  
diode off-time. Best performance is achieved with ceramic capacitors. For most applications, a minimum value of 22 μF, 6.3 V  
capacitor is required at the output of the LMR70503. The percentage of ripple coupled to the FB node can be found by  
RIPPLE PERCENTAGE = VREF / ( |VOUT| + VREF  
)
where |VOUT| is the magnitude of the output voltage and VREF is the reference voltage. With lower magnitude VOUT, a higher  
percentage of output voltage ripple is coupled to the FB node. Output voltage ripple is also coupled to the FB node via the feed-  
forward capacitor CFF. Excessive ripple at the FB node may trigger peak current limit modulation causing unstable operation. Higher  
output capacitance is needed at lower magnitude output voltage. For VOUT = -0.9 V, a minimum of 44 μF, 6.3 V capacitor is required.  
Avoid using too much capacitance at CFF  
.
A capacitor between VIN and VOUT also can be used to provide high frequency bypass. This capacitor is equivalent to the output  
capacitors in the small signal model. It also reduces the output voltage ripple if sufficiency capacitance is used. The voltage rating  
for this capacitor should be higher than VIN + |VOUT|.  
All ceramic capacitors have large voltage coefficients, in addition to normal tolerances and temperature coefficients. To help mitigate  
these effects, multiple capacitors can be used in parallel to bring the minimum capacitance up to the desired value. This may also  
help with RMS current constraints by sharing the current among several capacitors. With the LMR70503, ceramic capacitors rated  
at 6.3 V, or higher, are suitable for all input and output voltage combinations. Many times it is desirable to use an electrolytic  
capacitor on the input, in parallel with the ceramics. The moderate ESR of this capacitor can help to damp any ringing on the input  
supply caused by long power leads. This method can also help to reduce voltage spikes that may exceed the maximum input  
voltage rating of the LMR70503.  
Power Inductor Selection  
The power inductor selection is critical to the operation of the LMR70503. It affects the efficiency, the operation mode transition  
point, the maximum loading capability and the size / cost of the solution. A 4.7 μH or 6.8 μH inductor is recommended for most  
LMR70503 applications. The maximum loading capability is reduced with smaller inductance value. The no load VOUT offset is  
higher at low VOUT with smaller inductance value, due to higher peak current with the same TON-MIN. Higher inductance value  
usually comes with higher DCR with the same size and cost. Higher DCR will reduce the efficiency especially at heavy load.  
The inductor must be rated above the maximum peak current limit to prevent saturation. Good design practice requires that the  
inductor rating be adequate for the maximum IPEAK-MAX over VIN and temperature, plus some safety margin. If the inductor is not  
rated for the maximum expected current, saturation at high current may cause damage to the LMR70503 and/or the power diode.  
The DCR of the inductor should be as small as possible with given size / cost constrains to achieve optimal efficiency.  
Power Diode Selection  
A Schottky type power diode is required for all LMR70503 applications. The parameters of interests include the reverse voltage  
rating, the DC current rating, the repetitive peak current rating, the forward voltage drop, the reverse leakage current and the  
parasitic capacitance. In a buck-boost, this diode sees a reverse voltage of :  
VR-DIODE = |VOUT| + VIN  
The reverse breakdown voltage rating of the diode should be selected for this value, plus safety margin. A good rule of thumb is  
to select a diode with a reverse voltage rating of 1.3 times this maximum. Select a diode with a DC current rating at least equal to  
the maximum load current that will be seen in the application and the repetitive peak current rating higher than IPEAK-MAX over VIN  
and temperature. The forward voltage drop of the power diode is a big part of the power loss in a buck-boost converter. It is preferred  
to be as low as possible. The reverse leakage current and the parasitic capacitance are also part of the power losses in the converter,  
but usually less pronounced than the forward voltage drop loss. Pay attention to the temperature coefficients of all the parameters.  
Some of them may vary greatly over temperature and may adversely affect the efficiency over temperature.  
PC Board Layout Guidelines  
Board layout is critical for the proper operation of switching power converters. Switch mode converters are very fast switching  
devices. In such cases, the rapid increase of current combined with the parasitic trace inductance generates unwanted L·di/dt noise  
spikes. The magnitude of this noise tends to increase as the output current increases. This noise may turn into electromagnetic  
interference (EMI) and can also cause problems in device performance. Therefore, care must be taken in layout to minimize the  
effect of this switching noise. The most important layout rule is to keep the AC current loops as small as possible.  
Figure 1 shows the current flow in a buck-boost converter. The two dotted arrows indicate the current paths when the high side  
switch is on and when the power diode is on, respectively. The components and traces that contain discontinuous currents are  
critical in PCB layout design, since discontinuous currents contain high di/dt and high frequency noise. The components that carry  
critical discontinuous currents include the input capacitor(s), the high side switch, the power diode and the output capacitor(s).  
These components need to be placed as close as possible to each other and the traces between them must be made as short and  
wide as possible: place the input capacitor(s) as close as possible to the VIN pin of the LMR70503; place the cathode of the diode  
as close as possible to the SW pin; the anode of the diode should be as close as possible to the output capacitor(s); the GND end  
of the output capacitor(s) should be as close as possible to that of the input capacitor(s). Doing so will yield a small loop area,  
reducing the loop inductance and EMI.  
14  
Copyright © 1999-2012, Texas Instruments Incorporated  
LMR70503  
The feedback resistors RB and RT should be placed as close as possible to the FB pin. Since FB is a high impedance node, noise  
is likely be coupled to the FB node if the trace is long. The traces from VOUT to the resistor divider and from the divider to the FB  
pin should be far away from the discontinuous current path. It is recommended to use 4-layer board with ground plane as an internal  
layer, route the discontinuous current path on the top layer and the feedback path on the other side of the ground plane. Then the  
feedback path will be shielded from switching noise.  
To avoid functional problems due to layout, review the PCB layout example in . It is also recommended to use 1oz copper boards  
or heavier to help reducing the parasitic inductances of board traces.  
PCB Layout Example  
30184946  
FIGURE 11. PCB Layout Example (top layer and top overlay)  
Copyright © 1999-2012, Texas Instruments Incorporated  
15  
 
LMR70503  
LMR70503 Typical Application Circuit  
30184945  
LMR70503 Application Circuit Bill of Materials  
VIN = 2.8 V to 5.5 V, VOUT has options of -0.9 V, -1.5 V, -2.5 V, -3.3 V and -5.0 V. Optimized for minimum solution size.  
TABLE 1. Bill of Materials  
Designator  
Description  
Case Size  
Manufacturer  
Manufacturer P/N  
U1  
Inverting Buck-Boost  
8-bump thin micro SMD Texas Instruments  
LMR70503TM NOPB  
Ceramic 10 µF 10 V X5R  
0603  
CIN  
0603  
0603  
0402  
TDK  
C1608X5R1A106M  
C1608X5R0J226M  
Ceramic 22 µF 6.3 V X5R  
0603  
COUT1, COUT2  
Cff  
TDK  
CAP CER 10PF 50V 5%  
NP0 0402  
Murata  
GRM1555C1H100JZ01D  
D
L
Schottky 30 V 500 mA  
SOD882  
NXP Semi  
TDK  
PMEG3005EL  
2.0*2.0*1.2mm  
VLS2012ET-6R8M  
6.8 µH, 0.76 A 362 mΩ  
RES, 100k ohm, 1%,  
0.063W, 0402  
RT  
0402  
Vishay Dale  
CRCW0402100KFKED  
0402  
0402  
0402  
0402  
0402  
Vishay Dale  
Vishay Dale  
Vishay Dale  
Vishay Dale  
Vishay Dale  
CRCW0402422KFKED  
CRCW0402274KFKED  
CRCW0402210KFKED  
CRCW0402127KFKED  
CRCW040275K0FKED  
422 kFor Vout = -5.0V  
274 kFor Vout = -3.3V  
210 kFor Vout = -2.5V  
127 kFor Vout = -1.5V  
75 kFor Vout = -0.9V  
RB*  
RES, 20k ohm, 5%,  
0.063W, 0402  
REN1, REN2  
0402  
Vishay Dale  
CRCW040220K0JNED  
* RB is represented by R1 in Figure 11.  
16  
Copyright © 1999-2012, Texas Instruments Incorporated  
 
LMR70503  
Physical Dimensions inches (millimeters) unless otherwise noted  
8-Bump Thin Micro SMD Package  
Package Number TMP08BAA  
X1 = 0.84 ± 0.03 mm, X2 = 1.615 ± 0.03 mm, X3 = 0.6 ± 0.075 mm  
Copyright © 1999-2012, Texas Instruments Incorporated  
17  
Notes  
Copyright © 1999-2012, Texas Instruments  
Incorporated  
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