LMV431BIMF/NOPB [TI]

Low-Voltage (1.24V) Adjustable Precision Shunt Regulators; 低电压( 1.24V )可调式精密并联稳压器
LMV431BIMF/NOPB
型号: LMV431BIMF/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Low-Voltage (1.24V) Adjustable Precision Shunt Regulators
低电压( 1.24V )可调式精密并联稳压器

稳压器 光电二极管 输出元件
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LMV431, LMV431A, LMV431B  
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SNVS041F MAY 2004REVISED MAY 2005  
LMV431/LMV431A/LMV431B Low-Voltage (1.24V) Adjustable Precision Shunt Regulators  
Check for Samples: LMV431, LMV431A, LMV431B  
1
FEATURES  
DESCRIPTION  
The LMV431, LMV431A and LMV431B are precision  
1.24V shunt regulators capable of adjustment to 30V.  
Negative feedback from the cathode to the adjust pin  
controls the cathode voltage, much like a non-  
inverting op amp configuration (Refer to Symbol and  
Functional diagrams). A two resistor voltage divider  
terminated at the adjust pin controls the gain of a  
1.24V band-gap reference. Shorting the cathode to  
the adjust pin (voltage follower) provides a cathode  
voltage of a 1.24V.  
2
Low Voltage Operation/Wide Adjust Range  
(1.24V/30V)  
0.5% Initial Tolerance (LMV431B)  
Temperature Compensated for Industrial  
Temperature Range (39 PPM/°C for the  
LMV431AI)  
Low Operation Current (55µA)  
Low Output Impedance (0.25)  
Fast Turn-On Response  
Low Cost  
The LMV431, LMV431A and LMV431B have  
respective initial tolerances of 1.5%, 1% and 0.5%,  
and functionally lends themselves to several  
applications that require zener diode type  
performance at low voltages. Applications include a  
3V to 2.7V low drop-out regulator, an error amplifier  
in a 3V off-line switching regulator and even as a  
voltage detector. These parts are typically stable with  
capacitive loads greater than 10nF and less than  
50pF.  
APPLICATIONS  
Shunt Regulator  
Series Regulator  
Current Source or Sink  
Voltage Monitor  
Error Amplifier  
The LMV431, LMV431A and LMV431B provide  
performance at a competitive price.  
3V Off-Line Switching Regulator  
Low Dropout N-Channel Series Regulator  
Connection Diagram  
*Pin 1 is not internally connected.  
*Pin 2 is internally connected to Anode pin. Pin 2 should be either  
floating or connected to Anode pin.  
Figure 1. TO-92: Plastic Package  
Top View  
Figure 2. SOT-23-5  
Top View  
ANODE  
REF  
CATHODE  
Figure 3. SOT-23-3  
Top View  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2005, Texas Instruments Incorporated  
LMV431, LMV431A, LMV431B  
SNVS041F MAY 2004REVISED MAY 2005  
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Symbol and Functional Diagrams  
Simplified Schematic  
DC/AC Test Circuits for Table and Curves  
Note: VZ = VREF (1 + R1/R2) + IREF• R1  
Figure 4. Test Circuit for VZ = VREF  
Figure 5. Test Circuit for VZ > VREF  
2
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Figure 6. Test Circuit for Off-State Current  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
(1)(2)  
ABSOLUTE MAXIMUM RATINGS  
Storage Temperature Range  
65°C to +150°C  
40°C to +85°C  
0°C to +70°C  
265°C  
Operating Temperature Range  
Industrial (LMV431AI, LMV431I)  
Commercial (LMV431AC, LMV431C, LMV431BC)  
TO-92 Package/SOT-23 -5,-3 Package (Soldering, 10 sec.)  
TO-92  
Lead Temperature  
0.78W  
(3)  
Internal Power Dissipation  
SOT-23-5, -3 Package  
0.28W  
Cathode Voltage  
35V  
Continuous Cathode Current  
Reference Input Current range  
30 mA to +30mA  
.05mA to 3mA  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when  
operating the device beyond its rated operating conditions.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) Ratings apply to ambient temperature at 25°C. Above this temperature, derate the TO-92 at 6.2 mW/°C, and the SOT-23-5 at 2.2  
mW/°C. See derating curve in Operating Condition section..  
OPERATING CONDITIONS  
Cathode Voltage  
VREF to 30V  
0.1 mA to 15mA  
40°C TA 85°C  
455 °C/W  
Cathode Current  
Temperature range  
Thermal Resistance (θJA  
LMV431AI  
(1)  
)
SOT-23-5, -3 Package  
TO-92 Package  
161 °C/W  
Derating Curve (Slope = 1/θJA  
)
(1) TJ Max = 150°C, TJ = TA+ (θJA PD), where PD is the operating power of the device.  
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SNVS041F MAY 2004REVISED MAY 2005  
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LMV431C ELECTRICAL CHARACTERISTICS  
TA = 25°C unless otherwise specified  
Symbol  
Parameter  
Reference Voltage  
Conditions  
Min  
Typ  
Max  
Unit  
s
VREF  
VZ = VREF, IZ = 10mA  
(See Figure 4 )  
TA = 25°C  
1.222  
1.21  
1.24  
1.258  
1.27  
12  
TA = Full Range  
V
VDEV  
Deviation of Reference Input Voltage Over VZ = VREF, IZ = 10mA,  
4
mV  
(1)  
Temperature  
TA = Full Range (See Figure 4)  
ΔVREF  
ΔVZ  
/
Ratio of the Change in Reference Voltage  
to the Change in Cathode Voltage  
IZ = 10mA (see Figure 5 )  
VZ from VREF to 6V  
1.5  
2.7  
mV/  
V
R1 = 10k, R2 = and 2.6k  
IREF  
Reference Input Current  
R1 = 10kΩ, R2 = ∞  
II = 10mA (see Figure 5)  
0.15  
0.5  
0.3  
μA  
IREF  
Deviation of Reference Input Current over  
Temperature  
R1 = 10kΩ, R2 = ,  
II = 10mA, TA = Full Range (see Figure 5)  
0.05  
μA  
IZ(MIN)  
IZ(OFF)  
rZ  
Minimum Cathode Current for Regulation  
Off-State Current  
VZ = VREF(see Figure 4)  
55  
80  
µA  
VZ=6V, VREF = 0V (see Figure 6 )  
0.001  
0.1  
μA  
(2)  
Dynamic Output Impedance  
VZ = VREF, IZ = 0.1mA to 15mA  
Frequency = 0Hz (see Figure 4)  
0.25  
0.4  
Ω
(1) Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature  
range.See following:  
The average temperature coefficient of the reference input voltage, VREF, is defined as:  
Where:T2 T1 = full temperature change.VREF can be positive or negative depending  
on whether the slope is positive or negative.Example: VDEV = 6.0mV, REF = 1240mV, T2 T1 = 125°C.  
(2) The dynamic output impedance, rZ, is defined as:  
When the device is programmed with two external resistors, R1 and R2, (see  
Figure 5 ), the dynamic output impedance of the overall circuit, rZ, is defined as:  
4
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LMV431I ELECTRICAL CHARACTERISTICS  
TA = 25°C unless otherwise specified  
Symbol  
Parameter  
Reference Voltage  
Conditions  
Min  
Typ  
Max  
Unit  
s
VREF  
VZ = VREF, IZ = 10mA  
(See Figure 4 )  
TA = 25°C  
1.222  
1.202  
1.24  
1.258  
1.278  
20  
V
TA = Full Range  
VDEV  
Deviation of Reference Input Voltage Over VZ = VREF, IZ = 10mA,  
6
mV  
(1)  
Temperature  
TA = Full Range (See Figure 4)  
ΔVREF  
ΔVZ  
/
Ratio of the Change in Reference Voltage  
to the Change in Cathode Voltage  
IZ = 10mA (see Figure 5 )  
VZ from VREF to 6V  
1.5  
2.7  
mV/  
V
R1 = 10k, R2 = and 2.6k  
IREF  
Reference Input Current  
R1 = 10kΩ, R2 = ∞  
II = 10mA (see Figure 5)  
0.15  
0.5  
0.4  
μA  
IREF  
Deviation of Reference Input Current over  
Temperature  
R1 = 10kΩ, R2 = ,  
II = 10mA, TA = Full Range (see Figure 5)  
0.1  
μA  
IZ(MIN)  
IZ(OFF)  
rZ  
Minimum Cathode Current for Regulation  
Off-State Current  
VZ = VREF(see Figure 4)  
55  
80  
µA  
VZ = 6V, VREF = 0V (see Figure 6 )  
0.001  
0.1  
μA  
(2)  
Dynamic Output Impedance  
VZ = VREF, IZ = 0.1mA to 15mA  
Frequency = 0Hz (see Figure 4)  
0.25  
0.4  
Ω
(1) Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature  
range.See following:  
The average temperature coefficient of the reference input voltage, VREF, is defined as:  
Where:T2 T1 = full temperature change.VREF can be positive or negative depending  
on whether the slope is positive or negative.Example: VDEV = 6.0mV, REF = 1240mV, T2 T1 = 125°C.  
(2) The dynamic output impedance, rZ, is defined as:  
When the device is programmed with two external resistors, R1 and R2, (see  
Figure 5 ), the dynamic output impedance of the overall circuit, rZ, is defined as:  
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LMV431AC ELECTRICAL CHARACTERISTICS  
TA = 25°C unless otherwise specified  
Symbol  
Parameter  
Reference Voltage  
Conditions  
Min  
Typ  
Max  
Unit  
s
VREF  
VZ = VREF, IZ = 10 mA  
(See Figure 4 )  
TA = 25°C  
1.228  
1.221  
1.24  
1.252  
1.259  
12  
V
TA = Full Range  
VDEV  
Deviation of Reference Input Voltage Over VZ = VREF, IZ = 10mA,  
4
mV  
(1)  
Temperature  
TA = Full Range (See Figure 4)  
ΔVREF  
ΔVZ  
/
Ratio of the Change in Reference Voltage  
to the Change in Cathode Voltage  
IZ = 10 mA (see Figure 5 )  
VZ from VREF to 6V  
1.5  
2.7  
mV/  
V
R1 = 10k, R2 = and 2.6k  
IREF  
Reference Input Current  
R1 = 1 kΩ, R2 = ∞  
II = 10 mA (see Figure 5)  
0.15  
0.50  
0.3  
μA  
IREF  
Deviation of Reference Input Current over  
Temperature  
R1 = 10 kΩ, R2 = ,  
II = 10 mA, TA = Full Range (see Figure 5)  
0.05  
μA  
IZ(MIN)  
IZ(OFF)  
rZ  
Minimum Cathode Current for Regulation  
Off-State Current  
VZ = VREF(see Figure 4)  
55  
80  
µA  
VZ = 6V, VREF = 0V (see Figure 6 )  
0.001  
0.1  
μA  
(2)  
Dynamic Output Impedance  
VZ = VREF, IZ = 0.1mA to 15mA  
Frequency = 0 Hz (see Figure 4)  
0.25  
0.4  
Ω
(1) Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature  
range.See following:  
The average temperature coefficient of the reference input voltage, VREF, is defined as:  
Where:T2 T1 = full temperature change.VREF can be positive or negative depending  
on whether the slope is positive or negative.Example: VDEV = 6.0mV, REF = 1240mV, T2 T1 = 125°C.  
(2) The dynamic output impedance, rZ, is defined as:  
When the device is programmed with two external resistors, R1 and R2, (see  
Figure 5 ), the dynamic output impedance of the overall circuit, rZ, is defined as:  
6
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LMV431AI ELECTRICAL CHARACTERISTICS  
TA = 25°C unless otherwise specified  
Symbol  
Parameter  
Reference Voltage  
Conditions  
Min  
Typ  
Max  
Unit  
s
VREF  
VZ = VREF, IZ = 10mA  
(See Figure 4 )  
TA = 25°C  
1.228  
1.215  
1.24  
1.252  
1.265  
20  
TA = Full Range  
V
VDEV  
Deviation of Reference Input Voltage Over VZ = VREF, IZ = 10mA,  
6
mV  
(1)  
Temperature  
TA = Full Range (See Figure 4)  
ΔVREF  
ΔVZ  
/
Ratio of the Change in Reference Voltage  
to the Change in Cathode Voltage  
IZ = 10mA (see Figure 5 )  
VZ from VREF to 6V  
1.5  
2.7  
mV/  
V
R1 = 10k, R2 = and 2.6k  
IREF  
Reference Input Current  
R1 = 10kΩ, R2 = ∞  
II = 10mA (see Figure 5)  
0.15  
0.5  
0.4  
μA  
IREF  
Deviation of Reference Input Current over  
Temperature  
R1 = 10kΩ, R2 = ,  
II = 10mA, TA = Full Range (see Figure 5)  
0.1  
μA  
IZ(MIN)  
IZ(OFF)  
rZ  
Minimum Cathode Current for Regulation  
Off-State Current  
VZ = VREF(see Figure 4)  
55  
80  
µA  
VZ = 6V, VREF = 0V (see Figure 6 )  
0.001  
0.1  
μA  
(2)  
Dynamic Output Impedance  
VZ = VREF, IZ = 0.1mA to 15mA  
Frequency = 0Hz (see Figure 4)  
0.25  
0.4  
Ω
(1) Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature  
range.See following:  
The average temperature coefficient of the reference input voltage, VREF, is defined as:  
Where:T2 T1 = full temperature change.VREF can be positive or negative depending  
on whether the slope is positive or negative.Example: VDEV = 6.0mV, REF = 1240mV, T2 T1 = 125°C.  
(2) The dynamic output impedance, rZ, is defined as:  
When the device is programmed with two external resistors, R1 and R2, (see  
Figure 5 ), the dynamic output impedance of the overall circuit, rZ, is defined as:  
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LMV431BC ELECTRICAL CHARACTERISTICS  
TA = 25°C unless otherwise specified  
Symbol  
Parameter  
Reference Voltage  
Conditions  
Min  
Typ  
Max  
Unit  
s
VREF  
VZ = VREF, IZ = 10mA  
(See Figure 4 )  
TA = 25°C  
1.234  
1.227  
1.24  
1.246  
1.253  
12  
TA = Full Range  
V
VDEV  
Deviation of Reference Input Voltage Over VZ = VREF, IZ = 10mA,  
4
mV  
(1)  
Temperature  
TA = Full Range (See Figure 4)  
ΔVREF  
ΔVZ  
/
Ratio of the Change in Reference Voltage  
to the Change in Cathode Voltage  
IZ = 10mA (see Figure 5 )  
VZ from VREF to 6V  
1.5  
2.7  
mV/  
V
R1 = 10k, R2 = and 2.6k  
IREF  
Reference Input Current  
R1 = 10kΩ, R2 = ∞  
II = 10mA (see Figure 5)  
0.15  
0.50  
0.3  
μA  
IREF  
Deviation of Reference Input Current over  
Temperature  
R1 = 10kΩ, R2 = ,  
II = 10mA, TA = Full Range (see Figure 5)  
0.05  
μA  
IZ(MIN)  
IZ(OFF)  
rZ  
Minimum Cathode Current for Regulation  
Off-State Current  
VZ = VREF(see Figure 4)  
55  
80  
µA  
VZ = 6V, VREF = 0V (see Figure 6 )  
0.001  
0.1  
μA  
(2)  
Dynamic Output Impedance  
VZ = VREF, IZ = 0.1mA to 15mA  
Frequency = 0Hz (see Figure 4)  
0.25  
0.4  
Ω
(1) Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature  
range.See following:  
The average temperature coefficient of the reference input voltage, VREF, is defined as:  
Where:T2 T1 = full temperature change.VREF can be positive or negative depending  
on whether the slope is positive or negative.Example: VDEV = 6.0mV, REF = 1240mV, T2 T1 = 125°C.  
(2) The dynamic output impedance, rZ, is defined as:  
When the device is programmed with two external resistors, R1 and R2, (see  
Figure 5 ), the dynamic output impedance of the overall circuit, rZ, is defined as:  
8
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LMV431BI ELECTRICAL CHARACTERISTICS  
TA = 25°C unless otherwise specified  
Symbol  
Parameter  
Reference Voltage  
Conditions  
Min  
Typ  
Max  
Unit  
s
VREF  
VZ = VREF, IZ = 10mA  
(See Figure 4 )  
TA = 25°C  
1.234  
1.224  
1.24  
1.246  
1.259  
20  
TA = Full Range  
V
VDEV  
Deviation of Reference Input Voltage Over VZ = VREF, IZ = 10mA,  
6
mV  
(1)  
Temperature  
TA = Full Range (See Figure 4)  
ΔVREF  
ΔVZ  
/
Ratio of the Change in Reference Voltage  
to the Change in Cathode Voltage  
IZ = 10mA (see Figure 5 )  
VZ from VREF to 6V  
1.5  
2.7  
mV/  
V
R1 = 10k, R2 = and 2.6k  
IREF  
Reference Input Current  
R1 = 10kΩ, R2 = ∞  
II = 10mA (see Figure 5)  
0.15  
0.50  
0.4  
μA  
IREF  
Deviation of Reference Input Current over  
Temperature  
R1 = 10kΩ, R2 = ,  
II = 10mA, TA = Full Range (see Figure 5)  
0.1  
μA  
IZ(MIN)  
IZ(OFF)  
rZ  
Minimum Cathode Current for Regulation  
Off-State Current  
VZ = VREF(see Figure 4)  
55  
80  
µA  
VZ = 6V, VREF = 0V (see Figure 6 )  
0.001  
0.1  
μA  
(2)  
Dynamic Output Impedance  
VZ = VREF, IZ = 0.1mA to 15mA  
Frequency = 0Hz (see Figure 4)  
0.25  
0.4  
Ω
(1) Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature  
range.See following:  
The average temperature coefficient of the reference input voltage, VREF, is defined as:  
Where:T2 T1 = full temperature change.VREF can be positive or negative depending  
on whether the slope is positive or negative.Example: VDEV = 6.0mV, REF = 1240mV, T2 T1 = 125°C.  
(2) The dynamic output impedance, rZ, is defined as:  
When the device is programmed with two external resistors, R1 and R2, (see  
Figure 5 ), the dynamic output impedance of the overall circuit, rZ, is defined as:  
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TYPICAL PERFORMANCE CHARACTERISTICS  
Reference Voltage  
Reference Input Current  
vs.  
Junction Temperature  
vs.  
Junction Temperature  
Figure 7.  
Figure 8.  
Cathode Current  
vs.  
Cathode Voltage 1  
Cathode Current  
vs.  
Cathode Voltage 2  
Figure 9.  
Figure 10.  
Delta Reference Voltage Per  
Delta Cathode Voltage  
vs.  
Off-State Cathode Current vs.  
Junction Temperature  
Junction Temperature  
Figure 11.  
Figure 12.  
10  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Input Voltage Noise  
vs.  
Test Circuit for Input Voltage Noise  
vs.  
Frequency  
Frequency  
Figure 13.  
Figure 14.  
Low Frequency Peak to Peak Noise  
Test Circuit for Peak to Peak Noise (BW= 0.1Hz to 10Hz)  
Figure 15.  
Figure 16.  
Small Signal Voltage Gain and Phase Shift  
Test Circuit For Voltage Gain and Phase Shift  
vs.  
vs.  
Frequency  
Frequency  
Figure 17.  
Figure 18.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Reference Impedance  
Test Circuit for Reference Impedance  
vs.  
vs.  
Frequency  
Frequency  
Figure 19.  
Figure 20.  
Pulse Response 1  
Test Circuit for Pulse Response 1  
Figure 21.  
Figure 22.  
Pulse Response 2  
Test Circuit for Pulse Response 2  
Figure 23.  
Figure 24.  
12  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
LMV431 Stability Boundary Condition  
Test circuit for VZ = VREF  
150W  
15  
V
Z
T
= 25°C  
A
I
= 15mA  
Z
12  
I
Z
STABLE  
STABLE  
9
6
3
0
UNSTABLE  
REGION  
+
-
V =2V  
Z
C
L
V
SUPPLY  
V =3V  
Z
FOR V = V  
Z
TO 10k nF  
, STABLE FOR C = 1pF  
L
REF  
0.001 0.01 0.1  
1
10  
10k  
100  
1k  
LOAD CAPACITANCE C (nF)  
L
Figure 25.  
Figure 26.  
Percentage Change in VREF vs. Operating Life at 55°C  
Test Circuit for VZ = 2V, 3V  
150W  
V
Z
I
Z
R
1
10kW  
+
-
C
L
V
SUPPLY  
R
2
Extrapolated from life-test data taken at 125°C; the activation energy  
assumed is 0.7eV.  
Figure 27.  
Figure 28.  
Copyright © 2004–2005, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
Product Folder Links: LMV431 LMV431A LMV431B  
LMV431, LMV431A, LMV431B  
SNVS041F MAY 2004REVISED MAY 2005  
www.ti.com  
TYPICAL APPLICATIONS  
Series Regulator  
Output Control of a Three Terminal Fixed Regulator  
Higher Current Shunt Regulator  
Crow Bar  
Over Voltage/Under VoltageProtection Circuit  
Voltage Monitor  
14  
Submit Documentation Feedback  
Copyright © 2004–2005, Texas Instruments Incorporated  
Product Folder Links: LMV431 LMV431A LMV431B  
LMV431, LMV431A, LMV431B  
www.ti.com  
SNVS041F MAY 2004REVISED MAY 2005  
Delay Timer  
Current Limiter or Current Source  
Constant Current Sink  
Copyright © 2004–2005, Texas Instruments Incorporated  
Submit Documentation Feedback  
15  
Product Folder Links: LMV431 LMV431A LMV431B  
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-May-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
LMV431ACM5  
ACTIVE  
SOT-23  
SOT-23  
DBV  
5
5
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
N09A  
N09A  
LMV431ACM5/NOPB  
ACTIVE  
DBV  
1000  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431ACM5X  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
3000  
3000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
N09A  
N09A  
LMV431ACM5X/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431AIM5  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
N08A  
N08A  
LMV431AIM5/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431AIM5X  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
3000  
3000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
N08A  
N08A  
LMV431AIM5X/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431AIMF  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBZ  
DBZ  
3
3
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
RLA  
RLA  
LMV431AIMF/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431AIMFX  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBZ  
DBZ  
3
3
3000  
3000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
RLA  
RLA  
LMV431AIMFX/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431AIZ/LFT3  
LMV431AIZ/NOPB  
ACTIVE  
ACTIVE  
TO-92  
TO-92  
LP  
LP  
3
3
2000  
1800  
Green (RoHS  
& no Sb/Br)  
SNCU  
SNCU  
Level-1-NA-UNLIM  
Level-1-NA-UNLIM  
LMV431  
AIZ  
Green (RoHS  
& no Sb/Br)  
-40 to 85  
LMV431  
AIZ  
LMV431BCM5  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
N09C  
LMV431BCM5/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
N09C  
LMV431BCM5X  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
3000  
3000  
TBD  
Call TI  
CU SN  
Call TI  
N09C  
N09C  
LMV431BCM5X/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-May-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
LMV431BIMF  
ACTIVE  
SOT-23  
SOT-23  
DBZ  
3
3
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
RLB  
RLB  
LMV431BIMF/NOPB  
ACTIVE  
DBZ  
1000  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431BIMFX  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBZ  
DBZ  
3
3
3000  
3000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
RLB  
RLB  
LMV431BIMFX/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431CM5  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
0 to 70  
0 to 70  
N09B  
N09B  
LMV431CM5/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431CM5X  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
3000  
3000  
TBD  
Call TI  
CU SN  
Call TI  
0 to 70  
0 to 70  
N09B  
N09B  
LMV431CM5X/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431CZ/NOPB  
ACTIVE  
TO-92  
LP  
3
1800  
Green (RoHS  
& no Sb/Br)  
SNCU  
Level-1-NA-UNLIM  
0 to 70  
LMV431  
CZ  
LMV431IM5  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
N08B  
LMV431IM5/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
N08B  
LMV431IM5X  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
3000  
3000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
N08B  
N08B  
LMV431IM5X/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMV431IZ/NOPB  
ACTIVE  
TO-92  
LP  
3
1800  
Green (RoHS  
& no Sb/Br)  
SNCU  
Level-1-NA-UNLIM  
-40 to 85  
LMV431  
IZ  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-May-2013  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Mar-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LMV431ACM5  
LMV431ACM5/NOPB  
LMV431ACM5X  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBZ  
DBZ  
DBZ  
DBZ  
DBV  
DBV  
DBV  
DBV  
DBZ  
DBZ  
5
5
5
5
5
5
5
5
3
3
3
3
5
5
5
5
3
3
1000  
1000  
3000  
3000  
1000  
1000  
3000  
3000  
1000  
1000  
3000  
3000  
1000  
1000  
3000  
3000  
1000  
1000  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.3  
3.3  
3.3  
3.3  
3.2  
3.2  
3.2  
3.2  
3.3  
3.3  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
2.9  
2.9  
2.9  
2.9  
3.2  
3.2  
3.2  
3.2  
2.9  
2.9  
1.4  
1.4  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
1.4  
LMV431ACM5X/NOPB SOT-23  
1.4  
LMV431AIM5  
LMV431AIM5/NOPB  
LMV431AIM5X  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
1.4  
1.4  
1.4  
LMV431AIM5X/NOPB  
LMV431AIMF  
1.4  
1.22  
1.22  
1.22  
1.22  
1.4  
LMV431AIMF/NOPB  
LMV431AIMFX  
LMV431AIMFX/NOPB  
LMV431BCM5  
LMV431BCM5/NOPB  
LMV431BCM5X  
1.4  
1.4  
LMV431BCM5X/NOPB SOT-23  
1.4  
LMV431BIMF  
SOT-23  
SOT-23  
1.22  
1.22  
LMV431BIMF/NOPB  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Mar-2013  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LMV431BIMFX  
LMV431BIMFX/NOPB  
LMV431CM5  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBZ  
DBZ  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
3
3
5
5
5
5
5
5
5
5
3000  
3000  
1000  
1000  
3000  
3000  
1000  
1000  
3000  
3000  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
3.3  
3.3  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
2.9  
2.9  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
1.22  
1.22  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
LMV431CM5/NOPB  
LMV431CM5X  
LMV431CM5X/NOPB  
LMV431IM5  
LMV431IM5/NOPB  
LMV431IM5X  
LMV431IM5X/NOPB  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LMV431ACM5  
LMV431ACM5/NOPB  
LMV431ACM5X  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
5
5
5
1000  
1000  
3000  
3000  
1000  
1000  
3000  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
LMV431ACM5X/NOPB  
LMV431AIM5  
LMV431AIM5/NOPB  
LMV431AIM5X  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Mar-2013  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LMV431AIM5X/NOPB  
LMV431AIMF  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBZ  
DBZ  
DBZ  
DBZ  
DBV  
DBV  
DBV  
DBV  
DBZ  
DBZ  
DBZ  
DBZ  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
5
3
3
3
3
5
5
5
5
3
3
3
3
5
5
5
5
5
5
5
5
3000  
1000  
1000  
3000  
3000  
1000  
1000  
3000  
3000  
1000  
1000  
3000  
3000  
1000  
1000  
3000  
3000  
1000  
1000  
3000  
3000  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
LMV431AIMF/NOPB  
LMV431AIMFX  
LMV431AIMFX/NOPB  
LMV431BCM5  
LMV431BCM5/NOPB  
LMV431BCM5X  
LMV431BCM5X/NOPB  
LMV431BIMF  
LMV431BIMF/NOPB  
LMV431BIMFX  
LMV431BIMFX/NOPB  
LMV431CM5  
LMV431CM5/NOPB  
LMV431CM5X  
LMV431CM5X/NOPB  
LMV431IM5  
LMV431IM5/NOPB  
LMV431IM5X  
LMV431IM5X/NOPB  
Pack Materials-Page 3  
IMPORTANT NOTICE  
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
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