LMV774MT/NOPB [TI]
四通道、低失调电压、低噪声、RRO 运算放大器 | PW | 14 | -40 to 125;
| 型号： | LMV774MT/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 四通道、低失调电压、低噪声、RRO 运算放大器 | PW | 14 | -40 to 125 放大器 光电二极管 运算放大器 |
| 文件： | 总38页 (文件大小：1284K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMV771, LMV772, LMV774
www.ti.com
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
LMV771/LMV772/LMV772Q/LMV774 Single/Dual/Quad, Low Offset, Low Noise, RRO
Operational Amplifiers
Check for Samples: LMV771, LMV772, LMV774
1
FEATURES
•
•
Temperature range −40°C to 125°C
LMV772Q is AEC-Q100 Grade 1 qualified and
is manufactured on Automotive grade flow
23
•
(Unless otherwise noted, typical values at VS =
2.7V)
•
•
•
•
•
•
•
•
•
•
•
•
Guaranteed 2.7V and 5V specifications
Maximum VOS (LMV771) 850μV (limit)
Voltage noise
APPLICATIONS
•
•
•
•
•
•
•
•
Transducer amplifier
Instrumentation amplifier
Precision current sensing
Data acquisition systems
Active filters and buffers
Sample and hold
f = 100 Hz 12.5nV/√Hz
f = 10 kHz 7.5nV/√Hz
Rail-to-Rail output swing
RL = 600Ω 100mV from rail
RL = 2kΩ 50mV from rail
Portable/battery powered electronics
Automotive
Open loop gain with RL = 2kΩ 100dB
VCM 0 to V+ −0.9V
Supply current (per amplifier) 550µA
Gain bandwidth product 3.5MHz
DESCRIPTION
The LMV771/LMV772/LMV772Q/LMV774 are Single, Dual, and Quad low noise precision operational amplifiers
intended for use in a wide range of applications. Other important characteristics of the family include: an
extended operating temperature range of −40°C to 125°C, the tiny SC70-5 package for the LMV771, and low
input bias current.
The extended temperature range of −40°C to 125°C allows the LMV771/LMV772/LMV772Q/LMV774 to
accommodate a broad range of applications. The LMV771 expands National Semiconductor’s Silicon Dust™
amplifier
portfolio
offering
enhancements
in
size,
speed,
and
power
savings.
The
LMV771/LMV772/LMV772Q/LMV774 are guaranteed to operate over the voltage range of 2.7V to 5.0V and all
have rail-to-rail output.
The LMV771/LMV772/LMV772Q/LMV774 family is designed for precision, low noise, low voltage, and miniature
systems. These amplifiers provide rail-to-rail output swing into heavy loads. The maximum input offset voltage for
the LMV771 is 850 μV at room temperature and the input common mode voltage range includes ground.
The LMV771 is offered in the tiny SC70-5 package, LMV772/LMV772Q in the space saving MSOP-8 and SOIC-
8, and the LMV774 in TSSOP-14.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
Silicon Dust is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2010, Texas Instruments Incorporated
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
www.ti.com
Connection Diagram
1
2
5
+
+IN
V
+
GND
-
3
4
V
OUT
-IN
Figure 1. SC70-5 (Top View)
Instrumentation Amplifier
V
1
V
R
+
-
KR
2
01
2
R
1
-
R
a
1
R
=
11
V
OUT
+
R
1
-
V
02
R
V
2
KR
2
2
+
V
O
= -K (2a + 1) (V - V )
1 2
(1)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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LMV771, LMV772, LMV774
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SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
(1)
Absolute Maximum Ratings
ESD Tolerance
(2)
Machine Model
200V
2000V
Human Body Model
Differential Input Voltage
Voltage at Input Pins
Current at Input Pins
± Supply Voltage
(V+) + 0.3V, (V–) – 0.3V
±10 mA
Supply Voltage (V+–V −
)
5.75V
Output Short Circuit to V+
(3)
(4)
Output Short Circuit to V−
Mounting Temperture
Infrared or Convection (20 sec)
Wave Soldering Lead Temp (10 sec)
Storage Temperature Range
235°C
260°C
−65°C to 150°C
150°C
(5)
Junction Temperature
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
(2) Human Body Model is 1.5 kΩ in series with 100 pF. Machine Model is 0Ω in series with 20 pF.
(3) Shorting output to V+ will adversely affect reliability.
(4) Shorting output to V− will adversely affect reliability.
(5) The maximum power dissipation is a function of TJ(MAX) , θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX)–T A) / θJA. All numbers apply for packages soldered directly into a PC board.
(1)
Operating Ratings
Supply Voltage
Temperature Range
Thermal Resistance (θJA
SC70-5 Package
8-Pin MSOP
2.7V to 5.5V
−40°C to 125°C
)
440 °C/W
235°C/W
190°C/W
155°C/W
8-Pin SOIC
14-Pin TSSOP
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
Copyright © 2004–2010, Texas Instruments Incorporated
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SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
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(1)
2.7V DC Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C. V+ = 2.7V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ.
Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
Parameter
Condition
Units
(2)
(3)
(2)
0.3
0.3
0.85
1.0
LMV771
VOS
Input Offset Voltage
mV
1.0
1.2
LMV772/LMV772Q/LMV774
VCM = 1V
TCVOS
IB
Input Offset Voltage Average Drift
−0.45
−0.1
µV/°C
pA
100
250
(4)
Input Bias Current
(4)
IOS
Input Offset Current
0.004
550
100
pA
900
910
IS
Supply Current (Per Amplifier)
Common Mode Rejection Ratio
Power Supply Rejection Ratio
µA
74
72
80
90
CMRR
0.5 ≤ VCM ≤ 1.2V
2.7V ≤ V+ ≤ 5V
dB
dB
82
76
PSSR
VCM
Input Common-Mode Voltage Range For CMRR ≥ 50dB
RL = 600Ω to 1.35V,
0
1.8
V
92
80
100
100
(6)
VO = 0.2V to 2.5V,
Large Signal Voltage Gain
AV
VO
IO
dB
(5)
RL = 2kΩ to 1.35V,
VO = 0.2V to 2.5V,
98
86
(7)
RL = 600Ω to 1.35V
0.11
0.14
0.084 to
2.62
2.59
2.56
(6)
VIN = ± 100mV,
Output Swing
V
RL = 2kΩ to 1.35V
0.05
0.06
0.026 to
2.68
2.65
2.64
(7)
VIN = ± 100mV,
Sourcing, VO = 0V
VIN = 100mV
18
11
24
Output Short Circuit Current
mA
Sinking, VO = 2.7V
18
22
VIN = −100mV
11
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) Limits guaranteed by design.
(5) RL is connected to mid-supply. The output voltage is set at 200mV from the rails. VO = GND + 0.2V and VO = V+ −0.2V
(6) For LMV772/LMV772Q/LMV774, temperature limits apply to −40°C to 85°C.
(7) For LMV772/LMV772Q/LMV774, temperature limits apply to −40°C to 85°C. If RL is relaxed to 10 kΩ, then for
LMV772/LMV772Q/LMV774 temperature limits apply to −40°C to 125°C.
4
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Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Links: LMV771 LMV772 LMV774
LMV771, LMV772, LMV774
www.ti.com
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
(1)
2.7V AC Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C. V+ = 5.0V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ.
Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
Parameter
Conditions
AV = +1, RL = 10 kΩ
Units
(2)
(3)
(2)
(4)
SR
Slew Rate
1.4
3.5
79
V/µs
MHz
Deg
dB
GBW
Φm
Gain-Bandwidth Product
Phase Margin
Gm
Gain Margin
−15
Input-Referred Voltage Noise
(Flatband)
en
f = 10kHz
7.5
nV/√Hz
en
in
Input-Referred Voltage Noise (l/f)
Input-Referred Current Noise
f = 100Hz
f = 1kHz
12.5
nV/√Hz
pA/√Hz
0.001
f = 1kHz, AV = +1
RL = 600Ω, VIN = 1 VPP
THD
Total Harmonic Distortion
0.007
%
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) The number specified is the slower of positive and negative slew rates.
Copyright © 2004–2010, Texas Instruments Incorporated
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(1)
5.0V DC Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C. V+ = 5.0V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ.
Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
Parameter
Condition
Units
(2)
(3)
(2)
0.25
0.25
0.85
1.0
LMV771
VOS
Input Offset Voltage
mV
1.0
1.2
LMV772/LMV772Q/LMV774
VCM = 1V
TCVOS
IB
Input Offset Voltage Average Drift
−0.35
−0.23
µV/°C
pA
100
250
(4)
Input Bias Current
(4)
IOS
Input Offset Current
0.017
600
100
pA
950
960
IS
Supply Current (Per Amplifier)
Common Mode Rejection Ratio
Power Supply Rejection Ratio
µA
80
79
90
90
CMRR
0.5 ≤ VCM ≤ 3.5V
2.7V ≤ V+ ≤ 5V
dB
dB
82
76
PSRR
VCM
Input Common-Mode Voltage Range For CMRR ≥ 50dB
RL = 600Ω to 2.5V,
0
4.1
V
92
89
100
100
(6)
(7)
VO = 0.2V to 4.8V,
Large Signal Voltage Gain
AV
VO
IO
dB
(5)
RL = 2kΩ to 2.5V,
VO = 0.2V to 4.8V,
98
95
RL = 600Ω to 2.5V
0.15
0.23
0.112 to
4.9
4.85
4.77
(6)
VIN = ± 100mV,
Output Swing
V
RL = 2kΩ to 2.5V
0.06
0.07
0.035 to
4.97
4.94
4.93
(7)
VIN = ± 100mV,
Sourcing, VO = 0V
VIN = 100mV
35
35
75
(4) (8)
Output Short Circuit Current
mA
Sinking, VO = 2.7V
35
66
VIN = −100mV
35
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) Limits guaranteed by design.
(5) RL is connected to mid-supply. The output voltage is set at 200mV from the rails. VO = GND + 0.2V and VO = V+ −0.2V
(6) For LMV772/LMV772Q/LMV774, temperature limits apply to −40°C to 85°C.
(7) For LMV772/LMV772Q/LMV774, temperature limits apply to −40°C to 85°C. If RL is relaxed to 10 kΩ, then for
LMV772/LMV772Q/LMV774 temperature limits apply to −40°C to 125°C.
(8) Continuous operation of the device with an output short circuit current larger than 35mA may cause permanent damage to the device.
6
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Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Links: LMV771 LMV772 LMV774
LMV771, LMV772, LMV774
www.ti.com
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
(1)
5.0V AC Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C. V+ = 5.0V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ.
Boldface limits apply at the temperature extremes.
Min
Typ
Max
Symbol
Parameter
Conditions
AV = +1, RL = 10 kΩ
Units
(2)
(3)
(2)
(4)
SR
Slew Rate
1.4
3.5
79
V/µs
MHz
Deg
dB
GBW
Φm
Gain-Bandwidth Product
Phase Margin
Gm
Gain Margin
−15
Input-Referred Voltage Noise
(Flatband)
en
f = 10kHz
6.5
nV/√Hz
en
in
Input-Referred Voltage Noise (l/f)
Input-Referred Current Noise
f = 100Hz
f = 1kHz
12
nV/√Hz
pA/√Hz
0.001
f = 1kHz, AV = +1
RL = 600Ω, VIN = 1 VPP
THD
Total Harmonic Distortion
0.007
%
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) The number specified is the slower of positive and negative slew rates.
Connection Diagrams
1
5
+
+IN
V
+
2
GND
-
3
4
V
OUT
-IN
Figure 2. SC70-5
(Top View)
Figure 3. 8-Pin MSOP/SOIC
(Top View)
Figure 4. 14-Pin TSSOP
(Top View)
Copyright © 2004–2010, Texas Instruments Incorporated
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www.ti.com
Typical Performance Characteristics
VOS
vs.
VOS
vs.
VCM Over Temperature
VCM Over Temperature
3
2.5
2
4
-40°C
25°C
V
= 5V
S
V
= 2.7V
-40°C
25°C
85°C
125°C
S
3.5
3
85°C
125°C
2.5
1.5
1
2
1.5
1
0.5
0
0.5
0
-0.5
-0.5
-1
-1
-0.5
0
0.5
1
1.5
2
2.5
(V)
3
3.5
4
4.5
5
5.5
5.5
-0.5
0
0.5
1.5
2
2.5
1
V
CM
V
(V)
CM
Output Swing
Output Swing
vs.
VS
vs.
VS
40
120
110
100
90
R
= 2kW
L
T
= 25°C
A
NEGATIVE SWING
35
30
25
NEGATIVE SWING
80
POSITIVE SWING
70
POSITIVE SWING
60
R
= 600W
L
50
T
A
= 25°C
20
2.5
40
2.5
3
3.5
4
4.5
5
3
3.5
4.5
5
5.5
4
S
V (V)
S
V
(V)
Output Swing
IS
vs.
VS Over Temperature
vs.
VS
1
0.7
0.6
0.5
-40°C
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
NEGATIVE SWING
25°C
0.4
0.3
0.2
85°C
POSITIVE SWING
125°C
R
L
= 100kW
0.1
0
T
A
= 25°C
2.5
3
3.5
4
4.5
5
5.5
2.5
3
3.5
4.5
5
4
V
(V)
S
SUPPLY VOLTAGE (V)
8
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SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
Typical Performance Characteristics (continued)
VIN
vs.
VIN
vs.
VOUT
VOUT
500
400
300
200
100
0
500
400
300
200
100
0
V
T
= ±2.5V
= 25°C
V
T
= ±1.35V
= 25°C
S
S
A
A
R
= 2kW
L
R
= 2kW
L
R
= 600W
R
L
= 600W
L
-100
-200
-300
-400
-500
-100
-200
-300
-400
-500
-1.5
-1
0.5
0
0.5
1
1.5
-3
-2
-1
0
1
2
3
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Sourcing Current
vs.
Sourcing Current
vs.
(1)
(1)
VOUT
VOUT
0
0
-5
V = 5V
S
V
= 2.7V
S
-10
-20
-30
-40
-50
-60
-10
-15
125°C
125°C
-20
-25
-30
-35
-40
-45
85°C
85°C
-70
-80
25°C
0.5
25°C
-40°C
-90
-40°C
-100
0
0.5
1
1.5
2
-
2.5
3
0
1
1.5
2
2.5
3
3.5
4
4.5
5
-
V
OUT
FROM V (V)
V
OUT
FROM V (V)
Sinking Current
vs.
Sinking Current
vs.
(2)
(2)
VOUT
VOUT
100
90
40
30
20
10
-40°C
V
= 2.7V
-40°C
S
80
70
60
50
40
25°C
25°C
85°C
125°C
85°C
125°C
30
20
10
0
V
= 5V
4.5
S
0
0
0.5
1
1.5
2
2.5
3
0
0.5
1
1.5
2
2.5
3
3.5
+
4
5
+
V
OUT
REFERENCED TO V (V)
V
FROM V
OUT
(1) Continuous operation of the device with an output short circuit current larger than 35mA may cause permanent damage to the device.
(2) Continuous operation of the device with an output short circuit current larger than 35mA may cause permanent damage to the device.
Copyright © 2004–2010, Texas Instruments Incorporated
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Typical Performance Characteristics (continued)
Input Voltage Noise
vs.
Frequency
Input Bias Current Over Temperature
35
30
25
20
15
10
5
V
= 2.7V
S
V
= 5V
S
0
10
100
1k
10k
FREQUENCY (Hz)
Input Bias Current Over Temperature
Input Bias Current Over Temperature
500
50
T = 25°C
T = -40°C
400
40
300
200
100
30
20
V
= 2.7V
S
10
0
V
= 2.7V
S
0
-100
-10
V
4
= 5V
S
-200
-300
-400
-500
-20
-30
-40
-50
V
= 5V
S
-0.5 0 0.5
1
1.5
2
2.5 3 3.5
(V)
4.5
5
-0.5 0 0.5
1
1.5
2
2.5 3 3.5
V (V)
CM
4
4.5 5
5.5
5.5
V
CM
THD+N
vs.
THD+N
vs.
Frequency
VOUT
10
1
1
0.1
R
= 600W
L
A
V
= +10
A
= +10
V
V
= 5V, V = 2.5V
PP
S
O
V
S
= 2.7V, V = 1V
PP
O
A = +1
V
0.1
V
= 2.7V
S
0.01
0.01
A
V
= +1
V
S
= 5V, V = 1V
O
PP
V
= 5V
S
V
= 2.7V, V = 1V
O
S
PP
0.001
0.001
0.1
1
10
10
100
1k
10k
100k
FREQUENCY (Hz)
V
(V )
OUT PP
10
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Typical Performance Characteristics (continued)
Slew Rate
vs.
Supply Voltage
Open Loop Frequency Response Over Temperature
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
PHASE
-40°C
A
= +1
V
R
= 10kW
L
V
= 2V
PP
IN
25°C
125°C
GAIN
RISING EDGE
-40°C
125°C
FALLING EDGE
V
= 5V
25°C
S
-10
R
L
= 2kW
-20
2.5
3
3.5
4
4.5
5
1k
10k
100k
1M
10M
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
Open Loop Frequency Response
Open Loop Frequency Response
80
70
60
50
40
30
20
10
0
100
80
70
60
50
40
30
20
10
0
100
R
= 600W
R = 100kW
L
PHASE
PHASE
L
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
R
= 600W
R
= 100kW
L
L
GAIN
GAIN
R
= 2kW
R = 2kW
L
L
R
L
= 100kW
R = 100kW
L
R
L
= 600W
R = 600W
L
R
L
= 2kW
R
= 2kW
L
-10
-10
V
S
= 2.7V
10k
V = 5V
S
-20
-20
1k
100k
FREQUENCY (Hz)
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Open Loop Gain & Phase with Cap. Loading
Open Loop Gain & Phase with Cap. Loading
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
PHASE
PHASE
C
= 0pF
C = 0pF
L
L
C
= 100pF
L
C
= 100pF
L
GAIN
GAIN
C
= 1000pF
C = 1000pF
L
L
C
= 500pF
C = 500pF
L
L
V = 5V
S
C
L
= 0pF
C
= 0pF
V
= 5V
L
S
-10
-10
C
L
= 100pF
R = 100kW
L
C
L
= 100pF
R
= 600W
L
-20
-20
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Non-Inverting Small Signal Pulse Response
Non-Inverting Large Signal Pulse Response
V
= ±2.5V
= -40°C
= 2kW
S
V
= ±2.5V
= -40°C
= 2kW
S
T
A
T
A
R
L
R
L
TIME (10 ms/div)
TIME (10 ms/div)
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Typical Performance Characteristics (continued)
Non-Inverting Small Signal Pulse Response
Non-Inverting Large Signal Pulse Response
V
T
= ±2.5V
= 25°C
= 2kW
V
T
= ±2.5V
= 25°C
= 2kW
S
S
A
A
R
R
L
L
TIME (10 ms/div)
TIME (10 ms/div)
Non-Inverting Small Signal Pulse Response
Non-Inverting Large Signal Pulse Response
V
= ±2.5V
S
V
= ±2.5V
= 125°C
= 2kW
S
T
= 125°C
A
T
A
R
= 2kW
L
R
L
TIME (10 ms/div)
TIME (10 ms/div)
Inverting Small Signal Pulse Response
Inverting Large Signal Pulse Response
V
= ±2.5V
= -40°C
= 2kW
S
V
= ±2.5V
= -40°C
= 2kW
S
T
A
T
A
R
L
R
L
TIME (10 ms/div)
TIME (10 ms/div)
Inverting Small Signal Pulse Response
Inverting Large Signal Pulse Response
V
= ±2.5V
= 25°C
= 2kW
S
V
= ±2.5V
= 25°C
= 2kW
S
T
A
T
A
R
L
R
L
TIME (10 ms/div)
TIME (10 ms/div)
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Typical Performance Characteristics (continued)
Inverting Small Signal Pulse Response
Inverting Large Signal Pulse Response
V
= ±2.5V
= 125°C
= 2kW
S
V
= ±2.5V
= 125°C
= 2kW
S
T
A
T
A
R
L
R
L
TIME (10 ms/div)
TIME (10 ms/div)
Stability
vs.
Stability
vs.
VCM
VCM
500
450
400
350
300
250
200
150
100
50
250
200
150
25% OVERSHOOT
25% OVERSHOOT
100
50
0
V
A
= ±2.5V
= +1
S
V
A
= ±2.5V
= +1
S
V
V
R
= 1MW
= 100mV
L
R
= 2kW
L
V
O
V
O
= 100mV
0
-2 -1.5 -1 -0.5
0
-2
-1.5 -1
-0.5
0
0.5
1
1.5
0.5
1
1.5
V
(V)
V
CM
(V)
CM
PSRR
vs.
CMRR
vs.
Frequency
Frequency
100
90
80
70
60
50
40
30
20
10
0
140
R
L
= 100kW
R
S
= 5 kW
L
120
100
V
S
= 2.7V, -PSRR
V
= 2.7V, +PSRR
S
V
= 5V
80
60
V
S
= 5V, +PSRR
V
= 5V, -PSRR
S
V = 2.7V
S
40
20
0
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
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Typical Performance Characteristics (continued)
Crosstalk Rejection
vs.
Frequency (LMV772/LMV772Q/LMV774)
140
V
S
= 5V
120
100
V
S
= 2.7V
80
60
40
20
0
100
1k
10k
100k
600k
FREQUENCY (Hz)
Application Note
LMV771/LMV772/LMV772Q/LMV774
The LMV771/LMV772LMV772Q/LMV774 are a family of precision amplifiers with very low noise and ultra low
offset voltage. LMV771/LMV772/LMV772Q/LMV774's extended temperature range of −40°C to 125°C enables
the user to design this family of products into a variety of applications including automotive.
The LMV771 has a maximum offset voltage of 1mV over the extended temperature range. This makes the
LMV771 ideal for applications where precision is important.
The LMV772/LMV772Q/LMV774 have a maximum offset voltage of 1mV at room temperature and 1.2mV over
the extended temperature range of −40°C to 125°C. Care must be taken when the LMV772/LMV772Q/LMV774
are designed into applications with heavy loads under extreme temperature conditions. As indicated in the DC
tables, the LMV772/LMV772Q/LMV774's gain and output swing may be reduced at temperatures between 85°C
and 125°C with loads heavier than 2kΩ.
INSTRUMENTATION AMPLIFIER
Measurement of very small signals with an amplifier requires close attention to the input impedance of the
amplifier, gain of the overall signal on the inputs, and the gain on each input since we are only interested in the
difference of the two inputs and the common signal is considered noise. A classic solution is an instrumentation
amplifier. Instrumentation amplifiers have a finite, accurate, and stable gain. Also they have extremely high input
impedances and very low output impedances. Finally they have an extremely high CMRR so that the amplifier
can only respond to the differential signal. A typical instrumentation amplifier is shown in Figure 5.
V
1
V
R
+
-
KR
2
01
2
R
1
-
R
a
1
R
=
11
V
OUT
+
R
1
-
V
02
R
V
2
KR
2
2
+
Figure 5. Instrumentation Amplifier
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There are two stages in this amplifier. The last stage, output stage, is a differential amplifier. In an ideal case the
two amplifiers of the first stage, input stage, would be set up as buffers to isolate the inputs. However they
cannot be connected as followers because of real amplifier's mismatch. That is why there is a balancing resistor
between the two. The product of the two stages of gain will give the gain of the instrumentation amplifier. Ideally,
the CMRR should be infinite. However the output stage has a small non-zero common mode gain which results
from resistor mismatch.
In the input stage of the circuit, current is the same across all resistors. This is due to the high input impedance
and low input bias current of the LMV771. With the node equations we have:
GIVEN: I
= I
R
1
R
11
(2)
By Ohm’s Law:
R
R
V
- V = (2R
+
1
) I
11
O1
O2
R
11
ñ I
= (2a + 1)
11
R
11
= (2a + 1) V
R
11
(3)
However:
V
R
11
= V - V
1 2
(4)
(5)
So we have:
Now looking at the output of the instrumentation amplifier:
KR
2
V
=
(V - V )
O2 O1
O
R
2
= -K (V - V
)
O1 O2
(6)
Substituting from Equation 5:
V
O
= -K (2a + 1) (V - V )
1 2
(7)
(8)
This shows the gain of the instrumentation amplifier to be:
−K(2a+1)
Typical values for this circuit can be obtained by setting: a = 12 and K= 4. This results in an overall gain of −100.
Figure 6 shows typical CMRR characteristics of this Instrumentation amplifier over frequency. Three LMV771
amplifiers are used along with 1% resistors to minimize resistor mismatch. Resistors used to build the circuit are:
R1 = 21.6kΩ, R11 = 1.8kΩ, R2 = 2.5kΩ with K = 40 and a = 12. This results in an overall gain of −1000, −K(2a+1)
= −1000.
0
V
V
V
= ±2.5V
S
= 0V
CM
-20
-40
= 3V
PP
IN
-60
-80
-100
-120
-140
10
100
1k
10k
FREQUENCY (Hz)
Figure 6. CMRR vs. Frequency
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ACTIVE FILTER
Active filters are circuits with amplifiers, resistors, and capacitors. The use of amplifiers instead of inductors,
which are used in passive filters, enhances the circuit performance while reducing the size and complexity of the
filter.
The simplest active filters are designed using an inverting op amp configuration where at least one reactive
element has been added to the configuration. This means that the op amp will provide "frequency-dependent"
amplification, since reactive elements are frequency dependent devices.
LOW PASS FILTER
The following shows a very simple low pass filter.
C
R
R
2
1
V
i
-
V
OUT
+
Figure 7. Lowpass Filter
The transfer function can be expressed as follows:
By KCL:
-V
V
O
V
i
O
-
-
= O
R
1
R
1
2
jwc
(9)
(10)
(11)
Simplifying this further results in:
-R
2
1
V
V
=
i
O
R
jwcR +1
2
1
or
V
-R
R
O
2
1
=
V
jwcR +1
2
i
1
Now, substituting ω=2πf, so that the calculations are in f(Hz) and not ω(rad/s), and setting the DC gain HO
=
−R2/R1 and H = VO/Vi
1
H = H
O
j2pfcR +1
2
(12)
Set: fo = 1/(2πR1C)
1
H = H
O
1 + j (f/f )
o
(13)
Low pass filters are known as lossy integrators because they only behave as an integrator at higher frequencies.
Just by looking at the transfer function one can predict the general form of the bode plot. When the f/fO ratio is
small, the capacitor is in effect an open circuit and the amplifier behaves at a set DC gain. Starting at fO, −3dB
corner, the capacitor will have the dominant impedance and hence the circuit will behave as an integrator and
the signal will be attenuated and eventually cut. The bode plot for this filter is shown in the following picture:
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dB
|H|
|H
|
O
-20dB/dec
0
f = f
o
f (Hz)
Figure 8. Lowpass Filter Transfer Function
HIGH PASS FILTER
In a similar approach, one can derive the transfer function of a high pass filter. A typical first order high pass filter
is shown below:
C
R
1
R
2
V
i
-
V
OUT
+
Figure 9. Highpass FIlter
Writing the KCL for this circuit :
(V1 denotes the voltage between C and R1)
-
V
- V
V
1 -
V
i
1
=
1
R
1
jwC
(14)
(15)
-
V- + V
V + V
O
1
=
R
2
R
1
Solving these two equations to find the transfer function and using:
1
fO =
2pR1C
(16)
V
-R
O
2
H =
H
=
O
R
1
V
i
(high frequency gain)
Which results:
and
j (f/f )
o
H = H
O
1 + j (f/f )
o
(17)
Looking at the transfer function, it is clear that when f/fO is small, the capacitor is open and hence no signal is
getting in to the amplifier. As the frequency increases the amplifier starts operating. At f = fO the capacitor
behaves like a short circuit and the amplifier will have a constant, high frequency, gain of HO. Figure 10 shows
the transfer function of this high pass filter:
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|H|
|H
dB
|
O
-20dB/dec
0
f = f
f (Hz)
o
Figure 10. Highpass Filter Transfer Function
BAND PASS FILTER
C
R
2
C
R
1
2
1
V
i
-
V
OUT
+
Figure 11. Bandpass Filter
Combining a low pass filter and a high pass filter will generate a band pass filter. In this network the input
impedance forms the high pass filter while the feedback impedance forms the low pass filter. Choosing the
corner frequencies so that f1 < f2, then all the frequencies in between, f1 ≤ f ≤ f2, will pass through the filter while
frequencies below f1 and above f2 will be cut off.
The transfer function can be easily calculated using the same methodology as before.
j (f/f )
1
H = H
O
[1 + j (f/f )] [1 + j (f/f )]
1
2
(18)
Where
1
f
=
=
1
2pR C
1
1
2
1
f
2
2pR C
2
-R
R
2
H
=
O
1
(19)
The transfer function is presented in the following figure.
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|H
|
dB
|H
O
|
20dB/dec
-20dB/dec
0
f
f
2
f (Hz)
1
Figure 12. Bandpass filter Transfer Function
STATE VARIABLE ACTIVE FILTER
State variable active filters are circuits that can simultaneously represent high pass, band pass, and low pass
filters. The state variable active filter uses three separate amplifiers to achieve this task. A typical state variable
active filter is shown in Figure 13. The first amplifier in the circuit is connected as a gain stage. The second and
third amplifiers are connected as integrators, which means they behave as low pass filters. The feedback path
from the output of the third amplifier to the first amplifier enables this low frequency signal to be fed back with a
finite and fairly low closed loop gain. This is while the high frequency signal on the input is still gained up by the
open loop gain of the 1st amplifier. This makes the first amplifier a high pass filter. The high pass signal is then
fed into a low pass filter. The outcome is a band pass signal, meaning the second amplifier is a band pass filter.
This signal is then fed into the third amplifiers input and so, the third amplifier behaves as a simple low pass
filter.
R
4
R
1
C
2
C
3
-
R
2
A
-
1
R
5
R
V
IN
3
V
HP
-
+
A
2
V
BP
A
3
+
V
LP
+
R
6
Figure 13. State Variable Active Filter
The transfer function of each filter needs to be calculated. The derivations will be more trivial if each stage of the
filter is shown on its own.
The three components are:
R
4
R
1
V
O
-
R
A
5
1
V
IN
V
O1
+
R
6
V
O2
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C
2
R
2
V
O1
-
A
V
O2
2
+
C
3
3
R
3
V
O2
-
V
A
O
+
For A1 the relationship between input and output is:
-R
R
R
1
+ R
R
R + R
1 4
4
6
4
5
V
O2
V
O1
=
+
V
IN
+
V
0
R
R
+ R
R1
R
+ R
R
1
1
5
6
5
6
(20)
This relationship depends on the output of all the filters. The input-output relationship for A2 can be expressed
as:
-1
V
O2
=
V
O1
s C R
2
2
(21)
And finally this relationship for A3 is as follows:
-1
V
O
=
V
O2
s C R
3
3
(22)
Re-arranging these equations, one can find the relationship between VO and VIN (transfer function of the lowpass
filter), VO1 and VIN (transfer function of the highpass filter), and VO2 and VIN (transfer function of the bandpass
filter) These relationships are as follows:
Lowpass Filter
R
+ R
4
R
6
1
1
R
1
R
+ R C C R R
5
6
2
3
2
3
V
O
=
V
IN
R
1
+ R
R
4
5
1
1
2
s
+ s
+
C R
2
R
+ R
R
1
C C R R
2 3 2
2
5
6
3
3
3
(23)
(24)
(25)
Highpass Filter
R
+ R
R
6
1
4
2
s
R
R
+ R
1
5
6
V
O1
=
V
IN
R
+ R
R
1
4
5
1
1
2
s
+ s
+
C R
R
+ R
6
R
1
C C R R
2 3 2
2
2
5
Bandpass Filter
R
1
+ R
R
4
6
1
s
C R
R
R + R
5 6
2
2
1
V
O2
=
V
IN
R
+ R
4
R
1
5
1
1
2
s
+ s
+
C R
R
+ R
6
R
1
C C R R
2 3 2
2
2
5
The center frequency and Quality Factor for all of these filters is the same. The values can be calculated in the
following manner:
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1
w
c
=
C C R R
3 2 3
2
and
C R
R
5
+ R
R
1
2
2
3
6
Q =
C R
3
R
6
R + R
1 4
(26)
A design example is shown here:
Designing a bandpass filter with center frequency of 10kHz and Quality Factor of 5.5
To do this, first consider the Quality Factor. It is best to pick convenient values for the capacitors. C2 = C3 =
1000pF. Also, choose R1 = R4 = 30kΩ. Now values of R5 and R6 need to be calculated. With the chosen values
for the capacitors and resistors, Q reduces to:
R
5
+ R
6
11
2
1
2
Q =
=
R
6
(27)
(28)
or
R5 = 10R6 R6 = 1.5kΩ R5 = 15kΩ
Also, for f = 10kHz, the center frequency is ωc = 2πf = 62.8kHz.
Using the expressions above, the appropriate resistor values will be R2 = R3 = 16kΩ.
The following graphs show the transfer function of each of the filters. The DC gain of this circuit is:
R
1
+ R
4
R
6
DC GAIN =
= -14.8 dB
R
R + R
5 6
1
The frequency responses of each stage of the state variable active filter when implemented with the LMV774 are
shown in the following figures:
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
100
1k
10k
100k 400k
FREQUENCY (Hz)
Figure 14. Lowpass Filter Frequency Response
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0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
100
1k
10k
100k 400k
FREQUENCY (Hz)
Figure 15. Bandpass Filter Frequency Response
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
100
1k
10k
100k 400k
FREQUENCY (Hz)
Figure 16. Highpass Filter Frequency Response
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LMV771MG/NOPB
LMV771MGX/NOPB
LMV772MA/NOPB
ACTIVE
ACTIVE
ACTIVE
SC70
SC70
SOIC
DCK
DCK
D
5
5
8
1000 RoHS & Green
3000 RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
A75
A75
SN
SN
95
RoHS & Green
LMV7
72MA
LMV772MAX/NOPB
ACTIVE
SOIC
D
8
2500 RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
LMV7
72MA
LMV772MM/NOPB
LMV772MMX/NOPB
LMV772QMM/NOPB
LMV772QMMX/NOPB
LMV774MT/NOPB
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VSSOP
VSSOP
VSSOP
VSSOP
TSSOP
DGK
DGK
DGK
DGK
PW
8
8
1000 RoHS & Green
3500 RoHS & Green
1000 RoHS & Green
3500 RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
A91A
A91A
AJ7A
AJ7A
SN
SN
8
8
SN
14
94
RoHS & Green
NIPDAU | SN
LMV77
4MT
LMV774MTX/NOPB
ACTIVE
TSSOP
PW
14
2500 RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
LMV77
4MT
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV772, LMV772-Q1 :
Catalog: LMV772
•
Automotive: LMV772-Q1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMV771MG/NOPB
LMV771MGX/NOPB
LMV772MAX/NOPB
LMV772MM/NOPB
LMV772MMX/NOPB
LMV772QMM/NOPB
LMV772QMMX/NOPB
LMV774MTX/NOPB
SC70
SC70
DCK
DCK
D
5
5
1000
3000
2500
1000
3500
1000
3500
2500
178.0
178.0
330.0
178.0
330.0
178.0
330.0
330.0
8.4
2.25
2.25
6.5
2.45
2.45
5.4
3.4
3.4
3.4
3.4
5.6
1.2
1.2
2.0
1.4
1.4
1.4
1.4
1.6
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q1
Q1
Q1
Q1
Q1
Q1
8.4
8.0
SOIC
8
12.4
12.4
12.4
12.4
12.4
12.4
12.0
12.0
12.0
12.0
12.0
12.0
VSSOP
VSSOP
VSSOP
VSSOP
TSSOP
DGK
DGK
DGK
DGK
PW
8
5.3
8
5.3
8
5.3
8
5.3
14
6.95
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LMV771MG/NOPB
LMV771MGX/NOPB
LMV772MAX/NOPB
LMV772MM/NOPB
LMV772MMX/NOPB
LMV772QMM/NOPB
LMV772QMMX/NOPB
LMV774MTX/NOPB
SC70
SC70
DCK
DCK
D
5
5
1000
3000
2500
1000
3500
1000
3500
2500
208.0
208.0
367.0
208.0
367.0
208.0
367.0
367.0
191.0
191.0
367.0
191.0
367.0
191.0
367.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
SOIC
8
VSSOP
VSSOP
VSSOP
VSSOP
TSSOP
DGK
DGK
DGK
DGK
PW
8
8
8
8
14
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LMV772MA/NOPB
LMV774MT/NOPB
LMV774MT/NOPB
D
SOIC
8
95
94
94
495
495
530
8
8
4064
2514.6
3600
3.05
4.06
3.5
PW
PW
TSSOP
TSSOP
14
14
10.2
Pack Materials-Page 3
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DCK0005A
SOT - 1.1 max height
S
C
A
L
E
5
.
6
0
0
SMALL OUTLINE TRANSISTOR
C
2.4
1.8
0.1 C
1.4
1.1
B
1.1 MAX
A
PIN 1
INDEX AREA
1
2
5
NOTE 4
(0.15)
(0.1)
2X 0.65
1.3
2.15
1.85
1.3
4
3
0.33
5X
0.23
0.1
0.0
(0.9)
TYP
0.1
C A B
0.15
0.22
0.08
GAGE PLANE
TYP
0.46
0.26
8
0
TYP
TYP
SEATING PLANE
4214834/C 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-203.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DCK0005A
SOT - 1.1 max height
SMALL OUTLINE TRANSISTOR
PKG
5X (0.95)
1
5
5X (0.4)
SYMM
(1.3)
2
3
2X (0.65)
4
(R0.05) TYP
(2.2)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:18X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214834/C 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DCK0005A
SOT - 1.1 max height
SMALL OUTLINE TRANSISTOR
PKG
5X (0.95)
1
5
5X (0.4)
SYMM
(1.3)
2
3
2X(0.65)
4
(R0.05) TYP
(2.2)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:18X
4214834/C 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated
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