LMV981TLX/NOPB [TI]
Single, 5-V, 1.5-MHz, 65-mA output current, RRIO operational amplifier with shutdown | YZR | 6 | -40 to 125;
| 型号： | LMV981TLX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Single, 5-V, 1.5-MHz, 65-mA output current, RRIO operational amplifier with shutdown | YZR | 6 | -40 to 125 |
| 文件： | 总20页 (文件大小：1008K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMV981,LMV982
LMV981 Single / LMV982 Dual 1.8V, RRIO Operational Amplifiers with Shutdown
Literature Number: SNOS976K
October 13, 2010
LMV981 Single / LMV982 Dual
1.8V, RRIO Operational Amplifiers with Shutdown
General Description
Features
LMV981/LMV982 are low voltage, low power operational am-
plifiers. LMV981/LMV982 operate from +1.8V to +5.0V supply
voltages and have rail-to-rail input and output. LMV981/
LMV982 input common mode voltage extends 200mV be-
yond the supplies which enables user enhanced functionality
beyond the supply voltage range. The output can swing rail-
to-rail unloaded and within 105mV from the rail with 600Ω load
at 1.8V supply. LMV981/LMV982 are optimized to work at
1.8V which make them ideal for portable two-cell battery pow-
ered systems and single cell Li-Ion systems.
(Typical 1.8V Supply Values; Unless Otherwise Noted)
Guaranteed 1.8V, 2.7V and 5V specifications
■
■
Output swing
w/600Ω load
w/2kΩ load
VCM
80mV from rail
30mV from rail
200mV beyond rails
—
—
■
■
■
■
■
■
■
■
Supply current (per channel)
Gain bandwidth product
Maximum VOS
100μA
1.4MHz
4.0mV
Gain w/600Ω load
101dB
1.0mm x 1.5mm
LMV981/LMV982 offer a shutdown pin that can be used to
disable the device and reduce the supply current. The device
is in shutdown when the SHDN-pin = low. The output will be
high impedance in shutdown.
Ultra tiny package micro SMD
Turn-on time from shutdown
Temperature range
19μs
−40°C to 125°C
LMV981/LMV982 exhibit excellent speed-power ratio,
achieving 1.4MHz gain bandwidth product at 1.8V supply
voltage with very low supply current. LMV981/LMV982 are
capable of driving a 600Ω load and up to 1000pF capacitive
load with minimal ringing. LMV981/LMV982 have a high DC
gain of 101dB, making them suitable for low frequency appli-
cations.
Applications
Industrial and automotive
■
■
■
■
Consumer communication
Consumer computing
PDAs
LMV981 is offered in space saving 6-Bump micro SMD,
SC70-6 and SOT23-6 packages. The 6-Bump micro SMD
package has only a 1.006mm x 1.514mm x 0.945mm foot-
print. LMV982 is offered in space saving MSOP-10 package.
These small packages are ideal solutions for area con-
strained PC boards and portable electronics such as cellular
phones and PDAs.
Portable audio
■
Portable/battery-powered electronic equipment
Supply current monitoring
■
■
■
Battery monitoring
Typical Application
200214h0
© 2010 National Semiconductor Corporation
200214
www.national.com
For soldering specifications:
see product folder at www.national.com and
www.national.com/ms/MS/MS-SOLDERING.pdf
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings (Note 1)
ESD Tolerance (Note 2)
Supply Voltage Range
Temperature Range
Thermal Resistance (θJA
6-Bump micro SMD
SC70-6
1.8V to 5.0V
−40°C to 125°C
Machine Model
Human Body Model
200V
2000V
)
Supply Voltage (V+–V −)
Differential Input Voltage
Voltage at Input/Output Pins
Storage Temperature Range
Junction Temperature (Note 4)
5.5V
286°C/W
414°C/W
265°C/W
235°C/W
± Supply Voltage
V++0.3V, V- -0.3V
−65°C to 150°C
150°C
SOT23-6
MSOP-10
1.8V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 1.8V, V − = 0V, VCM = V+/2, VO = V+/2,
RL > 1 MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol
Parameter
Condition
LMV981 (Single)
LMV982 (Dual)
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
VOS
Input Offset Voltage
1
1
4
6
mV
5.5
7.5
TCVOS
IB
Input Offset Voltage Average
Drift
5.5
15
μV/°C
nA
Input Bias Current
35
50
IOS
Input Offset Current
13
25
40
nA
IS
Supply Current (per channel)
103
0.156
0.178
78
185
205
In Shutdown
LMV981 (Single)
LMV982 (Dual)
1
2
μA
3.5
5
CMRR
Common Mode Rejection Ratio
60
55
LMV981, 0 ≤ VCM ≤ 0.6V
1.4V ≤ VCM ≤ 1.8V
(Note 8)
55
50
76
72
LMV982, 0 ≤ VCM ≤ 0.6V
1.4V ≤ VCM ≤ 1.8V (Note 8)
dB
50
−0.2V ≤ VCM ≤ 0V
1.8V ≤ VCM ≤ 2.0V
1.8V ≤ V+ ≤ 5V
PSRR
CMVR
Power Supply Rejection Ratio
75
70
V− −0.2
V−
100
dB
V
Input Common-Mode Voltage For CMRR
Range
TA = 25°C
−0.2 to 2.1
V+ +0.2
V+
Range ≥ 50dB
TA = −40°C to 85°C
TA = 125°C
V− +0.2
V+ −0.2
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Symbol
Parameter
Condition
RL = 600Ω to 0.9V,
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
AV
Large Signal Voltage Gain
LMV981 (Single)
77
73
101
105
90
VO = 0.2V to 1.6V, VCM = 0.5V
dB
80
75
RL = 2kΩ to 0.9V,
VO = 0.2V to 1.6V, VCM = 0.5V
Large Signal Voltage Gain
LMV982 (Dual)
75
72
RL = 600Ω to 0.9V,
VO = 0.2V to 1.6V, VCM = 0.5V
dB
78
75
100
RL = 2kΩ to 0.9V,
VO = 0.2V to 1.6V, VCM = 0.5V
VO
Output Swing
1.65
1.63
1.72
0.077
1.77
0.024
8
RL = 600Ω to 0.9V
VIN = ± 100mV
0.105
0.120
V
1.75
1.74
RL = 2kΩ to 0.9V
VIN = ± 100mV
0.035
0.04
IO
Output Short Circuit Current
(Note 3)
Sourcing, VO = 0V
VIN = 100mV
4
3.3
mA
Sinking, VO = 1.8V
VIN = −100mV
7
5
9
Ton
Turn-on Time from Shutdown
Turn-on Voltage to enable part
Turn-off Voltage
19
1.0
μs
VSHDN
V
0.55
1.8V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 1.8V, V − = 0V, VCM = V+/2, VO = V+/2,
RL > 1 MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 6)
(Note 5)
(Note 6)
SR
Slew Rate
(Note 7)
0.35
1.4
67
V/μs
MHz
deg
dB
GBW
Φm
Gm
Gain-Bandwidth Product
Phase Margin
Gain Margin
7
en
Input-Referred Voltage Noise
f = 10 kHz, VCM = 0.5V
f = 10 kHz
60
in
Input-Referred Current Noise
Total Harmonic Distortion
0.08
THD
f = 1kHz, AV = +1
RL = 600Ω, VIN = 1 VPP
(Note 9)
0.023
%
Amp-to-Amp Isolation
123
dB
2.7V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 2.7V, V − = 0V, VCM = V+/2, VO = V+/2,
RL > 1 MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol
Parameter
Condition
LMV981 (Single)
LMV982 (Dual)
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
VOS
Input Offset Voltage
1
1
4
6
mV
mV
6
7.5
3
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Symbol
TCVOS
IB
Parameter
Condition
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
Input Offset Voltage Average
Drift
5.5
15
μV/°C
nA
Input Bias Current
35
50
IOS
Input Offset Current
8
25
40
nA
IS
Supply Current (per channel)
105
0.061
0.101
81
190
210
In Shutdown
LMV981 (Single)
LMV982 (Dual)
1
2
μA
3.5
5
CMRR
Common Mode Rejection Ratio
60
55
LMV981, 0 ≤ VCM ≤ 1.5V
2.3V ≤ VCM ≤ 2.7V (Note 8)
55
50
80
74
LMV982, 0 ≤ VCM ≤ 1.5V
2.3V ≤ VCM ≤ 2.7V (Note 8)
dB
50
−0.2V ≤ VCM ≤ 0V
2.7V ≤ VCM ≤ 2.9V
1.8V ≤ V+ ≤ 5V
PSRR
CMVR
Power Supply Rejection Ratio
75
70
100
dB
V
VCM = 0.5V
Input Common-Mode Voltage For CMRR
Range
TA = 25°C
V− −0.2
V−
−0.2 to 3.0
V ++0.2
V+
Range ≥ 50dB
TA = −40°C to 85°C
TA = 125°C
V− +0.2
V +−0.2
AV
Large Signal Voltage Gain
LMV981(Single)
87
86
104
110
90
RL = 600Ω to 1.35V,
VO = 0.2V to 2.5V
92
91
RL = 2kΩ to 1.35V,
VO = 0.2V to 2.5V
dB
Large Signal Voltage Gain
LMV982 (Dual)
78
75
RL = 600Ω to 1.35V,
VO = 0.2V to 2.5V
81
78
100
RL = 2kΩ to 1.35V,
VO = 0.2V to 2.5V
VO
Output Swing
2.55
2.53
2.62
0.083
2.675
0.025
30
RL = 600Ω to 1.35V
VIN = ±100mV
0.110
0.130
V
2.65
2.64
RL = 2kΩ to 1.35V
VIN = ±100mV
0.04
0.045
IO
Output Short Circuit Current
(Note 3)
Sourcing, VO = 0V
VIN = 100mV
20
15
mA
Sinking, VO = 0V
VIN = −100mV
18
12
25
Ton
Turn-on Time from Shutdown
Turn-on Voltage to enable part
Turn-off Voltage
12.5
1.9
μs
VSHDN
V
0.8
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2.7V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 2.7V, V − = 0V, VCM = 1.0V, VO = 1.35V,
RL > 1 MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 6)
(Note 5)
(Note 6)
SR
GBW
Φm
Gm
en
Slew Rate
(Note 7)
0.4
1.4
70
V/µs
MHz
deg
dB
Gain-Bandwidth Product
Phase Margin
Gain Margin
7.5
57
Input-Referred Voltage Noise f = 10 kHz, VCM = 0.5V
in
Input-Referred Current Noise f = 10 kHz
0.08
THD
Total Harmonic Distortion
Amp-to-Amp Isolation
f = 1kHz, AV = +1
RL = 600Ω, VIN = 1VPP
(Note 9)
0.022
123
%
dB
5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 5V, V − = 0V, VCM = V+/2, VO = V+/2,
RL > 1 MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol
Parameter
Condition
Min
Typ
Max
Units
(Note 6)
(Note 5)
(Note 6)
VOS
Input Offset Voltage
LMV981 (Single)
1
1
4
6
mV
LMV982 (Dual)
5.5
7.5
TCVOS
IB
Input Offset Voltage Average
Drift
5.5
14
μV/°C
nA
Input Bias Current
35
50
IOS
Input Offset Current
9
25
40
nA
IS
Supply Current (per Channel)
116
0.201
0.302
86
210
230
μA
In Shutdown
LMV981 (Single)
LMV982 (Dual)
1
2
μA
3.5
5
CMRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
60
55
0 ≤ VCM ≤ 3.8V
4.6V ≤ VCM ≤ 5.0V (Note 8)
dB
50
78
−0.2V ≤ VCM ≤ 0V
5.0V ≤ VCM ≤ 5.2V
1.8V ≤ V+ ≤ 5V
VCM = 0.5V
PSRR
CMVR
75
70
100
dB
V
Input Common-Mode Voltage For CMRR
Range
TA = 25°C
V− −0.2
V−
−0.2 to 5.3
V+ +0.2
V+
Range ≥ 50dB
TA = −40°C to 85°C
TA = 125°C
V− +0.3
V+ −0.3
5
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Symbol
Parameter
Condition
RL = 600Ω to 2.5V,
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
AV
Large Signal Voltage Gain
(LMV981 Single)
88
87
102
113
90
VO = 0.2V to 4.8V
dB
94
93
RL = 2kΩ to 2.5V,
VO = 0.2V to 4.8V
Large Signal Voltage Gain
LMV982 (Dual)
81
78
RL = 600Ω to 2.5V,
VO = 0.2V to 4.8V
dB
85
82
100
RL = 2kΩ to 2.5V,
VO = 0.2V to 4.8V
VO
Output Swing
4.855
4.835
4.890
0.120
4.967
0.037
100
RL = 600Ω to 2.5V
VIN = ±100mV (Note 8)
0.160
0.180
V
4.945
4.935
RL = 2kΩ to 2.5V
VIN = ±100mV
0.065
0.075
IO
Output Short Circuit Current
(Note 3)
LMV981, Sourcing, VO = 0V
VIN = 100mV
80
68
mA
Sinking, VO = 5V
VIN = −100mV
58
45
65
Ton
Turn-on Time from Shutdown
Turn-on Voltage to enable part
Turn-off Voltage
8.4
4.2
0.8
μs
VSHDN
V
5V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 5V, V − = 0V, VCM = V+/2, VO = 2.5V,
R L > 1 MΩ and SHDN tied to V+.Boldface limits apply at the temperature extremes. See (Note 10).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 6)
(Note 5)
(Note 6)
SR
Slew Rate
(Note 7)
0.42
1.5
71
V/µs
MHz
deg
GBW
Φm
Gm
Gain-Bandwidth Product
Phase Margin
Gain Margin
8
dB
en
Input-Referred Voltage Noise f = 10 kHz, VCM = 1V
50
in
Input-Referred Current Noise
Total Harmonic Distortion
f = 10 kHz
0.08
THD
f = 1kHz, AV = +1
RL = 600Ω, VO = 1V PP
(Note 9)
0.022
%
Amp-to-Amp Isolation
123
dB
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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150°C. Output currents in excess of 45mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of TJ(MAX) , θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX)–T A)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Connected as voltage follower with input step from V− to V+. Number specified is the slower of the positive and negative slew rates.
Note 8: For guaranteed temperature ranges, see Input Common-Mode Voltage Range specifications.
Note 9: Input referred, RL = 100kΩ connected to V+/2. Each amp excited in turn with 1kHz to produce VO = 3VPP. (For Supply Voltages <3V, VO = V+).
Note 10: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ >
TA. See Applications section for information on temperature derating of this device. Absolute Maximum Ratings indicated junction temperature limits beyond which
the device may be permanently degraded, either mechanically or electrically.
Connection Diagrams
6-Bump micro SMD
6-Pin SC70-6/SOT23-6
10-Pin MSOP
200214g7
Top View
20021435
200214g6
Top View
Top View
Ordering Information
Package
Part Number
Packaging Marking
Transport Media
NSC Drawing
6-Bump micro SMD
(NOPB)
LMV981TL
LMV981TLX
LMV981MG
LMV981MGX
LMV981MF
LMV981MFX
LMV982MM
LMV982MMX
H
250 Units Tape and Reel
3k Units Tape and Reel
1k Units Tape and Reel
3k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
TLA06BBA
6-Pin SC70
6-Pin SOT23
10-Pin MSOP
A77
MA006A
MF06A
A78A
A87A
MUB10A
7
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Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25°C.
Supply Current vs. Supply Voltage (LMV981)
Sourcing Current vs. Output Voltage
20021425
20021422
Sinking Current vs. Output Voltage
Output Voltage Swing vs. Supply Voltage
20021428
20021449
Output Voltage Swing vs. Supply Voltage
Gain and Phase vs. Frequency
20021450
200214g8
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Gain and Phase vs. Frequency
Gain and Phase vs. Frequency
PSRR vs. Frequency
Gain and Phase vs. Frequency
200214g9
200214g10
CMRR vs. Frequency
20021439
200214g11
Input Voltage Noise vs. Frequency
20021456
20021458
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Input Current Noise vs. Frequency
THD vs. Frequency
20021466
20021467
THD vs. Frequency
Slew Rate vs. Supply Voltage
20021469
20021468
Small Signal Non-Inverting Response
Small Signal Non-Inverting Response
20021470
20021471
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Small Signal Non-Inverting Response
Large Signal Non-Inverting Response
20021473
20021472
Large Signal Non-Inverting Response
Large Signal Non-Inverting Response
20021474
20021475
Short Circuit Current vs. Temperature (Sinking)
Short Circuit Current vs. Temperature (Sourcing)
20021476
20021477
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Offset Voltage vs. Common Mode Range
Offset Voltage vs. Common Mode Range
20021436
20021437
Offset Voltage vs. Common Mode Range
20021438
pendent spurious signal in series with the input signal and can
effectively degrade small signal parameters such as gain and
common mode rejection ratio. To resolve this problem, the
small signal should be placed such that it avoids the VOS
crossover point. In addition to the rail-to-rail performance, the
output stage can provide enough output current to drive
600Ω loads. Because of the high current capability, care
should be taken not to exceed the 150°C maximum junction
temperature specification.
Application Note
INPUT AND OUTPUT STAGE
The rail-to-rail input stage of this family provides more flexi-
bility for the designer. The LMV981/LMV982 use a compli-
mentary PNP and NPN input stage in which the PNP stage
senses common mode voltage near V− and the NPN stage
senses common mode voltage near V+. The transition from
the PNP stage to NPN stage occurs 1V below V+. Since both
input stages have their own offset voltage, the offset of the
amplifier becomes a function of the input common mode volt-
age and has a crossover point at 1V below V+.
SHUTDOWN MODE
The LMV981/LMV982 have a shutdown pin. To conserve bat-
tery life in portable applications, the LMV981/LMV982 can be
disabled when the shutdown pin voltage is pulled low.
This VOS crossover point can create problems for both DC and
AC coupled signals if proper care is not taken. Large input
signals that include the VOS crossover point will cause distor-
tion in the output signal. One way to avoid such distortion is
to keep the signal away from the crossover. For example, in
a unity gain buffer configuration and with VS = 5V, a 5V peak-
to-peak signal will contain input-crossover distortion while a
3V peak-to-peak signal centered at 1.5V will not contain input-
crossover distortion as it avoids the crossover point. Another
way to avoid large signal distortion is to use a gain of −1 circuit
which avoids any voltage excursions at the input terminals of
the amplifier. In that circuit, the common mode DC voltage
can be set at a level away from the VOS cross-over point. For
small signals, this transition in VOS shows up as a VCM de-
The shutdown pin can’t be left unconnected. In case shut-
down operation is not needed, the shutdown pin should be
connected to V+ when the LMV981/LMV982 are used. Leav-
ing the shutdown pin floating will result in an undefined oper-
ation mode, either shutdown or active, or even oscillating
between the two modes.
INPUT BIAS CURRENT CONSIDERATION
The LMV981/LMV982 family has a complementary bipolar
input stage. The typical input bias current (IB) is 15nA. The
input bias current can develop a significant offset voltage.
This offset is primarily due to IB flowing through the negative
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feedback resistor, RF. For example, if IB is 50nA and RF is
100kΩ, then an offset voltage of 5mV will develop (VOS = IB x
RF). Using a compensation resistor (RC), as shown in Figure
1, cancels this effect. But the input offset current (IOS) will still
contribute to an offset voltage in the same manner.
tion because the common mode input range goes up to the
rail.
200214h0
FIGURE 2. High Side Current Sensing
HALF-WAVE RECTIFIER WITH RAIL-TO-GROUND
OUTPUT SWING
Since the LMV981/LMV982 input common mode range in-
cludes both positive and negative supply rails and the output
can also swing to either supply, achieving half-wave rectifier
functions in either direction is an easy task. All that is needed
are two external resistors; there is no need for diodes or
matched resistors. The half wave rectifier can have either
positive or negative going outputs, depending on the way the
circuit is arranged.
20021459
FIGURE 1. Canceling the Offset Voltage due to Input Bias
Current
In Figure 3 the circuit is referenced to ground, while in Figure
4 the circuit is biased to the positive supply. These configu-
rations implement the half wave rectifier since the LMV981/
LMV982 can not respond to one-half of the incoming wave-
form. It can not respond to one-half of the incoming because
the amplifier can not swing the output beyond either rail there-
fore the output disengages during this half cycle. During the
other half cycle, however, the amplifier achieves a half wave
that can have a peak equal to the total supply voltage. RI
should be large enough not to load the LMV981/LMV982.
Typical Applications
HIGH SIDE CURRENT SENSING
The high side current sensing circuit (Figure 2) is commonly
used in a battery charger to monitor charging current to pre-
vent over charging. A sense resistor RSENSE is connected to
the battery directly. This system requires an op amp with rail-
to-rail input. The LMV981/LMV982 are ideal for this applica-
200214c4
200214c2
200214c3
FIGURE 3. Half-Wave Rectifier with Rail-To-Ground Output Swing Referenced to Ground
13
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200214c1
200214b9
200214c0
FIGURE 4. Half-Wave Rectifier with Negative-Going Output Referenced to VCC
INSTRUMENTATION AMPLIFIER WITH RAIL-TO-RAIL
INPUT AND OUTPUT
the input and output are only limited by the supply voltages.
Remember that even with rail-to-rail outputs, the output can
not swing past the supplies so the combined common mode
voltages plus the signal should not be greater that the sup-
plies or limiting will occur. For additional applications, see
National Semiconductor application notes AN–29, AN–31,
AN–71, and AN–127.
Some manufactures make a non-“rail-to-rail”-op amp rail-to-
rail by using a resistive divider on the inputs. The resistors
divide the input voltage to get a rail-to-rail input range. The
problem with this method is that it also divides the signal, so
in order to get the obtained gain, the amplifier must have a
higher closed loop gain. This raises the noise and drift by the
internal gain factor and lowers the input impedance. Any mis-
match in these precision resistors reduces the CMRR as well.
The LMV981/LMV982 is rail-to-rail and therefore doesn’t
have these disadvantages.
Using three of the LMV981/LMV982 amplifiers, an instrumen-
tation amplifier with rail-to-rail inputs and outputs can be made
as shown in Figure 5.
In this example, amplifiers on the left side act as buffers to the
differential stage. These buffers assure that the input
impedance is very high and require no precision matched re-
sistors in the input stage. They also assure that the difference
amp is driven from a voltage source. This is necessary to
maintain the CMRR set by the matching R1-R2 with R3-R4.
The gain is set by the ratio of R2/R1 and R3 should equal R1
and R4 equal R2. With both rail-to-rail input and output ranges,
200214g4
FIGURE 5. Rail-to-rail instrumentation amplifier
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14
Simplified Schematic
200214a9
15
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Physical Dimensions inches (millimeters) unless otherwise noted
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. FOR SOLDER BUMP COMPOSITION, SEE “SOLDER INFORMATION” IN THE PACKAGING SECTION OF THE NATATION SEMICONDUCTOR WEB PAGE
(www.national.com)
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACK-
AGE HEIGHT.
6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION DB.
6-Bump micro SMD
NS Package Number TLA06BBA
X1 = 1.031 ±0.030mm X2 = 1.539 ±0.030mm X3 = 0.600 ±0.075mm
6-Pin SC70
NS Package Number MAA06A
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16
6-Pin SOT23
NS Package Number MF06A
10-Pin MSOP
NS Package Number MUB10A
17
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Notes
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