LOG102AIDR [TI]
LOGARITHMIC AND LOG RATIO AMPLIFIER; 对数和对数比放大器
| 型号： | LOG102AIDR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOGARITHMIC AND LOG RATIO AMPLIFIER |
| 文件： | 总15页 (文件大小：246K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LOG102
LOG102
SBOS211A – MARCH 2002
Precision
LOGARITHMIC AND LOG RATIO AMPLIFIER
FEATURES
DESCRIPTION
The LOG102 is a versatile integrated circuit that computes
the logarithm or log ratio of an input current relative to a
reference current.
●
EASY-TO-USE COMPLETE LOG RATIO FUNCTION
● OUTPUT AMPLIFIERS FOR SCALING AND
SIGNAL LOSS INDICATION
The LOG102 is tested over a wide dynamic range of input
signals. In log ratio applications, a signal current can be
generated by a photodiode, and a reference current from a
resistor in series with a precision external voltage reference.
● HIGH ACCURACY: 0.15% FSO Total Error Over
6 Decades
● WIDE INPUT DYNAMIC RANGE:
6 Decades, 1nA to 1mA
A3 and A4 are identical, uncommitted op amps that can be
used for a variety of functions, such as filtering, offsetting,
adding gain or as a comparator to detect loss of signal.
● LOW QUIESCENT CURRENT: 1.25mA
● SO-14 PACKAGE
The output signal at VLOG OUT is trimmed to 1V per decade of
input current. It can be scaled with an output amplifier, either
A3 or A4.
APPLICATIONS
● ONET, OPTICAL POWER METERS
Low dc offset voltage and temperature drift allow accurate
measurement of low-level signals over a wide environmental
temperature range. The LOG102 is specified over the tem-
perature range, 0°C to +70°C, with operation over –40°C to
+85°C.
● LOG, LOG RATIO COMPUTATION:
Communication, Analytical, Medical, Industrial,
Test, General Instrumentation
● PHOTODIODE SIGNAL COMPRESSION AMP
NOTE: U.S. Patent Pending.
● ANALOG SIGNAL COMPRESSION IN FRONT
OF A/D CONVERTER
● ABSORBANCE MEASUREMENT
● OPTICAL DENSITY MEASUREMENT
R1
R2
VLOG OUT = LOG (I1/I2)
VOUT3 = G • LOG (I1/I2), G = 1 +R2/R1
CC
I2
V+
6
VLOG OUT
+IN3
3
–IN3
5
4
14
I1
1
Q1
Q2
7
A3
VOUT3
+IN4
A2
A1
12
8
A4
VOUT4
A4 can be used
as comparator for
signal loss detect.
9
10
11
–IN4
GND
V–
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2001, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
PIN DESCRIPTION
Supply Voltage, V+ to V–.................................................................... 36V
Top View
SO
Input Voltage ....................................................... V– (–0.5) to V+ (+0.5V)
Input Current................................................................................... ±10mA
Output Short-Circuit(2) .............................................................. Continuous
Operating Temperature ....................................................–40°C to +85°C
Storage Temperature .....................................................–55°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
I1
NC
1
2
3
4
5
6
7
14 I2
13 NC
12 +IN4
11 –IN4
10 GND
+IN3
LOG102
–IN3
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) Short circuit to ground, one amplifier per package.
Vlog out
V+
9
8
V–
ELECTROSTATIC
VOUT3
VOUT4
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
NC = No Internal Connection
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
PACKAGE
DESIGNATOR(1)
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
PRODUCT
PACKAGE-LEAD
RANGE
LOG102AID
SO-14
D
0°C to +70°C
LOG102A
LOG102AID
Rails, 58
"
"
"
"
"
LOG102AIDR
Tape and Reel, 2500
NOTES: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = 0°C to +70°C.
At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.
LOG102AID
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
CORE LOG FUNCTION
I
IN /VLOG OUT Equation
VO = log (I1/I2)
LOG CONFORMITY ERROR(1)
Initial
1nA to 100µA (5 decades)
1nA to 1mA (6 decades)
1nA to 100µA (5 decades)
1nA to 1mA (6 decades)
0.04
0.15
0.0002
0.002
±0.3
%
%
%/°C
%/°C
over Temperature
GAIN(2)
Initial Value
Gain Error
vs Temperature
1nA to 100µA (5 decades)
1nA to 100µA (5 decades)
TMIN to TMAX
1
V/decade
%
%/°C
0.15
0.025
±1
0.05
INPUT, A1 and A2
Offset Voltage
±0.3
±2
5
±5
±1.5
mV
µV/°C
µV/V
pA
vs Temperature
vs Power Supply (PSRR)
Input Bias Current
vs Temperature
Voltage Noise
TMIN to TMAX
VS = ±4.5V to ±18V
50
TMIN to TMAX
f = 10Hz to 10kHz
f = 1kHz
Doubles Every 10°C
3
30
4
µVrms
nV/√Hz
fA/√Hz
V
V
dB
Current Noise
Common-Mode Voltage Range (Positive)
f = 1kHz
(V+) – 2
(V–) + 2
90
(V+) – 1.5
(V–) + 1.2
105
(Negative)
CMRR
OUTPUT, A2 (VLOGOUT
)
Output Offset, VOSO, Initial
vs Temperature
±3
±55
25
mV
µV/°C
TMIN to TMAX
Full-Scale Output (FSO)
Short-Circuit Current
VS = ±5V Supplies
(V–) + 1.2
(V+) – 1.5
V
mA
±18
LOG102
2
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SBOS211A
ELECTRICAL CHARACTERISTICS (Cont.)
Boldface limits apply over the specified temperature range, TA = 0°C to +70°C.
At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.
LOG102AID
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
TOTAL ERROR(3)(4)
Initial
I1 or I2 remains fixed while other varies
min to max
I1 or I2 = 1mA
±55
±30
±25
±20
±25
±30
±37
mV
mV
mV
mV
mV
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
mV
mV
vs Temperature
I1 or I2 = 1mA
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
±0.4
±0.07
±0.07
±0.07
±0.07
±0.07
±0.4
±0.15
±0.15
±0.25
±0.2
mV/°C
mV/°C
mV/°C
mV/°C
mV/°C
mV/°C
mV/°C
mV/V
mV/V
mV/V
mV/V
mV/V
mV/V
mV/V
vs Supply
I1 or I2 = 1mA
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
±0.2
±0.15
±0.25
FREQUENCY RESPONSE, core log(5)
BW, 3dB
I2 = 10nA
I2 = 1µA
I2 = 10µA
I2 = 1mA
CC = 4500pF
CC = 150pF
CC = 150pF
CC = 50pF
0.1
38
40
45
kHz
kHz
kHz
kHz
Step Response
Increasing
I2 = 1µA to 1mA (3 decade)
I2 = 100nA to 1µA (1 decade)
I2 = 10nA to 100nA (1 decade)
Decreasing
CC = 150pF
CC = 150pF
CC = 150pF
11
7
110
µs
µs
µs
I2 = 1mA to 1µA (3 decade)
I2 = 1µA to 100nA (1 decade)
I2 = 100nA to 10nA (1 decade)
CC = 150pF
CC = 150pF
CC = 150pF
45
20
550
µs
µs
µs
OP AMPS, A3 AND A4
Input Offset Voltage
vs Temperature
±175
±2
10
–10
±0.5
±750
µV
µV/°C
µV/V
nA
nA
V
TMIN to TMAX
VS = ±4.5V to ±18V
vs Power Supply
50
Input Bias Current(5)
Input Offset Current
Input Voltage Range
Common-Mode Rejection
Input Noise, f = 0.1Hz to 10Hz
f = 1kHz
(V–)
(V+) – 1.5
86
1
dB
µVp-p
nV/√Hz
dB
MHz
V/µs
µs
28
88
1.4
0.5
16
Open Loop Voltage Gain
Gain-Bandwidth Product
Slew Rate
Settling Time, 0.01%
Rated Output
G = 1, 2.5V step
G = 1, 2.5V Step, CL =100pF
VS = 5V, RL = 10kΩ
(V–) + 1.5
±4.5
(V+) – 0.9
V
mA
Short-Circuit Current
–ISC/+ISC
–36/+60
POWER SUPPLY
Operating Range
Quiescent Current
VS
IO = 0
±18
2
V
mA
1.25
TEMPERATURE RANGE
Specified Range, TMIN to TMAX
Operating Range
0
–40
–40
70
+85
+125
°C
°C
°C
Storage Range
Thermal Resistance, θJA
SO-14
100
°C/W
NOTES: (1) Log Conformity Error is peak deviation from the best-fit straight line of VO versus Log (I1/I2) curve expressed as a percent of peak-to-peak full-scale
(2) Output core log function is trimmed to 1V output per decade change of input current. (3) Worst-case Total Error for any ratio of I1/I2, is the largest of the two
errors, when I1 and I2 are considered separately. (4) Total I1 + I2 should be kept below 1.1mA on ±5V supply. (5) Bandwidth (3dB) and transient response are a
function of both the compensation capacitor and the level of input current. (6) Positive conventional current flows into input terminals.
LOG102
SBOS211A
3
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TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.
ONE CYCLE OF NORMALIZED TRANSFER FUNCTION
NORMALIZED TRANSFER FUNCTION
I1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
3
2
VOUT = 1V • Log
I2
1
0
–1
–2
–3
0.1
0
0.001
0.01
0.1
1
10
100
1000
1
2
3
4
6
8
10
I1
I2
I1
I2
Current Ratio,
Current Ratio,
TOTAL ERROR vs INPUT CURRENT
GAIN ERROR vs TEMPERATURE
0.35
60
50
40
30
20
10
0
0.30
0.25
0.20
0.15
0.10
0.05
0.00
–0.05
–0.10
70°C
25°C
0°C
1nA
10nA
100nA
1µA
10µA
100µA
1mA
–60
–40
–20
0
20
40
60
80
Input Current
(I1 or I2)
Temperature (°C)
3dB FREQUENCY RESPONSE
MINIMUM VALUE OF COMPENSATION CAPACITOR
1M
10000
1000
100
10
Select CC for I1 min
and I2 max
10µA
1µA
100µA
100µA
1mA
100k
I1 = 1nA
I1 = 10nA
I
= 1mA
1
10k
1k
100µA
100µA
I1 = 100nA
1 = 1µA
1µA
1nA
I
10nA
1mA
to 10µA
10nA
I
1 = 10µA
100
10
100nA
10nA
I1 = 1nA
I1 = 1mA
I1 = 100µA
I
= 1nA
1
1
Values below 2pF
may be ignored.
0.1
1
1nA
10nA
100nA
1µA
10µA
100µA
1mA
1nA
10nA 100nA 1µA
10µA 100µA 1mA
10mA
I2
I2
LOG102
4
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SBOS211A
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.
LOG CONFORMITY vs VLOGOUT
5
LOG CONFORMITY vs TEMPERATURE
300
200
100
0
4
70°C
3
2
1
6 Decades (1nA to 1mA)
0
25°C
–1
5 Decades (1nA to 100µA)
–2
0°C
–3
–3
–2
–1
0
1
2
3
0
10
20
30
40
50
60
70
VLOGOUT (V)
Temperature (°C)
TOTAL ERROR vs TEMPERATURE
60
50
40
30
20
10
0
1nA
1mA
10nA to 100µA
50 60 70
0
10
20
30
40
Temperature (°C)
LOG102
SBOS211A
5
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R2
10kΩ
APPLICATION INFORMATION
V–
V+
The LOG102 is a true logarithmic amplifier that uses the
base-emitter voltage relationship of bipolar transistors to
compute the logarithm, or logarithmic ratio of a current ratio.
With two uncommitted on-chip operational amplifiers, the
LOG102 provides design flexibility and simplicity.
R1
1MΩ
6
1
5
VOUT
I1
LOG102
Figure 1 shows the basic connections required for operation
of the LOG102 with a gain factor. In order to reduce the
influence of lead inductance of power supply lines, it is
recommended that each supply be bypassed with a 10µF
tantalum capacitor in parallel with a 1000pF ceramic capaci-
tor, as shown in Figure 1. Connecting the capacitors as close
to the LOG102 as possible will contribute to noise reduction
as well.
14
10
R1'
> 1MΩ
9
I2
CC
V–
R2'
10kΩ
V+
FIGURE 2. Bias Current Nulling.
V+
SETTING THE REFERENCE CURRENT
10µF
When the LOG102 is used to compute logarithms, either I1 or
I2 can be held constant and becomes the reference current to
which the other is compared.
1000pF
VOUT = G • VLOGOUT
6
VLOGOUT is expressed as:
1
12
7
VOUT
VLOGOUT = (1V) • log (I1/I2)
(1)
10
4
I
REF can be derived from an external current source (such as
LOG102
R1
5
shown in Figure 3), or it may be derived from a voltage
source with one or more resistors. When a single resistor is
used, the value may be large depending on IREF. If IREF is
10nA and +2.5V is used:
14
3
VLOGOUT
I1
I2
R2
9
11
CC
8
RREF = 2.5V/10nA = 250MΩ
Amplifier A4 not being used.
1000pF
10µF
V–
Unused amplifiers should
have positive inputs grounded
and negative inputs tied to
their respective outputs.
IREF
2N2905
RREF
3.6kΩ
2N2905
+15V
–15V
FIGURE 1. Basic Connections with Output Gain Factor of the
LOG102.
6V
IN834
6V
IREF
=
RREF
INPUT CURRENT RANGE
FIGURE 3. Temperature Compensated Current Source.
To maintain specified accuracy, the input current range of the
LOG102 should be limited from 1nA to 1mA. Input currents
outside of this range may compromise LOG102 performance.
Input currents larger than 1mA result in increased nonlinearity.
An absolute maximum input current rating of 10mA is included
to prevent excessive power dissipation that may damage the
logging transistor.
A voltage divider may be used to reduce the value of the
resistor (as shown in Figure 4). When using this method, one
must consider the possible errors caused by the amplifier’s
input offset voltage. The input offset voltage of amplifier A1
has a maximum value of 1.5mV, making VREF a suggested
value of 100mV.
On ±5V supplies the total input current (I1 + I2) is limited to
1.1mA. Due to compliance issues internal to the LOG102, to
accommodate larger total input currents, supplies should be
increased.
VREF = 100mV
R1 R3
VOS
+
–
14
+5V
Currents smaller than 1nA will result in increased errors due
the input bias currents of op amps A1 and A2 (typically 5pA).
The input bias currents may be compensated for, as shown in
Figure 2. The input stages of the amplifiers have FET inputs,
with input bias current doubling every 10°C, which makes the
nulling technique shown practical only where the temperature
is fairly stable.
A1
IREF
R2
R3 >> R2
FIGURE 4. T Network for Reference Current.
LOG102
6
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SBOS211A
Figure 5 shows a low-level current source using a series
resistor. The low offset op-amp reduces the effect of the
LOG102’s input offset voltage.
NEGATIVE INPUT CURRENTS
The LOG102 will function only with positive input currents
(conventional current flow into pins 1 and 14). In situations
where negative input currents are needed, the circuits in
Figures 6, 7, 8, and 9, may be used.
V+
V+
I1 = 2.5nA to 1mA
6
2.5V
1
5
REF3025
VLOGOUT
1GΩ to 2.5kΩ
2 = 2.5nA
LOG102
100kΩ
100Ω
I
QA
QB
IIN
10MΩ
14
+25mV
National
LM394
5
9
10
+2.5V
CC
V–
D1
D2
OPA335 Chopper Om Amp
–2.5V
OPA703
IOUT
FIGURE 5. Current Source with Offset Compensation.
FREQUENCY RESPONSE
The 3dB frequency response of the LOG102 is a function of
the magnitude of the input current levels and of the value of
the frequency compensation capacitor. See Typical Charac-
teristic Curves for details.
FIGURE 6. Current Inverter/Current Source.
The frequency response curves are shown for constant DC
I1 and I2 with a small signal AC current on one of them.
+5V
1
2
OPA2335
TLV271 or
The transient response of the LOG102 is different for in-
creasing and decreasing signals. This is due to the fact that
a log amp is a nonlinear gain element and has different gains
at different levels of input signals. Smaller input currents
require greater gain to maintain full dynamic range, and will
slow the frequency response of the LOG102.
+3.3V
1/2 OPA2335
1.5kΩ
1.5kΩ
+5V
BSH203
1/2 OPA2335
Back Bias
+3.3V
10nA to 1mA
FREQUENCY COMPENSATION
LOG102
10nA to 1mA
Pin 1 or Pin 14
Frequency compensation for the LOG102 is obtained by
connecting a capacitor between pins 5 and 14. The size of
the capacitor is a function of the input currents, as shown in
the Typical Characteristic Curves (Minimum Value of Com-
pensation Capacitor). For any given application, the smallest
value of the capacitor which may be used is determined by
the maximum value of I2 and the minimum value of I1. Larger
values of CC will make the LOG102 more stable, but will
reduce the frequency response.
Photodiode
NOTE: OPA2335 Available Q2 2002
FIGURE 7. Precision Current Inverter/Current Source.
VOLTAGE INPUTS
In an application, highest overall bandwidth can be achieved
by detecting the signal level at VOUT, then switching in
appropriate values of compensation capacitors.
The LOG102 gives the best performance with current inputs.
Voltage inputs may be handled directly with series resistors,
but the dynamic input range is limited to approximately three
decades of input voltage by voltage noise and offsets. The
transfer function of equation (14) applies to this configura-
tion.
As seen on front page diagram, the voltage output of VLOGOUT
can be scaled by increasing or decreasing the resistor ratio
connected to pins 4 and 7. The gain, G, can be set according
to the following equation:
G = 1 + R2/R1
(2)
LOG102
SBOS211A
7
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1.5kΩ
100kΩ
100kΩ
+5V
10nA to 1mA
Back Bias
+3.3V
+3.3V
+5V
1.5kΩ
1.5kΩ
1/2 OPA2335
1/2 OPA2335
Photodiode
100kΩ
100kΩ
10nA to 1mA
LOG102
NOTE: OPA2335 Available Q2 2002
Pin 1 or Pin 14
FIGURE 8. Precision Current Inverter/Current Source.
DATA COMPRESSION
V+
6
In many applications the compressive effects of the logarith-
mic transfer function are useful. For example, a LOG102
preceding a 12-bit Analog-to-Digital (A/D) converter can
produce the dynamic range equivalent to a 20-bit converter.
(–VRB
)
1
5
VOUT
I1
Signal
LOG102
(–VRB
)
14
I2
REF
V+
9
10
CC
6
I1
1
5
VOUT
D1
Sample
λ1´
–VRB
V–
LOG102
λ1
NOTES: (1) –VRB, must be 2.5V more positive than V–. Example, for
RB = –9.5V, V– =12V. (2) Typically, –3.3V bias is used with ±12V supplies.
I2
V
14
10
λ1
Light
Source
9
D2
FIGURE 9. Reverse Biased Photodiode Using Pin 10 on
LOG102.
CC
V–
APPLICATION CIRCUITS
LOG RATIO
One of the more common uses of log ratio amplifiers is
to measure absorbance. A typical application is shown in
Figure 10.
FIGURE 10. Absorbance Measurement.
Absorbance of the sample is A = logλ1´/ λ1
(3)
If D1 and D2 are matched A (1V) logI1/I2
(4)
LOG102
8
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SBOS211A
INSIDE THE LOG102
also
Using the base-emitter voltage relationship of matched
bipolar transistors, the LOG102 establishes a logarith-
mic function of input current ratios. Beginning with the
base-emitter voltage defined as
R1 + R2
VOUT = VL
= log
(9)
R1
I1
IC
IS
kT
q
(10)
VBE = VT ln
where : VT =
(1)
I2
k = Boltzman’s constant = 1.381 • 10–23
T = Absolute temperature in degrees Kelvin
q = Electron charge = 1.602 • 10–19 Coulombs
IC = Collector current
R1 + R2
I1
I2
or
VOUT
=
n VT log
(11)
R1
IS = Reverse saturation current
I2
Q1
Q2
–
–
I1
From the circuit in Figure 11, we see that
VOUT
+
+
A2
VBE VBE
1
2
I1
VL = VBE – VBE
1
2
(2)
(3)
A1
I1
I2
R2
VL
R1
VOUT = (1V) LOG
Substituting (1) into (2) yields
I2
I2
I1
VL = VT1 ln
– VT2 ln
IS1
IS2
If the transistors are matched and isothermal and
VTI = VT2, then (3) becomes:
FIGURE 11. Simplified Model of Log Amplifier.
I1
VL = VT1 ln –ln
IS
I2
(4)
(5)
IS
It should be noted that the temperature dependance
associated with VT = kT/q is internally compensated on
the LOG102 by making R1 a temperature sensitive resis-
tor with the required positive temperature coefficient.
I1
VL = VT ln
and since
I2
ln x = 2.3log10
I1
x
(6)
(7)
VL = n VT log
I2
where n = 2.3
(8)
USING A LARGER REFERENCE VOLTAGE
REDUCES OFFSET ERRORS
IREF such that it is as large or larger than the expected
maximum photodiode current is accomplished using this
requirement. The LOG102 configured with the reference
current connecting I1 and the photodiode current connecting
to I2 is shown in Figure 12. A3 is configured as a level shifter
with inverting gain and is used to scale the photodiode
current directly into the A/D input voltage range.
Using a larger reference voltage to create the reference
current minimizes errors due to the LOG102’s input offset
voltage. Maintaining an increasing output voltage as a func-
tion of increasing photodiode current is also important in
many optical sensing applications. All zeros from the A/D
converter output represent zero or low scale photodiode
current. Inputting the reference current into I1, and designing
The wide dynamic range of the LOG102 is useful for measuring
avalanche photodiode current (APD) (see Figure 13).
LOG102
SBOS211A
9
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VREF
R1
R2
R3
IREF
IREF
=
VOUT = VREF
–
• LOG
( )
R2
R3
IPHOTO
CC
VLOGOUT
5
3
VMIN to VMAX
IREF
R1
I1
Q1
Q2
7
1
A3
A/D
A2
VREF
A1
R2
R3
4
IPHOTO
I2
14
LOG102
I
MIN to IMAX
10
FIGURE 12. Technique for Using Full-Scale Reference Current Such that VOUT Increases with Increasing Photodiode Current.
ISHUNT
+15V to +60V
500
Irx = 1µA to 1mA
Receiver
5kΩ
5kΩ
10gbits/sec
+5V
APD
I to V
Converter
INA168
SOT23-5
IOUT = 0.1 • ISHUNT
1
2
IOUT
CC
1.2kΩ
1kΩ
+5V
6
5
4
1
Q1
Q2
7
3
A3
VOUT = 2.5V to 0V
A2
A1
100µA
25kΩ
14
REF3025(1)
2.5V
LOG102
SO-14
9
10
–5V
NOTE: (1) Available Q2 2002.
FIGURE 13. High Side Shunt for Avalanche Photodiode (APD) Measures 3-Decades of APD Current.
LOG102
10
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SBOS211A
ERRORS RTO AND RTI
DEFINITION OF TERMS
TRANSFER FUNCTION
As with any transfer function, errors generated by the func-
tion itself may be Referred-to-Output (RTO) or Referred-to-
Input (RTI). In this respect, log amps have a unique property:
The ideal transfer function is:
Given some error voltage at the log amp’s output, that error
corresponds to a constant percent of the input regardless of
the actual input level.
VOUT = 1V • logI1/I2
(5)
Figure 14 shows the graphical representation of the transfer
over valid operating range for the LOG102.
LOG CONFORMITY
For the LOG102, log conformity is calculated the same as
linearity and is plotted I1/I2 on a semi-log scale. In many
applications, log conformity is the most important specifica-
tion. This is true because bias current errors are negligible
(1pA compared to input currents of 1nA and above) and the
scale factor and offset errors may be trimmed to zero or
removed by system calibration. This leaves log conformity as
the major source of error.
3
2
1
10nA
100nA
1µA
10µA 100µA
1mA I1
0
Dashed Line = Greater
Supply Voltage Requirement
I1
VOUT = (1V) • LOG
I2
–3
Log conformity is defined as the peak deviation from the best
fit straight line of the VOUT versus log (I1/I2) curve. This is
expressed as a percent of ideal full-scale output. Thus, the
nonlinearity error expressed in volts over m decades is:
FIGURE 14. Transfer Function with Varying I2 and I1.
ACCURACY
(6)
VOUT (NONLIN) = 1V/dec • 2Nm V
Accuracy considerations for a log ratio amplifier are some-
what more complicated than for other amplifiers. This is
because the transfer function is nonlinear and has two
inputs, each of which can vary over a wide dynamic range.
The accuracy for any combination of inputs is determined
from the total error specification.
where N is the log conformity error, in percent.
INDIVIDUAL ERROR COMPONENTS
The ideal transfer function with current input is:
I1
(7)
VOUT = 1V • log
(
)
I2
TOTAL ERROR
The actual transfer function with the major components of
error is:
The total error is the deviation (expressed in mV) of the
actual output from the ideal output of VOUT = 1V • log(I1/I2).
I1 – IB1
Thus,
(8)
VOUT = 1V 1± ∆K log
± 2Nm ± VOS OUT
(
)
(
)
I2 – IB2
The individual component of error is:
(5)
VOUT (ACTUAL) = VOUT (IDEAL) ± Total Error.
It represents the sum of all the individual components of error
normally associated with the log amp when operated in the
current input mode. The worst-case error for any given ratio
of I1/I2 is the largest of the two errors when I1 and I2 are
considered separately; and is shown in Table I. Temperature
can affect total error.
∆K = gain accuracy (0.3%, typ), as specified in
specification table.
IB1 = bias current of A1 (5pA, typ)
IB2 = bias current of A2 (5pA, typ)
N = log conformity error (0.04%, 0.15%, typ)
0.04% for n = 5, 0.15% for n = 6
I1 (maximum error)(1)
I2
(maximum
VOS OUT = output offset voltage (1mV, typ)
n = number of decades over which N is specified:
Example: what is the error when
10nA
(30mV)
100nA
(25mV)
1µA
(20mV)
error)(1)
100nA
(25mV)
30mV
30mV
30mV
25mV
25mV
25mV
25mV
20mV
25mV
1µA
(20mV)
I1 = 1µA and I2 = 100nA
10–6 – 5 •10–12
(9)
10µA
(25mV)
VOUT = 1± 0.003 log
±(2)(0.0004)5 ± 0.3mV
(
)
10–7 – 5 •10–12
NOTE: (1) Maximum errors are in parenthesis.
TABLE I. I1/I2 and Maximum Errors.
LOG102
SBOS211A
11
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10–6
10–7
EOS
R1
EOS
V1
R1
V2
1
(10)
≈ 1.003 log
+ 0.004 + 0.003
– IB1
– IB2
±
±
(14)
± 2Nn ± VOS OUT
VOUT = 1V 1± ∆K log
(
)
(
)
2
(11)
(12)
= 1.003 (1) + 0.004 + 0.0003
= 1.0073V
R2
R2
Since the ideal output is 1.000V, the error as a percent of
reading is
(15)
are considered to be zero for large
E
EOS2
R2
OS1 and
Where
R1
0.0073
values of resistance from external input current sources.
(13)
% error =
• 100% = 0.73%
1
For the case of voltage inputs, the actual transfer function is
LOG102
12
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SBOS211A
PACKAGE DRAWING
MSOI002B – JANUARY 1995 – REVISED SEPTEMBER 2001
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
0.050 (1,27)
8
0.010 (0,25)
5
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.069 (1,75) MAX
0.004 (0,10)
0.004 (0,10)
PINS **
8
14
16
DIM
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/E 09/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
LOG102
SBOS211A
13
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PACKAGE OPTION ADDENDUM
www.ti.com
3-Oct-2003
PACKAGING INFORMATION
ORDERABLE DEVICE
STATUS(1)
PACKAGE TYPE
PACKAGE DRAWING
PINS
PACKAGE QTY
LOG102AID
ACTIVE
ACTIVE
SOIC
SOIC
D
D
14
14
58
LOG102AIDR
2500
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
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