LP311DG4 [TI]
LOW-POWER DIFFERENTIAL COMPARATORS WITH STROBES; 低功耗差动比较器,选通型号: | LP311DG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | LOW-POWER DIFFERENTIAL COMPARATORS WITH STROBES |
文件: | 总11页 (文件大小:240K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀ ꢁꢂ ꢃꢃꢄ ꢀꢁ ꢅꢃꢃ
ꢀ ꢆ ꢇꢈꢁꢆ ꢇ ꢉꢊ ꢋꢌ ꢍꢍ ꢉꢊ ꢉꢎꢏ ꢌꢐ ꢀ ꢑꢆ ꢒ ꢁꢐ ꢊꢐꢏꢆ ꢊꢓ
ꢇ ꢌꢏ ꢔ ꢓ ꢏꢊ ꢆꢕ ꢉ ꢓ
SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003
LP211 . . . D PACKAGE
LP311 . . . D, P, OR PS PACKAGE
(TOP VIEW)
D
D
Low Power Drain . . . 900 µW Typical With
5-V Supply
Operates From 15 V or From a Single
Supply as Low as 3 V
EMIT OUT
IN+
V
CC+
1
2
3
4
8
7
6
5
COL OUT
BAL/STRB
BALANCE
D
Output Drive Capability of 25 mA
IN−
D
Emitter Output Can Swing Below Negative
Supply
V
CC−
D
D
Response Time . . . 1.2 µs Typ
Low Input Currents:
Offset Current . . . 2 nA Typ
Bias Current . . . 15 nA Typ
D
Wide Common-Mode Input Range:
−14.5 V to 13.5 V Using 15-V Supply
D
D
D
Offset Balancing and Strobe Capability
Same Pinout as LM211, LM311
Designed To Be Interchangeable With
Industry-Standard LP311
description/ordering information
The LP211 and LP311 devices are low-power versions of the industry-standard LM211 and LM311 devices.
They take advantage of stable, high-value, ion-implanted resistors to perform the same function as the LM311
series, with a 30:1 reduction in power consumption, but only a 6:1 slowdown in response time. They are well
suited for battery-powered applications and all other applications where fast response times are not needed.
They operate over a wide range of supply voltages, from 18 V down to a single 3-V supply with less than 300-µA
current drain, but are still capable of driving a 25-mA load. The LP211 and LP311 are quite easy to apply free
of oscillation if ordinary precautions are taken to minimize stray coupling from the output to either input or to the
trim pins. In addition, offset balancing is available to minimize input offset voltage. Strobe capability also is
provided to turn off the output (regardless of the inputs) by pulling the strobe pin low.
The LP211 is characterized for operation from −25°C to 85°C. The LP311 is characterized for operation from
0°C to 70°C.
ORDERING INFORMATION
V
max
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
IO
†
PACKAGE
T
A
AT 25°C
PDIP (P)
Tube of 50
Tube of 75
Reel of 2500
Reel of 2000
Tube of 75
Reel of 2500
LP311P
LP311P
LP311D
−0°C to 70°C
7.5 mV
SOIC (D)
SOP (PS)
LP311
L311
LP311DR
LP311PSR
LP211D
−25°C to 85°C
7.5 mV
SOIC (D)
LP211
LP211DR
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
ꢁꢊ ꢆ ꢋꢖ ꢑ ꢏꢌ ꢆ ꢎ ꢋ ꢐꢏꢐ ꢗꢘ ꢙ ꢚꢛ ꢜ ꢝꢞ ꢗꢚꢘ ꢗꢟ ꢠꢡ ꢛ ꢛ ꢢꢘꢞ ꢝꢟ ꢚꢙ ꢣꢡꢤ ꢥꢗꢠ ꢝꢞ ꢗꢚꢘ ꢦꢝ ꢞꢢ ꢧ
ꢁꢛ ꢚ ꢦꢡꢠ ꢞ ꢟ ꢠ ꢚꢘ ꢙꢚ ꢛ ꢜ ꢞ ꢚ ꢟ ꢣꢢ ꢠ ꢗꢙ ꢗꢠꢝ ꢞꢗ ꢚꢘꢟ ꢣꢢ ꢛ ꢞꢨ ꢢ ꢞꢢ ꢛ ꢜꢟ ꢚꢙ ꢏꢢꢩ ꢝꢟ ꢌꢘꢟ ꢞꢛ ꢡꢜ ꢢꢘꢞ ꢟ
ꢟ ꢞ ꢝ ꢘꢦ ꢝ ꢛꢦ ꢪ ꢝ ꢛꢛ ꢝ ꢘ ꢞꢫꢧ ꢁꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚꢘ ꢣꢛ ꢚꢠ ꢢꢟ ꢟꢗ ꢘꢬ ꢦꢚꢢ ꢟ ꢘꢚꢞ ꢘꢢ ꢠꢢ ꢟꢟ ꢝꢛ ꢗꢥ ꢫ ꢗꢘꢠ ꢥꢡꢦ ꢢ
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ
Copyright 2003, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂꢃꢃ ꢄ ꢀ ꢁꢅ ꢃꢃ
ꢀ ꢆꢇꢈꢁ ꢆꢇꢉꢊ ꢋ ꢌ ꢍꢍ ꢉꢊ ꢉꢎ ꢏꢌ ꢐ ꢀ ꢑꢆ ꢒꢁꢐꢊ ꢐꢏꢆ ꢊꢓ
ꢇꢌ ꢏ ꢔ ꢓꢏ ꢊ ꢆꢕ ꢉꢓ
SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003
functional block diagram
BALANCE
BAL/STRB
IN+
IN−
COL OUT
EMIT OUT
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (see Note 1): V
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 V
CC+
CC−
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V
ID
Input voltage, V (either input, see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
I
Voltage from emitter output to V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V
CC−
Voltage from collector output to V
CC−
Voltage from collector output to emitter output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V
Duration of output short circuit (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V
Package thermal impedance, θ (see Notes 5 and 6): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
JA
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated in the recommended operating conditions section of this
specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between V
2. Differential input voltages are at IN+ with respect to IN−.
and V .
CC−
CC+
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage of 15 V, whichever is less.
4. The output may be shorted to ground or to either power supply.
5. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
J
JA
A
ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.
D
J
A
JA
J
6. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
+ 0.5
MAX
− 1.5
UNIT
V
(|V
| ≤ 15 V)
Input voltage
V
V
CC+
CC
CC−
3.5
V
CC+
− V
CC−
Supply voltage
30
V
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢃꢄ ꢀꢁ ꢅꢃꢃ
ꢀ ꢆ ꢇꢈꢁꢆ ꢇ ꢉꢊ ꢋꢌ ꢍꢍ ꢉꢊ ꢉꢎꢏ ꢌꢐ ꢀ ꢑꢆ ꢒ ꢁꢐ ꢊꢐꢏꢆ ꢊꢓ
ꢇ ꢌꢏ ꢔ ꢓ ꢏꢊ ꢆ ꢕꢉ ꢓ
SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003
electrical characteristics at specified free-air temperature, V
= 15 V (unless otherwise noted)
CC
†
PARAMETER
TEST CONDITIONS
RS < 100 kΩ, See Note 7
= 25 mA,
T
MIN
TYP
MAX
7.5
UNIT
A
25°C
2
V
ID
Input offset voltage
mV
Full range
10
V
< −10 mV,
I
OL
ID
See Note 8
25°C
0.4
1.5
0.4
V
OL
Low-level output voltage
V
V
V
= 4.5 V,
V
I
= 0,
CC
< −10 mV,
CC−
= 1.6 mA,
Full range
0.1
2
ID
OL
See Note 8
25°C
Full range
25°C
25
35
I
I
Input offset current
Input bias current
See Note 7
nA
nA
IO
15
100
150
IB
Full range
V
= 0.3 V,
V
V
< −10 mV,
(strobe)
See Note 9
ID
Low-level strobe current
Output off-state current
25°C
25°C
100
0.2
300
100
µA
I
V
ID
> 10 mV,
= 35 V
nA
O(off)
CE
Large-signal differential-voltage
amplification
A
R
= 5 kΩ
25°C
40
100
150
V/mV
VD
L
I
I
Supply current from V
Supply current from V
V
V
= −50 mV,
= 50 mV,
R
R
= ∞
Full range
Full range
300
µA
µA
CC+
CC+
ID
L
L
= ∞
− 80 − 180
CC−
CC−
ID
†
All typical values are at V
CC
= 15 V, T = 25°C.
A
NOTES: 7. The offset voltages and offset currents given are the maximum values required to drive the output within 1 V of either supply with
a 1-mA load. Thus, these parameters define an error band and take into account the worst-case effects of voltage gain and input
impedance.
8. Voltages are with respect to EMIT OUT and V
tied together.
9. The strobe should not be shorted to ground; it should be current driven at 100 µA to 300 µA.
CC−
switching characteristics, V
= 5 V, T = 25°C (unless otherwise noted)
CC
A
PARAMETER
TEST CONDITIONS
TYP
UNIT
Response time
See Note 10
1.2
µs
NOTE 10: The response time is specified for a 100-mV input step with 5-mV overdrive.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂꢃꢃ ꢄ ꢀ ꢁꢅ ꢃꢃ
ꢀ ꢆꢇꢈꢁ ꢆꢇꢉꢊ ꢋ ꢌ ꢍꢍ ꢉꢊ ꢉꢎ ꢏꢌ ꢐ ꢀ ꢑꢆ ꢒꢁꢐꢊ ꢐꢏꢆ ꢊꢓ
ꢇꢌ ꢏ ꢔ ꢓꢏ ꢊ ꢆꢕ ꢉꢓ
SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003
TYPICAL APPLICATION CIRCUIT
V
CC+
3 kΩ
BAL/STRB
3 kΩ
TTL
Strobe
2N2222
BAL/
STRB
BALANCE
15 kΩ
NOTE: Do not connect strobe pin
directly to ground, because the
output is turned off whenever
current is pulled from the strobe
pin.
NOTE: If offset balancing is not used,
the BALANCE and BAL/STRB
pins should be shorted together.
Figure 2. Strobing
Figure 1. Offset Balancing
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
LP211D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LP211DE4
LP211DR
SOIC
SOIC
SOIC
D
D
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LP211DRE4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LP211P
LP311D
OBSOLETE
ACTIVE
PDIP
SOIC
P
D
8
8
TBD
Call TI
Call TI
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LP311DE4
LP311DG4
LP311DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
D
D
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
LP311DRE4
LP311DRG4
LP311P
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
LP311PE4
LP311PSR
LP311PSRE4
LP311PWLE
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
PS
PS
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OBSOLETE TSSOP
TBD
Call TI
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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