MAX3222CPWRG4 [TI]

DUAL LINE TRANSCEIVER, PDSO20, GREEN, PLASTIC, TSSOP-20;


型号：	MAX3222CPWRG4
厂家：	TEXAS INSTRUMENTS
描述：	DUAL LINE TRANSCEIVER, PDSO20, GREEN, PLASTIC, TSSOP-20 驱动光电二极管接口集成电路驱动器
文件：	总19页 (文件大小：668K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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ꢖ ꢍꢇ ꢏ ꢗ ꢉ ꢅꢘ ꢆ ꢑꢓ ꢔ ꢙꢒꢈ ꢇꢑ ꢎ ꢇꢍ ꢈ ꢐ

ꢚ

SLLS408G − JANUARY 2000 − REVISED MARCH 2004

DB, DW, OR PW PACKAGE

(TOP VIEW)

RS-232 Bus-Pin ESD Protection Exceeds

15 kV Using Human-Body Model (HBM)

Meets or Exceeds the Requirements of

TIA/EIA-232-F and ITU v.28 Standards

C1+

V+

C1−

C2+

C2−

V−

20 PWRDOWN

Operates With 3-V to 5.5-V V Supply

GND

DOUT1

RIN1

ROUT1

DIN1

DIN2

Operates Up To 250 kbit/s

Two Drivers and Two Receivers

Low Standby Current . . . 1 µA Typical

External Capacitors . . . 4 × 0.1 µF

DOUT2

RIN2

ROUT2

Accepts 5-V Logic Input With 3.3-V Supply

Alternative High-Speed Pin-Compatible

Device (1 Mbit/s)

− SNx5C3222

NC − No internal connection

Applications

− Battery-Powered Systems, PDAs,

Notebooks, Laptops, Palmtop PCs, and

Hand-Held Equipment

description/ordering information

The MAX3222 consists of two line drivers, two line receivers, and a dual charge-pump circuit with

15-kV ESD protection pin to pin (serial-port connection pins, including GND). The device meets the

requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication

controller and the serial-port connector. The charge pump and four small external capacitors allow operation

from a single 3-V to 5.5-V supply. The device operates at data signaling rates up to 250 kbit/s and a maximum

of 30-V/µs driver output slew rate.

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

Tube of 25

Reel of 2000

Tube of 70

Reel of 2000

Tube of 70

Reel of 2000

Tube of 25

Reel of 2000

Tube of 70

Reel of 2000

Tube of 70

Reel of 2000

MAX3222CDW

MAX3222CDWR

MAX3222CDB

MAX3222CDBR

MAX3222CPW

MAX3222CPWR

MAX3222IDW

MAX3222IDWR

MAX3222IDB

SOIC (DW)

SSOP (DB)

TSSOP (PW)

SOIC (DW)

SSOP (DB)

TSSOP (PW)

MAX3222C

MA3222C

MAX3222I

MB3222I

−0°C to 70°C

−40°C to 85°C

MAX3222IDBR

MAX3222IPW

MAX3222IPWR

MB3222I

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLLS408G − JANUARY 2000 − REVISED MARCH 2004

description/ordering information (continued)

The MAX3222 can be placed in the power-down mode by setting PWRDOWN low, which draws only 1 µA from

the power supply. When the device is powered down, the receivers remain active while the drivers are placed

in the high-impedance state. Also, during power down, the onboard charge pump is disabled; V+ is lowered to

, and V− is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting

EN high.

Function Tables

EACH DRIVER

INPUTS

OUTPUT

DOUT

DIN

PWRDOWN

H = high level, L = low level, X = irrelevant,

Z = high impedance

EACH RECEIVER

INPUTS

OUTPUT

ROUT

RIN

Open

H = high level, L = low level, X = irrelevant,

Z = high impedance (off), Open = input

disconnected or connected driver off

logic diagram (positive logic)

DIN1

DOUT1

DOUT2

DIN2

Powerdown

PWRDOWN

ROUT1

RIN1

RIN2

ROUT2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄꢄ ꢄ

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ꢖ ꢍꢇ ꢏ ꢗ ꢉ ꢅꢘ ꢆ ꢑꢓ ꢔ ꢙꢒꢈ ꢇꢑ ꢎ ꢇꢍ ꢈ ꢐ

ꢚ

SLLS408G − JANUARY 2000 − REVISED MARCH 2004

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V

Positive output supply voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V

Negative output supply voltage range, V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to −7 V

Supply voltage difference, V+ − V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V

Input voltage range, V : Drivers, EN, PWRDOWN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V

Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 V to 25 V

Output voltage range, V : Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −13.2 V to 13.2 V

Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V

+ 0.3 V

Package thermal impedance, θ (see Notes 2 and 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W

DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W

PW package . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W

Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltages are with respect to network GND.

2. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable

ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 4 and Figure 5)

MIN NOM

MAX

3.6

UNIT

= 3.3 V

= 5 V

4.5

3.3

Supply voltage

5.5

= 3.3 V

= 5 V

Driver and control high-level input voltage

DIN, EN, PWRDOWN

2.4

Driver and control low-level input voltage

Driver and control input voltage

Receiver input voltage

DIN, EN, PWRDOWN

0.8

5.5

−25

MAX3222C

MAX3222I

Operating free-air temperature

°C

−40

NOTE 4: Test conditions are C1−C4 = 0.1 µF at V

= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V = 5 V 0.5 V.

electrical characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Note 4 and Figure 5)

‡

PARAMETER

Input leakage current (EN, PWRDOWN)

Supply current

TEST CONDITIONS

MIN TYP

MAX

UNIT

µA

0.01

0.3

No load, PWRDOWN at V

µA

Supply current (powered off)

No load, PWRDOWN at GND

‡

All typical values are at V

= 3.3 V or V = 5 V, and T = 25°C.

CC A

NOTE 4: Test conditions are C1−C4 = 0.1 µF at V

= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V

= 5 V 0.5 V.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLLS408G − JANUARY 2000 − REVISED MARCH 2004

DRIVER SECTION

electrical characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Note 4 and Figure 5)

†

PARAMETER

High-level output voltage

Low-level output voltage

High-level input current

Low-level input current

TEST CONDITIONS

DOUT at R = 3 kΩ to GND, DIN = GND

DIN = V

MIN TYP

MAX

UNIT

5.4

−5.4

0.01

DOUT at R = 3 kΩ to GND,

−5

V = V

I CC

µA

V at GND

= 3.6 V,

= 0 V

‡

Short-circuit output current

= 5.5 V,

= 0 V

Output resistance

, V+, and V− = 0 V,

2 V

300

10M

Ω

PWRDOWN = GND,

= 3 V to 3.6 V

12 V,

PWRDOWN = GND,

= 4.5 V to 5.5 V

off

Output leakage current

µA

10 V,

†

‡

All typical values are at V

= 3.3 V or V

= 5 V, and T = 25°C.

Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output

should be shorted at a time.

NOTE 4: Test conditions are C1−C4 = 0.1 µF at V

= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V = 5 V 0.5 V.

switching characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Note 4 and Figure 5)

†

PARAMETER

TEST CONDITIONS

MIN TYP

MAX

UNIT

= 1000 pF,

= 3 kΩ,

See Figure 1

Maximum data rate

150

250

300

kbit/s

One DOUT switching,

= 150 pF to 2500 pF,

= 3 kΩ to 7 kΩ,

Pulse skew

sk(p)

See Figure 2

= 150 pF to 1000 pF

= 150 pF to 2500 pF

Slew rate, transition region

(See Figure 1)

= 3 kΩ to 7 kΩ,

SR(tr)

V/µs

= 3.3 V

†

All typical values are at V

= 3.3 V or V = 5 V, and T = 25°C.

CC A

Pulse skew is defined as |t

− t

| of each channel of the same device.

PLH PHL

NOTE 4: Test conditions are C1−C4 = 0.1 µF at V

= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V = 5 V 0.5 V.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄꢄ ꢄ

ꢃ ꢅꢆ ꢇ ꢈ ꢉ ꢊꢉ ꢅꢆ ꢀ ꢋꢌꢇ ꢍꢎꢏ ꢁꢐꢐꢑ ꢌ ꢒꢓ ꢅꢄꢃ ꢄ ꢌ ꢍꢐꢑ ꢔꢒꢍ ꢆꢑ ꢒꢕꢒꢑ ꢎꢑ ꢍ ꢆ ꢑꢒ

ꢖ ꢍꢇ ꢏ ꢗ ꢉ ꢅꢘ ꢆ ꢑꢓ ꢔ ꢙꢒꢈ ꢇꢑ ꢎ ꢇꢍ ꢈ ꢐ

ꢚ

SLLS408G − JANUARY 2000 − REVISED MARCH 2004

RECEIVER SECTION

electrical characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Note 4 and Figure 5)

†

PARAMETER

High-level output voltage

TEST CONDITIONS

MIN

TYP

MAX

UNIT

= −1 mA

= 1.6 mA

− 0.6 V

− 0.1 V

Low-level output voltage

0.4

2.4

= 3.3 V

= 5 V

1.5

1.8

IT+

Positive-going input threshold voltage

= 3.3 V

= 5 V

0.6

0.8

1.2

Negative-going input threshold voltage

IT−

1.5

Input hysteresis (V

IT+

− V

)

0.3

hys

IT−

Output leakage current

EN = V

0.05

µA

kΩ

off

Input resistance

V = 3 V to 25 V

†

All typical values are at V

= 3.3 V or V = 5 V, and T = 25°C.

CC A

NOTE 4: Test conditions are C1−C4 = 0.1 µF at V

= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V

= 5 V 0.5 V.

switching characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Note 4)

†

PARAMETER

TEST CONDITIONS

150 pF, See Figure 3

MIN TYP

MAX

UNIT

Propagation delay time, low- to high-level output

Propagation delay time, high- to low-level output

300

PLH

L =

C = 150 pF, See Figure 3

PHL

C = 150 pF, R = 3 kΩ,

See Figure 4

Output enable time

Output disable time

200

C = 150 pF, R = 3 kΩ,

200

300

dis

See Figure 4

‡

Pulse skew

See Figure 3

sk(p)

†

‡

All typical values are at V

= 3.3 V or V = 5 V, and T = 25°C.

CC A

Pulse skew is defined as |t

− t

| of each channel of the same device.

= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V

PLH PHL

NOTE 4: Test conditions are C1−C4 = 0.1 µF at V

= 5 V 0.5 V.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLLS408G − JANUARY 2000 − REVISED MARCH 2004

PARAMETER MEASUREMENT INFORMATION

3 V

0 V

Input

1.5 V

RS-232

Output

Generator

(see Note B)

50 Ω

TLH

THL

(see Note A)

3 V

PWRDOWN

3 V

−3 V

3 V

−3 V

Output

TEST CIRCUIT

VOLTAGE WAVEFORMS

6 V

or t

SR(tr) +

THL

TLH

NOTES: A.

C includes probe and jig capacitance.

B. The pulse generator has the following characteristics: PRR = 250 kbit/s, Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.

Figure 1. Driver Slew Rate

3 V

0 V

Input

1.5 V

RS-232

Output

Generator

(see Note B)

50 Ω

PLH

PHL

(see Note A)

3 V

PWRDOWN

50%

Output

TEST CIRCUIT

C includes probe and jig capacitance.

VOLTAGE WAVEFORMS

NOTES: A.

B. The pulse generator has the following characteristics: PRR = 250 kbit/s, Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.

Figure 2. Driver Pulse Skew

0 V

3 V

Input

1.5 V

−3 V

Output

Generator

(see Note B)

50 Ω

PLH

PHL

(see Note A)

50%

Output

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A.

includes probe and jig capacitance.

B. The pulse generator has the following characteristics: Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.

Figure 3. Receiver Propagation Delay Times

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄꢄ ꢄ

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ꢖ ꢍꢇ ꢏ ꢗ ꢉ ꢅꢘ ꢆ ꢑꢓ ꢔ ꢙꢒꢈ ꢇꢑ ꢎ ꢇꢍ ꢈ ꢐ

ꢚ

SLLS408G − JANUARY 2000 − REVISED MARCH 2004

PARAMETER MEASUREMENT INFORMATION

3 V

0 V

GND

Input

1.5 V

PZH

PHZ

S1 at GND)

(S1 at GND)

3 V or 0 V

Output

50%

(see Note A)

0.3 V

PLZ

(S1 at V

Generator

(see Note B)

)

50 Ω

Output

50%

PZL

(S1 at V

)

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A.

C includes probe and jig capacitance.

B. The pulse generator has the following characteristics: Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.

Figure 4. Receiver Enable and Disable Times

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢄ

ꢌ

ꢍ

ꢐ

ꢑ

ꢔ

ꢒ

ꢍ

ꢆ

ꢑ

ꢒ

ꢕ

ꢒ

ꢑ

ꢎ

ꢑ

ꢍ

ꢆ

ꢑ

ꢒ

ꢖ

ꢍ

ꢇ

ꢏ

ꢗ

ꢉꢅ

ꢘ

ꢆ

ꢑ

ꢓ

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SLLS408G − JANUARY 2000 − REVISED MARCH 2004

APPLICATION INFORMATION

Powerdown

PWRDOWN

C1+

V+

−

BYPASS

= 0.1 µF

GND

−

†

DOUT1

RIN1

C1−

C2+

C2−

V−

−

ROUT1

−

DOUT2

RIN2

DIN1

DIN2

ROUT2

†

C3 can be connected to V

or GND.

NOTES: A. Resistor values shown are nominal.

B. NC − No internal connection

C. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be

connected as shown.

vs CAPACITOR VALUES

C2, C3, and C4

0.1 µF

0.047 µF

0.1 µF

3.3 V " 0.3 V

5 V " 0.5 V

3 V to 5.5 V

0.33 µF

0.47 µF

Figure 5. Typical Operating Circuit and Capacitor Values

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

10-Jun-2014

PACKAGING INFORMATION

Orderable Device

MAX3222CDB

Status Package Type Package Pins Package

Eco Plan

Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

0 to 70

Device Marking

Samples

Drawing

Qty

(1)

(2)

(6)

(3)

(4/5)

ACTIVE

SSOP

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

MA3222C

MAX3222CDBR

MAX3222CDBRE4

MAX3222CDBRG4

MAX3222CDW

ACTIVE

2000

Green (RoHS

& no Sb/Br)

0 to 70

MA3222C

MAX3222C

MA3222C

MB3222I

Green (RoHS

& no Sb/Br)

0 to 70

Green (RoHS

& no Sb/Br)

0 to 70

Green (RoHS

& no Sb/Br)

0 to 70

MAX3222CDWG4

MAX3222CDWR

MAX3222CDWRE4

MAX3222CPW

SOIC

Green (RoHS

& no Sb/Br)

0 to 70

SOIC

2000

Green (RoHS

& no Sb/Br)

0 to 70

SOIC

Green (RoHS

& no Sb/Br)

0 to 70

TSSOP

SSOP

SOIC

Green (RoHS

& no Sb/Br)

0 to 70

MAX3222CPWG4

MAX3222CPWR

MAX3222CPWRE4

MAX3222IDB

Green (RoHS

& no Sb/Br)

0 to 70

2000

Green (RoHS

& no Sb/Br)

0 to 70

Green (RoHS

& no Sb/Br)

0 to 70

Green (RoHS

& no Sb/Br)

-40 to 85

MAX3222IDBG4

MAX3222IDBR

Green (RoHS

& no Sb/Br)

MB3222I

2000

Green (RoHS

& no Sb/Br)

MB3222I

MAX3222IDBRE4

MAX3222IDW

Green (RoHS

& no Sb/Br)

MB3222I

Green (RoHS

& no Sb/Br)

MAX3222I

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Jun-2014

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

-40 to 85

Device Marking

Samples

Drawing

Qty

(1)

(2)

(6)

(3)

(4/5)

MAX3222IDWG4

MAX3222IDWR

MAX3222IPW

ACTIVE

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

MAX3222I

ACTIVE

2000

Green (RoHS

& no Sb/Br)

MAX3222I

MB3222I

TSSOP

Green (RoHS

& no Sb/Br)

MAX3222IPWG4

MAX3222IPWR

MAX3222IPWRE4

Green (RoHS

& no Sb/Br)

2000

Green (RoHS

& no Sb/Br)

Green (RoHS

& no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

10-Jun-2014

⁽⁶⁾Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

MAX3222CDBR

MAX3222CDWR

MAX3222CPWR

MAX3222IDBR

MAX3222IDWR

MAX3222IPWR

SSOP

SOIC

2000

330.0

16.4

24.4

16.4

24.4

16.4

8.2

10.8

6.95

8.2

7.5

13.0

7.1

2.5

2.7

1.6

2.5

2.7

1.6

12.0

8.0

16.0

24.0

16.0

24.0

16.0

TSSOP

SSOP

SOIC

7.5

12.0

8.0

10.8

6.95

13.0

7.1

TSSOP

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

MAX3222CDBR

MAX3222CDWR

MAX3222CPWR

MAX3222IDBR

MAX3222IDWR

MAX3222IPWR

SSOP

SOIC

2000

367.0

38.0

45.0

38.0

45.0

38.0

TSSOP

SSOP

SOIC

TSSOP

Pack Materials-Page 2

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38

0,22

0,65

0,15

0,25

0,09

5,60

5,00

8,20

7,40

Gage Plane

0,25

0°–ā8°

0,95

0,55

Seating Plane

0,10

2,00 MAX

0,05 MIN

PINS **

DIM

6,50

5,90

6,50

5,90

7,50

8,50

7,90

10,50

9,90

10,50 12,90

A MAX

A MIN

6,90

9,90

12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other

changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest

issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and

complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale

supplied at the time of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary

to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily

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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and

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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

MAX3222CPWRG4 [TI]

相关型号：

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