MC3487DE4 [TI]
QUADRUPLE DIFFERENTIAL LINE DRIVER; 四路差动线路驱动器
| 型号： | MC3487DE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE DIFFERENTIAL LINE DRIVER |
| 文件： | 总12页 (文件大小：392K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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ꢆ ꢇꢈꢉꢊ ꢇꢋꢌ ꢍ ꢉꢎ ꢏꢏ ꢍꢊ ꢍꢐꢑ ꢎꢈ ꢌ ꢌ ꢎꢐ ꢍ ꢉ ꢊꢎ ꢒ ꢍꢊ
SLLS098C − MAY 1980 − REVISED FEBRUARY 2004
D, N, OR NS PACKAGE
(TOP VIEW)
D
Meets or Exceeds Requirements of ANSI
TIA/EIA-422-B and ITU
Recommendation V.11
V
1A
1Y
1
2
3
4
5
6
7
8
16
15
14
13
CC
D
D
D
D
D
3-State, TTL-Compatible Outputs
Fast Transition Times
4A
4Y
4Z
1Z
High-Impedance Inputs
1,2EN
2Z
12 3,4EN
11 3Z
Single 5-V Supply
2Y
Power-Up and Power-Down Protection
10
9
3Y
3A
2A
GND
description/ordering information
The MC3487 offers four independent differential line drivers designed to meet the specifications of ANSI
TIA/EIA-422-B and ITU Recommendation V.11. Each driver has a TTL-compatible input buffered to reduce
current and minimize loading.
The driver outputs utilize 3-state circuitry to provide high-impedance states at any pair of differential outputs
when the appropriate output enable is at a low logic level. Internal circuitry is provided to ensure the
high-impedance state at the differential outputs during power-up and power-down transition times, provided the
output enable is low.
The MC3487 is designed for optimum performance when used with the MC3486 quadruple line receiver. It is
supplied in a 16-pin dual-in-line package and operates from a single 5-V supply.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
Tube
MC3487N
MC3487N
Tube
MC3487D
0°C to 70°C
SOIC − D
SOP − NS
MC3487
MC3487
Tape and reel
Tape and reel
MC3487DR
MC3487NSR
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each driver)
OUTPUTS
OUTPUT
ENABLE
INPUT
Y
H
L
Z
L
H
L
H
H
L
H
Z
X
Z
H = TTL high level, L = TTL low level,
X = irrelevant, Z = High impedance
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂꢃ ꢄꢅ
ꢆꢇ ꢈ ꢉꢊ ꢇ ꢋꢌ ꢍ ꢉꢎ ꢏ ꢏꢍ ꢊꢍ ꢐꢑ ꢎ ꢈꢌ ꢌꢎ ꢐ ꢍ ꢉꢊ ꢎ ꢒꢍ ꢊ
SLLS098C − MAY 1980 − REVISED FEBRUARY 2004
logic diagram (positive logic)
4
1
7
1,2EN
1A
2
3
1Y
1Z
6
5
2Y
2Z
2A
12
9
3,4EN
3A
10
11
3Y
3Z
14
13
15
4Y
4Z
4A
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
CC
TYPICAL OF ALL OUTPUTS
V
V
CC
Input
9 Ω NOM
Output
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLLS098C − MAY 1980 − REVISED FEBRUARY 2004
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
I
Output voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
O
Package thermal impedance, θ (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential output voltage, V
, are with respect to the network ground terminal.
OD
2. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
J
JA
A
ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.
D
J
A
JA
J
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN NOM
MAX
UNIT
V
V
V
V
Supply voltage
4.75
2
5
5.25
CC
IH
IL
High-level input voltage
Low-level input voltage
Operating free-air temperature
V
0.8
70
V
T
A
0
°C
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂꢃ ꢄꢅ
ꢆꢇ ꢈ ꢉꢊ ꢇ ꢋꢌ ꢍ ꢉꢎ ꢏ ꢏꢍ ꢊꢍ ꢐꢑ ꢎ ꢈꢌ ꢌꢎ ꢐ ꢍ ꢉꢊ ꢎ ꢒꢍ ꢊ
SLLS098C − MAY 1980 − REVISED FEBRUARY 2004
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
Input clamp voltage
TEST CONDITIONS
MIN
MAX
UNIT
V
V
V
I = −18 mA
−1.5
V
V
V
IK
I
High-level output voltage
Low-level output voltage
Differential output voltage
Change in magnitude of
differential output voltage
Common-mode output voltage
Change in magnitude of
V
V
= 0.8 V,
= 0.8 V,
= 100 Ω,
V
V
= 2 V,
= 2 V,
I
I
= −20 mA
= 48 mA
2.5
OH
OL
IL
IH
OH
0.5
IL
IH
OL
|V
|
R
See Figure 1
2
OD
L
∆|V
|
|
R
R
= 100 Ω,
= 100 Ω,
See Figure 1
See Figure 1
0.4
3
V
V
OD
L
L
†
‡
V
OC
∆|V
R
= 100 Ω,
See Figure 1
0.4
V
OC
L
†
common-mode output voltage
V
O
V
O
V
O
V
O
= 6 V
100
−100
100
I
Output current with power off
V
= 0
µA
O
CC
= −0.25 V
= 2.7 V
= 0.5 V
I
I
High-impedance-state output current
Output enables at 0.8 V
V = 5.5 V
µA
µA
OZ
−100
Input current at maximum input
voltage
100
I
I
I
I
I
High-level input current
Low-level input current
V = 2.7 V
50
µA
µA
IH
I
V = 0.5 V
I
−400
IL
§
Short-circuit output current
V = 2 V
I
−40 −140
mA
OS
Outputs disabled
Outputs enabled,
105
85
I
Supply current (all drivers)
mA
CC
No load
†
∆|V
| and ∆|V
| are the changes in magnitude of V
OC OD
and V , respectively, that occur when the input is changed from a high level to a low
OC
OD
level.
‡
§
In ANSI Standard TIA/EIA-422-B, V , which is the average of the two output voltages with respect to ground, is called output offset voltage,
OC
V
.
OS
Only one output at a time should be shorted, and duration of the short circuit should not exceed one second.
switching characteristics over recommended operating free-air temperature range, V
= 5 V
CC
PARAMETER
TEST CONDITIONS
MIN
MAX
20
20
UNIT
t
t
t
t
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
Skew time
PLH
PHL
sk
C
= 15 pF,
See Figure 2
ns
L
C
C
= 15 pF,
= 15 pF,
See Figure 2
See Figure 3
6
20
30
30
25
30
ns
ns
L
L
Differential-output transition time
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
t(OD)
t
t
t
t
PZH
PZL
PHZ
PLZ
C
C
= 50 pF,
= 50 pF,
See Figure 4
See Figure 4
ns
ns
L
L
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLLS098C − MAY 1980 − REVISED FEBRUARY 2004
PARAMETER MEASUREMENT INFORMATION
50 Ω
V
OD
V
OC
50 Ω
Figure 1. Differential and Common-Mode Output Voltages
3 V
0 V
1.5 V
1.5 V
Input
t
PHL
t
PLH
V
OH
5 V
200 Ω
1.5 V
1.5 V
Y Output
SW1
V
OL
Generator
(see Note A)
Skew
t
Skew
50 Ω
C
= 15 pF
t
PHL
L
PLH
1.5 V
(see Note B)
V
V
OH
3 V
Z Output
1.5 V
See Note C
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: t ≤ 5 ns, t ≤ 5 ns, PRR ≤ 1 MHz, duty cycle = 50%,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and stray capacitance.
C. All diodes are 1N916 or 1N3064.
Figure 2. Test Circuit and Voltage Waveforms
3 V
C
R
= 100 Ω
L
L
Input
Output
Generator
(see Note A)
0 V
t
50 Ω
3 V
t
t(OD)
t(OD)
C
= 15 pF
L
90%
10%
Output
(see Note B)
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: t ≤ 5 ns, t ≤ 5 ns, PRR ≤ 1 MHz, duty cycle = 50%,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and stray capacitance.
Figure 3. Test Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLLS098C − MAY 1980 − REVISED FEBRUARY 2004
PARAMETER MEASUREMENT INFORMATION
5 V
Output
200 Ω
SW3
SW1
0 V or 3 V
C
= 15 pF
See Note C
L
1 kΩ
(see Note B)
Generator
(see Note A)
50 Ω
SW2
TEST CIRCUIT
Output
Enable Input
Output
Enable Input
3 V
0 V
3 V
1.5 V
1.5 V
0 V
t
t
PHZ
PZL
SW1 Closed
SW2 Open
V
OH
0.5 V
0.5 V
SW1 Closed
SW2 Closed
≈1.5 V
1.5 V
Output
Output
Output
Output
V
V
OL
t
PZH
t
PLZ
≈1.5 V
OH
SW1 Closed
SW2 Closed
1.5 V
SW1 Open
SW2 Closed
V
OL
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: t ≤ 5 ns, t ≤ 5 ns, PRR ≤ 1 MHz, duty cycle = 50%,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and stray capacitance.
C. All diodes are 1N916 or 1N3064.
Figure 4. Driver Test Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
MC3487D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MC3487DE4
MC3487DR
SOIC
SOIC
SOIC
D
D
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MC3487DRE4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MC3487J
MC3487N
OBSOLETE
ACTIVE
CDIP
PDIP
J
16
16
TBD
Call TI
Call TI
N
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
MC3487NE4
MC3487NSR
MC3487NSRE4
ACTIVE
ACTIVE
ACTIVE
PDIP
SO
N
16
16
16
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
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SI9137DB
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