MM74C02N [TI]
TTL/H/L SERIES, QUAD 2-INPUT NOR GATE, PDIP14, DIP-14;
| 型号： | MM74C02N |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | TTL/H/L SERIES, QUAD 2-INPUT NOR GATE, PDIP14, DIP-14 栅 输入元件 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总8页 (文件大小：391K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MM54C00,MM54C02,MM54C04,MM54C10,MM54C20,
MM74C00,MM74C02,MM74C04,MM74C10,MM74C20
MM54C00 MM54C02 MM54C04 MM54C10 MM54C20 MM74C00 MM74C02 MM74C04 MM74C10
MM74C20 Input Gate
Literature Number: SNOS316A
February 1988
MM54C00/MM74C00 Quad 2-Input NAND Gate
MM54C02/MM74C02 Quad 2-Input NOR Gate
MM54C04/MM74C04 Hex Inverter
MM54C10/MM74C10 Triple 3-Input NAND Gate
MM54C20/MM74C20 Dual 4-Input NAND Gate
General Description
Features
Y
Wide supply voltage range
3V to 15V
1V
These logic gates employ complementary MOS (CMOS) to
achieve wide power supply operating range, low power con-
sumption, high noise immunity and symmetric controlled
rise and fall times. With features such as this the 54C/74C
logic family is close to ideal for use in digital systems. Func-
tion and pin out compatibility with series 54/74 devices mini-
mizes design time for those designers already familiar with
the standard 54/74 logic family.
Y
Guaranteed noise margin
Y
High noise immunity
(typ.)
Y
Low power consumption
10 (typ.)
out 2
driving L
Y
Low power
TTL compatibility
All inputs are protected from damage due to static dis-
and GND.
charge by diode clamps to V
CC
Connection Diagrams
Dual-In-Line Package
MM54C02/MM74C02
MM54C00/MM74C00
M4C04/MM74C04
TL/F/5877–1
TL/F/5877–2
TL/F/5877–3
Top View
Top Vi
Top View
Order Number MM54C00
MM74C00
Number MM54C02 or
MM74C02
Order Number MM54C04
or MM74C04
MM74C1
MM54C20/MM74C20
TL/F/5877–4
TL/F/5877–5
Top View
Top View
Order Number MM54C10 or
MM74C10
Order Number MM54C20 or
MM74C20
C
1995 National Semiconductor Corporation
TL/F/5877
RRD-B30M115/Printed in U. S. A.
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating V Range
CC
3.0V to 15V
18V
Maximum V Voltage
CC
Power Dissipation (P )
D
Dual-In-Line
Small Outline
b
a
0.3V
Voltage at Any Pin
0.3V to V
CC
700 mW
500 mW
Operating Temperature Range
b
b
a
55 C to 125 C
54C
74C
§
40 C to 85 C
§
Lead Temperature
(Soldering, 10 seconds)
a
§
§
300 C
§
b
a
65 C to 150 C
Storage Temperature Range
§
§
DC Electrical Characteristics
Min/Max limits apply across the guaranteed temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
e
e
e
e
e
e
e
e
e
V
V
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltage
V
V
V
V
V
V
V
V
V
V
V
5.0V
10V
3.5
8.0
V
V
IN(1)
CC
CC
CC
CC
CC
CC
CC
CC
CC
5.0V
10V
V
IN(0)
V
e b
5.0V, I
10 mA
4.5
9.0
V
OUT(1)
OUT(0)
O
e b
10V, I
10 mA
V
O
e
5.0V, I
10 mA
0.5
.0
1.0
V
O
e
10V, I
10 mA
V
O
e
IN
I
I
I
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
Supply Current
15V, V
15V, V
15V
15V
0V
0.5
mA
mA
mA
IN(1)
IN(0)
CC
e
e
e
IN
b
b
005
0.01
CC
CC
15
LOW POWER TO CMOS
e
e
e
e
e
e
b
V
V
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltag
54C, V
74C, V
54C, V
74C, V
54C, V
74C, V
54C
4
4.5V
V
V
1.5
1.5
V
V
V
V
V
V
V
V
IN(1)
CC
CC
CC
CC
CC
CC
CC
CC
4.75V
4.5V
0.8
0.8
IN(0)
4.7
4.V, I
e
O
4.4
4.4
OUT(1)
OUT(0)
e b
4.75I
10 A
10
O
e
5V, I
0.4
0.4
O
e
, I
10 mA
O
CMOS TO LOW POWER
e
e
e
e
e
e
V
V
V
V
Logical ‘‘1’’ In
Logical ‘‘0
Logical ‘‘1’’
Logical ‘‘0’’ Output Voltage
54C,
C, V
, V
, V
C, V
74C, V
54C, V
74C, V
4.0
4.0
V
V
V
V
V
V
V
V
IN(1)
CC
CC
CC
CC
CC
CC
CC
4.75V
4.5V
1.0
1.0
IN(0)
4.75V
e b
O
4.5V, I
360 mA
2.4
2.4
OUT(1)
OUT(0)
e b
4.75V, I
360 mA
360 mA
O
e
4.5V, I
0.4
0.4
O
e
4.75V, I
360 mA
O
e
OUTPUT DRIVE (see 54C/74C Family Characteristics Data Sheet) T
25 C (short circuit current)
§
A
e
e
e
e
e
e
b
1.75
I
I
I
I
Output Source Current
Output Source Current
Output Sink Current
Output Sink Current
V
CC
V
CC
V
CC
V
CC
5.0V, V
0V, V
0V
0V
mA
mA
mA
mA
SOURCE
SOURCE
SINK
IN(0)
OUT
OUT
e
e
b
8.0
10V, V
5.0V, V
0V, V
IN(0)
e
e
V
5.0V, V
1.75
8.0
IN(1)
IN(1)
OUT
CC
e
e
V
10V, V
10V, V
OUT
SINK
CC
2
e
e
50 pF, unless otherwise specified
AC Electrical Characteristics* T
25 C, C
§
A
L
Symbol
Parameter
Conditions
Min
Typ
Max
Units
MM54C00/MM74C00, MM54C02/MM74C02, MM54C04/MM74C04
e
e
t
, t
pd0 pd1
Propagation Delay Time to
Logical ‘‘1’’ or ‘‘0’’
V
V
5.0V
10V
50
30
6.0
12
90
60
ns
ns
pF
pF
CC
CC
C
C
Input Capacitance
(Note 2)
IN
Power Dissipation Capacitance
(Note 3) Per Gate or Inverter
PD
MM54C10/MM74C10
, t
e
e
t
Propagation Delay Time to
Logical ‘‘1’’ or ‘‘0’’
V
V
5.0V
10V
60
35
7.0
18
100
70
ns
ns
pF
pF
pd0 pd1
CC
CC
C
C
Input Capacitance
(Note 2)
IN
Power Dissipation Capacitance
(Note 3) Per Gate
PD
MM54C20/MM74C20
, t
e
e
t
Propagation Delay Time to
Logical ‘‘1’’ or ‘‘0’’
V
V
5.0V
10V
70
40
9
80
ns
ns
pF
pF
pd0 pd1
CC
CC
C
C
Input Capacitance
(Note 2)
IN
Power Dissipation Capacitance
(Note 3) Per Gate
0
PD
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be ept for ‘‘Opeating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrstics’’ rovides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C determines the no load AC power consumption of any CMOS device. For comexplansee 544C Family Characteristics Application
PD
NoteÐAN-90.
Typical Performance Characteristics
Power Dissipation vs Frequency
MM54C00/MM74C00,
MM54C02/MM74C02,
Guaranteed Noise Margin
Over pture vs V
Gate Transfer Characteristics
MM54C04/MM74C04
CC
TL/F/5877–6
3
Typical Performance Characteristics (Continued)
Propagation Delay vs
Ambient Temperature
MM54C00/MM74C00,
MM54C02/MM74C02,
MM54C04/MM74C04
Propagation Delay vs
Ambient Temperature
MM54C00/MM74C00,
MM54C02/MM74C02,
MM54C04/MM74C04
Propagation Delay Time vs
Load Capacitance
MM54C00/MM74C00,
MM54C02/MM74C02,
MM54C04/MM74C04
/F/58–7
Propagation Delay Time vs
Load Capacitance
MM54C10/MM74C10
Propagation Dy Time
Load Capacitnc
MM54C20/MM74C2
TL/F877–8
TL/F/5877–9
Switching Time Waefod AC est Circuit
CM
TL/F/5877–11
TL/F/5877–10
s
f
Note: Delays measured with input t , t
r
20 ns.
4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C00J, MM54C02J, MM54C04J, MM54C0J,
MM74C00J, MM74C02J, MM74C04J, MM74C10J or
NS Package Number JA
5
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number MM54C00N, MM54C02N, MM54C04N, MM54C10N, MM54C20N
MM74C00N, MM74C02N, MM74C04N, MM74C10N or MM74
NS Package Number N14A
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