MUX508IPWR [TI]
9.4pF 导通状态电容、36V、8:1、单通道模拟多路复用器 | PW | 16 | -40 to 125;
| 型号： | MUX508IPWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 9.4pF 导通状态电容、36V、8:1、单通道模拟多路复用器 | PW | 16 | -40 to 125 复用器 |
| 文件： | 总42页 (文件大小：1204K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MUX508, MUX509
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
MUX50x
36V 低电容、低电荷注入、精密模拟多路复用器
1 特性
3 说明
1
•
低导通电容
MUX508 和 MUX509 (MUX50x) 是现代互补金属氧化
物半导体 (CMOS) 模拟多路复用器 (mux)。MUX508
提供 8:1 单端通道，而 MUX509 提供 4:1 差分通道或
双 4:1 单端通道. MUX508 和 MUX509 在双电源（±
5V 至 ±18V）或单电源（10V 至 36V）供电时均能正
常运行。两种器件在由对称电源（如 VDD = 12V，VSS
= –12V）和非对称电源（如 VDD = 12V，VSS = –5V）
供电时也能保证优异性能。所有数字输入具有兼容晶体
管-晶体管逻辑电路 (TTL) 的阈值。当器件在有效电源
电压范围内运行时，该阈值可确保 TTL 和 CMOS 逻辑
电路的兼容性。
–
–
MUX508：9.4pF
MUX509：6.7pF
•
•
•
•
•
•
•
•
•
•
•
低输入泄漏电流：10pA
低电荷注入：0.3pC
轨到轨运行
宽电源电压范围：±5V 至 ±18V 或 10V 至 36V
低导通电阻：125Ω
转换时间：92ns
先断后合开关操作
EN 引脚与 VDD 相连
逻辑电平：2V 至 VDD
低电源电流：45µA
MUX508 和 MUX509 这两款多路复用器的导通和关断
泄漏电流都非常低，因此能够以最小误差切换高输入阻
抗源信号。该器件的电源电流低至 45µA，因此适用于
便携式 进行 VTT 放电。
人体放电模式 (HBM) 静电放电 (ESD) 保护 >
2000V
•
行业标准的薄型小外形尺寸 (TSSOP) 封装和小外
形尺寸集成电路 (SOIC) 封装
器件信息(1)
器件型号
MUX50x
封装
TSSOP (16)
SOIC (16)
封装尺寸（标称值）
5.00mm x 4.40mm
9.90mm x 3.91mm
2 应用
•
•
•
•
•
•
工厂自动化和工业过程控制
可编程逻辑控制器 (PLC)
模拟输入模块
(1) 要了解所有可用封装，请参见数据表末尾的封装选项附录。
自动测试设备 (ATE)
数字万用表
电池监控系统
简化电路原理图
电荷注入与源电压间的关系
2
VDD = 15 V
Bridge Sensor
Thermocouple
1
0
VSS = œ15 V
œ
VINP
ADC
PGA/INA
+
MUX509
VINM
VDD = 10 V
VSS = œ10 V
VDD = 12 V
VSS = 0 V
œ1
œ2
Current
Sensing
Photo
LED
Detector
0
5
10
15
œ15
œ10
œ5
Optical Sensor
C008
Source Voltage (V)
Copyright © 2016, Texas Instruments Incorporated
Analog Inputs
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SBAS758
MUX508, MUX509
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
www.ti.com.cn
目录
8.10 Channel-to-Channel Crosstalk.............................. 21
8.11 Bandwidth ............................................................. 22
8.12 THD + Noise ......................................................... 22
Detailed Description ............................................ 23
9.1 Overview ................................................................. 23
9.2 Functional Block Diagram ....................................... 23
9.3 Feature Description................................................. 24
9.4 Device Functional Modes........................................ 26
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 4
Pin Configuration and Functions......................... 4
Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6
7.2 ESD Ratings.............................................................. 6
7.3 Recommended Operating Conditions....................... 6
7.4 Thermal Information.................................................. 7
7.5 Electrical Characteristics: Dual Supply ..................... 7
7.6 Electrical Characteristics: Single Supply................... 9
7.7 Typical Characteristics............................................ 11
Parameter Measurement Information ................ 15
8.1 Truth Tables............................................................ 15
8.2 On-Resistance ........................................................ 16
8.3 Off-Leakage Current ............................................... 16
8.4 On-Leakage Current ............................................... 17
8.5 Transition Time ....................................................... 17
8.6 Break-Before-Make Delay....................................... 18
8.7 Turn-On and Turn-Off Time .................................... 19
8.8 Charge Injection...................................................... 20
8.9 Off Isolation............................................................. 21
9
10 Applications and Implementation...................... 27
10.1 Application Information.......................................... 27
10.2 Typical Application ............................................... 27
11 Power-Supply Recommendations ..................... 29
12 Layout................................................................... 30
12.1 Layout Guidelines ................................................. 30
12.2 Layout Example .................................................... 30
13 器件和文档支持 ..................................................... 31
13.1 文档支持................................................................ 31
13.2 相关链接................................................................ 31
13.3 接收文档更新通知 ................................................. 31
13.4 社区资源................................................................ 31
13.5 商标....................................................................... 31
13.6 静电放电警告......................................................... 31
13.7 Glossary................................................................ 31
14 机械、封装和可订购信息....................................... 31
8
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision B (July 2016) to Revision C
Page
•
•
•
•
•
•
•
•
已将 D (SOIC) 封装添加至文档 .............................................................................................................................................. 1
已更改最后的 特性 分项以包括 SOIC 封装............................................................................................................................. 1
已更改“描述”部分的第 部分..................................................................................................................................................... 1
已将 SOIC 封装添加至器件信息表.......................................................................................................................................... 1
Changed MUX509 description in Device Comparison Table ................................................................................................. 4
Added D package to Pin Configuration and Functions section.............................................................................................. 4
Added D package to Thermal Information table .................................................................................................................... 7
Changed Analog Switch, ID parameter in Electrical Characteristics: Dual Supply table: split parameter into ID(OFF) and
ID(ON) parameters, changed symbols, parameter names, and test conditions........................................................................ 7
•
•
Changed On-resistance drift parameter in Electrical Characteristics: Single Supply table: changed VS value in test
conditions................................................................................................................................................................................ 9
Changed Analog Switch, ID parameter in Electrical Characteristics: Single Supply table: split parameter into ID(OFF)
and ID(ON) parameters, changed symbols, parameter names, and ID(ON) test conditions........................................................ 9
•
•
•
•
•
Changed Figure 26: changed switch symbol to a closed switch symbol ............................................................................. 16
Changed Figure 32: added 0 V line, flipped VS supply symbol............................................................................................ 20
Changed description of MUX509 in Overview section ........................................................................................................ 23
Changed Figure 42: changed OPA140 amplifier and charge kickback filter box................................................................. 27
Added D package description to Layout Guidelines section ................................................................................................ 30
2
版权 © 2016, Texas Instruments Incorporated
MUX508, MUX509
www.ti.com.cn
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
Changes from Revision A (March 2016) to Revision B
Page
•
•
已增加 TI 设计 ........................................................................................................................................................................ 1
Changed Analog Switch, IS(OFF) and ID parameter specifications in Electrical Characteristics: Single Supply table.............. 9
Changes from Original (January 2016) to Revision A
Page
•
已将“产品预览”更改为“量产数据” ............................................................................................................................................ 1
Copyright © 2016, Texas Instruments Incorporated
3
MUX508, MUX509
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
www.ti.com.cn
5 Device Comparison Table
PRODUCT
MUX508
MUX509
DESCRIPTION
8-channel, single-ended analog multiplexer (8:1 mux)
4-channel differential or dual 4:1 single-ended analog multiplexer (8:2 mux)
6 Pin Configuration and Functions
MUX508: PW and D Packages
16-Pin TSSOP and SOIC
Top View
A0
EN
VSS
S1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A1
A2
GND
VDD
S5
S2
S3
S6
S4
S7
D
S8
Pin Functions: MUX508
PIN
TYPE
DESCRIPTION
NAME
A0
NO.
1
Digital input
Digital input
Digital input
Address line 0
Address line 1
Address line 2
A1
16
15
8
A2
D
Analog input or output Drain pin. Can be an input or output.
Active high digital input. When this pin is low, all switches are turned off. When this pin is
high, the A[2:0] logic inputs determine which switch is turned on.
EN
2
Digital input
GND
S1
S2
S3
S4
S5
S6
S7
S8
14
4
Power supply
Ground (0 V) reference
Analog input or output Source pin 1. Can be an input or output.
Analog input or output Source pin 2. Can be an input or output.
Analog input or output Source pin 3. Can be an input or output.
Analog input or output Source pin 4. Can be an input or output.
Analog input or output Source pin 5. Can be an input or output.
Analog input or output Source pin 6. Can be an input or output.
Analog input or output Source pin 7. Can be an input or output.
Analog input or output Source pin 8. Can be an input or output.
5
6
7
12
11
10
9
Positive power supply. This pin is the most positive power-supply potential. For reliable
VDD
VSS
13
3
Power supply
Power supply
operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD
and GND.
Negative power supply. This pin is the most negative power-supply potential. In single-
supply applications, this pin can be connected to ground. For reliable operation, connect a
decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND.
4
Copyright © 2016, Texas Instruments Incorporated
MUX508, MUX509
www.ti.com.cn
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
MUX509: PW and D Packages
16-Pin TSSOP and SOIC
Top View
A0
EN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A1
GND
VDD
S1B
S2B
S3B
S4B
DB
VSS
S1A
S2A
S3A
S4A
DA
Pin Functions: MUX509
PIN
TYPE
DESCRIPTION
NAME
A0
NO.
1
Digital input
Digital input
Address line 0
Address line 1
A1
16
8
DA
Analog input or output Drain pin A. Can be an input or output.
Analog input or output Drain pin B. Can be an input or output.
DB
9
Active high digital input. When this pin is low, all switches are turned off. When this pin is
high, the A[1:0] logic inputs determine which pair of switches is turned on.
EN
2
Digital input
GND
S1A
S2A
S3A
S4A
S1B
S2B
S3B
S4B
15
4
Power supply
Ground (0 V) reference
Analog input or output Source pin 1A. Can be an input or output.
Analog input or output Source pin 2A. Can be an input or output.
Analog input or output Source pin 3A. Can be an input or output.
Analog input or output Source pin 4A. Can be an input or output.
Analog input or output Source pin 1B. Can be an input or output.
Analog input or output Source pin 2B. Can be an input or output.
Analog input or output Source pin 3B. Can be an input or output.
Analog input or output Source pin 4B. Can be an input or output.
5
6
7
13
12
11
10
Positive power supply. This pin is the most positive power supply potential. For reliable
VDD
VSS
14
3
Power supply
Power supply
operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD
and GND.
Negative power supply. This pin is the most negative power supply potential. In single-
supply applications, this pin can be connected to ground. For reliable operation, connect a
decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND.
Copyright © 2016, Texas Instruments Incorporated
5
MUX508, MUX509
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–40
MAX
40
UNIT
VDD
Supply voltage
VSS
0.3
V
VDD – VSS
40
Voltage
Current
Voltage
Current
Voltage
Current
VSS – 0.3
–30
VDD + 0.3
30
V
mA
V
Digital input pins(2)
Analog input pins(2)
Analog output pins(2)
EN, A0, A1, A2 pins
Sx, SxA, SxB pins
D, DA, DB pins
VSS – 2
–30
VDD + 2
30
mA
V
VSS – 2
–30
VDD + 2
30
mA
Operating, TA
Junction, TJ
Storage, Tstg
–55
150
Temperature
150
°C
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Only one pin at a time
7.2 ESD Ratings
VALUE
2000
500
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
5
NOM
MAX
18
UNIT
Dual supply
(1)
(2)
VDD
VSS
Positive power-supply voltage
V
Single supply
10
36
Negative power-supply voltage (dual supply)
Supply voltage
–5
–18
36
V
V
VDD – VSS
10
VS
Source pins voltage(3)
VSS
VSS
VSS
VSS
–25
–40
VDD
VDD
VDD
VDD
25
V
VD
VEN
VA
Drain pins voltage
V
Enable pin voltage
V
Address pins voltage
V
ICH
TA
Channel current (TA = 25°C)
Operating temperature
mA
°C
125
(1) When VSS = 0 V, VDD can range from 10 V to 36 V.
(2) VDD and VSS can be any value as long as 10 V ≤ (VDD – VSS) ≤ 36 V, and VDD ≥ 5 V.
(3) VS is the voltage on all the S pins.
6
Copyright © 2016, Texas Instruments Incorporated
MUX508, MUX509
www.ti.com.cn
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
7.4 Thermal Information
MUX50x
THERMAL METRIC(1)
PW (TSSOP)
16 PINS
103.8
36.8
D (SOIC)
16 PINS
78.3
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
37.2
49.8
35.7
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.7
8.2
ψJB
49.1
35.4
RθJC(bot)
n/a
n/a
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics.
7.5 Electrical Characteristics: Dual Supply
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG SWITCH
Analog signal range
On-resistance
TA = –40°C to +125°C
VS = 0 V, ICH = 1 mA
VSS
VDD
170
200
230
250
6
V
125
145
RON
Ω
VS = ±10 V, ICH = 1 mA
VS = ±10 V, ICH = 1 mA
TA = –40°C to +85°C
TA = –40°C to +125°C
2.4
22
On-resistance mismatch
between channels
ΔRON
TA = –40°C to +85°C
TA = –40°C to +125°C
9
Ω
11
45
RFLAT
On-resistance flatness
On-resistance drift
VS = 10 V, 0 V, –10 V
VS = 0 V
TA = –40°C to +85°C
TA = –40°C to +125°C
53
Ω
58
0.52
0.01
%/°C
nA
–1
–10
–25
–1
1
10
25
1
Switch state is off,
IS(OFF)
ID(OFF)
ID(ON)
Input leakage current
TA = –40°C to +85°C
TA = –40°C to +125°C
VS = ±10 V, VD = ±10 V(1)
0.01
0.01
Switch state is off,
Output off leakage current
Output on leakage current
TA = -40°C to +85°C
TA = -40°C to +125°C
–10
–50
–1
10
50
1
nA
nA
VS = ±10 V, VD = ±10 V(1)
Switch state is on,
VD = ±10 V, VS = floating
TA = –40°C to +85°C
TA = –40°C to +125°C
–10
–50
10
50
LOGIC INPUT
VIH
VIL
ID
High-level input voltage
2.0
V
V
Low-level input voltage
Input current
0.8
0.15
µA
(1) When VS is positive, VD is negative, and vice versa.
Copyright © 2016, Texas Instruments Incorporated
7
MUX508, MUX509
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
www.ti.com.cn
Electrical Characteristics: Dual Supply (continued)
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
PARAMETER
SWITCH DYNAMICS(2)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ns
88
136
144
151
75
VS = ±10 V, RL = 300 Ω,
tON
tOFF
tt
Enable turn-on time
TA = –40°C to +85°C
CL= 35 pF
TA = –40°C to +125°C
63
92
VS = ±10 V, RL = 300 Ω,
Enable turn-off time
Transition time
TA = –40°C to +85°C
TA = –40°C to +125°C
83
ns
CL= 35 pF
90
143
151
157
VS = 10 V, RL = 300 Ω,
CL= 35 pF,
TA = –40°C to +85°C
TA = –40°C to +125°C
ns
Break-before-make time
delay
tBBM
VS = 10 V, RL = 300 Ω, CL= 35 pF, TA = –40°C to +125°C
30
54
ns
VS = 0 V
CL = 1 nF, RS = 0 Ω
0.3
±0.6
–96
–85
–96
–88
2.4
QJ
Charge injection
Off-isolation
pC
VS = –15 V to +15 V
Nonadjacent channel to D, DA, DB
Adjacent channel to D, DA, DB
Nonadjacent channels
RL = 50 Ω, VS = 1 VRMS
f = 1 MHz
,
,
dB
Channel-to-channel
crosstalk
RL = 50 Ω, VS = 1 VRMS
dB
pF
pF
f = 1 MHz
Adjacent channels
CS(OFF)
CD(OFF)
Input off-capacitance
Output off-capacitance
f = 1 MHz, VS = 0 V
f = 1 MHz, VS = 0 V
2.9
8.4
5
MUX508
MUX509
MUX508
MUX509
7.5
4.3
9.4
10.6
7.7
Input/Output on-
capacitance
CD(ON)
f = 1 MHz, VS = 0 V
pF
6.7
POWER SUPPLY
45
25
59
62
83
34
37
57
All VA = 0 V or 3.3 V,
VS = 0 V, VEN = 3.3 V,
VDD supply current
TA = –40°C to +85°C
TA = –40°C to +125°C
µA
µA
All VA = 0 V or 3.3 V,
VS = 0 V, VEN = 3.3 V,
VSS supply current
TA = –40°C to +85°C
TA = –40°C to +125°C
(2) Specified by design, not production tested.
8
Copyright © 2016, Texas Instruments Incorporated
MUX508, MUX509
www.ti.com.cn
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
7.6 Electrical Characteristics: Single Supply
at TA = 25°C, VDD = 12 V, and VSS = 0 V (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
235
3.1
MAX
UNIT
V
ANALOG SWITCH
Analog signal range
On-resistance
TA = –40°C to +125°C
VS = 10 V, ICH = 1 mA
VSS
VDD
340
390
430
12
RON
TA = –40°C to +85°C
Ω
TA = –40°C to +125°C
ΔRON
On-resistance match
On-resistance drift
Input leakage current
VS = 10 V, ICH = 1 mA
VS = 10 V
TA = –40°C to +85°C
TA = –40°C to +125°C
19
Ω
23
0.47
0.01
%/°C
nA
–1
–10
–25
–1
1
10
25
1
Switch state is off,
IS(OFF)
ID(OFF)
ID(ON)
VS = 1 V and VD = 10 V,
TA = –40°C to +85°C
TA = –40°C to +125°C
or VS = 10 V and VD = 1 V(2)
0.01
0.01
Switch state is off,
Output off leakage current VS = 1 V and VD = 10 V,
TA = –40°C to +85°C
TA = –40°C to +125°C
–10
–50
–1
10
50
1
nA
nA
or VS = 10 V and VD = 1 V(2)
Switch state is on,
Output on leakage current VD = 1 V and 10 V,
VS = floating
TA = –40°C to +85°C
TA = –40°C to +125°C
–10
–50
10
50
LOGIC INPUT
VIH
VIL
ID
High-level input voltage
2.0
V
V
Low-level input voltage
Input current
0.8
0.15
µA
SWITCH DYNAMIC CHARACTERISTICS
85
48
87
140
145
149
83
VS = 8 V, RL = 300 Ω,
CL= 35 pF
tON
Enable turn-on time
Enable turn-off time
TA = –40°C to +85°C
TA = –40°C to +125°C
ns
ns
VS = 8 V, RL = 300 Ω,
CL= 35 pF
tOFF
TA = –40°C to +85°C
TA = –40°C to +125°C
94
102
147
VS = 8 V, CL= 35 pF
VS = 8 V, RL = 300 Ω,
CL= 35 pF,
TA = –40°C to +85°C
TA = –40°C to +125°C
153
155
tt
Transition time
ns
VS = 8 V, RL = 300 Ω,
CL= 35 pF,
Break-before-make time
delay
tBBM
VS = 8 V, RL = 300 Ω, CL= 35 pF, TA = –40°C to +125°C
30
54
ns
VS = 6 V
CL = 1 nF, RS = 0 Ω
0.15
±0.4
-96
-85
–96
-88
2.7
9.1
5
QJ
Charge injection
Off-isolation
pC
VS = 0 V to 12 V,
Nonadjacent channel to D, DA, DB
Adjacent channel to D, DA, DB
Nonadjacent channels
RL = 50 Ω, VS = 1 VRMS
f = 1 MHz
,
,
dB
Channel-to-channel
crosstalk
RL = 50 Ω, VS = 1 VRMS
dB
pF
pF
f = 1 MHz
Adjacent channels
CS(OFF)
CD(OFF)
Input off-capacitance
Output off-capacitance
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
3.2
10
5.7
12
8
MUX508
MUX509
MUX508
MUX509
10.8
6.9
Input/Output on-
capacitance
CD(ON)
f = 1 MHz, VS = 6 V
pF
(1) Specified by design, not production tested.
(2) When VS is 1 V, VD is 10 V, and vice versa.
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Electrical Characteristics: Single Supply (continued)
at TA = 25°C, VDD = 12 V, and VSS = 0 V (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
µA
POWER SUPPLY
42
53
56
77
38
31
51
All VA = 0 V or 3.3 V,
VS= 0 V, VEN = 3.3 V
VDD supply current
VSS supply current
TA = –40°C to +85°C
TA = –40°C to +125°C
23
All VA = 0 V or 3.3 V,
VS = 0 V, VEN = 3.3 V
TA = –40°C to +85°C
TA = –40°C to +125°C
µA
10
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7.7 Typical Characteristics
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
250
250
200
150
100
50
TA = 125°C
TA = 85°C
VDD = 15 V
VSS = œ15 V
VDD = 13.5 V
VSS = œ13.5 V
200
150
100
50
TA = 25°C
VDD = 18 V
VSS = œ18 V
VDD = 16.5 V
VSS = œ16.5 V
TA = œ40°C
TA = 0°C
0
0
0
5
10
15
20
0
6
12
18
œ20
œ15
œ10
œ5
œ18
œ12
œ6
C002
Source or Drain Voltage (V)
Source or Drain Voltage (V)
C001
VDD = 15 V, VSS = –15 V
Figure 2. On-Resistance vs Source or Drain Voltage
Figure 1. On-Resistance vs Source or Drain Voltage
700
700
VDD = 5 V
VSS = œ5 V
600
500
400
300
200
100
0
600
500
400
300
200
100
0
VDD = 6 V
VSS = œ6 V
TA = 85°C
TA = 125°C
TA = 25°C
VDD = 7 V
VSS = œ7 V
TA = 0°C
TA = œ40°C
0
2
4
6
8
0
2
4
6
8
10
12
œ8
œ6
œ4
œ2
C004
C003
Source or Drain Voltage (V)
Source or Drain Voltage (V)
VDD = 12 V, VSS = 0 V
Figure 4. On-Resistance vs Source or Drain Voltage
Figure 3. On-Resistance vs Source or Drain Voltage
250
700
VDD = 10 V
VSS = 0 V
VDD = 30 V
VSS = 0 V
600
500
400
300
200
100
0
200
150
100
50
VDD = 12 V
VSS = 0 V
VDD = 14 V
VSS = 0 V
VDD = 36 V
VDD = 33 V
VSS = 0 V
VSS = 0 V
0
0
6
12
18
24
30
36
0
2
4
6
8
10
12
14
C023
Source or Drain Voltage (V)
Source or Drain Voltage (V)
C005
Figure 5. On-Resistance vs Source or Drain Voltage
Figure 6. On-Resistance vs Source or Drain Voltage
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Typical Characteristics (continued)
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
250
250
200
150
100
50
200
150
100
50
0
0
0
6
12
18
24
0
6
12
œ12
œ6
C024
C029
Source or Drain Voltage (V)
Source or Drain Voltage (V)
VDD = 24 V, VSS = 0 V
Figure 7. On-Resistance vs Source or Drain Voltage
VDD = 12 V, VSS = –12 V
Figure 8. On-Resistance vs Source or Drain Voltage
900
900
ID(ON)+
ID(ON)+
600
300
600
300
IS(OFF)+
ID(OFF)+
ID(OFF)+
IS(OFF)+
0
0
IS(OFF)œ
œ300
œ600
œ900
œ300
œ600
œ900
IS(OFF)œ
ID(OFF)œ
ID(OFF)œ
ID(ON)œ
ID(ON)œ
0
25
50
75
100 125 150
0
25
50
75
100 125 150
œ75 œ50 œ25
œ75 œ50 œ25
C006
C007
Temperature (°C)
Temperature (°C)
VDD = 15 V, VSS = –15 V
VDD = 12 V, VSS = 0 V
Figure 9. Leakage Current vs Temperature
Figure 10. Leakage Current vs Temperature
2
1
2
1
VDD = 15 V
VSS = œ15 V
VDD = 15 V
VSS = œ15 V
0
0
VDD = 10 V
VSS = œ10 V
VDD = 10 V
VSS = œ10 V
VDD = 12 V
VSS = 0 V
œ1
œ2
œ1
œ2
VDD = 12 V
VSS = 0 V
0
5
10
15
0
5
10
15
œ15
œ10
œ5
œ15
œ10
œ5
C008
C025
Source Voltage (V)
Source Voltage (V)
MUX508, source-to-drain
Figure 11. Charge Injection vs Source Voltage
MUX509, source-to-drain
Figure 12. Charge Injection vs Source Voltage
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Typical Characteristics (continued)
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
9
150
120
90
60
30
0
tON (VDD = 15 V, VSS = œ15 V)
VDD = 15 V
VSS = œ15 V
6
3
tON (VDD = 12 V, VSS = 0 V)
VDD = 10 V
VSS = œ10 V
0
VDD = 12 V
VSS = 0 V
œ3
œ6
œ9
tOFF (VDD = 15 V, VSS = œ15 V)
tOFF (VDD = 12 V, VSS = 0 V)
0
5
10
15
0
25
50
75
100 125 150
œ15
œ10
œ5
œ75 œ50 œ25
C011
Drain voltage (V)
Temperature (°C)
C010
Drain-to-source
Figure 13. Charge Injection vs Source or Drain Voltage
Figure 14. Turn-On and Turn-Off Times vs Temperature
0
0
œ20
œ20
Adjacent Channel to D (Output)
Adjacent Channels
œ40
œ60
œ40
œ60
œ80
œ80
œ100
œ120
œ140
œ100
œ120
œ140
Non-Adjacent Channels
Non-Adjacent Channel to D (Output)
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
C013
C012
Frequency (Hz)
Frequency (Hz)
Figure 15. Off Isolation vs Frequency
Figure 16. Crosstalk vs Frequency
100
10
3
0
VDD = 5 V
VDD = 15 V
VSS = œ5 V
VSS = œ15 V
1
œ3
œ6
œ9
0.1
0.01
10
100
1k
10k
100k
100k
1M
10M
100M
1G
C014
C018
Frequency (Hz)
Frequency (Hz)
Figure 17. THD+N vs Frequency
Figure 18. On Response vs Frequency
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Typical Characteristics (continued)
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
18
18
15
12
9
15
12
CD(ON
)
CD(OFF
)
9
6
3
0
CD(ON
)
6
CD(OFF
)
CS(OFF)
3
CS(OFF)
10
0
0
5
10
15
0
5
15
œ15
œ10
œ5
œ15
œ10
œ5
C026
Source Voltage (V)
C015
Source or Drain Voltage (V)
MUX508, VDD = 15 V, VSS = –15 V
Figure 19. Capacitance vs Source Voltage
MUX509, VDD = 15 V, VSS = –15 V
Figure 20. Capacitance vs Source Voltage
18
15
12
9
18
15
12
9
CD(ON
)
CD(OFF
)
CD(ON
)
6
6
CD(OFF
)
CS(OFF)
3
3
CS(OFF)
25
0
0
0
5
10
15
20
25
30
0
5
10
15
20
30
C016
C028
Source Voltage (V)
Source or Drain Voltage (V)
MUX508, VDD = 30 V, VSS = 0 V
MUX509, VDD = 30 V, VSS = 0 V
Figure 22. Capacitance vs Source Voltage
Figure 21. Capacitance vs Source Voltage
18
15
12
9
18
15
12
9
CD(ON)
CD(OFF
)
CD(ON
)
6
6
CD(OFF)
CS(OFF)
3
3
CS(OFF)
0
0
0
3
6
9
12
0
3
6
Source or Drain Voltage (V)
9
12
C027
Source or Drain Voltage (V)
C022
MUX508, VDD = 12 V, VSS = 0 V
Figure 23. Capacitance vs Source Voltage
MUX509, VDD = 12 V, VSS = 0 V
Figure 24. Capacitance vs Source Voltage
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Typical Characteristics (continued)
at TA = 25°C, VDD = 15 V, and VSS = –15 V (unless otherwise noted)
25
20
15
10
5
0
œ5
œ10
œ15
œ20
œ25
0
5
10
15
20
25
œ25 œ20 œ15 œ10 œ5
Source Current (mA)
C021
Figure 25. Source Current vs Drain Current
8 Parameter Measurement Information
8.1 Truth Tables
Table 1 and Table 2 show the truth tables for the MUX508 and MUX509, respectively.
Table 1. MUX508 Truth Table
EN
0
A2
X(1)
0
A1
X(1)
0
A0
X(1)
0
STATE
All channels are off
Channel 1 on
Channel 2 on
Channel 3 on
Channel 4 on
Channel 5 on
Channel 6 on
Channel 7 on
Channel 8 on
1
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
(1) X denotes don't care..
Table 2. MUX509 Truth Table
EN
0
A1
X(1)
0
A0
X(1)
0
STATE
All channels are off
1
Channels 1A and 1B on
Channels 2A and 2B on
Channels 3A and 3B on
Channels 4A and 4B on
1
0
1
1
1
0
1
1
1
(1) X denotes don't care.
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8.2 On-Resistance
The on-resistance of the MUX50x is the ohmic resistance across the source (Sx, SxA, or SxB) and drain (D, DA,
or DB) pins of the device. The on-resistance varies with input voltage and supply voltage. The symbol RON is
used to denote on-resistance. The measurement setup used to measure RON is shown in Figure 26. Voltage (V)
and current (ICH) are measured using this setup, and RON is computed as shown in Equation 1.
V
S
D
ICH
VS
Figure 26. On-Resistance Measurement Setup
RON = V / ICH
(1)
8.3 Off-Leakage Current
There are two types of leakage currents associated with a switch during the off state:
1. Source off-leakage current
2. Drain off-leakage current
Source off-leakage current is defined as the leakage current flowing into or out of the source pin when the switch
is off. This current is denoted by the symbol IS(OFF)
.
Drain off-leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is
off. This current is denoted by the symbol ID(OFF)
.
The setup used to measure both types of off-leakage currents is shown in Figure 27.
Is (OFF)
A
ID (OFF)
A
S
D
VS
VD
Figure 27. Off-Leakage Measurement Setup
16
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8.4 On-Leakage Current
On-leakage current is defined as the leakage current that flows into or out of the drain pin when the switch is in
the on state. The source pin is left floating during the measurement. Figure 28 shows the circuit used for
measuring the on-leakage current, denoted by ID(ON)
.
ID (ON)
A
S
D
NC
NC = No Connection
VD
Figure 28. On-Leakage Measurement Setup
8.5 Transition Time
Transition time is defined as the time taken by the output of the MUX50x to rise or fall to 90% of the transition
after the digital address signal has fallen or risen to the 50% of the transition. Figure 29 shows the setup used to
measure transition time, denoted by the symbol tt.
VDD
VSS
3 V
VDD
VSS
Address
Signal (VIN
50%
50%
)
S1
VS1
A0
A1
A2
0 V
S2-S7
S8
VIN
tt
tt
VS8
VS1
90%
Output
MUX508
Output
EN
D
2 V
GND
300 Ω
35 pF
90%
VS8
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Figure 29. Transition-Time Measurement Setup
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8.6 Break-Before-Make Delay
Break-before-make delay is a safety feature that prevents two inputs from connecting when the MUX50x is
switching. The MUX50x output first breaks from the on-state switch before making the connection with the next
on-state switch. The time delay between the break and the make is known as a break-before-make delay.
Figure 30 shows the setup used to measure break-before-make delay, denoted by the symbol tBBM
.
VDD
VSS
3 V
VSS
VDD
Address
Signal (VIN)
S1
VS
A0
A1
A2
0 V
S2-S7
S8
VIN
MUX508
Output
80%
80%
Output
2 V
EN
D
GND
300 Ω
35 pF
tBBM
Copyright © 2016, Texas Instruments Incorporated
Figure 30. Break-Before-Make Delay Measurement Setup
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8.7 Turn-On and Turn-Off Time
Turn-on time is defined as the time taken by the output of the MUX50x to rise to a 90% final value after the
enable signal has risen to a 50% final value. Figure 31 shows the setup used to measure turn-on time. Turn-on
time is denoted by the symbol tON
.
Turn-off time is defined as the time taken by the output of the MUX50x to fall to a 10% initial value after the
enable signal has fallen to a 50% initial value. Figure 31 shows the setup used to measure turn-off time. Turn-off
time is denoted by the symbol tOFF
.
VDD
VSS
3 V
VDD
VSS
Enable
Drive (VIN)
50%
50%
S1
VS
A0
A1
A2
S2-S8
0 V
tOFF (EN)
MUX508
tON (EN)
0.9 VS
Output
Output
EN
D
GND
300 Ω
35 pF
0.1 VS
VIN
Copyright © 2016, Texas Instruments Incorporated
Figure 31. Turn-On and Turn-Off Time Measurement Setup
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8.8 Charge Injection
The MUX50x have a simple transmission-gate topology. Any mismatch in capacitance between the NMOS and
PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the gate
signal. The amount of charge injected into the source or drain of the device is known as charge injection, and is
denoted by the symbol QINJ. Figure 32 shows the setup used to measure charge injection.
VDD
VSS
VDD
VSS
A0
A1
A2
3 V
VEN
MUX508
0 V
RS
S
D
VOUT
EN
VOUT
CL
VOUT
VS
1 nF
GND
QINJ = CL
×
VOUT
VEN
Copyright © 2016, Texas Instruments Incorporated
Figure 32. Charge-Injection Measurement Setup
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8.9 Off Isolation
Off isolation is defined as the voltage at the drain pin (D, DA, or DB) of the MUX50x when a 1-VRMS signal is
applied to the source pin (Sx, SxA, or SxB) of an off-channel. Figure 33 shows the setup used to measure off
isolation. Use Equation 2 to compute off isolation.
VDD
VSS
0.1 µF
0.1 µF
Network Analyzer
VSS
VDD
50 ꢀ
S
50 Ω
VS
D
VOUT
RL
50 Ω
GND
Figure 33. Off Isolation Measurement Setup
≈
’
÷
◊
VOUT
VS
Off Isolation = 20 ∂ Log
∆
«
(2)
8.10 Channel-to-Channel Crosstalk
Channel-to-channel crosstalk is defined as the voltage at the source pin (Sx, SxA, or SxB) of an off-channel,
when a 1-VRMS signal is applied at the source pin of an on-channel. Figure 34 shows the setup used to measure,
and Equation 3 is the equation used to compute, channel-to-channel crosstalk.
VDD
VSS
0.1 µF
0.1 µF
VSS
VDD
Network Analyzer
VOUT
S1
RL
50 Ω
R
S2
50 Ω
VS
GND
Figure 34. Channel-to-Channel Crosstalk Measurement Setup
≈
∆
«
’
÷
◊
VOUT
VS
Channel-to-Channel Crosstalk = 20 ∂ Log
(3)
21
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8.11 Bandwidth
Bandwidth is defined as the range of frequencies that are attenuated by < 3 dB when the input is applied to the
source pin of an on-channel and the output is measured at the drain pin of the MUX50x. Figure 35 shows the
setup used to measure bandwidth of the mux. Use Equation 4 to compute the attenuation.
VDD
VSS
0.1 µF
0.1 µF
Network Analyzer
VSS
VDD
V1
50 ꢀ
S
VS
V2
D
VOUT
RL
50 Ω
GND
Figure 35. Bandwidth Measurement Setup
≈
∆
«
’
÷
◊
V2
Attenuation = 20 ∂ Log
V
1
(4)
8.12 THD + Noise
The total harmonic distortion (THD) of a signal is defined as the ratio of the sum of the powers of all harmonic
components to the power of the fundamental frequency at the mux output. The on-resistance of the MUX50x
varies with the amplitude of the input signal and results in distortion when the drain pin is connected to a low-
impedance load. Total harmonic distortion plus noise is denoted as THD+N. Figure 36 shows the setup used to
measure the THD+N of the MUX50x.
VDD
VSS
0.1 µF
0.1 µF
Audio Precision
RS
VSS
VDD
S
IN
VS
5 Vrms
D
VIN
VOUT
RL
10 kΩ
GND
Figure 36. THD+N Measurement Setup
22
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9 Detailed Description
9.1 Overview
The MUX50x are a family of analog multiplexers. The Functional Block Diagram section provides a top-level
block diagram of both the MUX508 and MUX509. The MUX508 is an eight-channel, single-ended, analog mux.
The MUX509 is a four-channel, differential or dual 4:1, single-ended, analog mux. Each channel is turned on or
turned off based on the state of the address lines and enable pin.
9.2 Functional Block Diagram
MUX509
MUX508
S1
S2
S3
S4
S5
S6
S7
S8
S1A
S2A
S3A
S4A
S1B
S2B
S3B
S4B
DA
DB
D
1-of-4
1-of-8
Decoder
Decoder
A0
A1
EN
A0
A1
A2
EN
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9.3 Feature Description
9.3.1 Ultralow Leakage Current
The MUX50x provide extremely low on- and off-leakage currents. The MUX50x are capable of switching signals
from high source-impedance inputs into a high input-impedance op amp with minimal offset error because of
these ultralow leakage currents. Figure 37 shows typical leakage currents of the MUX50x versus temperature.
900
ID(ON)+
600
300
0
ID(OFF)+
IS(OFF)+
IS(OFF)œ
œ300
ID(OFF)œ
œ600
ID(ON)œ
œ900
0
25
50
75
100 125 150
œ75 œ50 œ25
C006
Temperature (°C)
Figure 37. Leakage Current vs Temperature
9.3.2 Ultralow Charge Injection
The MUX50x have a simple transmission gate topology, as shown in Figure 38. Any mismatch in the stray
capacitance associated with the NMOS and PMOS transistors creates an output level change whenever the
switch is opened or closed.
OFF ON
CGDN
CGSN
D
S
CGSP
CGDP
OFF ON
Figure 38. Transmission Gate Topology
24
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Feature Description (continued)
The MUX50x have special charge-injection cancellation circuitry that reduces the source-to-drain charge injection
to as low as 0.3 pC at VS = 0 V, and ±0.6 pC in the full signal range, as shown in Figure 39.
2
1
0
VDD = 15 V
VSS = œ15 V
VDD = 10 V
VSS = œ10 V
œ1
œ2
VDD = 12 V
VSS = 0 V
0
5
10
15
œ15
œ10
œ5
C025
Source Voltage (V)
Figure 39. Source-to-Drain Charge Injection vs Source or Drain voltage
The drain-to-source charge injection becomes important when the device is used as a demultiplexer (demux),
where D becomes the input and Sx becomes the output. Figure 40 shows the drain-to-source charge injection
across the full signal range.
9
VDD = 15 V
VSS = œ15 V
6
3
VDD = 10 V
VSS = œ10 V
0
VDD = 12 V
VSS = 0 V
œ3
œ6
œ9
0
5
10
15
œ15
œ10
œ5
C011
Drain voltage (V)
Figure 40. Drain-to-Source Charge Injection vs Source or Drain voltage
9.3.3 Bidirectional Operation
The MUX50x are operable as both a mux or demux. The source (Sx, SxA, SxB) and drain (D, DA, DB) pins of
the MUX50x are used either as input or output. Each MUX50x channel has very similar characteristics in both
directions.
Copyright © 2016, Texas Instruments Incorporated
25
MUX508, MUX509
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
www.ti.com.cn
Feature Description (continued)
9.3.4 Rail-to-Rail Operation
A valid analog signal for the MUX50x ranges from VSS to VDD. The input signal to the MUX50x can swing from
VSS to VDD without any significant degradation in performance. The on-resistance of the MUX50x varies with
input signal, as shown in Figure 41.
250
VDD = 15 V
VSS = œ15 V
VDD = 13.5 V
VSS = œ13.5 V
200
150
100
50
VDD = 18 V
VSS = œ18 V
VDD = 16.5 V
VSS = œ16.5 V
0
0
5
10
15
20
œ20
œ15
œ10
œ5
Source or Drain Voltage (V)
C001
Figure 41. On-Resistance vs Source or Drain Voltage
9.4 Device Functional Modes
When the EN pin of the MUX50x is pulled high, one of the switches is closed based on the state of the address
lines. When the EN pin is pulled low, all the switches are in an open state irrespective of the state of the address
lines. The EN pin can be connected to VDD (as high as 36 V).
26
Copyright © 2016, Texas Instruments Incorporated
MUX508, MUX509
www.ti.com.cn
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
10 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The MUX50x family offers outstanding input/output leakage currents and ultralow charge injection. These devices
operate up to 36 V, and offer true rail-to-rail input and output. The on-capacitance of the MUX50x is very low.
These features makes the MUX50x a precision, robust, high-performance analog multiplexer for high-voltage,
industrial applications.
10.2 Typical Application
Figure 42 shows a 16-bit, differential, four-channel, multiplexed, data-acquisition system. This example is typical
in industrial applications that require low distortion and a high-voltage differential input. The circuit uses the
ADS8864, a 16-bit, 400-kSPS successive-approximation-resistor (SAR) analog-to-digital converter (ADC), along
with a precision, high-voltage, signal-conditioning front end, and a four-channel differential mux. This application
example details the process for optimizing a precision, high-voltage, front-end drive circuit using the MUX509,
OPA192 and OPA140 to achieve excellent dynamic performance and linearity with the ADS8864.
Analog Inputs
REF3140
RC Filter
OPA350
RC Filter
Bridge Sensor
Thermocouple
Reference Driver
Gain Network
Gain Network
OPA192
+
MUX509
REF
+
OPA140
VINP
Charge
Kickback
Filter
Gain Network
OPA192
+
ADS8864
Current Sensing
Photo
VINM
Detector
LED
High-Voltage Multiplexed Input
High-Voltage Level Translation
VCM
Optical Sensor
Copyright © 2016, Texas Instruments Incorporated
Figure 42. 16-Bit Precision Multiplexed Data-Acquisition System for High-Voltage Inputs With Lowest
Distortion
10.2.1 Design Requirements
The primary objective is to design a ±20 V, differential, four-channel, multiplexed, data-acquisition system with
lowest distortion using the 16-bit ADS8864 at a throughput of 400 kSPS for a 10-kHz, full-scale, pure, sine-wave
input. The design requirements for this block design are:
•
•
•
•
•
System supply voltage: ±15 V
ADC supply voltage: 3.3 V
ADC sampling rate: 400 kSPS
ADC reference voltage (REFP): 4.096 V
System input signal: A high-voltage differential input signal with a peak amplitude of 20 V and frequency
(fIN) of 10 kHz are applied to each differential input of the mux.
Copyright © 2016, Texas Instruments Incorporated
27
MUX508, MUX509
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
www.ti.com.cn
Typical Application (continued)
10.2.2 Detailed Design Procedure
The purpose of this precision design is to design an optimal, high-voltage, multiplexed, data-acquisition system
for highest system linearity and fast settling. The overall system block diagram is illustrated in Figure 42. The
circuit is a multichannel, data-acquisition signal chain consisting of an input low-pass filter, mux, mux output
buffer, attenuating SAR ADC driver, and the reference driver. The architecture allows fast sampling of multiple
channels using a single ADC, providing a low-cost solution. This design systematically approaches each analog
circuit block to achieve a 16-bit settling for a full-scale input stage voltage and linearity for a 10-kHz sinusoidal
input signal at each input channel.
For step-by-step design procedure, circuit schematics, bill of materials, PCB files, simulation results, and test
results, see TI Precision Design TIPD151, 16-Bit, 400-kSPS, 4-Channel Multiplexed Data-Acquisition System
for High-Voltage Inputs with Lowest Distortion.
10.2.3 Application Curve
1.0
0.8
0.6
0.4
0.2
0.0
œ0.2
œ0.4
œ0.6
œ0.8
œ1.0
0
5
10
15
20
œ20
œ15
œ10
œ5
C030
ADC Differential Peak-to-Peak Input (V)
Figure 43. ADC 16-Bit Linearity Error for the Multiplexed Data-Acquisition Block
28
Copyright © 2016, Texas Instruments Incorporated
MUX508, MUX509
www.ti.com.cn
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
11 Power-Supply Recommendations
The MUX50x operates across a wide supply range of ±5 V to ±18 V (10 V to 36 V in single-supply mode). The
MUX508 and MUX509 operate equally well with either dual supplies (±5 V to ±18 V), or a single supply (10 V to
36 V). They also perform well with unsymmetric supplies such as VDD = 12 V and VSS = –5 V. For reliable
operation, use a supply decoupling capacitor with a capacitance between 0.1 µF to 10 µF at both the VDD and
VSS pins to ground.
The on-resistance of the MUX50x varies with supply voltage, as shown in Figure 44.
250
VDD = 15 V
VSS = œ15 V
VDD = 13.5 V
VSS = œ13.5 V
200
150
100
50
VDD = 18 V
VSS = œ18 V
VDD = 16.5 V
VSS = œ16.5 V
0
0
5
10
15
20
œ20
œ15
œ10
œ5
Source or Drain Voltage (V)
C001
Figure 44. On-Resistance Variation With Supply and Input Voltage
Copyright © 2016, Texas Instruments Incorporated
29
MUX508, MUX509
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
www.ti.com.cn
12 Layout
12.1 Layout Guidelines
Figure 45 shows an example of a PCB layout with the MUX508IPW, and Figure 46 shows an example of a PCB
layout with MUX509IPW. The guidelines provided in this section are also applicable to the SOIC MUX508ID and
MUX509ID package variants as well.
Some key considerations are:
1. Decouple the VDD and VSS pins with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure
that the capacitor voltage rating is sufficient for the VDD and VSS supplies.
2. Keep the input lines as small as possible. For the MUX509 differential signals, make sure the A inputs and B
inputs are as symmetric as possible.
3. Use a solid ground plane to help distribute heat and reduce electromagnetic interference (EMI) noise pickup.
4. Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible and only make perpendicular crossings when necessary.
12.2 Layout Example
Via to
ground plane
Via to
ground plane
AO
EN
VSS
A1
A2
C
C
GND
VDD
S5
S1
S2
MUX508IPW
S3
S4
D
S6
S7
S8
Copyright © 2016, Texas Instruments Incorporated
Figure 45. MUX508IPW Layout Example
Via to
ground plane
Via to
ground plane
AO
EN
A1
C
C
GND
VDD
VSS
S1A
S2A
S1B
MUX509IPW
S2B
S3B
S3A
S4A
DA
S4B
DB
Copyright © 2016, Texas Instruments Incorporated
Figure 46. MUX509IPW Layout Example
30
版权 © 2016, Texas Instruments Incorporated
MUX508, MUX509
www.ti.com.cn
ZHCSEV2C –JANUARY 2016–REVISED SEPTEMBER 2016
13 器件和文档支持
13.1 文档支持
13.1.1 相关文档ꢀ
•
《ADS866x 支持双极输入范围的 12 位、500kSPS、4 通道和
号：SBAS492）
8
通道单电源 SAR ADC》（文献编
•
•
《OPAx140 高精度、低噪声、轨到轨输出、11 MHz JFET 运算放大器》（文献编号：SBOS498）
《OPAx192 具有 e-trim™ 的 36V、精密、轨到轨输入/输出、低偏移电压、低输入偏置电流运算放大器》（文
献编号：SBOS620）
13.2 相关链接
表 3 列出了快速访问链接。范围包括技术文档、支持与社区资源、工具和软件，以及样片与购买的快速访问。
表 3. 相关链接
部件
产品文件夹
请单击此处
请单击此处
样片与购买
请单击此处
请单击此处
技术文档
请单击此处
请单击此处
工具与软件
请单击此处
请单击此处
支持与社区
请单击此处
请单击此处
MUX508
MUX509
13.3 接收文档更新通知
如需接收文档更新通知，请访问 www.ti.com.cn 网站上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册
后，即可每周定期收到已更改的产品信息。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。
13.4 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.5 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2016, Texas Instruments Incorporated
31
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
MUX508ID
MUX508IDR
MUX508IPW
MUX508IPWR
MUX509ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
16
16
16
16
16
16
16
16
40
RoHS & Green
SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
M36508D
2500 RoHS & Green
90 RoHS & Green
2000 RoHS & Green
40 RoHS & Green
2500 RoHS & Green
90 RoHS & Green
2000 RoHS & Green
SN
M36508D
MUX508B
MUX508B
M36509D
M36509D
MUX509C
MUX509C
TSSOP
TSSOP
SOIC
PW
PW
D
NIPDAU
NIPDAU
SN
MUX509IDR
MUX509IPW
MUX509IPWR
SOIC
D
SN
TSSOP
TSSOP
PW
PW
NIPDAU
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
1-May-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
MUX508IDR
MUX508IPWR
MUX509IDR
MUX509IPWR
SOIC
TSSOP
SOIC
D
PW
D
16
16
16
16
2500
2000
2500
2000
330.0
330.0
330.0
330.0
16.8
12.4
16.8
12.4
6.5
6.9
6.5
6.9
10.3
5.6
2.1
1.6
2.1
1.6
8.0
8.0
8.0
8.0
16.0
12.0
16.0
12.0
Q1
Q1
Q1
Q1
10.3
5.6
TSSOP
PW
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-May-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
MUX508IDR
MUX508IPWR
MUX509IDR
MUX509IPWR
SOIC
TSSOP
SOIC
D
PW
D
16
16
16
16
2500
2000
2500
2000
366.0
356.0
366.0
356.0
364.0
356.0
364.0
356.0
50.0
35.0
50.0
35.0
TSSOP
PW
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
1-May-2023
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
MUX508ID
MUX508IPW
MUX509ID
D
PW
D
SOIC
TSSOP
SOIC
16
16
16
16
40
90
40
90
517
530
517
530
7.87
10.2
7.87
10.2
635
3600
635
4.25
3.5
4.25
3.5
MUX509IPW
PW
TSSOP
3600
Pack Materials-Page 3
PACKAGE OUTLINE
PW0016A
TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
5
0
0
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
6.2
TYP
A
0.1 C
PIN 1 INDEX AREA
14X 0.65
16
1
2X
5.1
4.9
4.55
NOTE 3
8
9
0.30
16X
4.5
4.3
NOTE 4
1.2 MAX
0.19
B
0.1
C A B
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0.75
0.50
A
20
0 -8
DETAIL A
TYPICAL
4220204/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
16X (1.5)
(R0.05) TYP
16
1
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4220204/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
16X (1.5)
SYMM
(R0.05) TYP
16
1
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220204/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
重要声明和免责声明
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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
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邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
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SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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