ONET2511TA [TI]

2.5 GBPS TRANSIMPEDANCE AMPLIFIER WITH RSSI; 2.5Gbps的跨导,带有RSSI放大器
ONET2511TA
型号: ONET2511TA
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

2.5 GBPS TRANSIMPEDANCE AMPLIFIER WITH RSSI
2.5Gbps的跨导,带有RSSI放大器

放大器
文件: 总12页 (文件大小:455K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Not Recommended for New Designs  
ONET2511TA  
www.ti.com  
SLLS622 SEPTEMBER 2004  
2.5 GBPS TRANSIMPEDANCE AMPLIFIER WITH RSSI  
Check for Samples: ONET2511TA  
1
FEATURES  
DESCRIPTION  
2.5 GHz Bandwidth  
4.0 kDifferential Transimpedance  
10 pA/Hz Typical Input Referred Noise  
2 mA Maximum Input Current  
Offset Cancellation  
The ONET2511TA is a high-speed transimpedance  
amplifier used in SDH/SONET systems with data  
rates up to 2.5Gbps. It features a low input referred  
noise, 2.5GHz bandwidth, 4.0ktransimpedance,  
and a received signal strength indicator.  
Received Signal Strength Indication  
Differential CML Data Outputs  
Single +3.3V Supply  
The ONET2511TA device is available in die form and  
requires a single +3.3V supply. It is very power  
efficient and dissipates less than 83 mW (typical). It is  
characterized for operations from –40°C to 85°C.  
Bare-Die Option  
AVAILABLE OPTIONS  
TA  
APPLICATIONS  
DIE  
SONET OC-48  
SDH STM-16  
APD Preamplifier-Receivers  
PIN Preamplifier-Receivers  
–40°C to 85°C  
ONET2511TAY  
DETAILED DESCRIPTION  
BLOCK DIAGRAM  
The ONET2511TA is a high performance 2.5 Gbps transimpedance amplifier that can be segmented into the  
signal path, filter, and offset cancellation block.  
The signal path consists of a transimpedance amplifier stage, a voltage amplifier, and an output buffer.  
The filter circuit provides a filtered VCC for the photodiode.  
The offset correction circuit uses an internal low pass filter to cancel the DC on the input and it provides a signal  
to monitor the received signal strength.  
A simplified block diagram of the ONET2511TA is shown in Figure 1.  
VCC  
RSSI  
750 W  
Disable  
Bandgap Voltage  
Reference and  
Bias Current  
Generation  
FILTER  
Offset  
Cancellation  
R
F
+
+
OUT+  
OUT−  
IN  
CML  
Output  
Buffer  
Voltage  
Amplifier  
Transimpedance  
Amplifier  
GND  
Figure 1. Simplified Block Diagram of the ONET2511TA  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004, Texas Instruments Incorporated  
 
Not Recommended for New Designs  
ONET2511TA  
SLLS622 SEPTEMBER 2004  
www.ti.com  
SIGNAL PATH  
The first stage of the signal path is a transimpedance amplifier that takes the photodiode current and converts it  
to a voltage signal. The second stage is a voltage amplifier that provides additional gain. The output of the  
second stage feeds the output buffer and the offset cancellation circuitry. The third and final signal path stage of  
the ONET2511TA is the output buffer. The output buffer provides CML outputs with an on-chip 50Ω  
back-termination to VCC.  
FILTER CIRCUITRY  
The filter pin provides a filtered VCC for the photodiode bias. The on-chip low pass filter for the photodiode VCC  
is implemented using a filter resistor of 750and an internal capacitor. If additional filtering is required for the  
application, an external capacitor should be connected to the FILTER pin.  
OFFSET CANCELLATION AND RSSI  
The offset cancellation circuitry performs low pass filtering of the output signal of the voltage amplifier. This  
senses the DC offset at the input of the ONET2511TA. The circuitry subtracts current from the input to effectively  
cancel the DC. The sensed current is mirrored and is used to generate the RSSI output through an external 10  
kresistor. To disable the offset correction loop, the FILTER pin should be tied to GND.  
BOND PAD DESCRIPTION  
The ONET2511TA is available as bare-die. The location of the bondpads is shown in Figure 2. The circuit is  
characterized for ambient temperatures between –40°C and 85°C. Table 1 shows the pad descriptions for the  
ONET2511TA.  
6
7
7
6
VCC 8  
IN 9  
5 OUT+  
4 OUT–  
8
9
5
ONET  
2511TA  
N.C. 10  
10  
1
PAD#1  
3
FILTER 1  
4
ONET2511TA_B2003  
2
1,030µm  
origin  
0,0  
x
2
3
Figure 2. Bond Pad Assignment of ONET2511TA  
Table 1. Pad Description of the ONET2511TA  
PAD  
SYMBOL TYPE  
DESCRIPTION  
1
FILTER  
Analog  
Bias voltage for photodiode (connects to an internal 750-resistor to VCC). To disable offset correction  
loop connect FILTER to GND.  
2
RSSI  
Analog-Out  
Analog output voltage proportional to the input data amplitude. Indicates the strength of the received  
signal (RSSI).  
3, 6  
4
GND  
OUT-  
Supply  
Circuit ground.  
Analog-Out  
Inverted data output. On-chip 50-back-terminated to VCC.  
2
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Table 1. Pad Description of the ONET2511TA (continued)  
PAD  
5
SYMBOL TYPE  
DESCRIPTION  
OUT+  
VCC  
IN  
Analog-Out  
Supply  
Non-inverted data output. On-chip 50-back-terminated to VCC  
.
7, 8  
9
3.3-V ± 10% supply voltage  
Analog-In  
Data input to TIA. Connect to anode of PIN or APD diode.  
Not connected  
10  
NC  
ABSOLUTE MAXIMUM RATINGS  
over operating free-air temperature range (unless otherwise noted)(1)  
UNIT  
VCC  
Supply voltage(2)  
-0.3 to 4.0  
V
VOUT+ VOUT- Voltage of OUT+ and Out-(2)  
VFILTER VRSSI Voltage of FILTER and RSSI(2)  
VCC –1.5 to VCC +0.5  
V
-0.3 to 4.0  
-4 to 4  
-8 to 8  
2
V
mA  
IIN  
Current into IN  
IFILTER  
ESD  
Current into FILTER  
mA  
ESD rating at all pins except IN(3)  
ESD rating at IN(3)  
kV (HBM)  
kV (HBM)  
°C  
1
TJmax  
TSTG  
TA  
Maximum junction temperature  
Storage temperature  
150  
-65 to 85  
-40 to 85  
°C  
Operating free-air tempature  
°C  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to network ground terminal.  
(3) For optimum high-frequency performance, the input pin has reduced ESD protection.  
RECOMMENDED OPERATING CONDITIONS  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
Supply voltage  
Operating free-air temperature  
TEST CONDITIONS  
MIN  
3
NOM  
MAX  
3.6  
UNIT  
V
VCC  
TA  
3.3  
-40  
85  
°C  
DC ELECTRICAL CHARACTERISTICS  
over operating free-air temperature range, VCC = 3.3 V, TA = 25°C (unless otherwise noted)  
PARAMETER  
Supply voltage  
TEST CONDITIONS  
MIN  
TYP  
3.3  
MAX  
3.6  
35  
UNIT  
V
VCC  
3
ICC  
Supply current  
25  
mA  
V
VIB  
Input bias voltage  
0.66  
2
0.83  
1.1  
IIN-OVL  
ROUT  
RFILTER  
DC input overload current  
Ouput resistance (OUT+, OUT-)  
Photodiode filter resistance (FILTER)  
mA  
Single-ended to VCC  
50  
750  
Copyright © 2004, Texas Instruments Incorporated  
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AC ELECTRICAL CHARACTERISTICS  
over operating free-air temperature range, VCC = 3.3 V, TA = 25°C (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
5000  
640  
UNIT  
mAp-p  
µAp-p  
V/A  
IIN-OVL  
AC input overload current  
Input linear range  
2
0.95 < linearity < 1.05  
40  
2000  
4000  
2.5  
7
ARSSI  
Z21  
RSSI gain  
10-kload  
Small-signal transimpedance  
Small-signal bandwidth  
Low-frequency -3dB bandwidth  
Differential output  
CEXTERNAL = 0.85 pF(1)  
-3 dB, II N < 20 µA DC  
3000  
fH-3dB  
fL-3dB  
GHz  
kHz  
fH-3dB -RSSI RSSI bandwidth  
4
kHz  
IN-IN  
DJ  
Input referred RMS noise  
470  
10  
nARMS  
pA/Hz  
psp-p  
psp-p  
psp-p  
mVp-p  
dB  
Input referred noise density  
Deterministic jitter  
IIN = 10 µA (K28.5 pattern)  
IIN = 100 µA (K28.5 pattern)  
IIN = 2 mA (K28.5 pattern)  
21  
25  
16  
VOD(MAX)  
PSRR  
Differential output voltage, maximum IIN = 1 mAp-p  
Power supply rejection ratio f < 2 MHz  
200  
320  
55  
400  
(1) CEXTERNAL= is the total capacitance comprising of the photodiode capacitance, board capacitance, and pad capacitance at the IN bond  
pad.  
4
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SLLS622 SEPTEMBER 2004  
APPLICATION INFORMATION  
Basic Application Circuit  
Figure 3 shows the ONET2511TA being used as a receiver in a typical fiber optic application. The ONET2511TA  
converts the electrical current generated by the PIN or APD photodiode into a differential voltage output. The  
FILTER input provides a DC bias voltage for the photodiode that is low pass filtered by the combination of the  
internal 750-resistor and internal capacitor. For additional power supply filtering, use an external capacitor  
CFILTER. The RSSI output is used to mirror the photodiode output current and must be connected via a 10-kΩ  
resistor to GND or left open. Within the ONET2511TA, the OUT+ and OUT- pins are back-terminated with 50 Ω  
to VCC.  
VCC  
C
1
7
6
OUT+  
8
9
5
750Ω  
ONET  
2511TA  
C
2
10  
1
PAD#1  
3
OUT–  
RSSI  
4
ONET2511TA_B2003  
2
C
FILTER  
(optional)  
10kW  
GND  
Figure 3. Basic Application Circuit  
Board Layout  
Careful attention to board layout parasitics and external components is necessary to achieve optimal  
performance with a high performance transimpedance amplifier like the ONET2511TA.  
Recommendations that optimize performance include:  
1. Minimize total capacitance on the IN pad by using a low capacitance photodiode and paying attention to  
stray capacitances. Place the photodiode close to the ONET2511TA die in order to minimize the bond wire  
length and thus the parasitic inductance.  
2. The external filter capacitance CFILTER may have an impact on the transfer function of the TIA and must be  
chosen with care based on the module implementation.  
3. Use identical termination and symmetrical transmission lines at the differential output pins OUT+ and OUT-.  
4. Use short bond wire connections for the supply terminals VCC and GND. Provide sufficient supply voltage  
filtering.  
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SLLS622 SEPTEMBER 2004  
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CHIP DIMENSIONS AND PAD LOCATIONS  
7
6
8
9
5
ONET  
2511TA  
10  
PAD#1  
3
4
1
ONET2511TA_B2003  
2
1,030µm  
origin  
x
0,0  
Figure 4. Chip Dimensions and Pad Locations  
Figure 5. Chip Layout  
Table 2. Pad Locations and Description  
PAD LOWER LEFT  
COORDINATE  
UPPER RIGHT  
COORDINATE  
SYMBOL TYPE  
DESCRIPTION  
x [µm] y [µm] x [µm] y [µm]  
1
2
3
4
5
6
7
8
9
10  
30  
84  
115  
292  
469  
971  
971  
469  
292  
115  
115  
115  
169  
115  
115  
197  
594  
619  
619  
619  
469  
319  
FILTER  
RSSI  
GND  
OUT-  
OUT+  
GND  
VCC  
VCC  
IN  
Analog  
Bias voltage for photodiode  
207  
384  
886  
886  
384  
207  
30  
30  
Analog out RSSI output voltage signal  
Supply Circuit ground  
30  
112  
509  
534  
534  
534  
384  
234  
Analog out Inverted data output  
Analog out Non-inverted data output  
Supply  
Supply  
Supply  
Circuit ground  
+3.3 V ± 10% supply voltage  
+3.3 V ± 10% supply voltage  
30  
Analog in Data input to TIA  
Not connected  
30  
NC  
6
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TO46 Layout Example  
An example for a suggested layout in a 5-pin TO46 ROSA is given in Figure 6 (top view).  
0.65mm  
OUT+  
OUT–  
GND  
VCC  
RSSI  
Figure 6. TO46 Layout Example Using the ONET2511TA  
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TYPICAL CHARACTERISTICS  
VCC = +3.3 V and TA = +25°C (unless otherwise noted)  
INPUT REFERRED NOISE  
INPUT REFERRED NOISE  
vs  
vs  
AVERAGE INPUT CURRENT  
FREE-AIR TEMPERATURE  
2400  
2200  
600  
550  
500  
450  
400  
350  
2000  
1800  
1600  
1400  
1200  
1000  
800  
300  
250  
600  
200  
400  
−40 −20  
0
20  
40  
60  
80  
100  
1
10  
100  
1000  
Free−Air Tempature − 5C  
Average Input Current − mA  
Figure 7.  
Figure 8.  
TRANSIMPEDANCE  
vs  
FREE-AIR TEMPERATURE  
DC TRANSFER CHARACTERISTIC (OFFSET  
CANCELLATION DISABLED)  
75  
74  
200  
150  
100  
73  
72  
50  
71  
70  
0
69  
−50  
68  
67  
−100  
−150  
66  
65  
−200  
−40 −20  
0
20  
40  
60  
80  
100  
−100 −80 −60 −40 −20  
0
20 40 60 80 100  
Free−Air Tempature − 5C  
Input Current − mA  
Figure 9.  
Figure 10.  
8
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TYPICAL CHARACTERISTICS (continued)  
VCC = +3.3 V and TA = +25°C (unless otherwise noted)  
SMALL SIGNAL BANDWIDTH  
vs  
RSSI OUTPUT VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
AVERAGE INPUT CURRENT  
3.0  
2.9  
2.8  
2.5  
2
2.7  
2.6  
1.5  
2.5  
1
2.4  
2.3  
0.5  
2.2  
2.1  
0
−40 −20  
0
20  
40  
60  
80  
100  
0
200  
400  
600  
800  
1000  
1200  
Free−Air Tempature − 5C  
Average Input Current − mA  
Figure 11.  
Figure 12.  
DETERMINISTIC JITTER  
vs  
INPUT CURRENT  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
10  
100  
1000  
10k  
Input Current − mA  
p−p  
Figure 13.  
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TYPICAL CHARACTERISTICS (continued)  
VCC = +3.3 V and TA = +25°C (unless otherwise noted)  
OUTPUT EYE-DIAGRAM AT 2.5 GBPS and 20µAp-p INPUT CURRENT USING A K28.5 PATTERN  
Time − 100ps/Div  
Figure 14.  
OUTPUT EYE-DIAGRAM AT 2.5 GBPS and 2 mAp-p INPUT CURRENT USING A K28.5 PATTERN  
Time − 100ps/Div  
Figure 15.  
10  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
5-Sep-2011  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
ONET2511TAY  
NRND  
DIESALE  
Y
0
Green (RoHS  
& no Sb/Br)  
Call TI  
N / A for Pkg Type  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
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相关型号:

SI9130DB

5- and 3.3-V Step-Down Synchronous Converters

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SI9135LG-T1

SMBus Multi-Output Power-Supply Controller

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SI9135LG-T1-E3

SMBus Multi-Output Power-Supply Controller

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SI9135_11

SMBus Multi-Output Power-Supply Controller

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SI9136_11

Multi-Output Power-Supply Controller

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SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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SI9130_11

Pin-Programmable Dual Controller - Portable PCs

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SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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