ONET4201LDRGERG4 [TI]
155-Mbps to 4.25-Gbps LASER DRIVER; 155 - Mbps到4.25 Gbps的激光驱动器型号: | ONET4201LDRGERG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | 155-Mbps to 4.25-Gbps LASER DRIVER |
文件: | 总26页 (文件大小:1191K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ONET4201LD
www.ti.com
SLLS677–NOVEMBER 2005
155-Mbps to 4.25-Gbps LASER DRIVER
FEATURES
APPLICATIONS
•
•
•
•
•
SONET/SDH Transmission Systems
•
•
•
Multirate Operation From 155 Mbps up to 4.25
Gbps
Fibre Channel Optical Modules
Fiber Optic Data Links
Digital Cross-Connects
Optical Transmitters
Bias Current Programmable From 1 mA
to 100 mA
Modulation Current Programmable From 5 mA
to 85 mA
DESCRIPTION
•
•
•
•
•
APC and Fault Detection
Fault Mode Selection
The ONET4201LD is a laser driver for multiple fiber
optic applications up to 4.25 Gbps. The device
accepts CML input data and provides bias and
modulation currents for driving a laser diode. Also
provided are automatic power control (APC),
temperature compensation of modulation current,
fault detection, and current monitor features.
Bias and Photodiode Current Monitors
CML Data Inputs
Temperature Compensation of Modulation
Current
•
•
•
Single 3.3-V Supply
The device is available in a small-footprint, 4-mm ×
4-mm, 24-pin, QFN package. The circuit requires a
single 3.3-V supply.
Active Back-Termination at the Output
Surface-Mount, Small-Footprint, 4-mm ×
4-mm, 24-Lead QFN Package
This power-efficient laser driver is characterized for
operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
ONET4201LD
www.ti.com
SLLS677–NOVEMBER 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DETAILED DESCRIPTION
BLOCK DIAGRAM
A simplified block diagram of the ONET4201LD is shown in Figure 1.
This compact, low-power, 4.25-Gbps laser driver circuit consists of a high-speed data path and a bias and control
block.
The function of the data path is to buffer the input data and then modulate the laser diode current according to
the input data stream.
The bias and control block generates the laser diode bias current, contains automatic power control (APC) to
maintain constant optical output power, generates a modulation current that can be temperature compensated
and controls power-on during start-up and shutdown after failure detection. The circuit design is optimized for
high-speed and low-voltage operation (3.3 V).
The main circuit blocks are described in detail below.
OUTPOL
Current Modulator
MOD+
Input Buffer Stage
DIN+
DIN–
MOD–
Modulation Current Generator
MODSET
MODSET
MODCTRL
OUT+ OUT–
Active Termination
MODTC
MODTC
IMODEN IMODMON
Bias Current Generator
IBMAX
IBMAX
BIAS
BIAS
MONB
MONB
IBEN IBMON
IBSET
4
VCC
VCC
Reference
Voltage
and Bias
3
Generation
Automatic Power Control
(APC)
GND
GND
IBSET
CAPC
MONP
PD
CAPC
MONP
PD
IMODEN IMODMON IBEN IBMON
APCCTRL
APCCTRL
Control
DISABLE
DISABLE
APCMON
APCMON
APCSET
APCSET
SDOWN
FLTMODE
FLTMODE
SDOWN
B0092-02
Figure 1. Simplified Block Diagram of the ONET4201LD
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DETAILED DESCRIPTION (continued)
HIGH-SPEED DATA PATH
The high-speed data path consists of an input buffer stage and a current modulator.
The input buffer stage takes CML compatible differential signals. It provides on-chip 50-Ω termination to VCC.
AC-coupling may be used at the DIN+ and DIN– inputs.
The laser diode current modulator mainly consists of two common-emitter output transistors and the required
driver circuitry. Depending on the input data stream, the modulation current is sunk at the MOD+ or the MOD–
pin.
Modulation current setting is performed by means of the modulation current generator block, which is supervised
by the control circuit block.
The laser diode can be either ac- or dc-coupled. In both cases, the maximum modulation current is 85 mA. The
modulation output is optimized for driving a 20-Ω load.
For optimum performance when driving a laser diode over a 20-Ω transmission line, the ONET4201LD provides
active 20-Ω back-termination, which minimizes jitter caused by reflections.
BIAS AND CONTROL
The bias and control circuitry consists of the bandgap voltage and bias generation block, the bias current
generator, the automatic power control block and the supervising control circuitry.
BANDGAP VOLTAGE AND BIAS GENERATION
The bandgap voltage reference provides process and temperature-independent reference voltages needed to set
bias current, modulation current, and photodiode reference current. Additionally, this block provides the biasing
for all internal circuits.
AUTOMATIC POWER CONTROL
The ONET4201LD laser driver incorporates an APC loop to compensate for the changes in laser threshold
current over temperature and lifetime. The internal APC is enabled when resistors are connected to the IBMAX
and APCSET pins. A back-facet photodiode mounted in the laser package is used to detect the average laser
output power. The photodiode current IPD, which is proportional to the average laser power, can be calculated by
using the laser-to-monitor transfer ratio, ρMON, and the average power, PAVG
:
I
[A] + P [W] ò [AńW]
PD
AVG
MON
(1)
In closed-loop operation, the APC modifies the laser diode bias current by comparing IPD with a reference current
IAPCSET and generates a bias compensation current. IPD can be programmed by selecting the external resistor
RAPCSET according to:
4.69 V
4.69 V
[W] ò
R
[W] +
+
APCSET
I
[A]
P
[AńW]
MON
PD
AVG
(2)
The bias compensation current subtracts from the maximum bias current to maintain the monitor photodiode
current. The maximum bias current is programmed by the resistor connected to IBMAX:
343 V
I
[A] +
BIASMAX
R
[W]
BIASMAX
(3)
This current limit establishes the maximum bias current available in closed loop mode, as well as in transient
fault conditions such as shorts at the PD pin to ground or delayed laser power up.
An external pin MONB is provided as a bias current monitor output. A fraction of the bias current (1/68) is
mirrored and develops a voltage drop across an external resistor to ground, RMONB. The voltage at MONB is
given as:
R
[W]
I
[A]
MONB
BIAS
V
[V] +
MONB
68
(4)
3
If the voltage at MONB is greater than the programmed threshold, a fault mode occurs.
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DETAILED DESCRIPTION (continued)
The MONP is also provided as a photocurrent monitor output. The photodiode current, IPD, is mirrored and
develops a voltage across an external resistor to ground, RMONP. The voltage at MONP is given as:
V
[V]
R
[W]
I
[A]
MONP
MONP
PD
(5)
If the voltage at MONP is greater than the programmed threshold, a fault mode occurs.
As with any negative-feedback system design, care must be taken to assure stability of the loop. The loop
bandwidth must not be too high in order to minimize pattern-dependent jitter. The dominant pole is determined by
the capacitor CAPC. The recommended value for CAPC is 200 nF. The capacitance of the monitor photodiode CPD
adds another pole to the system, and thus it must be small enough to maintain stability. The recommended value
for this capacitance is CPD ≤ 50 pF.
The internal APC loop can be disabled by connecting a 100-kΩ resistor from APCSET to VCC and leaving PD
open. In open-loop operation, the laser diode current is set by IBIASMAX and IMODSET
.
MODULATION-CURRENT GENERATOR
The modulation-current generator defines the tail current of the modulator, which is sunk from either MOD+ or
MOD–, depending on the data pattern. The modulation current consists of a modulation current IMOD0 at a
reference temperature T0 = 60°C (set by the resistor RMODSET) and a temperature-dependent modulation current
defined by the resistor RMODTC. The modulation current can be estimated as follows:
265 V
24 W
o
o
ǒT[ C] * T [ C]
Ǔ
I
[A] +
MOD
1 )
) 630 ppm
ǒ
Ǔ
ǒ
Ǔ
0
R
[W]
R
[W]
MODSET
MODTC
(6)
Note that the reference temperature, T0, and the temperature compensation set by RMODTC vary from part to part.
To reduce the variation, IMOD can be calibrated over temperature and set with a microcontroller DAC or digital
potentiometer.
CONTROL
The functions of this block are to control the start-up sequence, detect faults, detect tracking failure of the APC
loop, and provide disable control. The laser driver has a controlled start-up sequence, which helps prevent
transient glitches from being applied to the laser during power on. At start-up, the laser diode is off, SDOWN is
low, and the APC loop is open. Once VCC reaches ~2.8 V, the laser diode bias generator and modulation current
generator circuitry are activated (if DISABLE is low). The slow-start circuitry gradually brings up the current
delivered to the laser diode. From the time that VCC reaches ~2.8 V until the modulation current and bias current
reach 95% of their steady state value, is considered the initialization time. If DISABLE is asserted during power
on, the slow-start circuitry does not activate until DISABLE is negated.
FAULT DETECTION
The fault-detection circuitry monitors the operation of the ONET4201LD. If FLTMODE is set to a low level,
(hard-fault mode) this circuitry disables the bias and modulation circuits and latches the SDOWN output on
detection of a fault. The fault mode is reset by toggling DISABLE (for a minimum time of TRES) or by toggling VCC
.
Once DISABLE is toggled, SDOWN is set low and the circuit is re-initialized.
If FLTMODE is set to a high level (soft-fault mode), a fault is indicated at the SDOWN output; however, the bias
and modulation circuits are not disabled. The SDOWN output is reset once the fault causing condition
disappears. Toggling DISABLE or VCC is not required.
A functional representation of the fault detection circuitry is shown in Figure 2.
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DETAILED DESCRIPTION (continued)
T
Counter
RES
IMODEN
DISABLE
RES
START
IBEN
Inverter
Comparator
Inverter
Flipflop
VCC
+
Q
-
CMOS
Buffer
R
Q
MUX
I0
S
Q
+
2.8 V
SDOWN
-
I1
MUX
I1
I
PD
I
BIAS/68
Q
Comparator
I0
MONB
+
Q
-
Comparator
MONP
+
Q
-
+
1.25 V
-
MODTC
MODSET
APCSET
IBMAX
MODTC
MODSET
APCSET
IBMAX
SHORT
Short Circuit
to VCC or
GND Detect
FLTMODE
B0093-01
Figure 2. Functional Representation of the Fault Detection Circuitry
A fault mode is produced if the laser cathode is grounded and the photocurrent causes MONP to exceed its
programmed threshold. Another fault mode can be produced if the laser diode end-of-life condition causes
excessive bias current and photodiode current that results in monitor voltages (MONP, MONB) being greater
than their programmed threshold. Other fault modes can occur if there are any I/O pin single-point failures (short
to VCC or GND) and the monitor voltages exceed their programmed threshold (see Table 1).
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DETAILED DESCRIPTION (continued)
Table 1. Response to I/O-Pin Shorts to VCC or GND
FLTMODE = LOW
FLTMODE = HIGH
PIN
Response to Short to GND Response to Short to VCC Response to Short to GND
Response to Short to VCC
APCSET
BIAS
SDOWN latched high, IBIAS and No fault, IMOD unaffected
IMOD disabled
SDOWN high, IBIAS and IMOD No fault
unaffected
SDOWN latched high, IMOD
disabled
No fault, IBIAS goes to zero
SDOWN high, IMOD
unaffected
No fault, IMOD unaffected
CAPC
DIN+
DIN–
No fault
No fault, IBIAS goes to zero
No fault
No fault, IMOD unaffected
No fault, IMOD disabled
No fault, IMOD disabled
Normal circuit operation
No fault, IBIAS goes to zero
No fault
No fault, IMOD disabled
No fault, IMOD disabled
No fault
No fault
DISABLE Normal circuit operation
Normal circuit operation
Normal circuit operation
SDOWN high, IMOD unaffected
IBMAX
MOD+
MOD–
SDOWN latched high, IBIAS and SDOWN latched high, IBIAS
IMOD disabled and IMOD disabled
SDOWN high, IMOD
unaffected
SDOWN latched high, IBIAS and No fault
IMOD disabled
SDOWN high, IBIAS
unaffected
No fault
SDOWN latched high, IBIAS and No fault
IMOD disabled
SDOWN high, IBIAS
unaffected
No fault
MODSET SDOWN latched high, IBIAS and No fault, disables IMOD
IMOD disabled
SDOWN high, IBIAS
unaffected
No fault, disables IMOD
MODTC
MONB
MONP
SDOWN latched high, IBIAS and No fault
IMODdisabled
SDOWN high, IBIAS and IMOD No fault
unaffected
No fault
SDOWN latched high, IBIAS
No fault
SDOWN high, IBIAS and IMOD
and IMOD disabled
unaffected
No fault
SDOWN latched high, IBIAS
and IMOD disabled
No fault
SDOWN high, IBIAS and IMOD
unaffected
OUTPOL
PD
No fault, polarity reverses
No fault, IMOD unaffected
No fault
No fault
No fault, polarity reverses
No fault, IMOD unaffected
No fault
No fault
No fault, IBIAS goes to zero
No fault
No fault, IBIAS goes to zero
No fault
SDOWN
PACKAGE
For the ONET4201LD, a small-footprint, 4-mm × 4-mm, 24-lead QFN package is used, with a lead pitch of 0,5
mm. The pinout is shown in Figure 3.
In order to achieve the required low thermal resistance of about 38 K/W, which keeps the maximum junction
temperature below 115°C, a good thermal connection of the exposed die pad is mandatory.
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RGE PACKAGE
(TOP VIEW)
24 23 22 21 20 19
GND
VCC
DIN+
DIN–
VCC
GND
GND
VCC
1
18
2
17
16
15
14
13
3
4
5
6
MOD–
MOD+
VCC
BIAS
7
8
9
10 11 12
P0024-03
Figure 3. Pinout of the ONET4201LD in a 4-mm × 4-mm, 24-Lead QFN Package (Top View)
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
APCSET
BIAS
NO.
23
13
20
3
Analog-in
Set photodiode reference current with resistor to GND.
Analog-out Laser diode bias current sink. Connect to laser cathode.
CAPC
Analog
CML-in
APC loop capacitor
DIN+
Noninverted data input. On-chip, 50-Ω terminated to VCC.
Inverted data input. On-chip, 50-Ω terminated to VCC.
Disable modulation and bias current outputs.
DIN–
4
CML-in
DISABLE
FLTMODE
24
10
LVTTL-in
CMOS-in
Fault mode selection input. If a low level is applied to this pin, any fault event is latched and the
bias and modulation currents are disabled in a fault condition. Toggling of DISABLE or VCC
resets the fault condition. If pin is set to a high level, fault events are flagged at the SDOWN
output but not latched. The bias and modulation currents are not disabled. SDOWN is reset
once the fault condition disappears.
GND
1, 6, 18, EP
Supply
Circuit ground. The exposed die pad (EP) must be grounded.
Set maximum laser diode current with resistor to GND.
IBMAX
MOD+
MOD–
21
15
16
Analog-in
Analog-out Laser modulation current output. Connect to laser cathode. Avoid usage of vias on board.
Analog-out Complementary laser modulation current output. Connect to VCC adjacent to anode of laser
diode. Avoid usage of vias on board.
MODSET
MODTC
MONB
11
12
8
Analog-in
Analog-in
Set temperature-independent modulation current with resistor to GND.
Set modulation-current temperature compensation with resistor to GND.
Analog-out Bias current monitor sources 1/68 of the bias current
MONP
7
Analog-out Photodiode current monitor sources a current identical to the photodiode current
OUTPOL
22
LVTTL-in
Alters modulation current output polarity. Open or high: normal polarity, low: inverted polarity.
OUTPOL is pulled up internally. Normal polarity: when DIN+ is high, current is sunk into MOD+.
PD
19
Analog-in
Monitor photodiode input. Connect to photodiode anode for APC. Sinks the photodiode current
to GND.
SDOWN
VCC
9
LVTTL-out Fault detection flag
Supply 3.3 V ±10% supply voltage
2, 5, 14, 17
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ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
VALUE
–0.3 to 4
–20 to 120
–20 to 120
–5 to 5
UNIT
V
VCC
Supply voltage(2)
IIBIAS
Current into BIAS
mA
mA
mA
V
IIMOD+, IIMOD–
IPD
Current into MOD+, MOD–
Current into PD
VDIN+, VDIN–, VDISABLE
,
Voltage at DIN+, DIN–, DISABLE, MONB, MONP, FLTMODE, SDOWN(2)
–0.3 to 4
VMONB, VMONP, VFLTMODE
VSDOWN
,
VCAPC, VIBMAX, VMODSET
VAPCSET, VMODTC
,
Voltage at CAPC, IBMAX, MODSET, APCSET, MODTC(2)
–0.3 to 3
V
VMOD+, VMOD-
VBIAS
Voltage at MOD+, MOD–(2)
Voltage at BIAS(2)
0.6 to VCC+1.5
V
V
1 to 3.5
ESD rating at all pins except MOD+, MOD–
ESD rating at MOD+, MOD-
2
1
ESD
kV (HBM)
TJ,max
Tstg
Maximum junction temperature
150
°C
°C
°C
°C
Storage temperature range
–65 to 150
–40 to 85
260
TA
Characterized free-air operating temperature range
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
TLEAD
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
3
NOM
MAX
3.6
UNIT
V
VCC
TA
Supply voltage
3.3
Operating free-air temperature
–40
85
°C
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DC ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
3.3
32
MAX
UNIT
V
VCC
IVCC
Supply voltage
3
3.6
IMOD = 30 mA, IBIAS = 20 mA (excluding IMOD, IBIAS
)
mA
mA
mA
µA
Supply current
IMOD = 60 mA, IBIAS = 100 mA (excluding IMOD, IBIAS
)
55
100
25
IBIAS
Bias current range
Bias off-current
Bias overshoot
IBIAS-OFF
DISABLE = high or hard-fault mode; VBIAS ≤ 3.5 V
During module hot plugging. VCC turn on time must be
10%
≤ 0.8 s
Bias current temperature
stability
APC open loop
–480
480
ppm/°C
Bias current absolute
accuracy(1)
IBIAS ≥ 1 mA
–15%
15%
IBIAS = 1 mA, TA = 25°C
IBIAS/IMONB
±15%
68
Bias current monitor gain
mA/ mA
V
MONB and MONP threshold
range
A fault is never detected for VMONB/P ≤ 1 V and a fault
always occurs for VMONB/P ≥ 1.35 V
1
1.25
1.35
PD current monitor gain
IPD/IMONP
1
mA/mA
VID
Differential input signal
200
2.4
1600
mVp-p
SDOWN output high voltage
SDOWN output low voltage
DISABLE input impedance
DISABLE input high voltage
DISABLE input low voltage
Monitor diode voltage
IOH = 100 µA sourcing
V
V
IOL = 1 mA sinking
0.4
10
4.7
2
7.4
kΩ
V
0.8
1.6
V
VPD
V
Monitor diode dc current range
18
1500
µA
(1) Absolute accuracy refers to part-to-part variation.
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AC ELECTRICAL CHARACTERISTICS
Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C,
over recommended operating conditions (unless otherwise noted)
PARAMETER
Data Rate
Modulation current range
TEST CONDITIONS
MIN
4.25
5
TYP MAX
UNIT
Gbps
mA
IMOD
Current into MOD+/MOD– pin;
VMOD+, VMOD– ≥ 0.6 V
85
25
IMOD-OFF Modulation off-current
Modulation current stability
DISABLE = high or hard-fault occurred
µA
–600
600 ppm/°C
IMOD = 10 mA
±40%
±25%
±20%
8300
630
Modulation current absolute
accuracy(1)
IMOD = 50 mA
IMOD = 80 mA
RMODTC = 3.125 kΩ
Modulation current
ppm/°C
temperature compensation(2)
RMODTC = Open
tr
Output rise time (20% to 80%)
Output fall time (20% to 80%)
Disable assert time (see Figure 4)
VMOD+ ≥ 1 V, VMOD– ≥ 1 V, IMOD = 30 mA
VMOD+ ≥ 1 V, VMOD– ≥ 1 V, IMOD = 30 mA
55
75
75
5
ps
ps
µs
tf
55
tOFF
Time from rising edge of DISABLE to when output
currents fall below the maximum limits of IMOD-OFF
and IBIAS-OFF
0.06
tON
Disable negate time (see Figure 5)
Time to initialize
Time from falling edge of DISABLE to when output is
90% of nominal
200
200
3.3
µs
µs
tINIT
From power on or negation of SDOWN using
DISABLE
tFAULT
Fault assert time
Time from fault to SDOWN rising edge
50
10
µs
µs
Maximum spike pulse length at DISABLE being
ignored
tRESET
DISABLE reset (see Figure 6)
Time DISABLE must be high to reset SDOWN
20
µs
Output overshoot/undershoot
Random jitter
–13.5%
13.5
%
IMOD = 60 mA
0.6
15
0.9 psRMS
10 mA ≤ IMOD ≤ 60 mA, with K28.5 pattern
30
psp-p
at 4.25 Gbps
10 mA ≤ IMOD ≤ 60 mA, with 223 – 1 PRBS or
equivalent pattern at 2.67 Gbps
13
32
psp-p
DJ
Deterministic jitter(3)
K28.5 pattern at 1.06 Gbps
223 – 1 PRBS or equivalent pattern at 155 Mbps
5
psp-p
psp-p
10
(1) Absolute accuracy refers to part-to-part variation.
(2) For a given external resistor connected to the MODTC pin, the modulation current temperature compensation will vary due to
part-to-part variations.
(3) Jitter measured at positive edge and negative edge crossing of eye diagram.
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V
HIGH
SDOWN
V
LOW
t
t
t
V
HIGH
DISABLE
V
LOW
I
MOD
I
MOD
I
MOD-OFF
I
BIAS
I
BIAS
I
t
BIAS-OFF
t
OFF
T0102-01
Figure 4. DISABLE Assert Time tOFF
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V
HIGH
SDOWN
V
LOW
t
t
t
V
HIGH
DISABLE
V
LOW
I
MOD
I
MOD
I
MOD-OFF
I
BIAS
I
BIAS
I
t
BIAS-OFF
t
ON
T0103-01
Figure 5. DISABLE Negate Time tON
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V
HIGH
SDOWN
V
LOW
t
t
t
V
HIGH
DISABLE
V
LOW
I
MOD
I
MOD
I
MOD-OFF
I
BIAS
I
BIAS
I
t
BIAS-OFF
t
t
t
RESET
RESET
ON
T0104-01
Figure 6. SDOWN Reset Time tRESET
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TYPICAL CHARACTERISTICS
Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C (unless otherwise noted)
ELECTRICAL EYE-DIAGRAM AT 4.25 Gbps
WITH K28.5 PATTERN, IMOD = 30 mA
ELECTRICAL EYE-DIAGRAM AT 2.125 Gbps
WITH K28.5 PATTERN, IMOD = 30 mA
Time [50ps/Div]
Time [100ps/Div]
G001
G002
Figure 7.
Figure 8.
ELECTRICAL EYE-DIAGRAM AT 1.0625 Gbps
WITH K28.5 PATTERN, IMOD = 30 mA
DETERMINISTIC JITTER
vs
MODULATION CURRENT
60
50
40
30
20
10
0
10
15
20
25
30
35
40
45
50
55
60
Time [200ps/Div]
Modulation Current − mA
G003
G004
Figure 9.
Figure 10.
14
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TYPICAL CHARACTERISTICS (continued)
Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C (unless otherwise noted)
RANDOM JITTER
vs
MODULATION CURRENT
RANDOM JITTER
vs
TEMPERATURE
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
10
15
20
25
30
35
40
45
50
55
60
−40 −30 −20 −10
0
10 20 30 40 50 60 70 80 90
Modulation Current − mA
T
A
− Free-Air Temperature − °C
G005
G006
Figure 11.
Figure 12.
RISE TIME AND FALL TIME
vs
MODULATION CURRENT
BIAS-MONITOR CURRENT GAIN IMONB/IBIAS
vs
BIAS CURRENT IBIAS
80
70
60
50
40
30
20
20
19
18
17
16
15
14
13
12
11
10
Rise Time
Fall Time
10
15
20
25
30
35
40
45
50
55
60
10
15
20
25
30
35
40
45
50
55
60
Modulation Current − mA
Bias Current − mA
G007
G008
Figure 13.
Figure 14.
15
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TYPICAL CHARACTERISTICS (continued)
Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C (unless otherwise noted)
BIAS CURRENT IBIAS IN OPEN LOOP MODE
MODULATION CURRENT IMOD
vs
EXTERNAL RESISTOR RMODSET
vs
EXTERNAL RESISTOR RBIASMAX
120
100
80
60
40
20
0
100
90
80
70
60
50
40
30
20
10
0
0
10
20
30
40
50
60
70
80
90 100
0
10
20
30
40
50
60
70
80
90 100
R
− External Resistor − kΩ
R
− External Resistor − kΩ
BIASMAX
MODSET
G009
G010
Figure 15.
Figure 16.
MONITOR DIODE CURRENT IPD
vs
EXTERNAL RESISTOR RAPCSET
PHOTODIODE MONITOR GAIN IMONP/IPD
vs
TEMPERATURE
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
10
20
30
40
50
60
70
80
90 100
−40 −30 −20 −10
0
10 20 30 40 50 60 70 80 90
R
− External Resistor − kΩ
T
A
− Free-Air Temperature − °C
APCSET
G011
G012
Figure 17.
Figure 18.
16
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TYPICAL CHARACTERISTICS (continued)
Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C (unless otherwise noted)
BIAS CURRENT MONITOR GAIN IMONB/IBIAS
SUPPLY CURRENT (excl. IMOD and IBIAS)
vs
vs
TEMPERATURE
TEMPERATURE
20
18
16
14
12
10
80
70
60
50
40
30
20
10
−40 −30 −20 −10
0
10 20 30 40 50 60 70 80 90
−40 −30 −20 −10
0
10 20 30 40 50 60 70 80 90
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
G013
G014
Figure 19.
Figure 20.
DISABLE ASSERT TIME tOFF
DISABLE NEGATE TIME tON
∆t = 2.21 µs
∆t = 240 µs
V
V
SDOWN
SDOWN
V
V
DISABLE
DISABLE
I
I
MOD+
MOD+
I
I
BIAS
BIAS
Time [100 µs/Div]
Time [500 ns/Div]
G016
G017
Figure 21.
Figure 22.
SHUTDOWN RESET TIME tRESET
∆t = 12.8 µs
V
SDOWN
V
DISABLE
I
MOD+
I
BIAS
Time [5 µs/Div]
G018
Figure 23.
17
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APPLICATION INFORMATION
Figure 24 shows the ONET4201LD connected with a dc-coupled interface to the laser diode, alternatively the
ONET4201LD laser driver can be ac-coupled.
OUTPOL
DISABLE
VCC
GND
VCC
DIN+
DIN–
VCC
GND
GND
Monitor
Photodiode
VCC
20 W
MOD–
MOD+
VCC
DIN+
ONET4201LD
24-Lead QFN
RD
DIN–
Laser-
Diode
BIAS
MONP
FLTMODE
MONB
SDOWN
S0154-02
Figure 24. Basic Application Circuit With DC-Coupled Interface Between
the ONET4201LD and the Laser Diode
APC loop instability may occur with large inductive loading on the BIAS pin. To ensure loop stability in this case,
it is recommended to connect a 1-nF capacitor to ground at the BIAS pin.
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APPLICATION INFORMATION (continued)
SELECT A LASER
In the design example according to Figure 24, the ONET4201LD is dc coupled to a typical communication-grade
laser diode capable of operating at 4.25 Gbps with the specifications shown in Table 2.
Table 2. Laser Diode Specifications
PARAMETER
VALUE
1310
5
UNITS
nm
λ
Wavelength
PAVG Average optical output power
ITH Threshold current
ρMON Laser-to-monitor transfer
Laser slope efficiency
mW
10
mA
0.05
0.2
mA/mW
mW/mA
η
SELECT APCSET RESISTOR
When the APC loop is activated, the desired average optical output power PAVG is defined by characteristics of
the monitor diode and by the APCSET resistor RAPCSET. The relation between the monitor photodiode current IPD
and the average optical output power PAVG is given by Equation 7:
I
[A] + P
[W] ò
[AńW]
PD
AVG
MON
(7)
The RAPCSET resistor is calculated by Equation 8:
4.69 V 4.69 V
[W] ò
R
[W] +
+
APCSET
I
[A]
P
[AńW]
MON
PD
AVG
(8)
For the laser diode specified in Table 2 and the desired average optical output power of 5 mW, RAPCSET is
calculated as seen in Equation 9:
4.69 V
[W] ò
4.69 V
5 mW 0.05 mAńmW
R
[W] +
+
+ 18.75 kW
APCSET
P
[AńW]
MON
AVG
(9)
Note that the monitor photodiode current IPD must not exceed 1.5 mA corresponding to a minimum APCSET
resistor RAPCSET,MIN = 3.1 kΩ.
SELECT MODSET RESISTOR
Modulation current IMOD is dependent on the required optical output peak-to-peak power Pp-p or the average
optical power PAVG. IMOD can be calculated using the laser slope efficiency η and the desired extinction ratio re:
r
e*1
e)1
2 P
[W]
P
[W]
p*p
r
AVG
h[WńA]
I
[A] +
MOD
+
h[WńA]
(10)
Using the laser diode parameters from Table 2 and assuming an extinction ratio re = 8 dB (≈6.3) for an average
optical power PAVG = 5 mW the required modulation current results as:
6.3*1
2 5 mW
6.3)1
I
+
+ 36.3 mA
MOD
0.2 mWńmA
(11)
(12)
The modulation current is adjustable with a selectable temperature coefficient TC according to the relation:
o
o
[A] ǒ1 ) TC ǒT[ C] * T [ C]ǓǓ
0
I
[A] + I
MOD
MOD0
where T is the ambient temperature in °C and T0 is the reference temperature (T0 = 60°C).
The temperature coefficient of the modulation current TC is typically adjustable between 630 ppm/°C and 8300
ppm/°C.
For calculation of the required external resistor RMODSET for a given modulation current and a given temperature,
the formula can be modified as follows:
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265 V
o
o
ǒ1 ) TC ǒT[ C] * T [ C]ǓǓ
0
R
[W] +
MODSET
I
[A]
MOD
(13)
If 4000 ppm/°C is the desired temperature coefficient and the modulation current from the example above,
36.3 mA, is required at a temperature of 25°C, the MODSET resistor RMODSET is given by Equation 14.
4000 ppm
oC
265 V
36.3 mA
o
o
ǒ1 )
25 C * 60 C)Ǔ+ 6.3 kW
(
R
[W] +
MODSET
(14)
Note that the modulation current IMOD must not exceed 85 mA over the complete temperature range,
corresponding to a minimum MODSET resistor RMODSET,MIN = 3.1 kΩ.
SELECT MODTC RESISTOR
The RMODTC resistor is used to program a modulation temperature coefficient that can be used to compensate for
the decreased slope efficiency of the laser at a higher temperature. The temperature coefficient TCLD of the laser
can be calculated using the slope efficiency η1 at temperature T1 and η2 at temperature T2 as shown in
Equation 15:
h [WńA] * h [WńA]
1
2
1
106
LDƪ ƫ+
TC
oC
o
o
h1[WńA] ǒT [ C] * T [ C]Ǔ
2 1
(15)
As an example, for the laser in Table 2, the slope efficiency at temperature T1 = 25°C is η1 = 0.2 mW/mA. At
temperature T2 = 85°C the slope efficiency is η2 = 0.15 mW/mA. The corresponding temperature coefficient TCLD
laser can be calculated:
0.15 mWńmA * 0.2 mWńmA
0.2 mWńmA (85oC * 25oC)
1
TC
+
106 + * 4167
oC
LD
(16)
The MODTC resistor RMODTC can be used to compensate the laser temperature coefficient TCLD in order to
maintain the same optical output swing within a range of 630 ppm up to 8300 ppm. For this, RMODTC may be
programmed as follows:
24 W
R
+
MODTC
1
o C
(TC * 630 ppm)ƪ ƫ
o
C
(17)
To compensate for the decreased slope efficiency of the laser in Table 2, TC must be 4167 ppm/°C.
This leads to the following MODTC resistor RMODTC
:
24 W
R
+
+ 6.8 kW
MODTC
4167 ppm * 630 ppm
o C
oC
(18)
SELECT BIASMAX RESISTOR
The BIASMAX resistor RBIASMAX is used to limit the bias current applied to the laser diode.
To calculate RBIASMAX, the maximum threshold current at 85°C and end of life must be determined. The
maximum bias current for the dc-coupled interface can be approximated by Equation 19.
I
[A]
I
[A]
BIASMAX
THMAX
(19)
RBIASMAX can be set by Equation 20.
343 V
343 V
R
[W] +
+
BIASMAX
I
[A]
I
[A]
BIASMAX
THMAX
(20)
For the example laser diode, the maximum threshold current is 40 mA at 85°C. Therefore, RBIASMAX can be
approximated by Equation 21.
20
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343 V
40 mA
R
+
+ 8.6 kW
BIASMAX
(21)
SELECT VMONB AND VMONP RANGE
Monitoring the bias current is achieved by taking the fractional (1/68) bias current and developing a voltage
across an external resistor to ground. Equation 22 provides the value for VMONB for a resistor value equal to
768 Ω.
R
[W]
I
[A]
768 W
I
[A]
MONB
BIAS
BIAS
68
V
[V] +
+
+ 11.29 W I
[A]
MONB
BIAS
68
(22)
Monitoring of the photodiode current is achieved by taking a mirror of IPD and developing a voltage across an
external resistor to ground. Equation 23 provides the value for VMONP for a resistor equal to 200 Ω.
V
[V]
R
[W]
I
[A]
200 W
I
[A]
MONP
MONP
PD
PD
(23)
LASER DIODE INTERFACE
The output stage of the ONET4201LD is optimized for driving a 20-Ω load. The combination of a damping
resistor, RD, along with the resistance of the laser diode must be 20 Ω for impedance matching. The suggested
typical value for RD is 6 Ω to 15 Ω. A bypass capacitor of 10 nF placed close to the laser anode also helps to
optimize performance.
21
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PACKAGE OPTION ADDENDUM
www.ti.com
16-Dec-2005
PACKAGING INFORMATION
Orderable Device
ONET4201LDRGER
ONET4201LDRGERG4
ONET4201LDRGET
ONET4201LDRGETG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
QFN
RGE
24
24
24
24
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
QFN
QFN
QFN
RGE
RGE
RGE
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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