OPA333_17 [TI]
1.8-V, microPower, CMOS Operational Amplifiers, Zero-Drift Series;型号: | OPA333_17 |
厂家: | TEXAS INSTRUMENTS |
描述: | 1.8-V, microPower, CMOS Operational Amplifiers, Zero-Drift Series |
文件: | 总28页 (文件大小:1338K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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OPA333
OPA2333
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SBOS351C–MARCH 2006–REVISED MAY 2007
1.8V, microPOWER
CMOS OPERATIONAL AMPLIFIERS
Zerø-Drift Series
FEATURES
DESCRIPTION
•
•
•
•
•
•
•
•
LOW OFFSET VOLTAGE: 10μV (max)
ZERO DRIFT: 0.05μV/°C (max)
0.01Hz to 10Hz NOISE: 1.1μVPP
QUIESCENT CURRENT: 17μA
The OPA333 series of CMOS operational amplifiers
uses a proprietary auto-calibration technique to
simultaneously provide very low offset voltage (10μV
max) and near-zero drift over time and temperature.
These miniature, high-precision, low quiescent
current amplifiers offer high-impedance inputs that
have a common-mode range 100mV beyond the rails
and rail-to-rail output that swings within 50mV of the
rails. Single or dual supplies as low as +1.8V (±0.9V)
and up to +5.5V (±2.75V) may be used. They are
optimized for low-voltage, single-supply operation.
SINGLE-SUPPLY OPERATION
SUPPLY VOLTAGE: 1.8V to 5.5V
RAIL-TO-RAIL INPUT/OUTPUT
microSIZE PACKAGES: SC70 and SOT23
APPLICATIONS
The OPA333 family offers excellent CMRR without
•
•
•
•
•
•
TRANSDUCER APPLICATIONS
TEMPERATURE MEASUREMENTS
ELECTRONIC SCALES
MEDICAL INSTRUMENTATION
BATTERY-POWERED INSTRUMENTS
HANDHELD TEST EQUIPMENT
the
crossover
associated
with
traditional
complementary input stages. This design results in
superior performance for driving analog-to-digital
converters (ADCs) without degradation of differential
linearity.
The OPA333 (single version) is available in the
SC70-5, SOT23-5, and SO-8 packages. The
OPA2333 (dual version) is offered in DFN-8 (3mm ×
3mm), MSOP-8, and SO-8 packages. All versions
are specified for operation from –40°C to +125°C.
OPA333
0.1Hz TO 10Hz NOISE
OUT
V-
1
2
3
5
4
V+
+IN
-IN
OPA333
SOT23-5
+IN
1
2
3
5
4
V+
V-
-IN
OUT
1s/div
SC70-5
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2007, Texas Instruments Incorporated
OPA333
OPA2333
www.ti.com
SBOS351C–MARCH 2006–REVISED MAY 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION(1)
PRODUCT
PACKAGE-LEAD
SOT23-5
SC70-5
PACKAGE DESIGNATOR
PACKAGE MARKING
DBV
DCK
D
OAXQ
BQY
OPA333
SO-8
O333A
O2333A
BQZ
SO-8
D
OPA2333
DFN-8
DRB
DGK
MSOP-8
OBAQ
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
OPA333, OPA2333
+7
UNIT
V
Supply Voltage
Signal Input Terminals, Voltage(2)
Signal Input Terminals, Voltage(2)
Output Short-Circuit(3)
Operating Temperature
Storage Temperature
–0.3 to (V+) + 0.3
±10
V
mA
Continuous
–40 to +150
–65 to +150
+150
°C
°C
°C
Junction Temperature
ESD Ratings:
Human Body Model (HBM)
Charged Device Model (CDM)
Machine Model (MM)
4000
1000
400
V
V
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should
be current limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
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OPA2333
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SBOS351C–MARCH 2006–REVISED MAY 2007
ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPA333, OPA2333
TYP
PARAMETER
TEST CONDITIONS
VS = +5V
MIN
MAX
UNIT
OFFSET VOLTAGE
Input Offset Voltage
vs Temperature
VOS
dVOS/dT
PSRR
2
0.02
1
10
0.05
5
μV
μV/°C
μV/V
vs Power Supply
VS = +1.8V to +5.5V
(1)
Long-Term Stability(1)
Channel Separation, dc
INPUT BIAS CURRENT
Input Bias Current
See
0.1
μV/V
IB
±70
±150
±140
±200
±400
pA
pA
pA
over Temperature
Input Offset Current
IOS
NOISE
Input Voltage Noise, f = 0.01Hz to 1Hz
Input Voltage Noise, f = 0.1Hz to 10Hz
Input Current Noise, f = 10Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection Ratio
INPUT CAPACITANCE
Differential
0.3
1.1
μVPP
μVPP
in
100
fA/√Hz
VCM
(V–) – 0.1
(V+) + 0.1
V
CMRR
(V–) – 0.1V < VCM < (V+) + 0.1V
106
130
dB
2
4
pF
pF
Common-Mode
OPEN-LOOP GAIN
(V–) + 100mV < VO < (V+) – 100mV, RL
=
Open-Loop Voltage Gain
AOL
106
130
dB
10kΩ
FREQUENCY RESPONSE
Gain-Bandwidth Product
Slew Rate
GBW
SR
CL = 100pF
G = +1
350
kHz
0.16
V/μs
OUTPUT
Voltage Output Swing from Rail
over Temperature
Short-Circuit Current
Capacitive Load Drive
Open-Loop Output Impedance
POWER SUPPLY
Specified Voltage Range
Quiescent Current Per Amplifier
over Temperature
Turn-On Time
RL = 10kΩ
RL = 10kΩ
30
50
mV
mV
mA
70
ISC
CL
±5
See Typical Characteristics
2
f = 350kHz, IO = 0
kΩ
VS
IQ
1.8
5.5
V
IO = 0
17
25
μA
μA
μs
28
VS = +5V
100
TEMPERATURE RANGE
Specified Range
–40
–40
–65
+125
+150
+150
°C
Operating Range
°C
Storage Range
°C
Thermal Resistance
SOT23-5
θJA
°C/W
°C/W
°C/W
°C/W
°C/W
200
150
50
MSOP-8, SO-8
DFN-8
SC70-5
250
(1) 300-hour life test at +150°C demonstrated randomly distributed variation of approximately 1μV.
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OPA2333
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SBOS351C–MARCH 2006–REVISED MAY 2007
PIN CONFIGURATIONS
OPA333
OPA333
OPA333
SOT23-5
SO-8
SC70-5
Top View
Top View
Top View
NC(1)
V+
NC(1)
-IN
+IN
V-
1
2
3
4
8
7
6
5
OUT
V-
1
2
3
5
4
V+
+IN
V-
1
2
3
5
4
V+
+IN
-IN
-IN
OUT
OUT
NC(1)
OPA2333
OPA2333
SO-8, MSOP-8
DFN-8
Top View
Top View
OUT A
1
8
7
6
5
V+
OUT A
-IN A
+IN A
V-
1
2
3
4
8
7
6
5
V+
A
Exposed
Thermal
Die Pad
on
-IN A
+IN A
V-
2
3
4
OUT B
-IN B
+IN B
OUT B
-IN B
+IN B
B
Underside(2)
1. NC denotes no internal connection.
2. Connect thermal die pad to V–.
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OPA2333
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SBOS351C–MARCH 2006–REVISED MAY 2007
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
Offset Voltage (mV)
Offset Voltage Drift (mV/°C)
Figure 1.
Figure 2.
OPEN-LOOP GAIN vs FREQUENCY
COMMON-MODE REJECTION RATIO vs FREQUENCY
120
100
80
250
200
150
100
50
140
120
100
80
60
40
20
0
Phase
60
40
Gain
20
0
0
-50
-100
-20
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
Figure 3.
Figure 4.
POWER-SUPPLY REJECTION RATIO vs FREQUENCY
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
120
3
2
VS = ±2.75V
VS = ±0.9V
+PSRR
100
80
60
40
20
0
-40°C
-PSRR
1
+25°C
+125°C
0
+25°C
-40°C
-1
-2
-3
+125°C
+25°C
-40°C
1
10
100
1k
10k
100k
1M
0
1
2
3
4
5
6
7
8
9
10
Frequency (Hz)
Output Current (mA)
Figure 5.
Figure 6.
5
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OPA2333
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SBOS351C–MARCH 2006–REVISED MAY 2007
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE
100
INPUT BIAS CURRENT vs TEMPERATURE
200
150
100
50
VS = 5.5V
VS = 1.8V
80
-IB
-IB
60
40
-IB
20
0
0
+IB
-20
-40
-50
-100
-150
-200
-60
+IB
+IB
-80
-100
0
1
2
3
4
5
-50
-25
0
25
50
75
100
125
Common-Mode Voltage (V)
Temperature (°C)
Figure 7.
Figure 8.
QUIESCENT CURRENT vs TEMPERATURE
LARGE-SCALE STEP RESPONSE
25
20
15
10
5
G = 1
RL = 10kW
VS = 5.5V
VS = 1.8V
0
-50
-25
0
25
50
75
100
125
Time (50ms/div)
Temperature (°C)
Figure 9.
Figure 10.
SMALL-SCALE STEP RESPONSE
POSITIVE OVER-VOLTAGE RECOVERY
G = +1
RL = 10kW
0
Input
Output
10kW
+2.5V
1kW
0
OPA333
-2.5V
Time (5ms/div)
Time (50ms/div)
Figure 11.
Figure 12.
6
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OPA2333
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SBOS351C–MARCH 2006–REVISED MAY 2007
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
NEGATIVE OVER-VOLTAGE RECOVERY
SETTLING TIME vs CLOSED-LOOP GAIN
600
500
400
300
200
100
0
4V Step
Input
0
0
10kW
+2.5V
1kW
0.001%
Output
OPA333
0.01%
-2.5V
Time (50ms/div)
1
10
100
Gain (dB)
Figure 13.
Figure 14.
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
0.1Hz TO 10Hz NOISE
40
35
30
25
20
15
10
5
0
10
100
1000
1s/div
Load Capacitance (pF)
Figure 15.
Figure 16.
CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY vs
FREQUENCY
1000
1000
100
10
Continues with no 1/f (flicker) noise.
Current Noise
100
Voltage Noise
10
1
10
100
1k
10k
Frequency (Hz)
Figure 17.
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OPA2333
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SBOS351C–MARCH 2006–REVISED MAY 2007
APPLICATIONS INFORMATION
The OPA333 and OPA2333 are unity-gain stable and
free from unexpected output phase reversal. They
INPUT VOLTAGE
use
a proprietary auto-calibration technique to
The OPA333 and OPA2333 input common-mode
voltage range extends 0.1V beyond the supply rails.
The OPA333 is designed to cover the full range
without the troublesome transition region found in
some other rail-to-rail amplifiers.
provide low offset voltage and very low drift over time
and temperature. For lowest offset voltage and
precision performance, circuit layout and mechanical
conditions should be optimized. Avoid temperature
gradients that create thermoelectric (Seebeck)
effects in the thermocouple junctions formed from
Normally, input bias current is about 70pA; however,
input voltages exceeding the power supplies can
cause excessive current to flow into or out of the
input pins. Momentary voltages greater than the
power supply can be tolerated if the input current is
limited to 10mA. This limitation is easily
accomplished with an input resistor, as shown in
Figure 18.
connecting
dissimilar
conductors.
These
thermally-generated potentials can be made to
cancel by assuring they are equal on both input
terminals. Other layout and design considerations
include:
•
•
•
Use low thermoelectric-coefficient conditions
(avoid dissimilar metals).
Thermally isolate components from power
supplies or other heat sources.
Shield op amp and input circuitry from air
currents, such as cooling fans.
Current-limiting resistor
required if input voltage
exceeds supply rails by
³ 0.5V.
+5V
IOVERLOAD
Following these guidelines will reduce the likelihood
of junctions being at different temperatures, which
can cause thermoelectric voltages of 0.1μV/°C or
higher, depending on materials used.
10mA max
VOUT
OPA333
VIN
5kW
OPERATING VOLTAGE
Figure 18. Input Current Protection
INTERNAL OFFSET CORRECTION
The OPA333 and OPA2333 op amps operate over a
power-supply range of +1.8V to +5.5V (±0.9V to
±2.75V). Supply voltages higher than +7V (absolute
maximum) can permanently damage the device.
Parameters that vary over supply voltage or
temperature are shown in the Typical Characteristics
section of this data sheet.
The OPA333 and OPA2333 op amps use an
auto-calibration technique with a time-continuous
350kHz op amp in the signal path. This amplifier is
zero-corrected every 8μs using
a
proprietary
technique. Upon power-up, the amplifier requires
approximately 100μs to achieve specified VOS
accuracy. This design has no aliasing or flicker
noise.
8
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OPA2333
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SBOS351C–MARCH 2006–REVISED MAY 2007
ACHIEVING OUTPUT SWING TO THE OP
AMP NEGATIVE RAIL
works with some types of output stages. The
OPA333 and OPA2333 have been characterized to
perform with this technique; the recommended
resistor value is approximately 20kΩ. Note that this
configuration will increase the current consumption
by several hundreds of microamps. Accuracy is
excellent down to 0V and as low as –2mV. Limiting
and nonlinearity occurs below –2mV, but excellent
accuracy returns as the output is again driven above
–2mV. Lowering the resistance of the pull-down
resistor will allow the op amp to swing even further
below the negative rail. Resistances as low as 10kΩ
can be used to achieve excellent accuracy down to
–10mV.
Some applications require output voltage swings
from 0V to a positive full-scale voltage (such as
+2.5V) with excellent accuracy. With most
single-supply op amps, problems arise when the
output signal approaches 0V, near the lower output
swing limit of a single-supply op amp. A good
single-supply op amp may swing close to
single-supply ground, but will not reach ground. The
output of the OPA333 and OPA2333 can be made to
swing to ground, or slightly below, on a single-supply
power source. To do so requires the use of another
resistor and an additional, more negative, power
supply than the op amp negative supply. A pull-down
resistor may be connected between the output and
the additional negative supply to pull the output down
below the value that the output would otherwise
achieve, as shown in Figure 19.
GENERAL LAYOUT GUIDELINES
Attention to good layout practices is always
recommended. Keep traces short and, when
possible, use a printed circuit board (PCB) ground
plane with surface-mount components placed as
close to the device pins as possible. Place a 0.1μF
capacitor closely across the supply pins. These
guidelines should be applied throughout the analog
circuit to improve performance and provide benefits
V+ = +5V
OPA333
VOUT
such
as
reducing
the
EMI
VIN
RP = 20kW
(electromagnetic-interference) susceptibility.
Operational amplifiers vary in their susceptibility to
radio frequency interference (RFI). RFI can generally
be identified as a variation in offset voltage or dc
signal levels with changes in the interfering RF
signal. The OPA333 has been specifically designed
to minimize susceptibility to RFI and demonstrates
remarkably low sensitivity compared to previous
generation devices. Strong RF fields may still cause
varying offset levels.
Op Amp V- = GND
-5V
Additional
Negative
Supply
Figure 19. For VOUT Range to Ground
The OPA333 and OPA2333 have an output stage
that allows the output voltage to be pulled to its
negative supply rail, or slightly below, using the
technique previously described. This technique only
4.096V
REF3140
+5V
0.1mF
+
R9
150kW
R1
6.04kW
R5
+5V
0.1mF
31.6kW
D1
R2
R2
2.94kW
549W
-
-
+
+
VO
OPA333
R6
200W
K-Type
Thermocouple
R4
6.04kW
R3
60.4W
Zero Adj.
40.7mV/°C
Figure 20. Temperature Measurement
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OPA2333
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Figure 21 shows the basic configuration for a bridge
amplifier.
VEX
R1
A low-side current shunt monitor is shown in
Figure 22. RN are operational resistors used to
isolate the ADS1100 from the noise of the digital I2C
bus. Since the ADS1100 is a 16-bit converter, a
precise reference is essential for maximum accuracy.
If absolute accuracy is not required, and the 5V
power supply is sufficiently stable, the REF3130 may
be omitted.
+5V
R
R
R
R
VOUT
OPA333
R1
VREF
Figure 21. Single Op Amp Bridge Amplifier
3V
REF3130
+5V
Load
R1
R2
4.99kW
49.9kW
R6
RN
71.5kW
V
56W
RSHUNT
ILOAD
OPA333
1W
I2C
RN
56W
R3
R4
ADS1100
4.99kW
48.7kW
R7
(PGA Gain = 4)
FS = 3.0V
Stray Ground-Loop Resistance
1.18kW
NOTE: 1% resistors provide adequate common-mode rejection at small ground-loop errors.
Figure 22. Low-Side Current Monitor
RG
zener(1)
V+
RSHUNT
(2)
R1
MOSFET rated to
stand-off supply voltage
such as BSS84 for
up to 50V.
OPA333
10kW
+5V
V+
Two zener
biasing methods
are shown.(3)
Output
Load
RBIAS
RL
(1) zener rated for op amp supply capability (that is, 5.1V for OPA333).
(2) Current-limiting resistor.
NOTES:
(3) Choose zener biasing resistor or dual NMOSFETs (FDG6301N, NTJD4001N, or Si1034)
Figure 23. High-Side Current Monitor
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SBOS351C–MARCH 2006–REVISED MAY 2007
V1
INA152
-In
OPA333
2
5
R2
100kW
1MW
1MW
60kW
6
VO
R1
3V
NTC
Thermistor
R2
OPA333
3
1
OPA333
V2
+In
VO = (1 + 2R2/R1) (V2 - V1)
Figure 24. Thermistor Measurement
Figure 25. Precision Instrumentation Amplifier
+VS
fLPF = 150Hz
C4
R1
1/2
1.06nF
100kW
OPA2333
RA
R14
GTOT = 1kV/V
1MW
R7
+VS
7
100kW
+VS
GINA = 5
6
R12
R6
+VS
3
2
5kW
100kW
R2
1/2
INA321(1)
100kW
OPA2333
1
VOUT
GOPA = 200
OPA333
LL
4
C3
1mF
5
R13
R8
318kW
100kW
+VS
+VS
dc
ac
R3
1/2
100kW
1/2
OPA2333
Wilson
OPA2333
LA
VCENTRAL
C1
(RA + LA + LL)/3
47pF
fHPF = 0.5Hz
(provides ac signal coupling)
1/2 VS
R5
390kW
+VS
VS = +2.7V to +5.5V
BW = 0.5Hz to 150Hz
R9
+VS
20kW
R4
1/2
100kW
OPA2333
1/2
RL
OPA2333
Inverted
VCM
+VS
R10
NOTE: (1) Other instrumentation amplifiers can be used,
such as the INA326, which has lower noise,
but higher quiescent current.
1MW
1/2 VS
R11
C2
1MW
0.64mF
fO = 0.5Hz
Figure 26. Single-Supply, Very Low Power, ECG Circuit
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SBOS351C–MARCH 2006–REVISED MAY 2007
DFN PACKAGE
DFN LAYOUT GUIDELINES
The OPA2333 is offered in an DFN-8 package (also
known as SON). The DFN is a QFN package with
lead contacts on only two sides of the bottom of the
package. This leadless package maximizes board
space and enhances thermal and electrical
characteristics through an exposed pad.
The exposed leadframe die pad on the DFN package
should be soldered to a thermal pad on the PCB. A
mechanical drawing showing an example layout is
attached at the end of this data sheet. Refinements
to this layout may be necessary based on assembly
process requirements. Mechanical drawings located
at the end of this data sheet list the physical
dimensions for the package and pad. The five holes
in the landing pattern are optional, and are intended
for use with thermal vias that connect the leadframe
die pad to the heatsink area on the PCB.
DFN packages are physically small, have a smaller
routing area, improved thermal performance, and
improved electrical parasitics. Additionally, the
absence of external leads eliminates bent-lead
issues.
Soldering the exposed pad significantly improves
board-level reliability during temperature cycling, key
push, package shear, and similar board-level tests.
Even with applications that have low-power
dissipation, the exposed pad must be soldered to the
PCB to provide structural integrity and long-term
reliability.
The DFN package can be easily mounted using
standard printed circuit board (PCB) assembly
techniques. See Application Note QFN/SON PCB
Attachment (SLUA271) and Application Report Quad
Flatpack No-Lead Logic Packages (SCBA017), both
available for download at www.ti.com.
The exposed leadframe die pad on the bottom of
the package should be connected to V– or left
unconnected.
12
Submit Documentation Feedback
PACKAGE OPTION ADDENDUM
www.ti.com
9-Jul-2013
PACKAGING INFORMATION
Orderable Device
OPA2333AID
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
0 to 0
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
ACTIVE
SOIC
SOIC
D
8
8
8
8
8
8
8
8
8
8
8
8
8
5
5
5
5
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
O2333A
OPA2333AIDG4
OPA2333AIDGKR
OPA2333AIDGKRG4
OPA2333AIDGKT
OPA2333AIDGKTG4
OPA2333AIDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
75
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
O2333A
OBAQ
OBAQ
OBAQ
OBAQ
O2333A
BQZ
VSSOP
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
DGK
D
2500
2500
250
Green (RoHS CU NIPDAUAG Level-1-260C-UNLIM
& no Sb/Br)
Green (RoHS CU NIPDAUAG Level-1-260C-UNLIM
& no Sb/Br)
Green (RoHS CU NIPDAUAG Level-1-260C-UNLIM
& no Sb/Br)
250
Green (RoHS CU NIPDAUAG Level-1-260C-UNLIM
& no Sb/Br)
2500
3000
3000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
OPA2333AIDRBR
OPA2333AIDRBRG4
OPA2333AIDRBT
OPA2333AIDRBTG4
OPA2333AIDRG4
OPA333AID
SON
DRB
DRB
DRB
DRB
D
Green (RoHS
& no Sb/Br)
SON
Green (RoHS
& no Sb/Br)
BQZ
SON
Green (RoHS
& no Sb/Br)
BQZ
SON
250
Green (RoHS
& no Sb/Br)
BQZ
SOIC
2500
75
Green (RoHS
& no Sb/Br)
O2333A
O333A
OAXQ
OAXQ
OAXQ
OAXQ
SOIC
D
Green (RoHS
& no Sb/Br)
OPA333AIDBVR
OPA333AIDBVRG4
OPA333AIDBVT
OPA333AIDBVTG4
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
3000
3000
250
Green (RoHS
& no Sb/Br)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
9-Jul-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
OPA333AIDCKR
OPA333AIDCKRG4
OPA333AIDCKT
OPA333AIDCKTG4
OPA333AIDG4
ACTIVE
SC70
SC70
SC70
SC70
SOIC
SOIC
SOIC
DCK
5
5
5
5
8
8
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
BQY
BQY
BQY
BQY
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DCK
DCK
DCK
D
3000
250
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
250
Green (RoHS
& no Sb/Br)
75
Green (RoHS
& no Sb/Br)
O333A
O333A
O333A
OPA333AIDR
D
2500
2500
Green (RoHS
& no Sb/Br)
OPA333AIDRG4
D
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
9-Jul-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA2333, OPA333 :
Automotive: OPA2333-Q1, OPA333-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Jul-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
OPA2333AIDGKT
OPA2333AIDR
VSSOP
SOIC
SON
DGK
D
8
8
8
8
5
5
8
250
2500
3000
250
330.0
330.0
330.0
180.0
178.0
179.0
330.0
12.4
12.4
12.4
12.4
9.0
5.3
6.4
3.3
3.3
3.23
2.2
6.4
3.4
5.2
3.3
3.3
3.17
2.5
5.2
1.4
2.1
1.1
1.1
1.37
1.2
2.1
8.0
8.0
8.0
8.0
4.0
4.0
8.0
12.0
12.0
12.0
12.0
8.0
Q1
Q1
Q2
Q2
Q3
Q3
Q1
OPA2333AIDRBR
OPA2333AIDRBT
OPA333AIDBVR
OPA333AIDCKR
OPA333AIDR
DRB
DRB
DBV
DCK
D
SON
SOT-23
SC70
SOIC
3000
3000
2500
8.4
8.0
12.4
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Jul-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
OPA2333AIDGKT
OPA2333AIDR
VSSOP
SOIC
SON
DGK
D
8
8
8
8
5
5
8
250
2500
3000
250
364.0
367.0
367.0
210.0
180.0
203.0
367.0
364.0
367.0
367.0
185.0
180.0
203.0
367.0
27.0
35.0
35.0
35.0
18.0
35.0
35.0
OPA2333AIDRBR
OPA2333AIDRBT
OPA333AIDBVR
OPA333AIDCKR
OPA333AIDR
DRB
DRB
DBV
DCK
D
SON
SOT-23
SC70
SOIC
3000
3000
2500
Pack Materials-Page 2
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