OPT8241NBN [TI]

QVGA 分辨率 3D 飞行时间 (ToF) 传感器 | NBN | 78 | 0 to 70;
OPT8241NBN
型号: OPT8241NBN
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

QVGA 分辨率 3D 飞行时间 (ToF) 传感器 | NBN | 78 | 0 to 70

PC 传感器
文件: 总35页 (文件大小:1602K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Sample &  
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Product  
Folder  
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Technical  
Documents  
OPT8241  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
OPT8241 3D 飞行时间传感器  
1 特性  
2 应用  
1
成像阵列:  
深度感测:  
320 × 240 阵列  
1/3” 光学格式  
位置和临近感测  
3D 扫描  
像素间距:15µm  
高达 150 /秒  
3D 机器视觉  
安全和监控  
手势控制  
光学属性:  
响应度:850nm 时为 0.35A/W  
解调对比度:50MHz 时为 45%  
解调频率:10MHz 100MHz  
增强现实和虚拟现实  
3 说明  
OPT8241 飞行时间 (ToF) 传感器属于 TI 3D ToF 图像  
传感器系列。 该器件将 ToF 感应功能与经优化设计的  
模数转换器 (ADC) 和通用可编程定时发生器 (TG) 相  
结合。 该器件以高达 150 /秒的帧速率(600 读出/  
秒)提供四分之一的视频图形阵列 (QVGA 320 x 240)  
分辨率数据。  
输出数据格式:  
12 位相位相关数据  
4 位共模(环境)  
芯片集接口:  
TI 的飞行时间控制器 OPT9221 兼容  
传感器输出接口:  
CMOS 数据接口(50MHz DDR16 通道数  
据、时钟和帧标记)  
内置 TG 控制复位、调制、读出和数字化序列。 TG 具  
备可编程性,可灵活优化各项深度感应性能指标(例如  
功率、运动稳健性、信噪比和环境消除)。  
LVDS:  
600Mbps3 个数据对  
器件信息(1)  
1LVDS 位时钟对,1LVDS 采样时钟对  
器件型号  
OPT8241  
封装  
COG (78)  
封装尺寸(标称值)  
定时发生器 (TG):  
7.859mm × 8.757mm  
可编程感兴趣区域 (ROI) 的寻址引擎  
(1) 要了解所有可用封装,请参见数据表末尾的封装选项附录。  
调制控制  
抗混叠  
方框图  
/从同步操作  
用于控制的 I2C 从接口  
OPT8241  
DMIX0,  
DMIX1  
ILLUM_P  
CLK Generator  
MCLK  
Mix Drivers  
Modulation Block  
ILLUM_N  
电源:  
ILLUM_EN  
CLK,  
CTRL  
3.3V I/O,模拟  
Row  
Sensor Core  
Addressing  
Engine  
Reset  
1.8V 模拟,数字,I/O  
1.5V 解调(典型值)  
Column  
CLK,  
CTRL  
Analog  
Timing Generator  
Analog Processing  
经优化的光学封装 (COG-78):  
VD_IN  
Temperature  
Sensor  
Analog  
ADC  
8.757mm × 7.859mm × 0.7mm  
CLK,  
CTRL  
CLK,  
CTRL  
REG  
I2C  
集成光学带通滤波器  
830nm 867nm)  
Digital  
Serializer  
LVDS  
VD_FR  
VD_QD  
VD_SF  
便于对齐的光学基准点  
Output Block  
CMOS Data  
CLKOUT  
HD_QD  
工作温度范围:0°C 70°C  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SBAS704  
 
 
 
 
OPT8241  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
www.ti.com.cn  
目录  
7.3 Feature Description................................................. 12  
7.4 Device Functional Modes........................................ 13  
7.5 Programming .......................................................... 13  
Application and Implementation ........................ 14  
8.1 Application Information............................................ 14  
8.2 Typical Applications ................................................ 15  
Power Supply Recommendations...................... 24  
1
2
3
4
5
6
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 6  
6.1 Absolute Maximum Ratings ...................................... 6  
6.2 ESD Ratings.............................................................. 6  
6.3 Recommended Operating Conditions....................... 6  
6.4 Thermal Information.................................................. 7  
6.5 Electrical Characteristics........................................... 7  
6.6 Timing Requirements................................................ 8  
6.7 Switching Characteristics.......................................... 8  
6.8 Optical Characteristics .............................................. 9  
6.9 Typical Characteristics............................................ 10  
Detailed Description ............................................ 11  
7.1 Overview ................................................................. 11  
7.2 Functional Block Diagram ....................................... 11  
8
9
10 Layout................................................................... 24  
10.1 Layout Guidelines ................................................. 24  
10.2 Layout Example .................................................... 26  
10.3 Mechanical Assembly Guidelines ......................... 27  
11 器件和文档支持 ..................................................... 28  
11.1 文档支持................................................................ 28  
11.2 社区资源................................................................ 28  
11.3 ....................................................................... 28  
11.4 静电放电警告......................................................... 28  
11.5 Glossary................................................................ 28  
12 机械、封装和可订购信息....................................... 28  
7
4 修订历史记录  
注:之前版本的页码可能与当前版本有所不同。  
Changes from Revision A (June 2015) to Revision B  
Page  
已通篇更改计算公式以更正格式 ............................................................................................................................................ 1  
Changed name of Function column in Pin Functions table ................................................................................................... 4  
Changed SCL and SDATA pin descriptions in Pin Functions table ...................................................................................... 5  
Added parameter names to Sensor section of Electrical Characteristics table .................................................................... 7  
Changed depth resolution description in Table 5 ................................................................................................................ 21  
Changes from Original (June 2015) to Revision A  
Page  
已发布为量产数................................................................................................................................................................... 1  
2
Copyright © 2015, Texas Instruments Incorporated  
 
OPT8241  
www.ti.com.cn  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
5 Pin Configuration and Functions  
NBN Package  
COG-78  
Top View (Representative, Not to Scale)  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
ILLUM_  
EN  
AVDD_  
PLL  
A
B
C
D
E
F
NC  
GPO[0]  
SDATA  
GND  
VMIXH  
VMIXH  
GND  
GND  
VMIXH  
VMIXH  
GND  
ILLUM_P ILLUM_N  
DVDDH  
GND  
AVDDH  
NC  
SUB_  
BIAS  
GPO[1]  
VD_IN  
SCLK  
RSTZ  
MCLK  
DEMOD_  
CLK  
NC  
RFU  
HD_QD  
VD_QD  
VD_FR  
IOVSS  
AVDD  
TP2  
QPORT  
IOVDD  
DVSS  
AVSS  
PVDD  
AVSS_  
PLL  
REFM  
G
H
J
REFP  
AVDD  
AVSS  
IOVDD  
AVSS  
DVDD  
SUM_M  
DIFF1_M  
DCLKM  
NC  
CMOS[14]  
CMOS[13]  
CMOS[12]  
NC  
VD_SF  
CMOS[15]  
CMOS[11]  
TP1  
K
L
SUM_P  
DIFF1_P  
M
CMOS[10] CMOS[9] CMOS[8] CLKOUT CMOS[7] CMOS[6] CMOS[5] CMOS[4] CMOS[3] CMOS[2] CMOS[1] CMOS[0] PCLK_P PCLK_M DIFF0_P DIFF0_M  
DCLKP  
Copyright © 2015, Texas Instruments Incorporated  
3
OPT8241  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
www.ti.com.cn  
Pin Functions  
PIN  
DESCRIPTION  
NAME  
AVDD  
NO.  
D3, G17  
A18  
A17  
E3, H3, H17  
F17  
M5  
FUNCTION  
I/O BANK  
Power  
Power  
Power  
GND  
GND  
O
1.8-V analog VDD  
AVDD_PLL  
AVDDH  
1.8-V PLL VDD  
3.3-V analog VDD  
Analog ground  
PLL GND  
AVSS  
AVSS_PLL  
CLKOUT  
CMOS[0]  
CMOS[1]  
CMOS[2]  
CMOS[3]  
CMOS[4]  
CMOS[5]  
CMOS[6]  
CMOS[7]  
CMOS[8]  
CMOS[9]  
CMOS[10]  
CMOS[11]  
CMOS[12]  
CMOS[13]  
CMOS[14]  
CMOS[15]  
DCLKM  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
IOVDD  
LVDS  
LVDS  
Parallel data clock output  
Parallel data output bit 0  
Parallel data output bit 1  
Parallel data output bit 2  
Parallel data output bit 3  
Parallel data output bit 4  
Parallel data output bit 5  
Parallel data output bit 6  
Parallel data output bit 7  
Parallel data output bit 8  
Parallel data output bit 9  
Parallel data output bit 10  
Parallel data output bit 11  
Parallel data output bit 12  
Parallel data output bit 13  
Parallel data output bit 14  
Parallel data output bit 15  
Negative LVDS bit clock  
Positive LVDS bit clock  
M13  
M12  
M11  
M10  
M9  
O
O
O
O
O
M8  
O
M7  
O
M6  
O
M4  
O
M3  
O
M2  
O
L3  
O
L1  
O
K1  
O
J1  
O
K3  
O
L19  
O
DCLKP  
M18  
O
Demodulation clock input (optional).  
This pin has a weak internal pulldown resistor.  
DEMOD_CLK  
C19  
I
IOVDD  
DIFF0_M  
DIFF0_P  
DIFF1_M  
DIFF1_P  
DVDD  
M17  
O
O
LVDS  
LVDS  
LVDS  
LVDS  
Negative LVDS DIFF0 data pin  
Positive LVDS DIFF0 data pin  
Negative LVDS DIFF1 data pin  
Positive LVDS DIFF1 data pin  
1.8-V digital VDD  
M16  
K19  
O
L17  
O
H19  
Power  
Power  
GND  
GND  
O
DVDDH  
DVSS  
A14  
3.3-V digital VDD  
G19  
Digital GND  
GND  
A4, A7, A8, A11, A15  
Ground  
GPO[0]  
GPO[1]  
HD_QD  
ILLUM_EN  
ILLUM_N  
ILLUM_P  
IOVDD  
A2  
B1  
IOVDD  
IOVDD  
IOVDD  
DVDDH  
DVDDH  
DVDDH  
General-purpose output  
General-purpose output  
Quad-frame line sync output  
Illumination enable  
O
D1  
O
A16  
A13  
A12  
H1, F19  
G1  
O
O
Illumination modulation signal; active low  
Illumination modulation signal; active high  
1.8-V to 3.3-V IOVDD  
O
Power  
GND  
IOVSS  
I/O GND  
Main clock input for TG.  
This pin has a weak internal pulldown resistor.  
MCLK  
B19  
I
IOVDD  
A1, A19, C17, M1,  
M19  
NC  
NC  
O
No connection  
PCLK_M  
M15  
LVDS  
Negative LVDS pixel clock  
4
Copyright © 2015, Texas Instruments Incorporated  
 
OPT8241  
www.ti.com.cn  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
Pin Functions (continued)  
PIN  
DESCRIPTION  
NAME  
PCLK_P  
PVDD  
NO.  
M14  
E17  
FUNCTION  
I/O BANK  
LVDS  
O
Positive LVDS pixel clock  
Power  
3.3-V pixel VDD  
Debug port.  
QPORT  
REFM  
REFP  
E19  
F3  
I/O  
IOVDD  
Pullup with an external 1-kΩ resistor to IOVDD instead.  
Analog In  
Analog Out  
Connect REFM to GND  
ADC reference; connect a 10-nF capacitor close to REFM and  
REFP.  
G3  
RFU  
D17  
C3  
RFU  
IOVDD  
IOVDD  
IOVDD  
Reserved for future use  
RSTZ  
I
Sensor reset input. This pin has a weak internal pullup resistor.  
Clock I2C slave interface  
Data I2C slave interface  
SCL  
B3  
I
SDATA  
SUB_BIAS  
SUM_M  
SUM_P  
TP1  
A3  
I/O  
B17  
J19  
K17  
J17  
D19  
F1  
Power  
Substrate bias  
O
LVDS  
LVDS  
Negative LVDS sum data  
O
Positive LVDS sum data  
O
Debug pin 1, connect to a test pad on the board  
Debug pin 2, connect to a test pad on the board  
Frame sync output  
TP2  
O
VD_FR  
VD_IN  
VD_QD  
VD_SF  
VMIXH  
O
IOVDD  
IOVDD  
IOVDD  
C1  
I
O
Frame sync input (optional)  
Quad-frame sync output  
E1  
J3  
O
Sub-frame sync output  
A5, A6, A9, A10  
Power  
Mix driver power  
Copyright © 2015, Texas Instruments Incorporated  
5
OPT8241  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
www.ti.com.cn  
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
0
MAX  
UNIT  
V
IOVDD  
AVDDH  
DVDDH  
PVDD  
AVDD  
VMIXH  
DVDD  
AVDD_PLL  
VI  
Digital I/O supply  
Analog supply  
4.0  
4.0  
V
Digital I/O supply  
Pixel supply  
4.0  
V
4.0  
V
Analog supply  
2.2  
V
Mix supply  
2.5  
V
Digital supply  
2.2  
V
PLL supply  
2.2  
V
Input voltage at input pins  
Operating junction temperature  
Storage temperature  
VCC + 0.3(2)  
V
TJ  
125  
°C  
°C  
Tstg  
–40  
125  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) VCC refers to the I/O bank voltage.  
6.2 ESD Ratings  
VALUE  
±1000  
±250  
UNIT  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)  
V(ESD)  
Electrostatic discharge  
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
6.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
1.7  
3.0  
3.0  
3.0  
1.7  
1.4  
1.7  
1.7  
0
NOM  
1.8 to 3.3  
3.3  
MAX  
3.6  
3.6  
3.6  
3.6  
1.9  
2.0  
1.9  
1.9  
70  
UNIT  
IOVDD  
AVDDH  
DVDDH  
PVDD  
Digital I/O supply  
Analog supply  
V
V
Digital I/O supply  
Pixel supply  
3.3  
V
3.3  
V
AVDD  
Analog supply  
1.8  
V
VMIXH  
DVDD  
AVDD_PLL  
TA  
Mix supply  
1.5  
V
Digital supply  
1.8  
V
PLL supply  
1.8  
V
Operating ambient temperature  
°C  
6
Copyright © 2015, Texas Instruments Incorporated  
OPT8241  
www.ti.com.cn  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
6.4 Thermal Information  
OPT8241  
THERMAL METRIC(1)  
NBN (COG)  
78 PINS  
79.2  
UNIT  
Without underfill  
With underfill  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJA  
Junction-to-ambient thermal resistance  
41.0  
RθJC(top)  
RθJB  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
18.6  
51.0  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
6.3  
ψJB  
51.1  
RθJC(bot)  
18.6  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
6.5 Electrical Characteristics  
All specifications at TA = 25°C, VAVDDH = 3.3 V, VAVDD = 1.8 V, VVMIXH = 1.5 V, VDVDD = 1.8 V, VDVDDH = 3.3 V, VPVDD = 3.3 V,  
VSUB_BIAS = 0 V, integration duty cycle = 10%, system clock frequency = 48 MHz, modulation frequency = 50 MHz, and 850  
nm illumination, unless otherwise noted.  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SENSOR  
V
Maximum rows  
240  
Rows  
H
Maximum columns  
Pixel pitch  
320 Columns  
PP  
15  
μm  
POWER (Normal Operation)  
IAVDD_PLL  
PLL supply current  
9
40  
20  
5
mA  
mA  
mA  
mA  
mA  
mA  
Without dynamic power-down  
With dynamic power-down  
IAVDD  
Analog supply current  
3.3-V digital supply current  
3.3-V analog supply current  
Pixel VDD current  
IDVDDH  
IAVDDH  
IPVDD  
Without dynamic power-down  
With dynamic power-down  
17  
7
2
10% integration duty cycle  
100% integration duty cycle  
70  
600  
20  
2
IVMIXH  
Demodulation current  
I/O supply current (CMOS mode)  
I/O supply current (LVDS mode)  
Digital supply current  
IIOVDD  
IDVDD  
mA  
mA  
45  
POWER (Standby)  
IIOVDD  
IAVDD_PLL  
IAVDD  
I/O supply current  
0.7  
0.3  
0.3  
0.6  
1.1  
0.2  
0
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
PLL supply current  
Analog supply current  
Digital supply current  
3.3-V digital supply current  
3.3-V analog supply current  
Demodulation current  
Pixel VDD current  
IDVDD  
IDVDDH  
IAVDDH  
IVMIXH  
IPVDD  
0
Copyright © 2015, Texas Instruments Incorporated  
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OPT8241  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
www.ti.com.cn  
Electrical Characteristics (continued)  
All specifications at TA = 25°C, VAVDDH = 3.3 V, VAVDD = 1.8 V, VVMIXH = 1.5 V, VDVDD = 1.8 V, VDVDDH = 3.3 V, VPVDD = 3.3 V,  
VSUB_BIAS = 0 V, integration duty cycle = 10%, system clock frequency = 48 MHz, modulation frequency = 50 MHz, and 850  
nm illumination, unless otherwise noted.  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
CMOS I/Os  
VIH  
VIL  
Input high-level threshold  
Input low-level threshold  
0.7 × VCC(1)  
V
V
0.3 × VCC(1)  
VCC(1) – 0.45  
VCC(1) – 0.5  
IOH = –2 mA  
VOH  
Output high level  
Output Low Level  
V
V
IOH = –8 mA  
IOL = 2 mA  
0.35  
0.65  
±50  
VOL  
IOL = 8 mA  
Pins with pullup, pulldown resistor  
II  
Input pin leakage current  
µA  
Pins without pullup, pulldown  
resistor  
±10  
CI  
Input capacitance  
Output current  
5
10  
10  
pF  
IOH  
IOL  
mA  
(1) VCC is equal to IOVDD or DVDDH, based on the I/O bank listed in the Pin Functions table.  
6.6 Timing Requirements  
MIN  
NOM  
MAX  
52%  
50  
UNIT  
MCLK duty cycle  
48%  
12  
MCLK frequency  
MHz  
ns  
VD_IN pulse duration  
RTSZ low pulse duration (reset)  
2 × MCLK period  
100  
ns  
6.7 Switching Characteristics  
over operating free-air temperature range (unless otherwise noted); VDVDD = 1.8 V, VDVDDH = 3.3 V, and VIOVDD = 1.8 V  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
DDR LVDS MODE  
tSU  
Data setup time  
Data valid to zero crossing of DCLKP, DCLKM  
Zero crossing of DCLKP, DCLKM to data becoming invalid  
Rise time measured from –100 mV to +100 mV  
0.48  
0.54  
0.35  
ns  
ns  
ns  
tH  
Data hold time  
tFALL, tRISE  
Data fall time, data rise time  
tCLKRISE  
tCLKFALL  
,
Output clock rise time,  
output clock fall time  
Rise time measured from –100 mV to +100 mV  
0.35  
ns  
PARALLEL CMOS MODE  
tSU  
Data setup time  
Data valid to zero crossing of CLKOUT  
1.5  
3.5  
2.5  
ns  
ns  
ns  
tH  
Data hold time  
Zero crossing of CLKOUT to data becoming invalid  
Rise time measured from 30% to 70% of IOVDD  
tFALL, tRISE  
Data fall time, data rise time  
tCLKRISE  
tCLKFALL  
,
Output clock rise time,  
output clock fall time  
Rise time measured from 30% to 70% of IOVDD  
2.2  
ns  
8
Copyright © 2015, Texas Instruments Incorporated  
OPT8241  
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6.8 Optical Characteristics  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
Glass side  
TEST CONDITIONS  
MIN  
TYP  
Top  
MAX  
UNIT  
Side  
nm  
0° incident angle  
30° incident angle  
0° incident angle  
30° incident angle  
813 to 893  
798 to 877  
830 to 881  
838 to 867  
Passband  
(50% relative transmittance(1)  
)
nm  
nm  
Passband  
(90% relative transmittance(1)  
)
nm  
AOI  
Recommended angle of incidence  
Maximum absolute transmittance  
0
35 Degrees  
0° incident angle  
30° incident angle  
87.34% at 863  
81.89% at 855  
nm  
nm  
(1) Relative transmittance is a ratio of transmittance to maximum absolute transmittance at the same angle of incidence.  
DCLKM  
Output Clock  
DCLKP  
tSU  
tH  
tSU  
tH  
Output Data Pair  
Dn(1)  
Dn+1(1)  
(1) Dn = bits D0, D2, D4, and so forth. Dn+1 = bits D1, D3, D5, and so forth.  
Figure 1. LVDS Switching Diagram  
Output Clock  
CLKOUT  
tSU  
tH  
tSU  
tH  
Output Data  
CMOSn  
Dn(1)  
Dn(1)  
(2) Dn = bits D0, D1, D2, and so forth.  
Figure 2. CMOS Switching Diagram  
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6.9 Typical Characteristics  
At VAVDDH = 3.3 V, VAVDD = 1.8 V, VVMIXH = 1.5 V, VDVDD = 1.8 V, VDVDDH = 3.3 V, VPVDD = 3.3 V, VSUB_BIAS = 0 V, and  
integration duty cycle = 10%, unless otherwise noted.  
40  
30  
20  
10  
0
1.4  
1.2  
1
0.8  
0.6  
0.4  
0.2  
0
-10  
-8  
-7  
-6  
-5  
-4  
-3  
-2  
-1  
0
0
0.3  
0.6  
0.9  
1.2  
1.5  
1.8  
2.1  
2.4  
2.7  
VSUB_BIAS (V)  
VVMIXH (V)  
Normalized to VMIXH = 1.5 V  
Figure 3. Normalized VMIXH Supply Current vs  
VMIXH Supply Voltage  
Figure 4. VSUB_BIAS Supply Current vs  
VSUB_BIAS Supply Voltage  
90  
Incident Angle = 0 è  
Incident Angle = 30 è  
80  
70  
60  
50  
40  
30  
20  
10  
0
350  
450  
550  
650  
750  
850  
950  
1050  
Light Wavelength (nm)  
Figure 5. Optical Filter Transitivity vs  
Light Wavelength  
10  
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7 Detailed Description  
7.1 Overview  
The OPT8241 is a high-performance quarter video graphics array (QVGA) resolution, 3D sensor device that  
senses depth information based on the time of flight (ToF) technique. The OPT8241 has a CMOS image sensor  
core with an integrated analog-to-digital converter (ADC), an addressing engine for the sensor core, an low-  
voltage differential signaling (LVDS) serializer, and an I2C slave device. The device supports configurable timings  
to optimize power and performance.  
The OPT8241 includes the following blocks:  
Timing generator (TG)  
Sensor core  
Addressing engine  
ADC and overload detection  
Modulation block  
Output block  
Temperature sensor  
I2C control interface  
7.2 Functional Block Diagram  
OPT8241  
DMIX0,  
DMIX1  
ILLUM_P  
ILLUM_N  
Modulation Block  
CLK Generator  
MCLK  
Mix Drivers  
ILLUM_EN  
CLK, CTRL  
Row  
Sensor Core  
Reset  
Addressing Engine  
Column  
CLK, CTRL  
Analog  
Timing Generator  
Analog Processing  
VD_IN  
Analog  
Temperature Sensor  
CLK, CTRL  
CLK, CTRL  
ADC  
I2C  
REG  
Digital  
Serializer  
LVDS  
VD_FR  
VD_QD  
VD_SF  
Output Block  
CMOS Data  
CLKOUT  
HD_QD  
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7.3 Feature Description  
7.3.1 Output Block  
The output block provides the output data, clock, and frame boundary signals. The positions of the following  
frame boundary marker signals are programmable. Table 1 lists signals that can be used by the host processor  
to reconstruct the frame.  
Table 1. Output Frame Marker Signals  
SIGNAL  
VD_FR  
VD_SF  
VD_QD  
HD_QD  
TYPE  
Output  
Output  
Output  
Output  
DESCRIPTION  
Frame sync  
Sub-frame sync  
Quad sync  
Row sync  
7.3.1.1 Serializer and LVDS Output Interface  
The sensor has an option for a serial LVDS interface. The digitized data from the ADCs are serialized and sent  
on three LVDS data pairs and one LVDS pixel clock pair. The DIFF0, DIFF1 pairs provide the differential data  
(A-B). The differential data for each pixel is 12 bits long. The pixel clock pair is 0 for the first six data bits and 1  
for the next six data bits. The pixel clock can be used by the external host to identify the boundary of the 12-bit  
data for each pixel. The LVDS waveforms are shown in Figure 6.  
DCLKP, DCLKM  
PCLK_P, PCLK_M  
DIFFx_P, DIFFx_M  
D11  
D10  
D6  
D5  
D1  
D0  
D11  
SUM_P, SUM_M  
Bits 11-0  
Channel 0: A - B  
DIFF0_P, DIFF0_M  
DIFF1_P, DIFF1_M  
SUM_P, SUM_M  
Bits 11-0  
Channel 1: A - B  
Bits 11-8  
Bits 7-4  
Bits 3-0  
0000  
Channel 0: A + B  
Channel 1: A + B  
Figure 6. LVDS Output Waveforms  
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7.3.1.2 Parallel CMOS Output Interface  
The sensor has options for both serial and parallel data output interfaces. The output data on the parallel CMOS  
interface toggles on both edges of the clock (DDR rate) with the output clock frequency being equal to the  
system clock frequency. The CMOS parallel data waveforms are shown in Figure 7.  
VD  
HD  
CLKOUT  
(50 MHz)  
CMOS[15:0]  
Frame ID  
Channel 1,  
Pixel 1,  
Channel 2,  
Pixel 1,  
Channel 1,  
Pixel 1,  
Channel 2,  
Pixel 1,  
Row 1  
Row 1  
Row 2  
Row 2  
CMOS[15:12]  
A + B  
CMOS[11:0]  
CMOS[15:0]  
A - B  
Figure 7. CMOS Output waveforms  
Following the VD start, the first sample set is a frame ID that denotes the quadrant (quad) number. The frame ID  
format is given in Table 2.  
Table 2. Frame ID Word Format  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
0
0
1
0
1
0
1
0
1
SF[3:0]  
Q[3:0]  
Note that Q[3:0] is the quad number and SF[3:0] denotes the sub-frame number.  
7.3.2 Temperature Sensor  
The on-die temperature sensor can measure temperatures in the range of –25°C to 125°C. The temperature is  
updated every 3 ms. The temperature value is stored in a register that can be read through the I2C interface.  
7.4 Device Functional Modes  
All OPT8241 control commands are directed through the OPT9221 time-of-flight controller. For more details on  
the functional modes of the chipset, see the OPT9221 datasheet.  
7.5 Programming  
The device registers are programmed by the OPT9221 time-of-flight controller. Therefore, in a typical system, the  
I2C interface is connected to the OPT9221 sensor control I2C bus; see the OPT9221 datasheet for more details.  
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8 Application and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
8.1 Application Information  
ToF cameras provide the complete depth map of a scene. In contrast with the scanning type light detection and  
ranging (LIDAR) systems, the depth map of the entire scene is captured at the same instant with an array of ToF  
pixels. A broad classification of applications for a 3D camera include:  
Presence detection,  
Object location,  
Movement detection, and  
3D scanning.  
The OPT8241 ToF sensor, along with TI's OPT9221 ToF controller, forms a two-chip solution for creating a 3D  
camera. The block diagram of a complete 3D ToF camera implementation using the OPT8241 is shown in  
Figure 8.  
Illumination  
Optics  
Illumination  
Modulation  
Scene  
DDR  
Timing Generation  
Computation  
+
Depth 5ata  
(OPT9221)  
ADC  
Pixel Array  
Lens  
OPT8241  
Figure 8. 3D ToF Camera  
The TI ToF estimator tool can be used to estimate the performance of a ToF camera with various configurations.  
The estimator allows control of the following parameters:  
Depth resolution  
2D resolution (number of pixels)  
Distance range  
Frame rate  
Field of view (FoV)  
Ambient light (in watts × nm × m2 around the sensor filter bandwidth)  
Reflectivity of the objects  
For more details on how to choose the above parameters, see the white paper on the ToF system design.  
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8.2 Typical Applications  
8.2.1 Presence Detection for Industrial Safety  
Processing 3D information and a separate foreground from the background is computationally less intensive  
when compared to using color information from a reg, green, blue (RGB) camera. 3D information can also be  
used to extract the form of the object and classify the object detected as being a human, robot, vehicle, and so  
forth, as shown in Figure 9.  
Figure 9. Industrial Safety  
8.2.1.1 Design Requirements  
Table 3. Industrial Safety Requirements  
SPECIFICATION  
Depth resolution  
VALUE  
UNITS  
COMMENTS  
Temporal standard deviation of measured  
distance without the use of any software filters  
7.5  
Percentage of distance  
For reactions fast enough to trigger a machine  
shut down  
Frame rate  
30  
Frames per second  
Field of view  
74.4 × 59.3  
Degrees (H × V)  
Meters  
Example only, requirements may vary  
Example only, requirements may vary  
Example only, requirements may vary  
Minimum distance  
Maximum distance  
1
5
Meters  
Minimum reflectivity of objects at which  
the depth resolution is specified  
40  
320 × 240  
0.1  
Percentage  
Assuming Lambertian reflection  
Using a full array  
Number of pixels  
Rows x columns  
W × nm × m2 around  
850 nm  
Ambient light  
Low-intensity diffused sunlight  
Laser + diffuser for diffusing light uniformly  
through the scene  
Illumination source  
Laser  
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8.2.1.2 Detailed Design Procedure  
Using the TI ToF estimator tool, the ToF camera design requirements can be input and the power numbers  
required for achieving the desired specifications can be obtained. The choice of inputs to the estimator tool is  
explained in the following section.  
8.2.1.2.1 Frequencies of Operation  
The frequencies of operation are limited by the sensor bandwidth because the illumination source is a laser.  
Frequencies around 75 MHz can be used to obtain a good demodulation figure of merit. Two frequencies are  
used to implement de-aliasing and extend the unambiguous range because frequencies around 75 MHz provide  
a very short unambiguous range. The two frequencies chosen for de-aliasing are 70 MHz and 80 MHz. The  
unambiguous range is now given by Equation 1.  
C
299792458.0 ms  
Unambiguous Range =  
=
=14.990 m  
2ìGCD f ,f  
2ìGCD 70 MHz,80 MHz  
(
)
(
)
1
2
(1)  
For the purpose of power requirement calculations, the average frequency of 75 MHz can be used in the  
estimator tool.  
8.2.1.2.2 Number of Sub-Frames and Quads  
In this example, two sub-frames and six quads are used to obtain good dynamic range and account for wide  
ranges of reflectivity and distance. Also, six quads (minimum) are required for implementing de-aliasing. A depth  
resolution of 5% instead of the requirement of 7.5% is used as the resolution input to the estimator tool to allow  
for margins resulting from the additional noise when using de-aliasing.  
8.2.1.2.3 Field of View (FoV)  
Field of view in the horizontal direction is 74.4 degrees. The diagonal FoV can be calculated using Equation 2.  
»
ÿ
5
74.4  
FoV Diagonal = 2ìtan-1 ìtan  
ö 87è  
÷Ÿ  
(
)
«
4
2
(2)  
The ratio of 5/4 is used to represent the ratio of the diagonal length to the horizontal length of the sensor.  
8.2.1.2.4 Lens  
A lens with a 1/3” image circle must be chosen. The FoV of the lens must match the requirements (that is, the  
FoV must be equal to 87 degrees, as calculated in Equation 2). A lower f.no is always better. For this example,  
use an f.no of 1.2.  
8.2.1.2.5 Integration Duty Cycle  
An integration duty cycle of less than 50% is chosen to keep the sensor cool in an industrial housing with no  
airflow. Choosing an even lower integration duty cycle can result in a marked increase in the peak illumination  
power. Higher peak illumination power results in a higher number of illumination elements and, thus, an increase  
in system cost.  
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8.2.1.2.6 Design Summary  
A screen shot of the system estimator tool is shown in Figure 10.  
Figure 10. Screen Shot of the Estimator Tool  
The illumination peak optical power of 1.98 W can be supplied using one high-power laser.  
8.2.1.3 Application Curve  
250  
r = 10 %  
225  
r = 40 %  
r = 100 %  
200  
175  
150  
125  
100  
75  
50  
25  
0
1
1.4 1.8 2.2 2.6  
3
3.4 3.8 4.2 4.6  
5
Object Distance (m)  
ρ represents object reflectivity  
Figure 11. Example Industrial Safety Object Distance vs Depth Resolution  
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8.2.2 People Counting and Locating  
Locating and tracking people is a complex problem to solve using regular RGB cameras. With the additional  
information of distance to each point in the scene, the algorithmic challenges become more surmountable, as  
shown in Figure 9.  
Figure 12. People Counting  
8.2.2.1 Design Requirements  
Table 4. People Counting Requirements  
SPECIFICATION  
Depth resolution  
VALUE  
UNITS  
COMMENTS  
200  
mm  
For basic identification of shapes  
Reasonable update rate for moderate object  
movement speeds  
Frame rate  
15  
Frames per second  
Degrees (H × V)  
Higher FoVs are better for more coverage but are  
worse from a power requirement point of view  
Field of view  
100.0 × 83.6  
Minimum distance  
Maximum distance  
1
6
Meters  
Meters  
Example only, requirements may vary  
Example only, requirements may vary  
Assuming objects reflect very little infrared light  
and assuming Lambertian reflection.  
Typical reflectivity of objects  
Number of pixels  
40  
320 × 240  
0
Percentage  
Rows × columns  
W × nm × m2 around  
850 nm  
Using a full array  
Ambient light  
Indoor lighting conditions  
LED + lens optics  
Illumination source  
LED  
18  
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8.2.2.2 Detailed Design Procedure  
Using the TI ToF estimator tool, the ToF camera design requirements can be input and the power numbers  
required for achieving the desired specifications can be obtained by following the procedures discussed in this  
section.  
8.2.2.2.1 Frequencies of Operation  
The frequencies of operation are limited by the LED bandwidth because the source of illumination is an LED.  
Frequencies around 24 MHz can be used to obtain a good demodulation figure of merit if a fast-switching  
infrared (IR) LED is used. The unambiguous range is given by Equation 3.  
C
299792458.0 ms  
2ì24 MHz  
Unambiguous Range =  
=
= 6.246 m  
2ìf  
(3)  
8.2.2.2.2 Number of Sub-Frames and Quads  
In this example, one sub-frame and four quads are used to minimize the effects of the sensor reset noise.  
8.2.2.2.3 Field of View (FoV)  
Field of view in the horizontal direction is 74.4 degrees. The diagonal field of view can be calculated using  
Equation 2.  
»
ÿ
5
100.0  
FoV Diagonal = 2ìtan-1 ìtan  
ö112.3è  
÷Ÿ  
(
)
«
4
2
(4)  
The ratio of 5/4 is used to represent the ratio of the diagonal length to the horizontal length of the sensor.  
8.2.2.2.4 Lens  
A lens with a 1/3” image circle must be chosen. The field of view of the lens must match the requirements (that  
is, the FoV must be equal to 112.3 degrees, as calculated in Equation 4 ). A lower f.no is always better. For this  
example, use an f.no of 1.2.  
8.2.2.2.5 Integration Duty Cycle  
An integration duty cycle of 60% is chosen to keep the peak illumination power requirements low. Higher peak  
illumination power results in a higher number of illumination elements and, thus, an increase in system cost.  
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8.2.2.2.6 Design Summary  
A screen shot of the system estimator tool is shown in Figure 13.  
Figure 13. Screen Shot of the Estimator Tool  
The illumination peak optical power of 2.0 W can be supplied using a single high-power LED.  
8.2.2.3 Application Curve  
200  
r = 10 %  
180  
r = 40 %  
r = 100 %  
160  
140  
120  
100  
80  
60  
40  
20  
0
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
5.5  
6
Object Distance (m)  
ρ represents object reflectivity  
Figure 14. Example People-Counting Object Distance vs Depth Resolution  
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8.2.3 People Locating and Identification  
A skeletal structure can be used to classify identified shapes (such as humans, machines, pets, and so forth).  
Other possibilities include classification of people (such as children and elderly). Even identification of humans by  
matching the shape and movement to an existing database is possible. Such information can lend itself for use in  
a variety of retail solutions, home safety, security, and public and private surveillance systems, as shown in  
Figure 15.  
Figure 15. People Counting and Identification  
8.2.3.1 Design Requirements  
Table 5. People Counting and Identification Requirements  
SPECIFICATION  
Depth resolution  
VALUE  
UNITS  
COMMENTS  
To obtain skeletal structure and gait accurately  
and identify humans from other objects.  
1.5  
Percentage of distance  
Reasonable update rate for moderate object  
movement speeds  
Frame rate  
15  
Frame per second  
Degrees (H X V)  
Higher FoVs are better for more coverage but  
worse from a power requirement point of view  
Field of view  
100.0 x 83.6  
Minimum distance  
Maximum distance  
1
6
Meters  
Meters  
Example only, requirements may vary  
Example only, requirements may vary  
Assuming objects reflect very little infrared light  
and assuming Lambertian reflection  
Typical reflectivity of objects  
No of pixels  
40  
320 x 240  
0
Percentage  
Rows x columns  
W × nm × m2 around  
850 nm  
Using full array  
Ambient light  
Indoor lighting conditions  
Laser + diffuser for diffusing light uniformly  
through the scene  
Illumination source  
Laser  
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8.2.3.2 Detailed Design Procedure  
Using the TI ToF estimator tool, the ToF camera design requirements can be input and the power numbers  
required for achieving the desired specifications can be obtained. The choice of inputs to the estimator tool is  
explained in the following section.  
8.2.3.2.1 Frequencies of Operation  
The frequencies of operation are limited by the sensor bandwidth because the illumination source is a laser.  
Frequencies around 75 MHz can be used to obtain a good demodulation figure of merit. Two frequencies are  
used to implement de-aliasing and extend the unambiguous range because frequencies around 75 MHz provide  
a very short unambiguous range. The two frequencies chosen for de-aliasing are 70 MHz and 80 MHz. The  
unambiguous range is now given by Equation 5.  
C
299792458.0 ms  
Unambiguous Range =  
=
=14.990 m  
2ìGCD f ,f  
2ìGCD 70 MHz,80 MHz  
(
)
(
)
1
2
(5)  
For the purpose of power requirement calculations, the average frequency of 75 MHz can be used in the  
estimator tool.  
8.2.3.2.2 Number of Sub-Frames and Quads  
In this example, one sub-frame and six quads are used to minimize the effects of the sensor reset noise. A depth  
resolution of 1% instead of the requirement of 1.5% is used as the resolution input to the estimator tool to allow  
for margins resulting from the additional noise when using de-aliasing.  
8.2.3.2.3 Field of View (FoV)  
Field of view in the horizontal direction is 74.4 degrees. The diagonal FoV can be calculated using Equation 6.  
»
ÿ
5
100.0  
FoV Diagonal = 2ìtan-1 ìtan  
ö112.3è  
÷Ÿ  
(
)
«
4
2
(6)  
The ratio of 5/4 is used to represent the ratio of the diagonal length to the horizontal length of the sensor.  
8.2.3.2.4 Lens  
A lens with a 1/3” image circle must be chosen. The FoV of the lens must match the requirements (that is, the  
FoV must be equal to 112.3 degrees, as calculated in Equation 6). A lower f.no is always better. For this  
example, use an f.no of 1.2.  
8.2.3.2.5 Integration Duty Cycle  
An integration duty cycle of 70% is chosen to keep the peak illumination power requirements low. Higher peak  
illumination power results in a higher number of illumination elements and, thus, an increase in system cost.  
22  
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8.2.3.2.6 Design Summary  
A screen shot of the system estimator tool is shown in Figure 16.  
Figure 16. Screen Shot of the Estimator Tool  
The illumination peak optical power of 3.54 W can be supplied using two high-power lasers.  
8.2.3.3 Application Curve  
60  
r = 10 %  
54  
r = 40 %  
r = 100 %  
48  
42  
36  
30  
24  
18  
12  
6
0
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
5.5  
6
Object Distance (m)  
ρ represents object reflectivity  
Figure 17. Example People Identification Object Distance vs Depth Resolution  
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9 Power Supply Recommendations  
The sensor reset noise is sensitive to AVDDH and PVDD supplies. Therefore, linear regulators are  
recommended for supplying power to the AVDD and PVDD supplies. DC-DC regulators can be used to supply  
power to the rest of the supplies. Ripple voltage on the VMIX and the SUB_BIAS supplies must be kept at a  
minimum (< 50 mV) to minimize phase noise resulting from differences between quads. The VMIX regulator must  
have the bandwidth to supply surge current requirements within a short time of less than 10 µs after the  
integration period begins because VMIX currents have a pulsed profile.  
There is no strict order for the power-on or -off sequence. The VMIX supplies are recommended to be turned on  
after all supplies have ramped to 90% of their respective values to avoid any power-up surges resulting from high  
VMIX currents in a non-reset device state.  
10 Layout  
10.1 Layout Guidelines  
10.1.1 MIX Supply Decapacitors  
The VMIXH supply has a peak load current requirement of approximately 600 mA during the integration phase.  
Moreover, a break-before-make circuit is used during the reversal of the demodulation polarity to avoid high  
through currents. The break-before-make strategy results in a pulse with a drop and a subsequent rise of  
demodulation current. The pulse duration is typically approximately 1 ns. In order to effectively support the rise in  
currents, VMIXH decoupling capacitors must be placed very close to the package. Furthermore, use multiple  
capacitors to reduce the effect of equivalent series inductance and resistance of the decoupling capacitors. Use  
a combination of 10-nF and 1-nF capacitors per VMIXH pin. Using vias for routing the trace from decoupling  
capacitors to the package pins must be avoided.  
10.1.2 LVDS Transmitters  
Each LVDS data output pair must be routed as a 100-Ω differential pair. When used with the OPT9221, 100-Ω  
termination resistors must be placed close to the OPT9221.  
10.1.3 Optical Centering  
The lens mount placement on the printed circuit board (PCB) must be such that the lens optical center aligns  
with the pixel array optical center. Note that the pixel array center is different from the package center.  
24  
Copyright © 2015, Texas Instruments Incorporated  
OPT8241  
www.ti.com.cn  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
Layout Guidelines (continued)  
10.1.4 Image Orientation  
The sensor orientation for obtaining an upright image is shown in Figure 18.  
Captured  
Image  
Sensor  
Lens  
Scene  
Pin 1  
240, 320  
T
T
240, 0  
L
L
R
R
Readout  
0, 320  
B
0, 0  
B
When used with the OPT9221,  
the default sensor readout direction is shown in grey.  
Figure 18. Sensor Orientation for Obtaining an Upright Image  
10.1.5 Thermal Considerations  
In some applications, special care must be taken to avoid high sensor temperatures because demodulation  
power is considerably high for the size of the package. Lower sensor temperatures help lower the thermal noise  
floor as well as reduce the leakage currents. Two recommended methods for achieving better package to PCB  
thermal coupling are listed below:  
Use a thermal pad below the sensor on both sides of the PCB with stitched vias.  
Use a compatible underfill.  
Copyright © 2015, Texas Instruments Incorporated  
25  
 
OPT8241  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
www.ti.com.cn  
10.2 Layout Example  
Figure 19. Example Layout  
26  
Copyright © 2015, Texas Instruments Incorporated  
OPT8241  
www.ti.com.cn  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
10.3 Mechanical Assembly Guidelines  
10.3.1 Board-Level Reliability  
TI chip-on-glass products are designed and tested with underfill to ensure excellent board-level reliability in  
intended applications. If a customer chooses to underfill a chip-on-glass product, following the guidelines below  
is recommended to maximize the board level reliability:  
The underfill material must extend partially up the package edges. Underfill that ends at the bottom (ball side)  
of the die degrades reliability.  
The underfill material must have a coefficient of thermal expansion (CTE) closely matched to the CTE of the  
solder interconnect.  
The underfill material must have a glass transition temperature (Tg) above the expected maximum exposure  
temperature.  
Thermoset ME-525 is a good example of a compatible underfill.  
10.3.2 Handling  
To avoid dust particles on the sensor, the sensor tray must only be opened in a cleanroom facility. In case of  
accidental exposure to dust, the recommended method to clean the sensors is to use an IPA solution with a  
micro-fiber cloth swab with no lint. Do not handle the sensor edges with hard or abrasive materials (such as  
metal tweezers) because the sensor package has a glass outline. Such handling may lead to cracks that can  
negatively affect package reliability and image quality.  
版权 © 2015, Texas Instruments Incorporated  
27  
OPT8241  
ZHCSE82B JUNE 2015REVISED OCTOBER 2015  
www.ti.com.cn  
11 器件和文档支持  
11.1 文档支持  
11.1.1 相关文档  
OPT9221 数据表》,SBAS703  
《飞行时间 (ToF) 系统设计简介》SBAU219  
11.2 社区资源  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
11.3 商标  
E2E is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
11.4 静电放电警告  
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可  
能会损坏集成电路。  
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可  
能会导致器件与其发布的规格不相符。  
11.5 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
12 机械、封装和可订购信息  
以下页中包括机械、封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不  
对本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本,请查阅左侧的导航栏。  
28  
版权 © 2015, Texas Instruments Incorporated  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
OPT8241NBN  
OPT8241NBNL  
ACTIVE  
ACTIVE  
COG  
COG  
NBN  
NBN  
78  
78  
240  
RoHS & Green  
SNAGCU  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
0 to 70  
0 to 70  
OPT8241  
OPT8241  
2400 RoHS & Green  
SNAGCU  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TRAY  
Chamfer on Tray corner indicates Pin 1 orientation of packed units.  
*All dimensions are nominal  
Device  
Package Package Pins SPQ Unit array  
Max  
matrix temperature  
(°C)  
L (mm)  
W
K0  
P1  
CL  
CW  
Name  
Type  
(mm) (µm) (mm) (mm) (mm)  
OPT8241NBN  
OPT8241NBNL  
NBN  
NBN  
COG  
COG  
78  
78  
240  
10 x 24  
10 x 24  
150  
150  
315 135.9 7620 12.75 10.58 13.75  
315 135.9 7620 12.75 10.58 13.75  
2400  
Pack Materials-Page 1  
PACKAGE OUTLINE  
NBN0078A  
COG - 0.745 mm max height  
SCALE 1.800  
CHIP ON GLASS  
8.797  
8.717  
A
B
(0.0172)  
PIXEL AREA CTR  
BALL 1 CORNER  
INDEX AREA  
7.899  
7.819  
(1.17945)  
PIXEL AREA CTR  
PIXEL AREA  
(0.1)  
DIE  
(0.04)  
(0.5)  
  D
SCALE  
T
A
I
      0
A
(0.06)  
SEE DETAIL A  
DETAIL A  
0.745 MAX  
C
SEATING PLANE  
0.05 C  
0.213  
TYP  
BALL TYP  
0.187  
(8.37) TYP  
(5.95)  
(0.194) TYP  
(0.19) TYP  
M
L
K
J
DIE  
H
G
F
PKG  
(7.48)  
TYP  
(6.91)  
E
D
C
B
A
0.285  
0.235  
1
2
3
4
5
7
8
9 10 11 12 13 14 15  
PKG  
18 19  
16 17  
6
78X  
44X (0.68)  
36X (0.465)  
4222085/A 06/2015  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. Dimension is measured at the maximum solder ball diameter, parallel to primary datum C.  
4. Primary datum C and seating plane are defined by the spherical crowns of the solder balls.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
NBN0078A  
COG - 0.745 mm max height  
CHIP ON GLASS  
4X (3.255)  
20X (3.305)  
4X (2.79)  
10 11  
13 14 15 16  
12  
36X (0.465)  
44X (0.68)  
5
7
9
4
6
8
1
2
3
18 19  
17  
A
B
C
78X ( 0.22)  
26X (3.79)  
12X (3.74)  
D
E
F
SYMM  
G
H
J
K
L
M
SYMM  
LAND PATTERN EXAMPLE  
SCALE:10X  
METAL UNDER  
SOLDER MASK  
0.05 MAX  
0.05 MIN  
0.22)  
METAL  
(
(
0.22)  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
NON-SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
NOT TO SCALE  
4222085/A 06/2015  
NOTES: (continued)  
5. PCB pads shift from original positions to prevent solder balls from touching sensor. X and Y direction: 0.05 mm. Corner pads: 0.03 mm.  
6. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.  
For information, see Texas Instruments literature number SSYZ015 (www.ti.com/lit/ssyz015).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
NBN0078A  
COG - 0.745 mm max height  
CHIP ON GLASS  
4X (3.255)  
20X (3.305)  
4X (2.79)  
36X (0.465) TYP  
44X (0.68)  
4
5
6
7
8
9
10 11 12 13 14 15 16  
17 18 19  
1
2
3
A
B
C
METAL  
TYP  
26X (3.79)  
12X (3.74)  
D
E
F
SYMM  
G
H
J
K
L
(R0.05) TYP  
M
78X ( 0.25)  
SYMM  
SOLDER PASTE EXAMPLE  
BASED ON 0.1 mm THICK STENCIL  
SCALE:12X  
4222085/A 06/2015  
NOTES: (continued)  
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.  
www.ti.com  
重要声明和免责声明  
TI“按原样提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,  
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保。  
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验  
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Copyright © 2022,德州仪器 (TI) 公司  

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