PCM2904DBR [TI]
具有线性输出、总线供电的立体声 USB1.1 编解码器（HID 接口 + 500mA USB 电流） | DB | 28 | -25 to 85;
| 型号： | PCM2904DBR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有线性输出、总线供电的立体声 USB1.1 编解码器（HID 接口 + 500mA USB 电流） | DB | 28 | -25 to 85 光电二极管 商用集成电路 编解码器 |
| 文件： | 总40页 (文件大小：634K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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PCM2904
PCM2906
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
STEREO AUDIO CODEC WITH USB INTERFACE, SINGLE-ENDED ANALOG
INPUT/OUTPUT AND S/PDIF
1
FEATURES
–
–
Pass-Band Ripple = ±0.1 dB
23
•
PCM2904: Without S/PDIF
PCM2906: With S/PDIF
On-Chip USB Interface:
Stop-Band Attenuation = –43 dB
•
•
–
–
Single-Ended Voltage Output
Analog LPF Included
–
–
–
–
–
–
–
With Full-Speed Transceivers
Fully Compliant With USB 1.1 Specification
Certified by USB-IF
•
•
Multifunctions:
–
Human Interface Device (HID) Volume ±
Control and Mute Control
(1)
–
Suspend Flag
Partially Programmable Descriptors
Package: 28-Pin SSOP
USB Adaptive Mode for Playback
USB Asynchronous Mode for Record
Bus Powered
APPLICATIONS
•
•
•
•
USB Audio Speaker
USB Headset
USB Monitor
USB Audio Interface Box
•
•
16-Bit Delta-Sigma ADC and DAC
Sampling Rate:
–
–
DAC: 32, 44.1, 48 kHz
ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz
DESCRIPTION
•
On-Chip Clock Generator With Single 12-MHz
Clock Source
The PCM2904/2906 is Texas Instruments single-chip
USB stereo audio codec with USB-compliant
full-speed protocol controller and S/PDIF (PCM2906
only). The USB protocol controller works with no
software code, but the USB descriptors can be
modified in some areas (for example, vendor
ID/product ID). The PCM2904/2906 employs SpAct™
architecture, TI's unique system that recovers the
audio clock from USB packet data. On-chip analog
PLLs with SpAct enable playback and record with low
clock jitter and with independent playback and record
sampling rates.
•
•
Single Power Supply: 5 V Typical (VBUS
Stereo ADC
)
–
Analog Performance at VBUS = 5 V
–
–
–
THD+N = 0.01%
SNR = 89 dB
Dynamic Range = 89 dB
–
Decimation Digital Filter
–
–
Pass-Band Ripple = ±0.05 dB
Stop-Band Attenuation = –65 dB
–
–
–
Single-Ended Voltage Input
Antialiasing Filter Included
Digital LCF Included
•
Stereo DAC:
–
Analog Performance at VBUS = 5 V
–
–
–
THD+N = 0.005%
SNR = 96 dB
Dynamic Range = 93 dB
–
Oversampling Digital Filter
(1) The descriptor can be modified by changing a mask.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
SpAct is a trademark of Texas Instruments.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2007, Texas Instruments Incorporated
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGING ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
DESIGNATOR
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA
PRODUCT
PACKAGE-LEAD
PCM2904DB
PCM2904DBR
PCM2906DB
PCM2906DBR
Rails
PCM2904DB
PCM2906DB
28-lead SSOP
28-lead SSOP
28DB
28DB
–25°C to 85°C
–25°C to 85°C
PCM2904
PCM2906
Tape and reel
Rails
Tape and reel
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
PCM2904/PCM2906
UNIT
V
Supply voltage, VBUS
–0.3 to 6.5
Ground voltage differences, AGNDC, AGNDP, AGNDX, DGND, DGNDU
±0.1
V
SEL0, SEL1, TEST0 (DIN)(2)
–0.3 to 6.5
Digital input
voltage
V
V
D+, D–, HID0, HID1, HID2, XTI, XTO, TEST1 (DOUT)(2), SSPND
VINL, VINR, VCOM, VOUTR, VOUT
VCCCI, VCCP1I, VCCP2I, VCCXI, VDDI
–0.3 to (VDDI + 0.3) < 4
L
–0.3 to (VCCCI + 0.3) < 4
Analog input
voltage
–0.3 to 4
±10
Input current (any pins except supplies)
Ambient temperature under bias
Storage temperature, Tstg
mA
°C
–40 to 125
–55 to 150
150
°C
Junction temperature, TJ
°C
Lead temperature (soldering)
Package temperature (IR reflow, peak)
260
°C, 5 s
°C
250
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) ( ): PCM2906
2
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Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS
All specifications at TA = 25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data (unless otherwise noted)
PCM2904DB, PCM2906DB
PARAMETER
DIGITAL INPUT/OUTPUT
TEST CONDITIONS
UNIT
MIN
TYP
MAX
Host interface
Apply USB Revision 1.1, full speed
USB isochronous data format
Audio data format
INPUT LOGIC
(1)
VIH
2
2.52
2
3.3
0.8
(1)
VIL
(2)(3)
VIH
3.3
(2)(3)
VIL
0.9
Input logic level
Input logic current
Output logic level
Vdc
(4)
VIH
5.25
0.8
(4)
VIL
(5)
VIH
2.52
5.25
0.9
(5)
VIL
(1) (2) (4)
IIH
VIN = 3.3 V
VIN = 0 V
±10
±10
80
(1) (2) (4)
IIL
(3)
IIH
VIN = 3.3 V
VIN = 0 V
50
65
µA
(3)
IIL
±10
100
±10
(5)
IIH
VIN = 3.3 V
VIN = 0 V
(5)
IIL
OUTPUT LOGIC
(1)
VOH
2.8
2.8
2.8
(1)
VOL
0.3
0.5
0.5
(6)
VOH
IOH = –4 mA
IOL = 4 mA
IOH = –2 mA
IOL = 2 mA
Vdc
(6)
VOL
(7)
VOH
(7)
VOL
CLOCK FREQUENCY
Input clock frequency, XTI
11.994
12 12.006
MHz
ADC CHARACTERISTICS
Resolution
8, 16
1, 2
bits
Audio data channel
CLOCK FREQUENCY
channel
8, 11.025, 16, 22.05, 32,
44.1, 48
fs
Sampling frequency
kHz
DC ACCURACY
Gain mismatch, channel-to-channel
Gain error
±1
±5 % of FSR
±2
±0
±10 % of FSR
% of FSR
Bipolar zero error
(1) Pins 1, 2: D+, D–
(2) Pin 21: XTI
(3) Pins 5, 6, 7: HID0, HID1, HID2
(4) Pins 8, 9: SEL0, SEL1
(5) Pin 24: DIN
(6) Pin 25: DOUT
(7) Pin 28: SSPND
Copyright © 2002–2007, Texas Instruments Incorporated
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PCM2904
PCM2906
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS (Continued)
All specifications at TA = 25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data (unless otherwise noted)
TEST CONDITIONS
PCM2904DB, PCM2906DB
PARAMETER
UNIT
MIN
TYP
MAX
DYNAMIC PERFORMANCE(1)
VIN = –0.5 dB(2), VCCCI = 3.67 V
VIN = –0.5 dB(3)
VIN = –60 dB
0.01%
0.1%
5%
0.02%
THD+N
Total harmonic distortion plus noise
Dynamic range
S/N ratio
A-weighted
81
81
80
89
dB
dB
dB
A-weighted
89
Channel separation
85
ANALOG INPUT
Input voltage
0.6 VCCCI
0.5 VCCCI
30
Vp-p
V
Center voltage
Input impedance
kΩ
–3 dB
150
kHz
dB
Antialiasing filter frequency response
fIN = 20 kHz
–0.08
DIGITAL FILTER PERFORMANCE
Pass band
0.454 fs
±0.05
Hz
Hz
dB
dB
s
Stop band
0.583 fs
–65
Pass-band ripple
Stop-band attenuation
Delay time
td
17.4/fs
LCF frequency response
–3 dB
0.078 fs
MHz
DAC CHARACTERISTICS
Resolution
8, 16
1, 2
bits
Audio data channel
CLOCK FREQUENCY
channel
fs
DC ACCURACY
Gain mismatch, channel-to-channel
Sampling frequency
32, 44.1, 48
kHz
±1
±2
±2
±5 % of FSR
±10 % of FSR
% of FSR
Gain error
Bipolar zero error
DYNAMIC PERFORMANCE(4)
VOUT = 0 dB
0.005%
3%
0.016%
THD+N
Total harmonic distortion plus noise
VOUT = –60 dB
EIAJ, A-weighted
EIAJ, A-weighted
Dynamic range
87
90
86
93
dB
dB
dB
SNR
Signal-to-noise ratio
Channel separation
96
92
(1) fIN = 1 kHz, using the System Two™ audio measurement system by Audio Precision™ in RMS mode with 20-kHz LPF, 400-Hz HPF in
calculation.
(2) Using external voltage regulator for VCCCI (as shown in Figure 36 and Figure 37, using REG103xA-A)
(3) Using internal voltage regulator for VCCCI (as shown in Figure 38 and Figure 39)
(4) fOUT = 1 kHz, using the System Two audio measurement system by Audio Precision in RMS mode with 20-kHz LPF, 400-Hz HPF.
4
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Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS (Continued)
All specifications at TA = 25°C, VBUS, = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data (unless otherwise noted)
PCM2904DB, PCM2906DB
PARAMETER
ANALOG OUTPUT
TEST CONDITIONS
UNIT
MIN
TYP
MAX
VO
Output voltage
Center voltage
Load impedance
0.6 VCCCI
0.5 VCCCI
Vp-p
V
AC coupling
–3 dB
10
kΩ
250
kHz
dB
LPF frequency response
f = 20 kHz
–0.03
DIGITAL FILTER PERFORMANCE
Pass band
0.445 fs
±0.1
Hz
Hz
dB
dB
s
Stop band
0.555 fs
–43
Pass-band ripple
Stop-band attenuation
td
Delay time
14.3 fs
POWER SUPPLY REQUIREMENTS
VBUS
Voltage range
Supply current
4.36
5
56
5.25
67
VDC
mA
µA
ADC, DAC operation
(1)
Suspend mode
210
280
1.05
3.35
ADC, DAC operation
352
3.5
85
PD
Power dissipation
mW
(1)
Suspend mode
Internal power supply voltage(2)
3.25
–25
VDC
TEMPERATURE RANGE
Operating temperature
Thermal resistance
(1) In USB suspend state
°C
θJA
28-pin SSOP
100
°C/W
(2) Pins 10, 17, 19, 23, 27: VCCCI, VCCP1I, VCCP2I, VCCXI, VDDI
PIN ASSIGNMENTS
PCM2904
(Top View)
PCM2906
(Top View)
D+
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
D+
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSPND
VDDI
SSPND
VDDI
D–
2
D–
2
VBUS
VBUS
3
DGND
3
DGND
DGNDU
HID0
4
TEST1
TEST0
VCCXI
DGNDU
HID0
4
DOUT
DIN
5
5
VCCXI
HID1
6
HID1
6
HID2
7
AGNDX
HID2
7
AGNDX
SEL0
SEL1
VCCCI
8
XTI
SEL0
SEL1
VCCCI
8
XTI
9
XTO
VCCP2I
9
XTO
VCCP2I
10
11
12
13
14
10
11
12
13
14
AGNDC
AGNDP
VCCP1I
AGNDC
AGNDP
VCCP1I
VIN
VIN
VCOM
L
VIN
VIN
VCOM
L
R
VOUT
L
R
VOUT
L
VOUT
R
VOUT
R
P0007-05
Copyright © 2002–2007, Texas Instruments Incorporated
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PCM2904
PCM2906
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
Table 1. PCM2904 TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
11
18
22
2
AGNDC
AGNDP
AGNDX
D–
–
–
–
I/O
I/O
–
–
I
Analog ground for codec
Analog ground for PLL
Analog ground for oscillator
USB differential input/output minus(1)
USB differential input/output plus(1)
Digital ground
D+
1
DGND
DGNDU
HID0
26
4
Digital ground for USB transceiver
HID key state input (mute), active-high(2)
5
HID1
6
I
HID key state input (volume up), active-high(2)
HID key state input (volume down), active-high(2)
Must be set to high(3)
HID2
7
I
SEL0
SEL1
SSPND
TEST0
TEST1
VBUS
8
I
9
I
Must be set to high(3)
28
24
25
3
O
I
Suspend flag, active-low (Low: suspend, High: operational)
Test pin, must be connected to GND
Test pin, must be left open
O
–
–
–
–
–
–
–
I
Connect to USB power (VBUS
)
VCCCI
VCCP1I
VCCP2I
VCCXI
VCOM
10
17
19
23
14
27
12
13
16
15
21
20
Internal analog power supply for codec(4)
Internal analog power supply for PLL(4)
Internal analog power supply for PLL(4)
Internal analog power supply for oscillator(4)
Common for ADC/DAC (VCCCI/2)(4)
Internal digital power supply(4)
VDDI
VINL
ADC analog input for L-channel
ADC analog input for R-channel
DAC analog output for L-channel
DAC analog output for R-channel
Crystal oscillator input(5)
VINR
I
VOUT
VOUT
XTI
L
O
O
I
R
XTO
O
Crystal oscillator output
(1) LV-TTL leveL
(2) 3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no direct connection with the internal DAC or ADC. See the Interface #3 and End-Points sections.
(3) TTL Schmitt trigger, 5-V tolerant
(4) Connect a decoupling capacitor to GND.
(5) 3.3-V CMOS-level input
6
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Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
Table 2. PCM2906 TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
11
18
22
2
AGNDC
AGNDP
AGNDX
D–
–
–
–
I/O
I/O
–
–
I
Analog ground for codec
Analog ground for PLL
Analog ground for oscillator
USB differential input/output minus(1)
USB differential input/output plus(1)
Digital ground
D+
1
DGND
DGNDU
DIN
26
4
Digital ground for USB transceiver
S/PDIF input(2)
24
25
5
DOUT
HID0
O
I
S/PDIF output
HID key state input (mute), active-high(3)
HID1
6
I
HID key state input (volume up), active-high(3)
HID key state input (volume down), active-high(3)
Must be set to high(4)
HID2
7
I
SEL0
SEL1
SSPND
VBUS
8
I
9
I
Must be set to high(4)
28
3
O
–
–
–
–
–
–
–
I
Suspend flag, active-low (Low: suspend, High: operational)
Connect to USB power (VBUS
)
VCCCI
VCCP1I
VCCP2I
VCCXI
VCOM
VDDI
10
17
19
23
14
27
12
13
16
15
21
20
Internal analog power supply for codec(5)
Internal analog power supply for PLL(5)
Internal analog power supply for PLL(5)
Internal analog power supply for oscillator(5)
Common for ADC/DAC (VCCCI/2)(5)
Internal digital power supply(5)
VINL
ADC analog input for L-channel
ADC analog input for R-channel
DAC analog output for L-channel
DAC analog output for R-channel
Crystal oscillator input(6)
VINR
I
VOUT
VOUT
XTI
L
O
O
I
R
XTO
O
Crystal oscillator output
(1) LV-TTL level
(2) 3.3-V CMOS-level input with internal pulldown, 5-V tolerant
(3) 3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or
volume down, which have no direct connection with the internal DAC or ADC. See the Interface #3 and End-Points sections.
(4) TTL Schmitt trigger, 5-V tolerant
(5) Connect a decoupling capacitor to GND.
(6) 3.3-V CMOS-level input
Copyright © 2002–2007, Texas Instruments Incorporated
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PCM2904
PCM2906
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
PCM2904 FUNCTIONAL BLOCK DIAGRAM
VCCCI VCCP1I VCCP2I VCCXI
VDDI
AGNDC AGNDP AGNDX
DGND
DGNDU
5-V to 3.3-V Voltage Regulator
Power
TEST0
TEST1
SSPND
Manager
VBUS
VINL
ISO-In
ADC
FIFO
End-Point
VINR
D+
D–
Analog
PLL
Control
VCOM
Selector
End-Point
Analog
PLL
SEL0
SEL1
VOUT
L
ISO-Out
DAC
FIFO
End-Point
VOUTR
HID0
HID1
HID2
HID
End-Point
USB
Protocol
Controller
96 MHz
Tracker
(SpAct)
PLL (´8)
12 MHz
XTI
XTO
B0238-01
8
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Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
PCM2906 FUNCTIONAL BLOCK DIAGRAM
VCCCI VCCP1I VCCP2I VCCXI
VDDI
AGNDC AGNDP AGNDX
DGND
DGNDU
5-V to 3.3-V Voltage Regulator
Lock
Power
SSPND
Manager
DIN
S/PDIF Decoder
VBUS
VINL
ISO-In
ADC
FIFO
End-Point
VINR
D+
D–
Analog
PLL
Control
VCOM
Selector
End-Point
Analog
PLL
SEL0
SEL1
VOUT
L
ISO-Out
DAC
FIFO
End-Point
VOUTR
HID0
HID1
HID2
HID
End-Point
DOUT
S/PDIF Encoder
USB
Protocol
Controller
96 MHz
Tracker
(SpAct)
PLL (´8)
12 MHz
XTO
XTI
B0239-01
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PCM2906
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
BLOCK DIAGRAM OF ANALOG FRONT-END (RIGHT CHANNEL)
4.7 mF
30 kW
VINR
–
+
13
–
+
(+)
(–)
Delta-Sigma
Modulator
VCOM
14
(VCCCI/2)
+
10 mF
Reference
S0011-06
10
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Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
TYPICAL CHARACTERISTICS
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise noted.
ADC
TOTAL HARMONIC DISTORTION + NOISE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
vs
FREE-AIR TEMPERATURE
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
95
93
91
89
87
85
Dynamic Range
SNR
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
G002
G001
Figure 1. THD+N at –0.5 dB vs Temperature
Figure 2.
TOTAL HARMONIC DISTORTION + NOISE
DYNAMIC RANGE and SNR
vs
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
95
93
91
89
87
85
Dynamic Range
SNR
4.0
4.5
5.0
5.5
4.0
4.5
5.0
5.5
V
BUS
– Supply Voltage – V
V
BUS
– Supply Voltage – V
G003
G004
Figure 3. THD+N at –0.5 dB vs Supply Voltage
Figure 4.
Copyright © 2002–2007, Texas Instruments Incorporated
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PCM2904
PCM2906
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE
DYNAMIC RANGE and SNR
vs
SAMPLING FREQUENCY
vs
SAMPLING FREQUENCY
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
95
93
91
89
87
85
Dynamic Range
SNR
30
35
40
45
50
30
35
40
45
50
f
S
– Sampling Frequency – kHz
f
S
– Sampling Frequency – kHz
G005
G006
Figure 5. THD+N at –0.5 dB vs Sampling Frequency
Figure 6.
DAC
TOTAL HARMONIC DISTORTION + NOISE
DYNAMIC RANGE and SNR
vs
FREE-AIR TEMPERATURE
vs
FREE-AIR TEMPERATURE
98
97
96
95
94
93
92
91
90
0.008
0.007
0.006
0.005
0.004
0.003
SNR
Dynamic Range
−50
−25
0
25
50
75
100
−50
−25
0
25
50
75
100
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
G008
G007
Figure 7. THD+N at 0 dB vs Temperature
Figure 8.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise noted.
TOTAL HARMONIC DISTORTION + NOISE
DYNAMIC RANGE and SNR
vs
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
0.008
0.007
0.006
0.005
0.004
0.003
98
97
96
95
94
93
92
91
90
SNR
Dynamic Range
4.0
4.5
5.0
5.5
4.0
4.5
5.0
5.5
V
BUS
– Supply Voltage – V
V
BUS
– Supply Voltage – V
G009
G010
Figure 9. THD+N at 0 dB vs Supply Voltage
Figure 10.
TOTAL HARMONIC DISTORTION + NOISE
DYNAMIC RANGE and SNR
vs
SAMPLING FREQUENCY
vs
SAMPLING FREQUENCY
98
97
96
95
94
93
92
91
90
0.008
0.007
0.006
0.005
0.004
0.003
SNR
Dynamic Range
30
35
40
45
50
30
35
40
45
50
f
S
– Sampling Frequency – kHz
f
S
– Sampling Frequency – kHz
G012
G011
Figure 11. THD+N at 0 dB vs Sampling Frequency
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, using REG103xA-A, unless otherwise noted.
SUPPLY CURRENT
OPERATIONAL and SUSPEND SUPPLY CURRENT
vs
SUPPLY VOLTAGE
0.30
0.28
0.26
0.24
0.22
0.20
70
60
50
40
30
20
Operational
Suspend
4.00
4.25
4.50
4.75
5.00
5.25
5.50
V
BUS
– Supply Voltage – V
G013
Figure 13.
OPERATIONAL SUPPLY CURRENT
SUSPEND SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
vs
SAMPLING FREQUENCY
0.40
0.35
0.30
0.25
0.20
0.15
0.10
70
60
50
40
30
20
USB Spec Limit for Device (0.3 mA)
−40
−20
0
20
40
60
80
100
30
35
40
45
50
T
A
– Free-Air Temperature – °C
f
S
– Sampling Frequency – kHz
G015
G014
Figure 14. Supply Current vs Sampling Frequency,
ADC and DAC at Same fS
Figure 15. Supply Current vs Temperature in
Suspend Mode
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
ADC DIGITAL DECIMATION FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0
−20
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
−40
−60
−80
−100
−120
−140
−160
0
8
16
24
32
0.0
0.2
0.4
0.6
0.8
1.0
Frequency [y f ]
Frequency [y f ]
S
S
G016
G017
Figure 16. Overall Characteristic
Figure 17. Stop-Band Attenuation
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0.2
0
−4
0.0
−0.2
−0.4
−0.6
−0.8
−8
−12
−16
−20
0.0
0.1
0.2
0.3
0.4
0.5
0.46
0.48
0.50
Frequency [y f ]
0.52
0.54
Frequency [y f ]
S
S
G018
G019
Figure 18. Pass-Band Ripple
Figure 19. Transition-Band Response
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
ADC DIGITAL HIGH-PASS FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
0.0
−0.2
−0.4
−0.6
−0.8
−1.0
0.0
0.1
0.2
0.3
0.4
0
1
2
3
4
Frequency [y f /1000]
Frequency [y f /1000]
S
S
G020
G021
Figure 20. Stop-Band Characteristic
Figure 21. Pass-Band Characteristic
ADC ANALOG ANTIALIASING FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0
−10
−20
−30
−40
−50
0.0
−0.2
−0.4
−0.6
−0.8
−1.0
0.01
0.1
1
10
100
1
10
100
1k
10k
f – Frequency – kHz
f – Frequency – kHz
G023
G022
Figure 22. Stop-Band Characteristic
Figure 23. Pass-Band haracteristic
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
DAC DIGITAL INTERPOLATION AND DE-EMPHASIS FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
0.2
0.0
−0.2
−0.4
−0.6
−0.8
0
1
2
3
4
0.0
0.1
0.2
0.3
0.4
0.5
Frequency [y f ]
Frequency [y f ]
S
S
G024
G025
Figure 24. Stop-Band Attenuation
Figure 25. Pass-Band Ripple
AMPLITUDE
vs
FREQUENCY
0
−2
−4
−6
−8
−10
−12
−14
−16
−18
−20
0.46 0.47 0.48 0.49 0.50 0.51 0.52 0.53 0.54
Frequency [y f ]
S
G026
Figure 26. Transition-Band Response
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fs = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
DAC ANALOG FIR FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0
−10
−20
−30
−40
−50
0.2
0.0
−0.2
−0.4
−0.6
−0.8
0
8
16
24
32
0.0
0.1
0.2
0.3
0.4
0.5
Frequency [y f ]
Frequency [y f ]
S
S
G027
G028
Figure 27. Stop-Band Characteristic
Figure 28. Pass-Band Characteristic
DAC ANALOG LOW-PASS FILTER FREQUENCY RESPONSE
AMPLITUDE
vs
FREQUENCY
AMPLITUDE
vs
FREQUENCY
0.0
−0.2
−0.4
−0.6
−0.8
−1.0
0
−10
−20
−30
−40
−50
0.01
0.1
1
10
100
1
10
100
1k
10k
f – Frequency – kHz
f – Frequency – kHz
G030
G029
Figure 29. Stop-Band Characteristic
Figure 30. Pass-Band Characteristic
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
USB INTERFACE
Control data and audio data are transferred to the PCM2904/2906 via D+ (pin 1) and D– (pin 2). All data to/from
the PCM2904/2906 is transferred at full speed. The device descriptor contains the information described in
Table 3. The device descriptor can be modified on request; contact a Texas Instruments representative about the
details.
Table 3. Device Descriptor
USB revision
1.1 compliant
Device class
0x00 (device defined interface level)
0x00 (not specified)
0x00 (not specified)
8 byte
Device sub class
Device protocol
Max packet size for end-point 0
Vendor ID
0x08BB (default value, can be modified)
0x2904/0x2906 (default value, can be modified)
1.0 (0x0100)
Product ID
Device release number
Number of configurations
Vendor string
1
String #1 (see Table 5)
String #2 (see Table 5)
Not supported
Product string
Serial number
The configuration descriptor contains the information described in Table 4. The configuration descriptor can be
modified on request; contact a Texas Instruments representative about the details.
Table 4. Configuration Descriptor
Interface
Four interfaces
Power attribute
Max power
0x80 (Bus powered, no remote wakeup)
0xFA (500 mA. Default value, can be modified)
The string descriptor contains the information described in Table 5. The string descriptor can be modified on
request; contact a Texas Instruments representative about the details.
Table 5. String Descriptor
#0
#1
#2
0x0409
Burr-Brown from TI (default value, can be modified)
USB audio codec (default value, can be modified)
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
DEVICE CONFIGURATION
Figure 31 illustrates the USB audio function topology. The PCM2904/2906 has four interfaces. Each interface is
constructed by alternative settings.
End-Point #0
Default End-Point
FU
Analog Out
End-Point #2
(IF #1)
IT
OT
TID1
TID2
Audio Streaming Interface
UID3
End-Point #4
(IF #2)
Analog In
OT
IT
TID5
TID4
Audio Streaming Interface
Standard Audio Control Interface (IF #0)
End-Point #5
(IF #3)
HID Interface
PCM2904/2906
M0024-02
Figure 31. USB Audio Function Topology
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Interface #0
Interface #0 is the control interface. Alternative setting #0 is the only possible setting for interface #0. Alternative
setting #0 describes the standard audio control interface. The audio control interface is constructed by a terminal.
The PCM2904/2906 has the following five terminals.
•
•
•
•
•
Input terminal (IT #1) for isochronous-out stream
Output terminal (OT #2) for audio analog output
Feature unit (FU #3) for DAC digital attenuator
Input terminal (IT #4) for audio analog input
Output terminal (OT #5) for isochronous-in stream
Input terminal #1 is defined as a USB stream (terminal type 0x0101). Input terminal #1 can accept 2-channel
audio streams consisting of left and right channels. Output terminal #2 is defined as a speaker (terminal type
0x0301). Input terminal #4 is defined as a microphone (terminal type 0x0201). Output terminal #5 is defined as a
USB stream (terminal type 0x0101). Output terminal #5 can generate 2-channel audio streams consisting of left
and right channels. Feature unit #3 supports the following sound control features.
•
•
Volume control
Mute control
The built-in digital volume controller can be manipulated by an audio-class-specific request from 0 dB to –64 dB
in steps of 1 dB. Each channel can be set for different values. The master volume control is not supported. A
request to the master volume is stalled and ignored. The built-in digital mute controller can be manipulated by
audio-class-specific request. A master mute control request is acceptable. A request to an individual channel is
stalled and ignored.
Interface #1
Interface #1 is the audio streaming data-out interface. Interface #1 has the following seven alternative settings.
Alternative setting #0 is the zero-bandwidth setting. All other alternative settings are operational settings.
ALTERNATIVE
SETTING
SAMPLING RATE
(kHz)
DATA FORMAT
TRANSFER MODE
00
01
02
03
04
05
06
Zero bandwidth
2s complement (PCM)
16 bit
16 bit
8 bit
8 bit
8 bit
8 bit
Stereo
Mono
Stereo
Mono
Stereo
Mono
Adaptive
Adaptive
Adaptive
Adaptive
Adaptive
Adaptive
32, 44.1, 48
32, 44.1, 48
32, 44.1, 48
32, 44.1, 48
32, 44.1, 48
32, 44.1, 48
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
Offset binary (PCM8)
Offset binary (PCM8)
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Interface #2
Interface #2 is the audio streaming data-in interface. Interface #2 has the following 19 alternative settings.
Alternative setting #0 is the zero-bandwidth setting. All other alternative settings are operational settings.
ALTERNATIVE
SETTING
SAMPLING RATE
(kHz)
DATA FORMAT
TRANSFER MODE
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
ZERO BANDWIDTH
2s complement (PCM)
16 bit
16 bit
16 bit
16 bit
16 bit
16 bit
16 bit
16 bit
16 bit
16 bit
8 bit
Stereo
Mono
Stereo
Mono
Stereo
Mono
Stereo
Mono
Stereo
Mono
Stereo
Mono
Stereo
Mono
Stereo
Mono
Stereo
Mono
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Asynchronous
Synchronous
Synchronous
Synchronous
Synchronous
48
48
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
2s complement (PCM)
44.1
44.1
32
32
22.05
22.05
16
16
16
8 bit
16
8 bit
8
8 bit
8
16 bit
16 bit
8 bit
11.025
11.025
11.025
11.025
8 bit
Interface #3
Interface #3 is the interrupt data-in interface. Alternative setting #0 is the only possible setting for interface #3.
Interface #3 constructs the HID consumer control device. Interface #3 reports the following three key statuses.
•
•
•
Mute (0xE209)
Volume up (0xE909)
Volume down (0xEA09)
End-Points
The PCM2904/2906 has the following four end-points.
•
•
•
•
Control end-point (EP #0)
Isochronous-out audio data stream end-point (EP #2)
Isochronous-in audio data stream end-point (EP #4)
HID end-point (EP #5)
The control end-point is a default end-point. The control end-point is used to control all functions of the
PCM2904/2906 by the standard USB request and USB audio class specific request from the host. The
isochronous-out audio data stream end-point is an audio sink end-point, which receives the PCM audio data. The
isochronous-out audio data stream end-point accepts the adaptive transfer mode. The isochronous-in audio data
stream end-point is an audio source end-point that transmits the PCM audio data. The isochronous-in audio data
stream end-point uses the asynchronous transfer mode. The HID end-point is an interrupt-in end-point. The HID
end-point reports HID0, HID1, and HID2 pin status every 32 ms.
The human interface device (HID) pins are defined as consumer control devices. The HID function is designed
as an independent end-point from both isochronous-in and -out end-points. This means that the result obtained
from the HID operation depends on the host software. Typically, the HID function is used as a primary audio-out
device.
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Clock and Reset
The PCM2904/2906 requires a 12-MHz (±500 ppm) clock for the USB and audio functions. The clock can be
generated by a built-in oscillator with a 12-MHz crystal resonator. The 12-MHz crystal resonator must be
connected to XTI (pin 21) and XTO (pin 20) with one high-value (1-MΩ) resistor and two small capacitors, the
capacitance of which depends on the load capacitance of the crystal resonator. An external clock can be
supplied to XTI (pin 21). If an external clock is used, XTO (pin 20) must be left open. Because there is no clock
disabling signal, use of the external clock supply is not recommended. SSPND (pin 28) is unable to use clock
disabling.
The PCM2904/2906 has an internal power-on reset circuit, which is triggered automatically when VBUS (pin 3)
exceeds 2.5 V typical (2.7 V to 2.2 V). About 700 µs is required until internal reset release.
Digital Audio Interface (PCM2906)
The PCM2906 employs S/PDIF for both input and output. Isochronous-out data from the host is encoded to the
S/PDIF output and the DAC analog output. Input data is selected from either the S/PDIF or ADC analog input.
When the device detects S/PDIF input and successfully locks the received data, the isochronous-in transfer data
source automatically selected is S/PDIF; otherwise, the data source selected is the ADC analog input.
Supported Input Data (PCM2906)
The following data formats are accepted by S/PDIF for input and output. All other data formats are unusable as
S/PDIF.
•
•
•
48-kHz 16-bit stereo
44.1-kHz 16-bit stereo
32-kHz 16-bit stereo
Mismatch between the input data format and the host command may cause unexpected results, with the
following exceptions:
•
•
Recording in monaural format from stereo data input at the same data rate
Recording in 8-bit format from 16-bit data input at the same data rate
A combination of the two foregoing conditions is not accepted.
For playback, all possible data-rate sources are converted to the 16-bit stereo format at the same source data
rate.
Channel Status Information (PCM2906)
The channel status information is fixed as consumer application, PCM mode, copyright, and digital/digital
converter. All other bits are fixed as 0s except for the sample frequency, which is set automatically according to
the data received through the USB.
Copyright Management (PCM2906)
Isochronous-in data is affected by the serial copy management system (SCMS). When the control bit indicates
that the received digital audio data is original, the input digital audio data is transferred to the host. If the data is
indicated as first generation or higher, the transferred data is routed to the analog input.
Digital audio data output is always encoded as original with SCMS control.
The implementation of this feature is optional. It is the designer's responsibility to determine whether to
implement this feature in a product or not.
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INTERFACE SEQUENCE
Power-On, Attach, and Playback Sequence
The PCM2904/2906 is ready for setup when the reset sequence has finished and the USB device is attached.
After a connection has been established by setup, the PCM2904/PCM2906 is ready to accept USB audio data.
While waiting for the audio data (idle state), the analog output is set to bipolar zero (BPZ).
When receiving the audio data, the PCM2904/2906 stores the first audio packet, which contained 1-ms audio
data, into the internal storage buffer. The PCM2904/2906 starts playing the audio data when detecting the
following start-of-frame (SOF) packet.
5 V (Typ)
VBUS (Pin 3)
2.5 V (Typ)
0 V
st
nd
Bus Reset
Set Configuration
1
Audio Data
2
Audio Data
Bus Idle
D+/D–
SOF
SOF
SOF
SSPND
BPZ
VOUT
L
VOUTR
700 ms
Device Setup
1 ms
Internal Reset
Ready for Setup
Ready for Playback
T0055-02
Figure 32. Initial Sequence
Play, Stop, and Detach Sequence
When the host finishes or aborts the playback, the PCM2904/2906 stops playing after the last audio data has
played.
Record Sequence
The PCM2904/2906 starts audio capture into the internal memory after receiving the SET_INTERFACE
command.
Suspend and Resume Sequence
The PCM2904/2906 enters the suspend state after a constant idle state on the USB bus, approximately 5 ms.
While the PCM2904/2906 enters the suspend state, the SSPND flag (pin 28) is asserted. The PCM2904/2906
wakes up immediately on detecting a non-idle state on the USB.
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VBUS (Pin 3)
Audio Data
Audio Data
Last Audio Data
D+/D–
SOF
SOF
SOF
SOF
SOF
VOUT
L
VOUTR
Detach
1 ms
T0056-02
Figure 33. Play, Stop, and Detach
Audio Data
Audio Data
Audio Data
SET_INTERFACE
IN Token
IN Token
IN Token
D+/D–
SOF
SOF
SOF
SOF
SOF
VINL
VINR
1 ms
T0259-01
Figure 34. Record Sequence
Idle
D+/D–
SSPND
Suspend
Active
5 ms
Active
T0057-02
Figure 35. Suspend and Resume
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SLES042C–JUNE 2002–REVISED NOVEMBER 2007
PCM2904 TYPICAL CIRCUIT CONNECTION 1
Figure 36 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB compliant product.
1.5 kW ´ 3
1.5 kW
PCM2904
22 W
22 W
D+
1
2
D+
28
27
SSPND
VDDI
C3
D–
D–
2.2 W
1 mF
VBUS
VBUS
3
DGND 26
TEST1 25
TEST0 24
GND
4
DGNDU
HID0
5
C4
VCCXI
6
HID1
23
7
HID2
AGNDX 22
XTI 21
C5
C6
1 MW
IC1
IN OUT GND ADJ EN
8
SEL0
1
2
3
4
5
9
SEL1
VCCCI
XTO 20
3.60 V–
3.85 V
12 MHz
C7
VCCP2I
AGNDP 18
10
19
MUTE/
Power
Down
+
C13
C9
C10
D1
11 AGNDC
C1
C8
VIN
L
VCCP1I
VOUT
VOUT
12
13
14
17
16
15
+
+
27 kW 13 kW
C11
C12
LPF,
+
+
VINR
L
Amp
C2
+
VCOM
R
LPF,
Amp
S0264-01
NOTE: C1, C2: 10 µF
C3, C4, C7, C8, C13: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
IC1: REG103xA-A (TI) or equivalent. Analog performance may vary depending on IC1.
D1: Schottky barrier diode (VF ≤ 350 mV at 10 mA, IR ≤ 2 µA at 4 V)
Figure 36. Bus-Powered Configuration for High-Performance PCM2904 Application
26
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Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
PCM2906 TYPICAL CIRCUIT CONNECTION 1
Figure 37 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB compliant product.
1.5 kW ´ 3
1.5 kW
PCM2906
22 W
22 W
D+
1
2
D+
28
27
SSPND
VDDI
C3
D–
D–
2.2 W
1 mF
VBUS
VBUS
3
DGND 26
DOUT 25
DIN 24
GND
4
DGNDU
HID0
5
C4
VCCXI
6
HID1
23
7
HID2
AGNDX 22
XTI 21
C5
C6
1 MW
IC1
IN OUT GND ADJ EN
8
SEL0
1
2
3
4
5
9
SEL1
VCCCI
XTO 20
3.60 V–
3.85 V
12 MHz
C7
VCCP2I
AGNDP 18
10
19
MUTE/
Power
Down
+
C13
C9
C10
D1
11 AGNDC
C1
C8
VIN
L
VCCP1I
VOUT
VOUT
12
13
14
17
16
15
+
+
27 kW 13 kW
C11
C12
LPF,
+
+
VINR
L
Amp
C2
+
VCOM
R
LPF,
Amp
S0264-02
NOTE: C1, C2: 10 µF
C3, C4, C7, C8, C13: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
IC1: REG103xA-A (TI) or equivalent. Analog performance may vary depending on IC1.
D1: Schottky barrier diode (VF ≤ 350 mV at 10 mA, IR ≤ 2 µA at 4 V)
Figure 37. Bus-Powered Configuration for High-Performance PCM2906 Application
Copyright © 2002–2007, Texas Instruments Incorporated
Submit Documentation Feedback
27
Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
PCM2904 TYPICAL CIRCUIT CONNECTION 2
Figure 38 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB compliant product.
1.5 kW ´ 4
PCM2904
22 W
D+
1
2
D+
28
27
SSPND
VDDI
22 W
C3
D–
D–
2.2 W
1 mF
VBUS
VBUS
3
DGND 26
TEST1 25
TEST0 24
GND
4
DGNDU
HID0
5
C4
VCCXI
6
HID1
23
7
HID2
AGNDX 22
XTI 21
C5
C6
C7
1 MW
8
SEL0
9
SEL1
VCCCI
XTO 20
12 MHz
C1
VCCP2I
AGNDP 18
10
19
MUTE/
Power
Down
+
11 AGNDC
C9
C8
VIN
L
VCCP1I
VOUT
VOUT
12
13
14
17
16
15
+
+
C10
C11
C12
LPF,
+
+
VINR
L
Amp
C2
+
VCOM
R
LPF,
Amp
S0265-01
NOTE: C1, C2: 10 µF
C3, C4, C7, C8: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
In this case, the analog performance of the A/D converter may be degraded.
Figure 38. PCM2904 Bus-Powered Configuration
28
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Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
PCM2906 TYPICAL CIRCUIT CONNECTION 2
Figure 39 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information
only. The whole board design should be considered to meet the USB specification as a USB compliant product.
1.5 kW ´ 4
PCM2906
22 W
D+
1
2
D+
28
27
SSPND
VDDI
22 W
C3
D–
D–
2.2 W
1 mF
VBUS
VBUS
3
DGND 26
DOUT 25
DIN 24
GND
4
DGNDU
HID0
5
C4
VCCXI
6
HID1
23
7
HID2
AGNDX 22
XTI 21
C5
C6
C7
1 MW
8
SEL0
9
SEL1
VCCCI
XTO 20
12 MHz
C1
VCCP2I
AGNDP 18
10
19
MUTE/
Power
Down
+
11 AGNDC
C9
C8
VIN
L
VCCP1I
VOUT
VOUT
12
13
14
17
16
15
+
+
C10
C11
C12
LPF,
+
+
VINR
L
Amp
C2
+
VCOM
R
LPF,
Amp
S0265-02
NOTE: C1, C2: 10 µF
C3, C4, C7, C8: 1 µF (These capacitors must be less than 2 µF.)
C5, C6: 10 pF to 33 pF (depending on crystal resonator)
C9, C10, C11, C12: The capacitance may vary depending on design.
In this case, the analog performance of the A/D converter may be degraded.
Figure 39. PCM2906 Bus-Powered Configuration
Copyright © 2002–2007, Texas Instruments Incorporated
Submit Documentation Feedback
29
Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
APPLICATION INFORMATION
OPERATING ENVIRONMENT
For current information on the PCM2904/2906 operating environment, see the Updated Operating Environments
for PCM270X, PCM290X Applications application report, SLAA374.
30
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Copyright © 2002–2007, Texas Instruments Incorporated
Product Folder Link(s): PCM2904 PCM2906
PCM2904
PCM2906
www.ti.com
SLES042C–JUNE 2002–REVISED NOVEMBER 2007
REVISION HISTORY
Changes from Revision B (March 2007) to Revision C .................................................................................................. Page
Deleted operating environment information from data sheet and added reference to application report ........................... 30
•
Copyright © 2002–2007, Texas Instruments Incorporated
Submit Documentation Feedback
31
Product Folder Link(s): PCM2904 PCM2906
PACKAGE OPTION ADDENDUM
www.ti.com
20-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
PCM2904DB
ACTIVE
ACTIVE
SSOP
SSOP
DB
DB
28
28
47
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-25 to 85
-25 to 85
PCM2904
PCM2904
Samples
Samples
PCM2904DBR
2000 RoHS & Green
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
20-Jun-2023
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
PCM2904DBR
SSOP
DB
28
2000
330.0
17.4
8.5
10.8
2.4
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SSOP DB 28
SPQ
Length (mm) Width (mm) Height (mm)
336.6 336.6 28.6
PCM2904DBR
2000
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2023
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
DB SSOP
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
PCM2904DB
28
47
500
10.6
500
9.6
Pack Materials-Page 3
PACKAGE OUTLINE
DB0028A
SSOP - 2 mm max height
S
C
A
L
E
1
.
5
0
0
SMALL OUTLINE PACKAGE
C
8.2
7.4
TYP
A
0.1 C
SEATING
PIN 1 INDEX AREA
PLANE
26X 0.65
28
1
2X
10.5
9.9
8.45
NOTE 3
14
15
0.38
0.22
28X
0.15
C A B
5.6
5.0
B
NOTE 4
2 MAX
0.25
GAGE PLANE
(0.15) TYP
SEE DETAIL A
0.95
0.55
0.05 MIN
0 -8
A
15
DETAIL A
TYPICAL
4214853/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-150.
www.ti.com
EXAMPLE BOARD LAYOUT
DB0028A
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE
SYMM
28X (1.85)
(R0.05) TYP
28
1
28X (0.45)
26X (0.65)
SYMM
14
15
(7)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4214853/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DB0028A
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE
28X (1.85)
SYMM
(R0.05) TYP
28
1
28X (0.45)
26X (0.65)
SYMM
14
15
(7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4214853/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated
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