PTCAN1463DYYRQ1_技术文档

TCAN1463-Q1

ZHCSQV1C –MARCH 2020 –REVISED DECEMBER 2022

TCAN1463-Q1 具有睡眠模式的

汽车类信号改进CAN FD 收发器

1 特性

2 应用

• 符合面向汽车应用的AEC-Q100（1 级）标准

• 提供功能安全

• 车身电子装置和照明

• 汽车网关

• 高级驾驶辅助系统(ADAS)

• 信息娱乐系统与仪表组

• 混合动力、电动和动力总成系统

• 个人交通工具- 电动自行车

• 工业运输

– 可帮助进行功能安全系统设计的文档

• 符合ISO 11898-2:2016 的要求

• 实现信号改善功能(SIC)，在CiA 601-4 中定义

– 通过消除振铃和增强位对称性来积极改进总线信

号

• 支持高达8Mbps 的传统CAN 和CAN FD

• 宽工作输入电压范围

• V_IO电平转换支持：1.7V 至5.5V

• 工作模式：

– 正常模式

3 说明

TCAN1463-Q1 是一款高速控制器局域网 (CAN) 收发

器，满足 ISO 11898-2:2016 高速 CAN 规范的物理层

要求和 CiA 601-4 SIC 规范。该器件支持高达 8 兆位

每秒 (Mbps) 的传统 CAN 和 CAN FD（灵活数据速

率）数据速率。

– 静音模式

– 待机模式

– 低功耗睡眠模式

TCAN1463-Q1 可减少显性到隐性边沿的信号振铃，并

能在复杂的网络拓扑中实现更高的吞吐量。借助SIC，

应用能够在具有多个未端接存根的大型网络中以

2Mbps、5Mbps 或更高的速率运行，从而发挥 CAN

FD 的真正优势。当不使用 INH_MASK 功能

（INH_MASK 引脚悬空或连接到 GND）时，该器件与

传统 CAN FD 收发器（例如 TCAN1043A-Q1 或

TCAN1043-Q1）的引脚兼容。

• 高压INH 输出，用于系统电源控制

• INH_MASK 引脚可在虚假唤醒事件期间使INH 保

持禁用状态

• 支持通过WAKE 引脚实现本地唤醒

• 如果出现系统电源故障或软件故障，睡眠唤醒错误

(SWE) 计时器可将系统从待机模式安全转换为睡眠

模式。

– 支持长时间上电

封装信息

封装1

• 定义了未上电时的行为

– 总线和IO 终端为高阻抗（运行总线或应用上无

负载）

封装尺寸（标称值）

4.20mm x 2.00mm

8.65mm x 3.90mm

4.50mm x 3.00mm

器件型号

SOT (DYY)

TCAN1463-Q1

SOIC (D)

• 保护特性：

VSON (DMT)

– ±58V CAN 总线容错

– V_SUP上支持负载突降

1. 如需了解所有可用封装，请参阅数据表末尾的可订

购产品附录。

– IEC ESD 保护

– 欠压保护

– 热关断保护

3

k

EN

V_IN

22 nF

V_BAT

33

100 nF

k

– TXD 显性状态超时(TXD DTO)

• 采用具有可湿性侧面的14 引脚引线式（SOT 和

SOIC）封装以及无引线(VSON) 封装，从而提高自

动光学检测(AOI) 能力

100

k

V_REG

V_SUP

10

5

V

V_OUT

INH

WAKE

7

9

V_CC

3

V_IO

100 nF

V_IO

CANH

5

6

13

100 nF

V_DD

TCAN1463

EN

nSTB

nFAULT

GPIO

14

8

MCU

CANL

12

1

4

CAN FD

Controller

TXD

Optional:

Terminating

Node

RXD

Optional:

Filtering,

Transient and

ESD

2

11

INH_MASK

(leave floating or

connect to GND)

简化原理图

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLLSFE5

TCAN1463-Q1

ZHCSQV1C –MARCH 2020 –REVISED DECEMBER 2022

www.ti.com.cn

Table of Contents

8 Parameter Measurement Information..........................13

9 Detailed Description......................................................18

9.1 Overview...................................................................18

9.2 Functional Block Diagram.........................................20

9.3 Feature Description...................................................21

9.4 Device Functional Modes..........................................28

10 Application Information Disclaimer...........................40

10.1 Application Information........................................... 40

11 Device and Documentation Support..........................45

11.1 Documentation Support.......................................... 45

11.2 接收文档更新通知................................................... 45

11.3 支持资源..................................................................45

11.4 商标.........................................................................45

11.5 Electrostatic Discharge Caution..............................45

11.6 术语表..................................................................... 45

12 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 说明（续）.........................................................................2

6 Pin Configuration and Functions...................................3

7 Specifications.................................................................. 4

7.1 Absolute Maximum Ratings........................................ 4

7.2 ESD Ratings............................................................... 4

7.3 ESD Ratings - IEC Specifications...............................4

7.4 Recommended Operating Conditions.........................5

7.5 Thermal Information....................................................5

7.6 Power Dissipation Ratings..........................................5

7.7 Power Supply Characteristics.....................................6

7.8 Electrical Characteristics.............................................7

7.9 Timing Requirements..................................................9

7.10 Switching Characteristics........................................10

7.11 Typical Characteristics............................................ 12

Information.................................................................... 45

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision B (November 2022) to Revision C (December 2022)

Page

• 删除了封装信息表中D 封装的“产品预发布”说明...........................................................................................1

• Changed text From: "The CAN Transceiver blocks its transmitter and receiver" To: "The CAN transceiver

blocks its transmitter" in the CAN Active section.............................................................................................. 37

Changes from Revision A (July 2022) to Revision B (November 2022)

Page

• 删除了封装信息表中DYY 封装的“产品预发布”说明......................................................................................1

Changes from Revision * (March 2021) to Revision A (July 2022)

Page

• 将文档从预告信息更改为量产数据....................................................................................................................1

5 说明（续）

TCAN1463-Q1 可通过 INH 输出引脚选择性地启用系统上可能存在的各种电源，从而减少整个系统级别的电池电

流消耗。这使得在低电流睡眠模式中，功率传送到除TCAN1463-Q1 以外的所有系统元件，同时对CAN 总线进行

监控。检测到唤醒事件时，TCAN1463-Q1 通过将INH 驱动至高电平来启动系统。

TCAN1463-Q1 具有一个SWE 计时器，可在无操作4 分钟(t_INACTIVE) 后，从待机模式安全转换为睡眠模式。如果

MCU 出现故障，无法将器件转换为正常模式，这一特性也可以保证器件转换为低功耗的睡眠模式。

2

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6 Pin Configuration and Functions

TXD

1

2

3

4

5

6

7

14

13

12

11

10

9

nSTB

CANH

CANL

TXD

1

2

3

4

5

6

7

14

13

12

11

10

9

nSTB

GND

_VCCꢀ

GND

CANH

CANL

RXD

_VIOꢀ

INH_MASK

_VSUPꢀ

V_CC

RXD

V_IO

Thermal

Pad

INH_MASK

V_SUP

EN

WAKE

INH

8

nFAULT

EN

WAKE

nFAULT

INH

8

Not to scale

图6-1. D and DYY Packages, 14 Pin (SOIC)

and (SOT) (Top View)

Not to scale

图6-2. DMT Package, 14 Pin (VSON)

(Top View)

PINS

TYPE ⁽¹⁾

DESCRIPTION

NAME

NO.

1

TXD

GND

V_CC

I

GND

P

CAN transmit data input, integrated pull-up

2

Ground connection

3

5 V transceiver supply

RXD

V_IO

4

O

P

CAN receive data output, tri-state when V_IO< UV_IO

I/O supply voltage

5

EN

6

I

Enable input for mode control, integrated pull-down

Inhibit pin to control system voltage regulators and supplies, high-voltage

Fault output, inverted logic

INH

7

O

I

nFAULT

WAKE

V_SUP

8

9

Local WAKE input terminal, high voltage

High-voltage supply from battery

10

P

INH_MASK pin used to activate/deactivate INH functionality. Internal pull-down to GND. Can

be left floating or connected to GND if INH_MASK functionality is not needed. Do not

connect to power supply.

INH_MASK

11

I

CANL

12

13

14

I/O

I

Low-level CAN bus input/output line

CANH

High-level CAN bus input/output line

nSTB

Standby mode control input, integrated pull-down

Connect the thermal pad to the printed circuit board (PCB) ground plane for thermal relief

Thermal Pad

—

(1) I = input, O = output, P = power, GND = ground

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7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

–0.3

–58

-58

MAX

45

6

UNIT

V_SUP

V_CC

Supply voltage⁽²⁾

V

Supply voltage

V_IO

Supply voltage I/O level shifter

CAN bus I/O voltage (CANH, CANL)

CAN bus differential voltage (V_DIFF= V_CANH- V_CANL

6

V_BUS

V_DIFF

58

)

45 and V_I≤

V_SUP+0.3

V_WAKE

WAKE input voltage

INH pin voltage

V

–45

45 and V_O≤

V_INH

-0.3

V_SUP+0.3

V_LOGIC

I_O(LOGIC)

I_O(INH)

I_O(WAKE)

T_J

Logic pin voltage

6

8

V

–0.3

Logic pin output current

Inhibit pin output current

WAKE pin output current

Junction temperature

Storage temperature

mA

°C

6

3

165

150

–40

–65

T_STG

°C

(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute maximum ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If

briefly operating outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not

sustain damage, but it may not be fully functional. Operating the device in this manner may affect device reliability, functionality,

performance, and shorten the device lifetime.

(2) Able to support load dumps of up to 45 V for 300ms

7.2 ESD Ratings

VALUE

UNIT

V_SUP, CANH, CANL, and WAKE with

respect to ground. HBM ESD

classification level 3B

± 8000

V

Human body model (HBM), per AEC

Q100-002⁽¹⁾

V_ESDElectrostatic discharge

All pins except V_SUP, CANH, CANL, and

WAKE. HBM ESD classification level 3A

± 4000

± 750

V

Charged device model (CDM), per AEC

Q100-011

All pins. CDM ESD classification level C5

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 ESD Ratings - IEC Specifications

VALUE

UNIT

Unpowered Contact Discharge per ISO

10605 ⁽¹⁾

CANH, CANL, V_SUP, and WAKE terminal to

GND

V_ESDElectrostatic discharge

± 8000

V

SAE J2962-2 per ISO 10605

Powered Contact Discharge ⁽²⁾

V_ESDElectrostatic discharge

CANH and CANL terminal to GND

± 8000

V

SAE J2962-2 per ISO 10605

Powered Air discharge ⁽²⁾

± 15000

4

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VALUE

- 100

75

UNIT

Pulse 1

Pulse 2

Pulse 3a

Pulse 3b

V

Transient voltage per

CAN, V_SUP, WAKE terminal to GND

CAN terminal to GND

ISO-7637-2 ⁽¹⁾

- 150

100

V_TRAN

Direct coupling capacitor "slow transient

pulse" with 100 nF coupling capacitor -

powered

Transient voltage per

± 30

V

(2)

ISO-7637-3

(1) Results given here are specific to the IEC 62228-3 Integrated circuits –EMC evaluation of transceivers –Part 3: CAN transceivers.

Testing performed by IBEE Zwickau, EMC report available upon request.

(2) Results given here are specific to the SAE J2962-2 Communication Transceivers Qualification Requirements - CAN. Testing performed

by OEM-approved independent 3^rdparty, EMC report available upon request.

7.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

4.5

1.7

4.5

–2

NOM

MAX

40

UNIT

V

V_SUP

V_IO

Supply voltage

I/O supply voltage

5.5

V

V_CC

CAN transceiver supply voltage

Digital output high-level current

Digital output low-level current

Inhibit output current

V

I_OH(DO)

I_OL(DO)

I_O(INH)

T_J

mA

°C

2

4

Operating junction temperature

Thermal shutdown

-40

175

160

150

T_SDR

T_SDF

T_SD(HYS)

Thermal shutdown release

Thermal shutdown hysteresis

10

7.5 Thermal Information

TCAN1463-Q1

DMT (VSON)

UNIT

THERMAL METRIC ⁽¹⁾

D (SOIC)

DYY (SOT)

R_ΘJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

87.1

41.8

43.7

8.5

39.7

41.1

15.9

0.9

91.0

41.7

25.6

25.4

1.1

°C/W

R_ΘJC(top)

R_ΘJB

°C/W

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

Ψ_JT

43.3

N/A

15.9

6.6

Ψ_JB

R_ΘJC(bot)

N/A

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.6 Power Dissipation Ratings

POWER

DISSIPATION

PARAMETER

TEST CONDITIONS

UNIT

V_SUP= 14 V, V_CC= 5 V, V_IO= 5 V, T_J= 27°C, R_L= 60 Ω,

nSTB = 5 V, EN = 5 V, C_{L_RXD}= 15 pF. Typical CAN

operating conditions at 500 kbps with 25% transmission

(dominant) rate.

62

mW

P_D

Average power dissipation

V_SUP= 14 V, V_CC= 5.5 V, V_IO= 5.5 V, T_J= 150°C, R_L= 50

Ω, nSTB = 5.5 V, EN = 5.5 V, C_{L_RXD}= 15 pF. Typical high

load CAN operating conditions at 1 Mbps with 50%

transmission (dominant) rate and loaded network.

135

mW

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7.7 Power Supply Characteristics

Over recommended operating conditions with T_J= -40°C to 150°C, unless otherwise noted. All typical values are taken at

25°C, V_SUP= 12 V, V_IO= 3.3 V, V_CC= 5 V and R_L= 60 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Supply Voltage and Current Characteristics

Supply current

I_{SUP_NORMAL}

Normal mode, silent mode, and go-to-sleep mode

Standby mode ⁽²⁾

140

60

µA

CAN active

Supply current, Standby mode

I_{SUP_STBY}

I_{SUP_SLEEP}

I_{SUP_BIAS}

CAN autonomous: inactive

Supply current

Sleep mode

18

30

CAN autonomous: inactive

Supply current

5.5 V < V_SUP≤28 V ⁽¹⁾

See 图8-3

50

Additional current when in CAN autonomous: active

UV_SUP(R)

UV_SUP(F)

Undervoltage V_SUPthreshold rising

Undervoltage V_SUPthreshold falling

Ramp up

3.85

3.5

4.4

V

Ramp down

4.25

Normal mode

TXD = 0 V, R_L= 60 Ω, C_L= open

See 图8-3

Supply current

CAN active: dominant

60

70

110

5

mA

µA

Normal mode

TXD = 0 V, R_L= 50 Ω, C_L= open

See 图8-3

Supply current

CAN active: dominant

I_{CC_NORMAL}

Normal mode

TXD = 0 V, R_L= open, C_L= open, CANH = -25 V

See 图8-3

V_CCsupply current normal mode

Dominant with bus fault

Normal mode

TXD = 0 V, R_L= 50 Ω, C_L= open

See 图8-3

Supply current

CAN active: recessive

I_{CC_NORMAL}

Standby mode, T_J= -40 °C to 85 °C

EN = nSTB = 0 V

See 图8-3

Supply current

CAN autonomous: inactive

I_{CC_STBY}

2

Standby mode

EN = nSTB = 0 V

See 图8-3

Supply current

CAN autonomous: inactive

I_{CC_STBY}

5

µA

Silent and go-to-sleep mode

TXD = nSTB = V_IO, R_L= 50 Ω, C_L= open

See 图8-3

Supply current

I_{CC_SILENT}

2.5

2

mA

µA

Sleep mode, T_J= -40 °C to 85 °C

EN = 0 V or V_IO, nSTB = 0 V

See 图8-3

Supply current

CAN autonomous: inactive

I_{CC_SLEEP}

Sleep mode

EN = 0 V or V_IO, nSTB = 0 V

See 图8-3

Supply current

CAN autonomous: inactive

5

µA

UV_CC(R)

Undervoltage V_CCthreshold rising

Undervoltage V_CCthreshold falling

Hysteresis voltage on UV_CC

Ramp up

4.1

3.9

4.4

V

UV_CC(F)

Ramp down

3.5

50

V_HYS(UVCC)

250

320

350

mV

Normal mode

RXD floating, TXD = 0 V

I/O supply current

µA

I_{IO_NORMAL}

Normal mode, standby mode, or go-to-sleep mode

RXD floating, TXD = V_IO

5

Sleep mode, T_J= -40 °C to 85 °C

nSTB = 0 V

2.5

I_{IO_SLEEP}

Sleep mode

nSTB = 0 V

5

UV_IO(R)

Under voltage V_IOthreshold rising

Under voltage V_IOthreshold falling

Hysteresis voltage on UV_IO

Ramp up

1.4

1.25

60

1.65

V

UV_IO(F)

Ramp down

1

V_HYS(UVIO)

30

160

mV

(1) I_SUP(BIAS)is calculated by subtracting the supply current in CAN autonomous inactive mode from the total supply current in CAN

autonomous active mode

(2) After a valid wake-up, the CAN transceiver switches to CAN autonomous active mode and the I_SUP(BIAS)current needs to be added to

the specified I_SUPcurrent in CAN autonomous inactive mode.

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7.8 Electrical Characteristics

Over recommended operating conditions with T_J= –40°C to 150°C, unless otherwise noted. All typical values are taken at

25°C, V_SUP= 12 V, V_IO= 3.3 V, V_CC= 5 V and R_L= 60 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

CAN Driver Characteristics

CANH

CANL

2.75

0.5

4.5

V

TXD = 0 V, 50 ≤R_L≤65 Ω, C_L= open, R_CM

= open

See 图8-1 and 图8-4

Dominant output voltage

Bus biasing active

V_O(D)

2.25

TXD = V_IO, R_L= open (no load), R_CM= open

See 图8-1 and 图8-4

Recessive output voltage

Bus biasing active

V_O(R)

2

3

V

nSTB= V_IO, R_L= 60 Ω, C_SPLIT= 4.7 nF, C_L

=

Driver symmetry

Bus biasing active

(V_O(CANH)+ V_O(CANL)) / V_CC

Open, R_CM= Open, TXD = 250 kHz, 1 MHz,

2.5 MHz

V_SYM

0.9

1.1

V/V

See 图8-1 and 图8-4

DC Driver symmetry

Bus biasing active

nSTB= V_IO, R_L= 60 Ω, C_L= open

See 图8-1 and 图8-4

V_{SYM_DC}

400

3

mV

V

–400

1.5

V

_CC–V_O(CANH)–V_O(CANL)

nSTB =V_IO, TXD = 0 V, 50 Ω ≤R_L≤65 Ω, C_L

= open

See 图8-1 and 图8-4

CANH - CANL

Differential output voltage

Bus biasing active

Dominant

nSTB =V_IO, TXD = 0 V, 45 Ω ≤R_L≤70 Ω,

CL = open

See 图8-1 and 图8-4

V_OD(DOM)

1.4

3.3

5

V

nSTB =V_IO, TXD = 0 V, R_L= 2240 Ω, C_L

open

See 图8-1 and 图8-4

=

1.5

V

Differential output voltage

Bus biasing active

Recessive

nSTB =V_IO, TXD = V_IO, R_L= open Ω, C_L

open

See 图8-1 and 图8-4

V_OD(REC)

50

mV

–50

nSTB =0 V, TXD = V_IO, R_L= open (no load),

C_L= open

See 图8-1 and 图8-4

CANH

-0.1

0.1

V

Differential output voltage

Bus biasing inactive

Recessive

nSTB =0 V, TXD = V_IO, R_L= open (no load),

C_L= open

See 图8-1 and 图8-4

V_OD(STB)

CANL

-0.1

-0.2

0.1

0.2

V

nSTB =0 V, TXD = V_IO, R_L= open (no load),

C_L= open

CANH - CANL

V

See 图8-1 and 图8-4

nSTB = V_IO, TXD = 0 V

-15 V ≤V_(CANH)≤40 V

See 图8-1 and 图8-8

mA

–100

Short-circuit steady-state output current

Bus biasing active

Dominant

I_OS(DOM)

nSTB = V_IO,TXD = 0 V

-15 V ≤V_(CANL)≤40 V

See 图8-1 and 图8-8

100

3

nSTB = V_IO, V_BUS= CANH = CANL

-27 V ≤V_BUS≤42 V

Short-circuit steady-state output current

Bus biasing active

I_OS(REC)

–3

Recessive

See 图8-1 and 图8-8

R_ID(dom)

Differential input resistance in dominant phase

40

60

ohm

See 图9-2

Differential input resistance in active recessive

drive phase

R_{ID(active_rec)}

CAN Receiver Characteristics

Receiver dominant state input voltage range

Bus biasing active

V_IT(DOM)

V_IT(REC)

0.9

-3

8

V

nSTB = V_IO, -12 V ≤V_CM≤12 V

See 图8-5 and 表9-6

Receiver recessive state input voltage range

Bus biasing active

0.5

nSTB = V_IO

See 图8-5 and 表9-6

Hysteresis voltage for input threshold

Bus biasing active

V_HYS

135

mV

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7.8 Electrical Characteristics (continued)

Over recommended operating conditions with T_J= –40°C to 150°C, unless otherwise noted. All typical values are taken at

25°C, V_SUP= 12 V, V_IO= 3.3 V, V_CC= 5 V and R_L= 60 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Receiver dominant state input voltage range

Bus biasing inactive

V_DIFF(DOM)

V_DIFF(REC)

1.150

8

V

nSTB = 0 V, -12 V ≤V_CM≤12 V

See 图8-5 and 表9-6

Receiver recessive state input voltage range

Bus biasing inactive

-3

0.4

nSTB = V_IO

V_CM

Common mode range

12

V

See 图8-5 and 表9-6

–12

Power-off (unpowered) bus input leakage

current

I_OFF(LKG)

C_I

V_SUP= 0 V, CANH = CANL = 5 V

2.5

40

µA

pF

Input capacitance to ground (CANH or CANL)

TXD = V_CC= V_IO

(1)

C_ID

R_ID

R_IN

Differential input capacitance ⁽¹⁾

Differential input resistance

20

100

50

pF

kΩ

30

15

TXD = V_CC= V_IO= 5 V, nSTB = 5 V

-12 V ≤V_CM≤12 V

Input resistance (CANH or CANL)

Input resistance matching:

[1 –R_IN(CANH)/ R_IN(CANL)] × 100%

R_IN(M)

R_CBF

V_(CANH)= V_(CANL)= 5 V

R_CM= R_L, C_L= open

3

%

–3

Valid differential load impedance range for bus

fault circuitry

45

70

Ω

TXD Characteristics

V_IH

High-level input voltage

0.7

V_IO

µA

V_IL

Low-level input voltage

0.3

1

I_IH

High-level input leakage current

Low-level input leakage current

Unpowered leakage current

Pull-up resistance to V_IO

Input Capacitance

TXD = V_IO= 5.5 V

–2.5

–115

–1

I_IL

TXD = 0 V, V_IO= 5.5 V

TXD = 5.5 V, V_SUP= V_IO= 0 V

–2.5

1

I_LKG(OFF)

R_PU

C_I

40

60

5

80

kΩ

V_IN= 0.4 x sin(2 × π× 2 × 10⁶× t) + 2.5 V

pF

RXD Characteristics

I_O= –2 mA

See 图8-5

V_OH

High-level output voltage

0.8

V_IO

I_O= 2 mA

See 图8-5

V_OL

Low-level output voltage

0.2

1

V_IO

µA

I_LKG(OFF)

Unpowered leakage current

RXD = 5.5 V, V_SUP= V_IO= 0 V

-1

nSTB Characteristics

V_IH

High-level input voltage

0.7

V_IO

µA

V_IL

Low-level input voltage

0.3

115

1

I_IH

High-level input leakage current

Low-level input leakage current

Unpowered leakage current

Pull-down resistance to GND

nSTB = V_IO= 5.5 V

0.5

–1

40

I_IL

nSTB = 0 V, V_IO= 5.5 V

nSTB = 5.5 V, V_IO= 0 V

I_LKG(OFF)

R_PD

1

60

80

kΩ

nFAULT Characteristics

V_OH

High-level output voltage

I_O= -2 mA

0.8

–1

0.7

V_IO

µA

V_OL

Low-level output voltage

I_O= 2 mA

0.2

1

I_LKG(OFF)

Unpowered leakage current

nFAULT = 5.5 V, V_IO= 0 V

INH_MASK Characteristics

V_IH

High-level input voltage

V_IO

µA

kΩ

V_IL

Low-level input voltage

0.3

115

1

I_IH

High-level input leakage current

Low-level input leakage current

Unpowered leakage current

Pull-down resistance to GND ⁽¹⁾

INH_MASK = V_CC= V_IO= 5.5 V

INH_MASK = 0 V, V_CC= V_IO= 5.5 V

INH_MASK = 5.5 V, V_CC= V_IO= 0 V

0.5

-1

I_IL

I_LKG(OFF)

R_PD

-1

1

40

60

80

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7.8 Electrical Characteristics (continued)

Over recommended operating conditions with T_J= –40°C to 150°C, unless otherwise noted. All typical values are taken at

25°C, V_SUP= 12 V, V_IO= 3.3 V, V_CC= 5 V and R_L= 60 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

EN Characteristics

V_IH

High-level input voltage

0.7

V_IO

V_IL

Low-level input voltage

0.3

115

1

V_IO

µA

kΩ

I_IH

High-level input leakage current

Low-level input leakage current

Unpowered leakage current

Pull-down resistance to GND

EN = V_CC= V_IO= 5.5 V

0.5

-1

I_IL

EN = 0 V, V_CC= V_IO= 5.5 V

EN = 5.5 V, V_CC= V_IO= 0 V

I_LKG(OFF)

R_PD

WAKE Characteristics

-1

1

40

60

80

V_IH

V_IL

I_IH

High-level input voltage

V_SUP- 2

V

Sleep mode

Low-level input voltage

V_SUP- 3.5

High-level input leakage current

Low-level input leakage current

-3

µA

WAKE = V_SUP–1 V

I_IL

WAKE = 1 V

3

INH Characteristics

High-level voltage drop from V_SUPto INH

(V_SUP- V_INH

0.5

4

1

V

ΔV_H

I_INH= –6 mA

)

I_LKG(INH)

R_PD

Sleep mode leakage current

Pull-down resistance

INH = 0 V

0.5

5.6

µA

–0.5

Sleep mode

2.5

MΩ

(1) Specified by design and verified via bench characterization

7.9 Timing Requirements

Over recommended operating conditions with T_J= -40°C to 150°C, unless otherwise noted. All typical values are taken at

25°C, V_SUP= 12 V, V_IO= 3.3 V, V_CC= 5 V and R_L= 60 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Supply Characteristics

Time required for INH active after V_SUP

UV_SUP(R)

≥

t_PWRUP

340

µs

ms

µs

See 图8-12

_CC≤UV_CCor V_IO≤UV_IO

(1)

t_UV

Undervoltage filter time V_CCand V_IO

100

350

200

V

Time for device to return to normal operation from

a UV_CCor UV_IOundervoltage event

t_{UV(RE-ENABLE)}

Re-enable time after undervoltage event ⁽¹⁾

Device Characteristics

Total loop delay, driver input (TXD) to receiver

output (RXD) Recessive to dominant

R_L= 60 Ω, C_L= 100 pF, C_L(RXD)= 15 pF

See 图8-6

t_PROP(LOOP1)

100

110

190

ns

Total loop delay, driver input (TXD) to receiver

output (RXD) Dominant to recessive

R_L= 60 Ω, C_L= 100 pF, C_L(RXD)= 15 pF

See 图8-6

t_PROP(LOOP2)

t_WK(TIMEOUT)

t_WK(FILTER)

190

2

ns

ms

µs

Bus wake-up timeout value ⁽¹⁾

0.8

0.5

Bus time to meet filtered bus requirements for

wake-up request ⁽¹⁾

1.8

Timer is reset and restarted, when bus changes

from dominant to recessive or vice versa

t_SILENCE

t_INACTIVE

Timeout for bus inactivity ⁽¹⁾

0.6

3

1.2

5

s

Standby mode hardware timer for power-up inactivity

Measured from the start of a

4

min

dominant-recessive-dominant

Bus bias

nSTB = EN = 0 V, R_L= 60 Ω, C_SPLIT= 4.7 nF

See 图8-9 and 图10-3

t_BIAS

200

µs

reaction time ⁽¹⁾sequence (each phase 6 μs)

until V_SYM≥0.1

45 ≤R_CM≤70 Ω

C_L= open

t_CBF

Bus fault-detection time

2.5

5

µs

Hold time for which WAKE pin voltage should be stable after the rising or falling edge on WAKE pin to

recognize LWU

t_{WAKE_HT}

50

Mode Change Characteristics

t_{INH_SLP_STB}

Time after WUP or LWU event until INH asserted ⁽¹⁾

100

µs

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7.9 Timing Requirements (continued)

Over recommended operating conditions with T_J= -40°C to 150°C, unless otherwise noted. All typical values are taken at

25°C, V_SUP= 12 V, V_IO= 3.3 V, V_CC= 5 V and R_L= 60 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Hold time for which INH_MASK should be stable after the rising or falling edge to enable/disable

INH_MASK function

t_{INH_MASK}

50

µs

See 图8-10 and 图8-11

Mode change time from leaving the Sleep mode to Time measured from VCC and VIO crossing UV

t_MODE1

20

µs

entering Normal or Silent mode ⁽¹⁾

thresholds to entering normal or silent mode.

Mode change time between normal, silent and

t_MODE2

10

50

µs

standby mode and from sleep to standby mode ⁽¹⁾standby mode and from sleep to standby mode

Minimum hold time for transition to sleep mode ⁽¹⁾EN = H and nSTB = L

t_GOTOSLEEP

20

(1) Specified by design and verified via bench characterization

7.10 Switching Characteristics

Over recommended operating conditions with T_J= -40°C to 150°C, unless otherwise noted. All typical values are taken at

25°C, V_SUP= 12 V, V_IO= 3.3 V, V_CC= 5 V and R_L= 60 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Driver Characteristics

t_prop(TxD-

Propagation delay time, high-to-low TXD edge to bus

dominant (recessive to dominant)

80

ns

busdom)

R_L= 60 Ω, C_L= 100 pF, R_CM= open

See 图8-4

t_prop(TxD-

Propagation delay time, low-to-high TXD edge to bus

recessive (dominant to recessive)

busrec)

t_sk(p)

t_R

Pulse skew (|t_{prop(TxD-busdom)}- t_{prop(TxD-busrec)}|)

Differential output signal rise time

3

25

ns

R_L= 60 Ω, C_L= 100 pF, R_CM= open

See 图8-4

t_F

Differential output signal fall time

TXD = 0 V, R_L= 60 Ω, C_L= open

See 图8-7

t_TXDDTO

Dominant timeout

1.2

3.8

ms

Receiver Characteristics

t_prop(busdom-

Propagation delay time, bus dominant input to RxD low

output

110

ns

RxD)

C_L(RXD)= 15 pF

See 图8-5

t_prop(busrec-

Propagation delay time, bus to recessive input to RXD

high output

RxD)

t_R

t_F

Output signal rise time (RXD)

Output signal fall time (RXD)

3

ns

C_L(RXD)= 15 pF

See 图8-5

R_L= 60 Ω, C_L= open

See 图8-5

t_BUSDOM

Dominant time out

1.4

3.8

ms

CAN FD Characteristics

Bit time on CAN bus output pins with t_BIT(TXD)= 500 ns

490

190

115

510

210

135

520

210

135

15

ns

(1)

t_BIT(BUS)

Bit time on CAN bus output pins with t_BIT(TXD)= 200 ns

Bit time on CAN bus output pins with t_BIT(TXD)= 125 ns⁽²⁾

Bit time on RXD output pins with t_BIT(TXD)= 500 ns

Bit time on RXD output pins with t_BIT(TXD)= 200 ns

Bit time on RXD output pins with t_BIT(TXD)= 125 ns⁽²⁾

Receiver timing symmetry with t_BIT(TXD)= 500 ns

Receiver timing symmetry with t_BIT(TXD)= 200 ns

Receiver timing symmetry with t_BIT(TXD)= 125 ns⁽²⁾

470

170

95

R_L= 60 Ω, C_L1= open, C_L2= 100 pF,

C_L(RXD)= 15

Δt_REC= t_BIT(RXD)- t_BIT(BUS)

See 图8-6

(1)

t_BIT(RXD)

–20

(1)

15

Δt_REC

15

Signal Improvement Characteristics

Time from rising edge of the TxD

signal to the end of the signal

improvement phase

t_{SIC_TX_base}

Signal improvement time TX-based

530

10

ns

Bus recessive bit length variation

relative to TxD bit length, see 图8-6

Δt_Bit(Bus)= t_Bit(Bus)- t_Bit(TxD)

Transmitted bit width variation

Δt_Bit(Bus)

–10

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7.10 Switching Characteristics (continued)

Over recommended operating conditions with T_J= -40°C to 150°C, unless otherwise noted. All typical values are taken at

25°C, V_SUP= 12 V, V_IO= 3.3 V, V_CC= 5 V and R_L= 60 Ω

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RxD recessive bit length variation

relative to TXD bit length, see 图8-6

Δt_Bit(RxD)= t_Bit(RxD)- t_Bit(TxD)

Received bit width variation

20

ns

Δt_BIT(RxD)

–30

RXD recessive bit length variation

relative to bus bit length, see 图8-6

Δt_REC= t_Bit(RxD)- t_Bit(Bus)

Receiver timing symmetry

15

ns

Δt_REC

–20

(1) The input signal on TXD shall have rise times and fall times (10% to 90%) of less than 10 ns

(2) Specified by design and verified via bench characterization

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7.11 Typical Characteristics

3.5

3

2.5

2.25

2

V_CC= 4.5 V

V_CC= 5 V

V_CC= 5.5 V

2.5

2

1.75

1.5

1.25

1

1.5

1

0.5

0

-40 -20

0

20

40

60

80 100 120 140 160

-40 -20

0

20

40

60

80 100 120 140 160

Junction Temperature (C)

C_L= Open

R_CM= Open

R_L= 60 Ω

C_L= Open

R_CM= Open

R_L= 60 Ω

V_CC= 5 V

V_IO= 3.3 V

图7-2. I_CCRecessive vs Temperature

图7-1. V_OD(DOM)vs Temperature and V_CC

150

145

140

135

130

125

120

115

110

105

100

95

35

30

25

20

15

10

V_IO= 1.7 V

V_IO= 3.3 V

V_IO= 5.5 V

V_SUP= 4.5 V

V_SUP= 7 V

V_SUP= 12 V

V_SUP= 18 V

V_SUP= 28 V

V_SUP= 40 V

90

-40 -20

0

20

40

60

80 100 120 140 160

Junction Temperature (C)

-40 -20

0

20

40

60

80 100 120 140 160

Junction Temperature (C)

C_L= 100 pF

C_L(RXD)= 15 pF

R_L= 60 Ω

V_CC= 5 V

V_SUP= 12 V

C_L= Open

V_IO= 3.3 V

R_CM= Open

R_L= 60 Ω

V_CC= 5 V

图7-4. Loop Propagation Delay vs V_IOand Temperature

图7-3. I_SUPin Sleep Mode vs V_SUPand Temperature

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8 Parameter Measurement Information

CANH

2.5 V

RXD

Bias

Unit

GND

CANL

图8-1. Common-Mode Bias Unit and Receiver

CANH

R_L/2

TXD

C_L2

C_L1

CANL

nSTB

RXD

C_L(RXD)

图8-2. Test Circuit

CANH

TXD

R_L

C_L

CANL

图8-3. Supply Test Circuit

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R_CM

CANH

V_IO

70%

TXD

30%

TXD

R_L

C_L

V_OD

V_CM

0V

T_{prop(TXD-busdom)}

T_{prop(TXD-busrec)}

V_O(CANH)

90%

10%

CANL

R_CM

0.9V

V_O(CANL)

V_OD

0.5V

t_R

t_F

图8-4. Driver Test Circuit and Measurement

CANH

0.9V

V_ID

I_O

0.5V

RXD

0V

V_ID

t_{prop(busdom-RXD)}

t_{prop(busrec-RXD)}

V_OH

V_O

C_{L_RXD}

CANL

90%

10%

70%

V_O(RXD)

30%

V_OL

t_F

t_R

图8-5. Receiver Test Circuit and Measurement

TXD

V_I

70%

t_PROP(LOOP1)

30%

CANH

CANL

0V

TXD

5 x t_BIT(TXD)

t_BIT(TXD)

V_I

R_L

C_L

t_BIT(BUS)

900mV

500mV

RXD

V_DIFF

V_O

C_{L_RXD}

RXD

V_OH

70%

30%

t_BIT(RXD)

V_OL

t_PROP(LOOP2)

图8-6. Transmitter and Receiver Timing Behavior Test Circuit and Measurement

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V_IH

0V

CANH

TXD

R_L

C_L

V_OD

V_OD(D)

CANL

0.9V

V_OD

0.5V

0V

t_TXDDTO

图8-7. TXD Dominant Time Out Test Circuit and Measurement

200

s

I_OS

CANH

TXD

V_BUS

I_OS

V_CANH

,

V_CANL

CANL

V_BUS

0V

or

0V

V_CANH

,

V_CANL

V_BUS

图8-8. Driver Short-Circuit Current Test and Measurement

V_DIFF

2.0 V

1.15 V

0.4 V

t > t_{WK_FILTER(MAX)}

V_SYM

0.1

t_BIAS

图8-9. Bias Reaction Time Measurement

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Device in Silent Mode

V_IH

0.7 V_IO

INH_MASK

nFAULT¹

0 V

t > t_{INH_MASK}

1

INH

t_{INH_SLP_STB}

INH Enabled

INH Disabled

1. nFAULT clears upon exiting silent mode

图8-10. INH Disable Timing Diagram

Device in Silent Mode

V_IH

INH_MASK

nFAULT¹

0.3 V_IO

0 V

t > t_{INH_MASK}

1

INH

t_{INH_SLP_STB}

INH Disabled

INH Enabled

1. nFAULT clears upon exiting silent mode

图8-11. INH Enable Timing Diagram

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V_SUP

UV_SUP(R)

V_SUP

INH

V_SUP

0V

V_O

C_VSUP

t_PWRUP

TCAN1463

INH = H

V_SUP-1V

INH

图8-12. Power-Up Timing

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9 Detailed Description

9.1 Overview

The TCAN1463-Q1 is a high-speed Controller Area Network (CAN) transceiver that meets the physical layer

requirements of the ISO 11898-2:2016 and CiA 601-4 high speed CAN specifications. The TCAN1463-Q1 is

data rate agnostic making it backward compatible for supporting classical CAN applications while also

supporting CAN FD networks up to 8 megabits per second (Mbps).

The transceiver has three separate supply inputs, V_SUP, V_CC, and V_IO. By using V_IO, the TCAN1463-Q1 can

interface directly to a 1.8 V, 2.5 V, 3.3 V, or 5 V controller without the need for a level shifter. The TCAN1463-Q1

allows for system-level reductions in battery current consumption by selectively enabling the various power

supplies that may be present in the system via the INH output pin. This enables a low-current sleep state in

which power is gated to all system components except for the TCAN1463-Q1, which remains in a low-power

state while monitoring the CAN bus. When a wake-up pattern is detected on the bus or when a local wake up is

requested via the WAKE input, the device initiates node start-up by driving INH high.

The TCAN1463-Q1 includes many protection and diagnostic features including undervoltage detection, CAN bus

fault detection, SWE timer, battery connection detection, thermal shutdown (TSD), driver dominant timeout (TXD

DTO), and bus fault protection up to ±58 V.

9.1.1 Signal Improvement

The TCAN1463-Q1 includes the Signal Improvement Capability (SIC) that enhances the maximum data rate

achievable in complex star topologies by minimizing signal ringing. Signal ringing is the result of reflections

caused by impedance mismatch at various points in a complex CAN network.

An example of a star network is shown 图9-1.

ECU 1

(terminated)

ECU 5

ECU 4

ECU 6

ECU 2

ECU 8

(terminated)

ECU 7

ECU 3

图9-1. CAN network: Star Topology

Recessive-to-dominant signal edge is usually clean as it’s strongly driven by the transmitter. Transmitter output

impedance of CAN transceiver is R_ID(dom)and matches to the network characteristic impedance. For a regular

CAN FD transceiver, dominant-to-recessive edge is when the driver output impedance goes to ~60 kΩ and

signal reflected back experiences impedance mismatch which causes ringing. The TCAN1463-Q1 resolves this

issue by TX-based Signal improvement capability (SIC). The TCAN1463-Q1 continues to drive the bus recessive

strongly till t_{SIC_TX_base}to minimize the reflections and the recessive bit is clean at the sampling point. In the

active recessive phase, transmitter output impedance is low (R_{ID(active_rec)}). After this phase, the device enters

into a passive recessive phase where the driver goes into high impedance state. This phenomenon is explained

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using 图 9-2. For further information, please refer to the white paper on how SIC unlocks the real potential of

CAN-FD transceivers.

TXD

V_I

70%

30%

0 V

t_{prop(TXD-busrec)}

t_{prop(TXD-busdom)}

900 mV

500 mV

V_DIFF

~ 60 k

R_ID~ 60 k

Recessive

R_ID

Recessive

t_{SIC_TX_base}

R_{ID(active_rec)}

R_ID(dom)

Dominant

Active

Recessive

图9-2. TX based Signal Improvement Capability

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9.2 Functional Block Diagram

V_CC

V_IO

V_SUP

10

V_LDO

3

5

V_CC

V_IO

1

7

DOMINANT

TIME OUT

TXD

V_SUP

13

12

CANH

CANL

INH

*1

V_SUP

SIC

Driver

9

WAKE

nSTB

WAKE

14

EN

CONTROL and MODE

LOGIC

6

8

OVER

TEMP

nFAULT

INH_MASK

11

High Speed Receiver

UNDER

VOLTAGE

V_IO

4

RXD

Logic Output

MUX

Low Power Receiver

WUP

Detect

2

GND

1. A pull-down resistor of 4 MΩ(typical) is activated on INH pin when the device is in Sleep mode.

图9-3. TCAN1463-Q1 Functional Block Diagram

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9.3 Feature Description

9.3.1 Supply Pins

The TCAN1463-Q1 implements three independent supply inputs for regulating different portions of the device.

9.3.1.1 V_SUPPin

This pin is connected to the battery supply. It provides the supply to the internal regulators that support the digital

core and the low power CAN receiver.

9.3.1.2 V_CCPin

This pin provides the 5 V supply voltage for the CAN transceiver.

9.3.1.3 V_IOPin

This pin provides the digital I/O voltage to match the CAN FD controller's I/O voltage. It supports I/O voltages

from 1.7 V to 5.5 V providing a wide range of controller support.

9.3.2 Digital Inputs and Outputs

9.3.2.1 TXD Pin

TXD is a logic-level input signal, referenced to V_IO, from a CAN FD controller to the TCAN1463-Q1. TXD is

biased to the V_IOlevel to force a recessive input in case the pin floats.

9.3.2.2 RXD Pin

RXD is a logic-level signal output, referenced to V_IO, from the TCAN1463-Q1 to a CAN FD controller. The RXD

pin is driven to the V_IOlevel as logic-high outputs once a valid V_IOis present.

When a power-on or wake-up event takes place, the RXD pin is pulled low.

9.3.2.3 nFAULT Pin

nFAULT is a logic-level output signal, referenced to V_IO, from the TCAN1463-Q1 to a CAN FD controller. The

nFAULT output is driven to the V_IOlevel as logic-high output.

The nFAULT output is used to transmit the TCAN1463-Q1 status indicator flags to the CAN FD controller. Please

see 表 9-1 for the specific fault scenarios that are indicated externally via the nFAULT pin. The TCAN1463-Q1

puts the nFAULT pin in the high-impedance state in the Sleep mode to conserve power because there are no

fault scenarios that are indicated externally in the Sleep mode.

9.3.2.4 EN Pin

EN is a logic-level input signal, referenced to V_IO, from a CAN FD controller to the TCAN1463-Q1. The EN input

pin is for mode selection in conjunction with the nSTB pin. EN is internally pulled low to prevent excessive

system power and false wake-up events.

9.3.2.5 nSTB Pin

nSTB is a logic-level input signal, referenced to V_IO, from a CAN FD controller to the TCAN1463-Q1. The nSTB

input pin is for mode selection in conjunction with the EN pin. nSTB is internally pulled low to prevent excessive

system power and false wake-up events.

9.3.2.6 INH_MASK Pin

INH_MASK is a logic-level input signal, referenced to V_IO, from a CAN FD controller to the TCAN1463-Q1. The

INH_MASK input pin can be used to disable and enable the INH function when in Silent mode. This feature can

be used to control the power supply to any power-intensive system blocks to avoid powering up the system

blocks from low-power mode due to spurious wake-up events. INH_MASK function should not be used if the INH

is used to control the power supply to the transceiver or the controller behind the transceiver - using INH_MASK

in such a scenario would prevent the device from entering silent mode and enabling the INH function. See 图

10-2 for an example application schematic for using INH_MASK function.

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INH_MASK has a pull-down resistor that forces the INH feature to the enable state upon a cold start. To activate

INH_MASK, the transceiver must be in silent mode. Once in silent mode, the INH_MASK pin is pulled high for t >

t_{INH_MASK}, disabling INH. The TCAN1463-Q1 latches this value and retains it through V_CCand V_IOpower cycles

and state transitions. The latched value is lost if the TCAN1463-Q1 enters an undervoltage fault on V_SUP. To

enable INH function again, the transceiver must be in Silent mode, and the INH_MASK pin must be pulled low

for t > t_{INH_MASK}. See 图8-10 and 图8-11 for the procedure to use the INH_MASK feature.

The TCAN1463-Q1 reports a change in state of INH_MASK to the system controller by the driving nFAULT low

while in silent mode. To use nFAULT=low as an acknowledgment for the change in state of INH_MASK , nFAULT

must be high (that is, no pre-existing faults) before initiating the change in state of INH_MASK. A mode transition

into normal, standby, go-to-sleep, or sleep mode clears the nFAULT pin.

9.3.3 GND

GND is the ground pin of the transceiver, it must be connected to the PCB ground.

9.3.4 INH Pin

The INH pin is a high-voltage output. It can be used to control external regulators. These regulators are usually

used to support the microprocessor and V_IOpin. The INH function is on in all modes except for sleep mode. In

sleep mode, the INH pin is turned off, going into a high-impedance state. This allows the node to be placed into

the lowest power state while in sleep mode. A 100 kΩ load can be added to the INH output for a fast transition

time from the driven high state to the low state and to force the pin low when left floating.

This terminal should be considered a high-voltage logic terminal, not a power output. The INH pin should be

used to drive the EN terminal of the system’s power management device and should not be used as a switch

for the power management supply itself. This terminal is not reverse-battery protected and thus should not be

connected outside the system module.

The INH function can be disabled/enabled using the INH_MASK pin in Silent mode. Refer to INH_MASK Pin for

details.

9.3.5 WAKE Pin

The WAKE pin is a high-voltage reverse-blocked input used for the local wake-up (LWU) function. The WAKE pin

is bi-directional edge-triggered and recognizes a local wake-up (LWU) on either a rising or falling edge of WAKE

pin transition. The LWU function is explained further in the Local Wake-Up (LWU) via WAKE Input Terminal

section.

9.3.6 CAN Bus Pins

These are the CAN high and CAN low, CANH and CANL, differential bus pins. These pins are internally

connected to the CAN transceiver and the low-voltage wake receiver.

9.3.7 Faults

9.3.7.1 Internal and External Fault Indicators

The following device status indicator flags are implemented to allow for the MCU to determine the status of the

device and the system. In addition to faults, the nFAULT terminal also signals wake-up requests and a “cold”

power-up sequence on the V_SUPbattery terminal so the system can do any diagnostics or cold booting sequence

necessary. The RXD terminal indicates wake-up request and the faults are multiplexed (ORed) to the nFAULT

output.

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表9-1. TCAN1463-Q1 Transceiver Status Indicator

EVENT

FLAG NAME

CAUSE

INDICATORS⁽¹⁾

FLAG IS CLEARED

COMMENT

nFAULT = low upon entering

silent mode from standby or

sleep mode

A cold start condition generates

a local wake-up WAKERQ,

WAKESR and a PWRON flag.

Power up on V_SUPand any return of V_SUP

after it has been below UV_SUP

After a transition to normal

mode

Power-up

PWRON

Wake-up request may only be

set from standby, go-to-sleep, or

sleep mode.

Resets timers for UV_VCCor

UV_VIO.

After a transition to normal

mode

or V_CC< UV_CC(F)

nFAULT = RXD = low after

wake-up upon entering

standby mode

Wake-up Request

WAKERQ ⁽²⁾

or V_IO< UV_IO(F)for t ≥t_UV

Available upon entering

normal mode⁽⁴⁾

nFAULT = low indicates a

local wake-up event from the

WAKE pin

nFAULT = high indicates a

remote wake-up event from

the CAN bus

Wake-up event on CAN bus, state

transition on WAKE pin, or initial power up

After four recessive-to-

dominant edges on TXD in

normal mode,

leaving normal mode,

or V_CC< UV_CC(F)

A cold start condition generates

a local wake-up WAKERQ,

WAKESR and a PWRON flag.

Wake-up Source

Recognition⁽³⁾

WAKESR

or V_IO< UV_IO(F)for t ≥t_UV

To use nFAULT as the flag

A mode transition into normal, indicator, nFAULT must be high

INH_MASK

Change

nFAULT = low after entering

silent mode

INHMASK

INH_MASK value changed

standby, go-to-sleep, or sleep

modes

before initiating change in state

of INH_MASK (e.g. there should

be no pre-existing faults)

V_CC> UV_CC(R),

or a wake-up request occurs

UV_CC

UV_IO

V_CC< UV_CC(F)

V_IO< UV_IO(F)

Not externally indicated

V_IO> UV_IO(R),

or a wake-up request occurs

Undervoltage

A V_SUPundervoltage event

generates a cold start condition

once V_SUP> UV_SUP(R)

UV_SUP

V_SUP< UV_SUP(F)

Not externally indicated

V_SUP> UV_SUP(R)

Upon leaving normal mode,

or if no CAN bus fault is

nFAULT = low in normal mode detected for four consecutive

CAN bus fault must persist for

four consecutive dominant-to-

recessive transitions

CAN Bus Fault

CBF

See CAN Bus Fault

only⁽⁵⁾

dominant-to-recessive

transitions of the TXD pin while

in normal mode

CAN driver remains disabled

until the TXDCLP is cleared.

CAN receiver remains active

during the TXDCLP fault

TXD low when CAN active mode is

entered

TXDCLP

TXDDTO

RXD = low & TXD = high,

TXD = high &

a mode transition into normal,

standby, go-to-sleep, or sleep

modes

TXD dominant time out, dominant (low)

signal for t ≥t_TXDDTO

CAN driver remains disabled

until the TXDDTO is cleared.

CAN receiver remains active

during the TXDDTO fault

CAN driver remains disabled

until the TXDRXD is cleared.

CAN receiver remains active

during the TXDRXD fault

TXD and RXD pins are shorted together

for t ≥t_TXDDTO

nFAULT = low upon entering

silent mode from normal

mode

TXDRXD

CANDOM

Local Faults

RXD = high,

CAN bus dominant fault, when dominant

bus signal received for t ≥t_BUSDOM

or a transition into normal,

standby, go-to-sleep, or sleep

modes

CAN driver remains enabled

during CANDOM fault

T_J< T_SDFand

RXD = low & TXD = high,

or transition into normal,

standby, go-to-sleep, or sleep

modes

CAN driver remains disabled

until the TSD event is cleared

TSD

Thermal shutdown, T_J≥T_SDR

(1) V_IOand V_SUPare present

(2) Transitions to go-to-sleep mode is blocked until WAKERQ flag is cleared

(3) Wake-up source recognition reflects the first wake up source. If additional wake-up events occur the source still indicates the original

wake-up source

(4) Indicator is only available in normal mode until the flag is cleared

(5) CAN Bus failure flag is indicated after four dominant-to-recessive edges on TXD

9.3.7.1.1 Power-Up (PWRON Flag)

This is an internal and external flag that can be used to control the power-up sequence of the system. When a

new battery connection to the transceiver is made the PWRON flag is set signifying a cold start condition. The

TCAN1463-Q1 treats any undervoltage conditions on the V_SUP, V_SUP< UV_SUP(F), as a cold start. Therefore,

when the V_SUP> UV_SUP(R)condition is met the TCAN1463-Q1 sets the PWRON flag which can be used by the

system to enter a routine that is only called upon in cold start situations. The PWRON flag is indicated by

nFAULT driven low after entering silent mode from either standby mode or sleep mode. This flag is cleared after

a transition to normal mode.

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Go to normal

mode:

nSTB = high

EN = high

System

preconditioning

routine

Yes

Standby mode:¹

INH = high in STB

mode

Silent mode²

nSTB = high

EN = low

Read nFAULT

low = cold start

high = wake-up request

nFAULT = low?

No

¹On entering Standby mode from power-up or Sleep mode

Go to normal

mode:

nSTB = high

EN = high

Read nFAULT ³

WAKESR flag

low = local wake-up

high = remote wake-up

²V_CCand V_IOare present

³Optional

Normal mode

图9-4. Distinguishing between PWRON and Wake Request by Entering Silent Mode

9.3.7.1.2 Wake-Up Request (WAKERQ Flag)

This is an internal and external flag that can be set in standby, go-to-sleep, or sleep mode. This flag is set when

either a valid local wake-up (LWU) request occurs, or a valid remote wake request occurs, or on power up on

V_SUP. The setting of this flag clears the t_UVtimer for the UV_CCor UV_IOfault detection. This flag is cleared upon

entering normal mode or during an undervoltage event on V_CCor V_IO.

9.3.7.1.3 Undervoltage Faults

The TCAN1463-Q1 device implements undervoltage detection circuits on all supply terminals: V_SUP, V_CC, and

V_IO. The undervoltage flags are internal indicator flags and are not indicated on the nFAULT output pin.

9.3.7.1.3.1 Undervoltage on V_SUP

UV_SUPis set when the voltage on V_SUPdrops below the undervoltage detection voltage threshold, UV_SUP. The

PWRON and WAKERQ flags are set once V_SUP> UV_SUP(R)

.

9.3.7.1.3.2 Undervoltage on V_CC

UV_CCis set when the voltage on V_CCdrops below the undervoltage detection voltage threshold, UV_CC, for longer

than the t_UVundervoltage filter time.

9.3.7.1.3.3 Undervoltage on V_IO

UV_IOis set when the voltage on V_IOdrops below the undervoltage detection voltage threshold, UV_IO, for longer

than the t_UVundervoltage filter time.

9.3.7.1.4 CAN Bus Fault (CBF Flag)

The TCAN1463-Q1 device can detect the following six fault conditions and set the nFAULT pin low as an

interrupt so that the controller can be notified and act if a CAN bus fault exists. These failures are detected while

transmitting a dominant signal on the CAN bus. If one of these fault conditions persists for four consecutive

dominant-to-recessive bit transitions, the nFAULT indicates a CAN bus failure flag in Normal mode by driving the

nFAULT pin low. The CAN bus driver remains active. 表 9-2 shows what fault conditions can be detected by the

TCAN1463-Q1.

表9-2. Bus Fault Pin State and Detection Table

FAULT

Condition

1

2

3

4

5

6

CANH Shorted to V_BAT

CANH Shorted to V_CC

CANH Shorted to GND

CANL Shorted to V_BAT

CANL Shorted to V_CC

CANL Shorted to GND

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Bus fault detection is a system level situation. If the fault is occurring at the ECU the general communication of

the bus may be compromised. Until a diagnostic determination can be made the transceiver remains in CAN

active mode during a CAN bus fault enabling the ECU to transmit data to the CAN bus and receive data from the

CAN bus. For complete coverage of a node, a system level diagnostic step should be performed for each node

and the information should be communicated back to a central point.

While in normal mode, if no CAN bus fault is detected for four consecutive dominant-to-recessive transitions on

the TXD pin then the CBF flag is cleared and nFAULT is driven high. The bus fault failure circuitry is able to

detect bus faults for a range of differential resistance loads (R_CBF) and for any time greater than t_CBF

.

9.3.7.1.5 TXD Clamped Low (TXDCLP Flag)

TXDCLP is an external flag that is set if the transceiver detects that the TXD is clamped low before entering CAN

active mode. If a TXDCLP condition exists the nFAULT pin is driven low upon entering silent mode from normal

mode and the CAN bus driver is disabled until the fault is cleared. The TXDCLP flag is cleared at power-up,

when entering CAN active mode with TXD recessive, or when TXD is recessive while RXD is dominant, if no

other local failures exist.

9.3.7.1.6 TXD Dominant State Timeout (TXDDTO Flag)

TXDDTO is an external flag that is set if the TXD pin is held dominant for t > t_TXDDTO. If a TXD DTO condition

exists, the nFAULT pin is driven low upon entering silent mode from normal mode. The TXDDTO flag is cleared

on the next dominant-to-recessive transition on TXD or upon a transition into normal, standby, go-to-sleep, or

sleep modes.

9.3.7.1.7 TXD Shorted to RXD Fault (TXDRXD Flag)

TXDRXD is an external flag that is set if the transceiver detects that the TXD and RXD lines have been shorted

together for t ≥ t_TXDDTO. If a TXDRXD condition exists the nFAULT pin is driven low upon entering silent mode

from normal mode and the CAN bus driver is disabled until the TXDRXD fault is cleared. The TXDRXD flag is

cleared on the next dominant-to-recessive transition with TXD high and RXD low or upon a transition into

normal, standby, go-to-sleep, or sleep modes.

9.3.7.1.8 CAN Bus Dominant Fault (CANDOM Flag)

CANDOM is an external flag that is set if the CAN bus is stuck dominant state for t > t_BUSDOM. If a CANDOM

condition exists the nFAULT pin is driven low upon entering silent mode from normal mode. The CANDOM flag is

cleared on the next dominant-to-recessive transition on RXD or upon a transition into normal, standby, go-to-

sleep, or sleep modes.

9.3.8 Local Faults

Local faults are detected in both normal mode and silent mode, but are only indicated via the nFAULT pin when

the TCAN1463-Q1 transitions from normal mode to silent mode. All other mode transitions clear the local fault

flag indicators.

9.3.8.1 TXD Clamped Low (TXDCLP)

If the TXD pin is clamped low prior to entering CAN active mode the CAN driver is disabled releasing the bus line

to the recessive level. The CAN driver will be activated again when entering normal mode with TXD recessive,

when TXD is recessive while RXD is dominant, if no other local failures exist, or on power-up. During a TXDCLP

fault the high-speed receiver remains active and the RXD output pin will mirror the CAN bus.

9.3.8.2 TXD Dominant Timeout (TXD DTO)

While the CAN driver is in active mode a TXD dominant state timeout circuit prevents the local node from

blocking network communication in event of a hardware or software failure where TXD is held dominant longer

than the timeout period, t > t_TXDDTO. The TXD dominant state timeout circuit is triggered by a falling edge on the

TXD pin. If no rising edge is seen before on TXD before t > t_TXDDTOthan the CAN driver is disabled releasing the

bus lines to the recessive level. This keeps the bus free for communication between other nodes on the network.

The CAN driver will be activated again on the next dominant-to-recessive transition on the TXD pin. During a

TXDDTO fault the high-speed receiver remains active and the RXD output pin will mirror the CAN bus.

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Fault is repaired & transmission capability

restored

TXD fault stuck dominant: example PCB failure or bad software

t_TXDDTO

TXD (driver)

Driver disabled freeing bus for other nodes

Normal CAN communication

Bus would be —stuck dominant“ blocking communication for the whole network but TXD DTO

prevents this and frees the bus for communication after the time t_TXDDTO

.

CAN Bus Signal

t_TXDDTO

Communication from other bus node(s)

Communication from repaired node

RXD (receiver)

Communication from local node

Communication from other bus node(s)

Communication from repaired local node

图9-5. Timing Diagram for TXD DTO

The minimum dominant TXD time allowed by the dominant state timeout circuit limits the minimum possible

transmitted data rate of the transceiver. The CAN protocol allows a maximum of eleven successive dominant bits

to be transmitted in the worst case, where five successive dominant bits are followed immediately by an error

frame. The minimum transmitted data rate may be calculated using the minimum t_TXDDTOtime in 方程式1.

Minimum Data Rate = 11 bits / t_TXDDTO= 11 bits / 1.2 ms = 9.2 kbps

(1)

9.3.8.3 Thermal Shutdown (TSD)

If the junction temperature of the TCAN1463-Q1 exceeds the thermal shutdown threshold the device turns off

the CAN driver circuits thus blocking the TXD to bus transmission path. The CAN bus terminals are biased to

recessive level during a TSD fault and the receiver to RXD path remains operational. The TSD fault condition is

cleared when the junction temperature, T_J, of the device drops below the thermal shutdown release temperature,

T_SDF, of the device. If the fault condition that caused the TSD fault is still present, the temperature may rise again

and the device will enter thermal shutdown again. Prolonged operation with TSD fault conditions may affect

device reliability. The TSD circuit includes hysteresis to avoid any oscillation of the driver output. During the fault

the TSD fault condition is indicated to the CAN FD controller via the nFAULT terminal.

9.3.8.4 Undervoltage Lockout (UVLO)

The supply terminals, V_SUP, V_IOand V_CC, are monitored for undervoltage events. If an undervoltage event

occurs the TCAN1463-Q1 enters a protected state where the bus pins present no load to the CAN bus. This

protects the CAN bus and system from unwanted glitches and excessive current draw that could impact

communication between other CAN nodes on the CAN bus.

If an undervoltage event occurs on V_SUPin any mode, the TCAN1463-Q1 CAN transceiver enters the CAN off

state.

If an undervoltage event occurs on V_CC,the TCAN1463-Q1 remains in normal or silent mode but the CAN

transceiver changes to the CAN autonomous active state. During a UV_CCevent, RXD remains high as long as

V_IOis present and the wake-up circuitry is inactive. See 图 9-12. If the undervoltage event persists longer than

t_UV, the TCAN1463-Q1 transitions to sleep mode.

If an undervoltage event occurs on the V_IO, the TCAN1463-Q1 transitions to standby mode. If the undervoltage

event persists longer than t_UV, the TCAN1463-Q1 transitions to sleep mode.

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Once an undervoltage condition is cleared and the supplies have returned to valid levels, the device typically

needs 200 µs to transition to normal operation.

9.3.8.5 Unpowered Devices

The device is designed to be a passive or no load to the CAN bus if it is unpowered. The CANH and CANL pins

have low leakage currents when the device is unpowered, so they present no load to the bus. This is critical if

some nodes of the network are unpowered while the rest of the of network remains in operation.

The logic terminals also have low leakage currents when the device is unpowered so they do not load down

other circuits which may remain powered.

9.3.8.6 Floating Terminals

The TCAN1463-Q1 has internal pull-ups and pull-downs on critical pins to make sure a known operating

behavior if the pins are left floating. See 表9-3 for the pin fail-safe biasing protection description.

表9-3. Pin Fail-safe Biasing

TXD

FAIL-SAFE PROTECTION

VALUE

COMMENT

Recessive level

Weak pull-up to V_IO

EN

Low-power mode

Weak pull-down to GND

nSTB

Low-power mode

60 kΩ

INH_MASK

INH_MASK pin pulled to GND to disable

INH_MASK function at powerup and when

the feature is not needed.

This internal bias should not be relied upon by design but rather a fail-safe option. Special care needs to be

taken when the transceiver is used with a CAN FD controller that has open-drain outputs. The TCAN1463-Q1

implements a weak internal pull-up resistor on the TXD pin. The bit timing requirements for CAN FD data rates

require special consideration and the pull-up strength should be considered carefully when using open-drain

outputs. An adequate external pull-up resistor must be used to make sure the TXD output of the CAN FD

controller maintains proper bit timing input to the CAN device.

9.3.8.7 CAN Bus Short-Circuit Current Limiting

The TCAN1463-Q1 has several protection features that limit the short-circuit current when a CAN bus line is

shorted. These include CAN driver current limiting in the dominant and recessive states and TXD dominant state

timeout which prevents permanently having the higher short-circuit current of a dominant state in case of a

system fault.

During CAN communication the bus switches between the dominant and recessive states, thus the short-circuit

current may be viewed either as the current during each bus state or as an average current. The average short-

circuit current should be used when considering system power for the termination resistors and common-mode

choke. The percentage of time that the driver can be dominant is limited by the TXD dominant state timeout and

the CAN protocol which has forced state changes and recessive bits such as bit stuffing, control fields, and

interframe spacing. These makes sure there is a minimum recessive time on the bus even if the data field

contains a high percentage of dominant bits.

The short-circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short-

circuit currents. The average short-circuit current may be calculated using 方程式2.

I_OS(AVG)= %Transmit × [(%REC_Bits × I_{OS(SS)_REC}) + (%DOM_Bits × I_{OS(SS)_DOM})] + [%Receive × I_{OS(SS)_REC}

]

(2)

Where:

• I_OS(AVG)is the average short-circuit current

• %Transmit is the percentage the node is transmitting CAN messages

• %Receive is the percentage the node is receiving CAN messages

• %REC_Bits is the percentage of recessive bits in the transmitted CAN messages

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• %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages

• I_{OS(SS)_REC}is the recessive steady state short-circuit current

• I_{OS(SS)_DOM}is the dominant steady state short-circuit current

The short-circuit current and possible fault cases of the network should be taken into consideration when sizing

the power ratings of the termination resistance and other network components.

9.4 Device Functional Modes

The TCAN1463-Q1 has six operating modes: normal, standby, silent, go-to-sleep, sleep, and off mode.

Operating mode selection is controlled using the nSTB pin and EN pin in conjunction with supply conditions,

temperature conditions, and wake events.

V_SUP< UV_VSUP(F)

Power Off

CAN: High impedance

INH: High impedance

RXD: High impedance

Power On

Start Up

Normal Mode

CAN: Bus bias active

INH: V_SUPlevel

Standby Mode

CAN: Bus bias autonomous

WAKE sources: WUP & LWU

INH: V_SUPlevel

(EN = low and nSTB = low) or

V_IO< UV_IO

EN = high and nSTB = high and V_IO> UV_IO

SWE timer inactive³

INH_MASK Input: Ignored

EN = low and

nSTB = high

and V_IO> UV_IO

SWE timer active³

EN = low and nSTB = high

INH_MASK Input: Ignored

EN = high and

nSTB = high

Silent Mode

CAN: Bus bias active

INH: V_SUPlevel

EN = high and

nSTB = low

SWE timer

(EN = low or WAKERQ

set) and nSTB = low

expires:

SWE timer inactive/active³

INH_MASK Input: Disable/Enables

INH⁶

5

t > t_INACTIVE

EN = high and nSTB =

low and WAKERQ

Cleared

EN = high and nSTB = low

and WAKERQ Cleared

EN = high

and

nSTB = high

Wake-Up Event:

WUP or LWU

3,5

EN = low and

nSTB = high

Sleep Mode

Go-To-Sleep Mode

CAN: Bus bias autonomous

WAKE sources: WUP & LWU

INH: V_SUPlevel

SWE timer inactive

INH_MASK Input: Ignored

CAN: Bus bias autonomous

4 or 5

EN: x¹

(EN = low and t < t_GOTOSLEEP

)

or WUP or LWU

WAKE sources: WUP & LWU

INH: High impedance

nFAULT: High impedance

SWE timer inactive

4

EN = high and t > t_GOTOSLEEP

INH_MASK Input: Ignored

4 or 5

V_CCfalls below UV_CCor

Vio falls below UV_IO

2,4

for t > t_UV

From any other

mode

图9-6. TCAN1463-Q1 State Machine

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1. The enable pin can be in a logical high or low state while in sleep mode but since it has an internal pull-

down, the lowest possible power consumption occurs when the pin is left either floating or pulled low

externally.

2. At power-up, the undervoltage timers for V_CCand V_IOare disabled, allowing for longer period for V_CCand

V_IOsupplies to power up (up to t_INACTIVE). V_CCor V_IOneed to be above UV_CC(R)and UV_IO(R)respectively to

enable their respective t_UVtimers. The V_CCundervoltage timer starts when V_CCfalls below UV_CC(F), while

V_IOundervoltage timer starts when V_IOfalls below UV_IO(F). When either of these timers exceed t_UV, the

device enters sleep mode.

3. The Sleep Wake Error (SWE) timer starts as soon as the device enters Standby mode. The timer halts and

resets as soon as the device enters Normal mode. If the device enters Silent mode from Standby mode, the

SWE timer does not halt and the device needs to be transitioned to Normal mode before the SWE timer

expires. If the device enters Silent mode from Normal mode, the SWE timer will not be active in Silent mode.

4. When the Sleep mode is entered from Go-To-Sleep Mode or from a UV_CCor UV_IOevent, a low-to-high

transition on nSTB is required to move the device into Normal or Silent mode. If EN is high during the rising

edge on nSTB, the device moves to Normal mode. If EN is low during the rising edge on nSTB, the device

moves to Silent mode. V_IOmust be above UV_IO(R)in order to leave Sleep mode using the EN and nSTB

signals.

5. When Sleep mode is entered due to an SWE timer timeout (>t_INACTIVE), there is an extra requirement to exit

Sleep mode and transition into Normal or Silent mode directly using the EN and nSTB signals. To move to

Normal mode, the nSTB pin must be high and a low-to-high transition must occur on EN. To move to Silent

mode, the nSTB pin must be high and a high-to-low transition must occur on EN. If the device entered Sleep

mode while the nSTB was already high, there must be a transition on the EN pin while nSTB is low prior to

the sequence described above. See 图9-7 for more information. V_IOmust be above UV_IO(R)to leave Sleep

mode by using the EN and nSTB signals.

6. The device recognizes the change in state of INH_MASK pin only in Silent mode to enable/disable INH

functionality. Device latches the changed value of INH_MASK in Silent mode and retains this value through

mode transitions. The latched value is lost only due to an UV_SUPevent. The INH_MASK input is ignored in

all other modes.

Sleep to Normal

Sleep to Silent

>tMODE1(max)¹

nSTB

EN

nSTB

EN

Sleep

Normal

Sleep

Silent

1. nSTB must remain low for a minimum of t_MODE1after the edge on EN. Once this t_MODE1has elapsed, nSTB

may be driven high. The following edge on EN will cause the device to exit Sleep mode. The final edge on

EN does not have any minimum delay from the rising edge of nSTB. The enable pin can be in a logical high

or low state while in sleep mode, but since it has an internal pull-down, the lowest possible power

consumption occurs when the pin is left either floating or pulled low externally.

图9-7. TCAN1463-Q1 Transitioning from Sleep Mode to Normal or Silent Mode if Sleep Mode is Entered

Due to SWE Timer Timeout

表9-4. TCAN1463-Q1 Mode Overview

MODE

Normal

Silent

V_CCand V_IO

V_SUP

EN

High

Low

nSTB

High

WAKERQ FLAG

DRIVER

Enabled

Disabled

RECEIVER

RXD

INH

On

> UV_CCand > UV_IO

> UV_SUP

X

Enabled

Mirrors bus state

Enabled

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表9-4. TCAN1463-Q1 Mode Overview (continued)

MODE

V_CCand V_IO

V_SUP

EN

nSTB

WAKERQ FLAG

DRIVER

RECEIVER

RXD

INH

Low power bus monitor

enabled

> UV_CCand > UV_IO

> UV_SUP

High

Low

Set

Disabled

Low signals wake-up

On

Low power bus monitor

enabled

Standby

> UV_CCand > UV_IO

> UV_CCand < UV_IO

> UV_CCand > UV_IO

> UV_SUP

Low

High

Low

X

Disabled

Low signals wake-up

High impedance

On

Low power bus monitor

enabled

Low power bus monitor High or high impedance

enabled (no V_IO

Go-to-sleep⁽¹⁾

Sleep⁽³⁾

Cleared

On⁽²⁾

)

High

Low power bus monitor High or high impedance

enabled (no V_IO

> UV_CCand > UV_IO

> UV_SUP

High

Low

Cleared

Disabled

)

Impedance

Low power bus monitor High or high impedance

High

impedance

< UV_CCor <UV_IO

> UV_SUP

< UV_SUP

X

Disabled

enabled

(no V_IO

)

High

impedance

Protected

X

Disabled

High impedance

(1) Go-to-sleep: Transitional mode for EN = H, nSTB = L until t_GOTOSLEEPtimer has expired.

(2) The INH pin transitions to high impedance after the t_GOTOSLEEPtimer has expired.

(3) Mode change from go-to-sleep mode to sleep mode once t_GOTOSLEEPtimer has expired.

9.4.1 Operating Mode Description

9.4.1.1 Normal Mode

This is the normal operating mode of the device. The CAN driver and receiver are fully operational and CAN

communication is bi-directional. The driver is translating a digital input on TXD to a differential output on CANH

and CANL. The receiver is translating the differential signal from CANH and CANL to a digital output on RXD.

Entering normal mode clears both the WAKERQ and the PWRON flags.

The SWE timer halts and resets upon entering normal mode.

9.4.1.2 Silent Mode

Silent mode is commonly referred to as listen only and receive only mode. In this mode, the CAN driver is

disabled but the receiver is fully operational and CAN communication is unidirectional into the device. The

receiver is translating the differential signal from CANH and CANL to a digital output on the RXD terminal.

In silent mode, PWRON and Local Failure flags are indicated on the nFAULT pin.

If the device enters silent mode from standby mode, the SWE timer does not halt and the device needs to be

transitioned to normal mode before the SWE timer expires. If the SWE timer expires in silent mode, the device is

transitioned to sleep mode.

9.4.1.3 Standby Mode

Standby mode is a low-power mode where the driver and receiver are disabled, reducing current consumption.

However, this is not the lowest power mode of the device since the INH terminal is on, allowing the rest of the

system to resume normal operation.

During standby mode, a wake-up request (WAKERQ) is indicated by the RXD terminal being low. The wake-up

source is identified via the nFAULT pin after the device is returned to normal mode.

In standby mode, a fail-safe timer called Sleep Wake Error (SWE) timer is enabled. The timer adds an additional

layer of protection by requiring the system controller to configure the transceiver to normal mode before it

expires. This feature forces the TCAN1463-Q1 to transition to its lowest power mode, sleep mode, after t_INACTIVE

if the processor does not come up properly and fails to transition the device to Normal mode.

9.4.1.4 Go-To-Sleep Mode

Go-to-sleep mode is the transitional mode of the device from any state to sleep. In this state the driver and

receiver are disabled, reducing the current consumption. The INH pin is active in order to supply an enable to the

V_IOcontroller which allows the rest of the system to operate normally. If the device is held in this state for t ≥

t_GOTOSLEEPthe device transitions to sleep mode and the INH turns off transitioning to the high impedance state.

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If any wake-up events persist, the TCAN1463-Q1 remains in standby mode until the device is switched into

normal mode to clear the pending wake-up events.

9.4.1.5 Sleep Mode

Sleep mode is the lowest power mode of the TCAN1463-Q1. In sleep mode, the CAN transmitter and the main

receiver are switched off and the transceiver cannot send or receive data. The low power receiver is able to

monitor the bus for any activity that validates the wake-up pattern (WUP) requirements, and the WAKE

monitoring circuit monitors for state changes on the WAKE terminal for a local wake-up (LWU) event. I_SUP

current is reduced to its minimum level when the CAN transceiver is in CAN autonomous inactive state. The INH

pin is switched off in sleep mode causing any system power supplies controlled by INH to be switched off thus

reducing system power consumption.

Sleep mode is exited:

• If a valid wake-up pattern (WUP) is received via the CAN bus pins

• On a local WAKE (LWU) event

• On a low-to-high transition of the nSTB pin

When the Sleep mode is entered due to an SWE timer timeout (>t_INACTIVE), there is an extra requirement to

enter Normal or Silent mode directly (without entering Standby mode via LWU or WUP) using the EN and nSTB

signals. In order to move to the Normal mode, the nSTB pin must be high and a low-to-high transition must occur

on EN. In order to move to the Silent mode, the nSTB pin must be high and a high-to-low transition must occur

on EN. If the device entered the Sleep mode while the nSTB was already high, there must be a transition on the

EN pin while nSTB is low prior to the sequence described above. See 图 9-7 for more information. V_IOmust be

above UV_IO(R)in order to leave the Sleep mode using the EN and nSTB signals.

9.4.1.5.1 Remote Wake Request via Wake-Up Pattern (WUP)

The TCAN1463-Q1 implements a low-power wake receiver in the standby and sleep mode that uses the multiple

filtered dominant wake-up pattern (WUP) defined in the ISO11898-2:2016 standard.

The wake-up pattern (WUP) consists of a filtered dominant bus, then a filtered recessive bus time followed by a

second filtered dominant bus time. The first filtered dominant initiates the WUP and the bus monitor is now

waiting on a filtered recessive; other bus traffic will not reset the bus monitor. Once a filtered recessive is

received the bus monitor is now waiting on a filtered dominant, and again, other bus traffic will not reset the bus

monitor. Immediately upon receiving of the second filtered dominant the bus monitor will recognize the WUP and

drive the RXD terminal low, if a valid V_IOis present signaling to the controller the wake-up request. If a valid V_IO

is not present when the wake-up pattern is received the transceiver drives the RXD output pin low once V_IO

UV_IOR

>

.

The WUP consists of:

• A filtered dominant bus of at least t_WK(FILTER)followed by

• A filtered recessive bus time of at least t_WK(FILTER)followed by

• A second filtered dominant bus time of at least t_WK(FILTER)

For a dominant or recessive to be considered “filtered,” the bus must be in that state for more than t_WK(FILTER)

time. Due to variability in the t_WK(FILTER)the following scenarios are applicable. Bus state times less than the

t_WK(FILTER)minimum will never be detected as part of a WUP and thus no wake request will be generated. Bus

state times between t_WK(FILTER)minimum and t_WK(FILTER)maximum may be detected as part of a WUP and a

wake request may be generated. Bus state times more than t_WK(FILTER)maximum will always be detected as part

of a WUP and thus a wake request will always be generated. See 图9-8 for the timing diagram of the WUP.

The pattern and t_WK(FILTER)time used for the WUP and wake request prevents noise and bus stuck dominant

faults from causing false wake requests while allowing any CAN or CAN FD message to initiate a wake request.

ISO11898-2:2016 has two sets of times for a short and long wake-up filter times. The t_WK(FILTER)timing for the

TCAN1463-Q1 has been picked to be within the min and max values of both filter ranges. This timing has been

chosen such that a single bit time at 500 kbps, or two back to back bit times at 1 Mbps will trigger the filter in

either bus state.

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For an additional layer of robustness and to prevent false wake-ups, the transceiver implements the t_WK(TIMEOUT)

timer. For a remote wake-up event to successfully occur, the entire wake-up pattern must be received within the

timeout value. If the full wake-up pattern is not received before the t_WK(TIMEOUT)expires then the internal logic is

reset and the transceiver remains in sleep mode without waking up. The full pattern must then be transmitted

again within the t_WK(TIMEOUT)window. See 图9-8.

A recessive bus of at least t_WK(FILTER)must separate the next WUP pattern if the CAN bus is dominant when the

t_WK(TIMEOUT)expires.

Wake-Up Pattern (WUP) received in t < t_{WK_TIMEOUT}

Wake Request

Filtered

Dominant

Filtered

Dominant

Filtered

Recessive

Waiting for

Filtered

Dominant

Waiting for

Filtered

Recessive

Bus

Bus V_Diff

WUP Detect

Mode

≥ t_{WK_FILTER}

*

t_{INH_SLP_STB}

Sleep Mode

Standby Mode

*The RXD pin is only driven once V_IOis present.

图9-8. Wake-Up Pattern (WUP)

9.4.1.5.2 Local Wake-Up (LWU) via WAKE Input Terminal

The WAKE terminal is a bi-directional high-voltage reverse-battery protected input which can be used for local

wake-up (LWU) requests via a voltage transition. A LWU event is triggered on either a low-to-high or high-to-low

transition since it has bi-directional input thresholds. The WAKE pin could be used with a switch to V_SUPor to

ground. If the terminal is unused it should be pulled to V_SUPor ground to avoid unwanted parasitic wake-up

events.

图9-9. WAKE Circuit Example

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图 9-9 shows two possible configurations for the WAKE pin, a low-side and high-side switch configuration. The

objective of the series resistor, R_SERIES, is to protect the WAKE input of the device from over current conditions

that may occur in the event of a ground shift or ground loss. The minimum value of R_SERIEScan be calculated

using the maximum supply voltage, V_SUPMAX, and the maximum allowable current of the WAKE pin, I_IO(WAKE)

.

R_SERIESis calculated using:

R_SERIES= V_SUPMAX/ I_IO(WAKE)

(3)

With absolute maximum voltage, V_SUPMAX, of 45 V and maximum allowable I_IO(WAKE)of 3 mA, the minimum

required R_SERIESvalue is 15 kΩ.

The R_BIASresistor is used to set the static voltage level of the WAKE input when the switch is released. When

the switch is in use in a high-side switch configuration, the R_BIASresistor in combination with the R_SERIESresistor

sets the WAKE pin voltage above the V_IHthreshold. The maximum value of R_BIAScan be calculated using the

maximum supply voltage, V_SUPMAX, the maximum WAKE threshold voltage V_IH, the maximum WAKE input

current I_IHand the series resistor value R_SERIES. R_BIASis calculated using:

R_BIAS< ((V_SUPMAX- V_IH) / I_IH) - R_SERIES

(4)

With V_SUPMAXof 45 V, V_IHof 44 V at I_IHof 3 µA, the R_BIASresistor value must be less than 330 kΩ. It is

recommended to use R_Seriesless than 50 kΩ to provide better margin for the WAKE pin voltage to rise above

V_IHwhen the switch is released.

The LWU circuitry is active in sleep mode.

The WAKE circuitry is switched off in normal mode.

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WAKE

threshold

not

t

t_{WAKE_HT}

t > t_{WAKE_HT}

wake-up

no wake-up

crossed

Wake

LWU Request

t_{INH_SLP_STB}

INH

*

RXD

Mode

Sleep Mode

Standby Mode

* RXD is driven with valid V_IO

图9-10. LWU Request Rising Edge

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WAKE

threshold

not

t

t_{WAKE_HT}

t > t_{WAKE_HT}

wake-up

no wake-up

crossed

Wake

LWU Request

t_{INH_SLP_STB}

INH

*

RXD

Mode

Sleep Mode

Standby Mode

* RXD is driven with valid V_IO

图9-11. LWU Request Falling Edge

9.4.2 CAN Transceiver

9.4.2.1 CAN Transceiver Operation

The TCAN1463-Q1 supports the ISO 11898-2:2016 CAN physical layer standard autonomous bus biasing

scheme. Autonomous bus biasing enables the transceiver to switch between CAN active, CAN autonomous

active, and CAN autonomous inactive which helps to reduce RF emissions.

9.4.2.1.1 CAN Transceiver Modes

The TCAN1463-Q1 CAN transceiver has four modes of operation; CAN off, CAN autonomous active, CAN

autonomous inactive and CAN active.

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CAN Active

CAN Transmitter: on²

CAN Receiver: on

RXD: Mirrors CAN bus

CANH & CANL: V_CC/2 (~2.5 V)

From any mode

V_SUP< UV_SUP(F)

CAN Off

CAN Transmitter: off

CAN Receiver: off

RXD: High impedance

CANH and CANL: High impedance

CAN Autonomous: Inactive

CAN Autonomous: Active

CAN wake-up or ((normal or silent) and

(V_CC< UV_CCor V_IO< UV_IO))

CAN Transmitter: off

CAN Receiver: off

RXD: wake-up/high

CAN Transmitter: off

CAN Receiver: off

V_SUP> UV_SUP(R)

RXD: low signals wake-up¹

CANH and CANL: bias to 2.5 V from V_SUP

t > t_SILENCEand (standby or go-to-sleep or

sleep)

CANH and CANL: bias to GND

1. Wake-up is inactive in normal or silent mode.

2. CAN transmitter is off in silent mode.

图9-12. TCAN1463-Q1 CAN Transceiver State Machine

9.4.2.1.1.1 CAN Off Mode

In CAN off mode, the CAN transceiver is switched off and the CAN bus lines are truly floating. In this mode, the

device presents no load to the CAN bus while preventing reverse currents from flowing into the device if the

battery or ground connection is lost.

The CAN off state is entered if:

• V_SUP< UV_SUPF

The CAN transceiver switches between the CAN off state and CAN autonomous inactive mode if:

• V_SUP> UV_SUPR

9.4.2.1.1.2 CAN Autonomous: Inactive and Active

When the CAN transceiver is in standby, go-to-sleep or sleep mode, the bias circuit can be in either the CAN

autonomous inactive or CAN autonomous active state. In the autonomous inactive state, the CAN pins are

biased to GND. When a remote wake-up (WUP) event occurs, the CAN bus is biased to 2.5 V and the CAN

transceiver enters the CAN autonomous active state. If the controller does not transition the transceiver into

normal mode before the t_SILENCEtimer expires, the CAN transceiver enters the CAN autonomous inactive state.

The CAN transceiver switches to the CAN autonomous mode if any of the following conditions are met:

• The operating mode changes from CAN off mode to CAN autonomous inactive

• The operating mode changes from normal or silent mode to standby, go-to-sleep, or sleep mode:

– If the bus was inactive for t < t_SILENCEbefore the mode change, the transceiver enters autonomous active

state

– If the bus was inactive for t > t_SILENCEbefore the mode change, the transceiver enters autonomous

inactive state

• V_CC< UV_CC(F)

• V_IO< UV_IO(F)

The CAN transceiver switches from the CAN autonomous inactive mode to the CAN autonomous active mode if:

• A remote wake-up event occurs

• The transceiver transitions to normal or silent mode and V_CC< UV_CC(F)or V_IO< UV_IO(F)

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The CAN transceiver switches from the CAN autonomous active mode to the CAN autonomous inactive mode if:

• The transceiver is in standby, go-to-sleep, or sleep mode and t > t_SILENCE

9.4.2.1.1.3 CAN Active

When the transceiver is in normal or silent mode, the CAN transceiver is in active mode. In normal mode, the

CAN driver and receiver are fully operational and CAN communication is bi-directional. In silent mode, the CAN

driver is off but the CAN receiver is fully operational. The CAN bias voltage in CAN active mode is derived from

V_CCand is held at V_CC/2

The CAN transceiver switches from the CAN autonomous inactive or CAN autonomous active modes to the CAN

active mode if:

• The transceiver transitions to normal mode and V_CC> UV_CC(R), V_IO> UV_IO(R)

The CAN transceiver blocks its transmitter after entering CAN active mode if the TXD pin is asserted low before

leaving standby mode. This prevents disruptions to CAN bus in the event that the TXD pin is stuck Low

(TXDCLP).

The CAN transceiver switches from the CAN active mode to the CAN autonomous inactive mode if:

• The transceiver switches to standby, go-to-sleep, or sleep modes and t > t_SILENCE

The CAN transceiver switches from the CAN active mode to the CAN autonomous active mode if:

• The transceiver switches to standby, go-to-sleep, or sleep modes and t < t_SILENCE

• V_CC< UV_CC(F)

• V_IO< UV_IO(F)

9.4.2.1.2 Driver and Receiver Function Tables

表9-5. Driver Function Table

BUS OUTPUTS

DEVICE MODE TXD INPUTS⁽¹⁾

DRIVEN BUS STATE⁽²⁾

CANH

CANL

Low

High

Low

Dominant

V_CC/2

Normal

High or Open High impedance High impedance

Silent

Standby

Sleep

x

High impedance High impedance

V_CC/2

Autonomous biasing

(1) x = irrelevant

(2) For bus states and typical bus voltages see 图9-13

表9-6. Receiver Function Table

CAN DIFFERENTIAL INPUTS

DEVICE MODE

BUS STATE

RXD TERMINAL

V_ID= V_CANH–V_CANL

Dominant

Indeterminate

Recessive

Open

Low

Indeterminate

High

V_ID≥0.9 V

0.5 V < V_ID< 0.9 V

V_ID≤0.5 V

Normal / Silent

High

Open (V_ID≈0 V)

V_ID≥1.15 V

Dominant

Indeterminate

Recessive

Open

0.4 V < V_ID< 1.15 V

V_ID≤0.4

High

Standby

Low if wake-up event persists

Open (V_ID≈0 V)

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表9-6. Receiver Function Table (continued)

CAN DIFFERENTIAL INPUTS

DEVICE MODE

BUS STATE

RXD TERMINAL

V_ID= V_CANH–V_CANL

Dominant

Indeterminate

Recessive

Open

V_ID≥1.15 V

0.4 V < V_ID< 1.15 V

V_ID≤0.4 V

High

Tri-state if V_IOor V_SUPare not

present

Sleep / Go-to-

sleep⁽¹⁾

Open (V_ID≈0 V)

(1) Low power wake-up receiver is active

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9.4.2.1.3 CAN Bus States

The CAN bus has two logical states during operation: recessive and dominant. See 图9-13.

A dominant bus state occurs when the bus is driven differentially and corresponds to a logic low on the TXD and

RXD pins. A recessive bus state occurs when the bus is biased to one half of the CAN transceiver supply

voltage via the high resistance internal input resistors (R_IN) of the receiver and corresponds to a logic high on the

TXD and RXD pins.

A dominant state overwrites the recessive state during arbitration. Multiple CAN nodes may be transmitting a

dominant bit at the same time during arbitration, and in this case the differential voltage of the CAN bus is

greater than the differential voltage of a single CAN driver. The TCAN1463-Q1 CAN transceiver implements low-

power standby and sleep modes which enable a third bus state where, if the CAN bus is inactive for t > t_SILENCE

the bus pins are biased to ground via the high-resistance internal resistors of the receiver.

,

Normal or Silent or all other Modes with t < t_SILENCE

Standby, Go-to-sleep or Sleep Mode t > t_SILENCE

CANH

V_DIFF

CANL

Recessive

Dominant

Recessive

Time, t

图9-13. Bus States

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10 Application Information Disclaimer

备注

以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客户应负责确定

器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。

10.1 Application Information

The TCAN1463-Q1 transceiver is typically used in applications with a host microprocessor or FPGA that

includes the data link layer portion of the CAN protocol. These types of applications usually also include power

management technology that allows for power to be gated to the application via an enable (EN) or inhibit (INH)

pin. A single 5-V regulator can be used to drive both V_CCand V_IO, or independent 5-V and 3.3-V regulators can

be used to drive V_CCand V_IOseparately as shown in 图 10-1. The bus termination is shown for illustrative

purposes.

The TCAN1463-Q1 features an INH_MASK feature. The INH_MASK input pin can be used to disable and

enable the INH function as long as the INH is not controlling the power supply to the transceiver or the controller

behind the transceiver. This feature can be used to control the power supply to any power-intensive system

blocks to avoid powering up the system blocks from low-power mode due to spurious wake-up events which

saves power. See 图10-2 for an example application schematic.

10.1.1 Typical Application

3 k

EN

V_IN

22 nF

V_BAT

33 k

100 nF

100 k

V_REG

V_SUP

10

5 V V_OUT

INH

WAKE

7

9

V_CC

3

5

V_IO

100 nF

V_IO

CANH

13

100 nF

V_DD

TCAN1463

EN

nSTB

nFAULT

GPIO

6

14

8

MCU

CANL

12

1

4

CAN FD

Controller

TXD

Optional:

Terminating

Node

RXD

Optional:

Filtering,

Transient and

ESD

2

11

INH_MASK

(leave floating or

connect to GND)

图10-1. Typical Application (Not Using INH_MASK feature)

40

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3 k

V_IN

22 nF

V_BAT

33 k

EN

100 nF

V_REG

V_SUP

10

5 V V_OUT

WAKE

9

V_CC

3

5

V_IO

100 nF

V_IO

CANH

13

100 nF

EN

V_DD

TCAN1463

GPIO

6

nSTB

14

8

nFAULT

MCU

INH_MASK

11

1

CANL

12

CAN FD

TXD

RXD

Controller

Optional:

4

2

Terminating

Node

Optional:

Filtering,

Transient and

ESD

7

INH

100 k

V_IN

EN

V_DD

V_REG

Power-intensive

system block

V_OUT

图10-2. Typical Application (Using INH_MASK feature)

10.1.2 Design Requirements

10.1.2.1 Bus Loading, Length and Number of Nodes

A typical CAN application may have a maximum bus length of 40 meters and maximum stub length of 0.3 m.

However, with careful design, users can have longer cables, longer stub lengths, and many more nodes to a

bus. A high number of nodes requires a transceiver with high input impedance such as the TCAN1463-Q1.

Many CAN organizations and standards have scaled the use of CAN for applications outside the original

ISO11898-2:2016 standard. They made system level trade off decisions for data rate, cable length, and parasitic

loading of the bus. Examples of these CAN systems level specifications are ARINC825, CANopen, DeviceNet,

SAEJ2284, SAEJ1939, and NMEA200.

A CAN network system design is a series of tradeoffs. In the ISO 11898-2:2016 specification the differential

output driver is specified with a bus load that can range from 50 Ωto 65 Ωwhere the differential output must be

greater than 1.5 V. The TCAN1463-Q1 is specified to meet the 1.5-V requirement down to 50 Ωand is specified

to meet 1.4-V differential output at 45Ωbus load. The differential input resistance, R_ID, of the TCAN1463-Q1 is a

minimum of 50 kΩ. If 100 TCAN1463-Q1 transceivers are in parallel on a bus, this is equivalent to a 500-Ω

differential load in parallel with the nominal 60 Ω bus termination which gives a total bus load of approximately

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54 Ω. Therefore, the TCAN1463-Q1 theoretically supports over 100 transceivers on a single bus segment.

However, for CAN network design margin must be given for signal loss across the system and cabling, parasitic

loadings, timing, network imbalances, ground offsets and signal integrity thus a practical maximum number of

nodes is often lower. Bus length may also be extended beyond 40 meters by careful system design and data

rate tradeoffs. For example, CANopen network design guidelines allow the network to be up to 1 km with

changes in the termination resistance, cabling, less than 64 nodes and significantly lowered data rate.

This flexibility in CAN network design is one of its key strengths allowing for these system level network

extensions and additional standards to build on the original ISO11898-2 CAN standard. However, when using

this flexibility, the CAN network system designer must take the responsibility of good network design for a robust

network operation.

10.1.3 Detailed Design Procedure

10.1.3.1 CAN Termination

Termination may be a single 120-Ω resistor at each end of the bus, either on the cable or in a terminating node.

If filtering and stabilization of the common-mode voltage of the bus is desired then split termination may be used,

see 图10-3. Split termination improves the electromagnetic emissions behavior of the network by filtering higher-

frequency common-mode noise that may be present on the differential signal lines.

Standard Termination

Split Termination

CANH

R_TERM/2

R_TERM

TCAN Transceiver

C_SPLIT

R_TERM/2

CANL

图10-3. CAN Bus Termination Concepts

10.1.4 Application Curves

50

40

30

20

10

0

4.5 4.6 4.7 4.8 4.9

5

5.1 5.2 5.3 5.4 5.5

V_CC(V)

图10-4. Current Consumption (I_CC(D)) in Dominant Mode vs V_CCSupply

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10.1.5 Power Supply Recommendations

The TCAN1463-Q1 is designed to operate off of three supply rails; V_SUP, V_CC, and V_IO. V_SUPis a high-voltage

supply pin designed to connect to the V_BATrail, V_CCis a low-voltage supply pin with an input voltage range from

4.5 V to 5.5 V that supports the CAN transceiver and V_IOis a low-voltage supply pin with an input voltage range

from 1.7 V to 5.5 V that provides the I/O voltage to match the system controller. For a reliable operation, a 100

nF decoupling capacitor should be placed as close to the supply pins as possible. This helps to reduce supply

voltage ripple present on the output of switched-mode power supplies, and also helps to compensate for the

resistance and inductance of the PCB power planes.

10.1.6 Layout

Robust and reliable CAN node design may require special layout techniques depending on the application and

automotive design requirements. Since transient disturbances have high frequency content and a wide

bandwidth, high-frequency layout techniques should be applied during PCB design.

10.1.6.1 Layout Guidelines

The layout example provides information on components around the device. Place the protection and filtering

circuitry as close to the bus connector, J1, to prevent transients, ESD and noise from propagating onto the

board. Transient voltage suppression (TVS) device can be added for extra protection, shown as D1. The

production solution can be either a bi-directional TVS diode or varistor with ratings matching the application

requirements. This example also shows optional bus filter capacitors C6 and C7. A series common-mode choke

(CMC) is placed on the CANH and CANL lines between the device and connector J1.

Design the bus protection components in the direction of the signal path. Do not force the transient current to

divert from the signal path to reach the protection device. Use supply and ground planes to provide low

inductance. Note that high-frequency currents follow the path of least impedance and not the path of least

resistance. Use at least two vias for supply and ground connections of bypass capacitors and protection devices

to minimize trace and via inductance.

• Bypass and bulk capacitors should be placed as close as possible to the supply terminals of transceiver,

examples are C1 on V_CC, C2 on V_IO, and C3 and C4 on the V_SUPsupply.

• V_IOpin of the transceiver is connected to the microcontroller IO supply voltage 'µC V'.

• Bus termination: this layout example shows split termination. This is where the termination is split into two

resistors, R3 and R4, with the center or split tap of the termination connected to ground via capacitor C5. Split

termination provides common-mode filtering for the bus. When bus termination is placed on the board instead

of directly on the bus, additional care must be taken to make sure the terminating node is not removed from

the bus thus also removing the termination.

• INH, pin 7, can have a 100 kΩresistor (R1) to ground.

• WAKE, pin 9, can recognize either a rising or a falling edge of a wake signal and is usually connected to an

external switch. It should be configured as shown with C8 which is a 22 nF capacitor to GND where R5 is 33

kΩand R6 is 3 kΩ.

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10.1.6.2 Layout Example

TXD

GND

nSTB

CANH

CANL

C6

TXD

GND

nSTB

R3

C5

GND

Choke

C1

D1

V_CC

RXD

R4

R5

INH_MASK

RXD

GND

V_IO

C7

V_SUPC3 C4

WAKE

V_SUP

µC V

C2

EN

GND

EN

INH

To Switch

C8

INH

nFAULT

WAKE

R1

R6

GND

V_SUPGND

图10-5. Example Layout

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11 Device and Documentation Support

11.1 Documentation Support

11.2 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

11.3 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

11.4 商标

TI E2E^™is a trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

11.6 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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Product Folder Links: TCAN1463-Q1

PACKAGE OUTLINE

SOT-23-THIN - 1.1 mm max height

PLASTIC SMALL OUTLINE

DYY0014A

C

3.36

3.16

SEATING PLANE

PIN 1 INDEX

AREA

A

0.1 C

12X 0.5

14

1

4.3

4.1

NOTE 3

2X

3

7

8

0.31

0.11

14X

0.1

C A

B

1.1 MAX

2.1

1.9

B

0.2

0.08

TYP

SEE DETAIL A

0.25

GAUGE PLANE

0°- 8°

0.1

0.0

0.63

0.33

DETAIL A

TYP

4224643/B 07/2021

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed

0.15 per side.

4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.50 per side.

5. Reference JEDEC Registration MO-345, Variation AB

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EXAMPLE BOARD LAYOUT

SOT-23-THIN - 1.1 mm max height

PLASTIC SMALL OUTLINE

DYY0014A

SYMM

14X (1.05)

1

14

14X (0.3)

SYMM

12X (0.5)

8

7

(R0.05) TYP

(3)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 20X

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

OPENING

METAL

NON- SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4224643/B 07/2021

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

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EXAMPLE STENCIL DESIGN

SOT-23-THIN - 1.1 mm max height

PLASTIC SMALL OUTLINE

DYY0014A

SYMM

14X (1.05)

1

14

14X (0.3)

SYMM

12X (0.5)

8

7

(R0.05) TYP

(3)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE: 20X

4224643/B 07/2021

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

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GENERIC PACKAGE VIEW

DMT 14

3 x 4.5, 0.65 mm pitch

VSON - 0.9 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

This image is a representation of the package family, actual package may vary.

Refer to the product data sheet for package details.

4225088/A

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PACKAGE OUTLINE

DMT0014B

VSON - 1 mm max height

SCALE 3.200

PLASTIC SMALL OUTLINE - NO LEAD

3.1

2.9

A

B

PIN 1 INDEX AREA

4.6

4.4

0.1 MIN

(0.13)

1.0

0.8

SECTION A-A

SCALE 30.000

SECTION A-A

TYPICAL

C

SEATING PLANE

0.08 C

0.05

0.00

1.6 0.1

SYMM

EXPOSED

THERMAL PAD

(0.2) TYP

7

8

(0.19) TYP

A

2X

3.9

15

SYMM

4.2 0.1

14

1

12X 0.65

0.35

0.25

14X

0.45

0.35

PIN 1 ID

14X

0.1

C A B

(OPTIONAL)

0.05

C

4225087/B 01/2021

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

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EXAMPLE BOARD LAYOUT

DMT0014B

VSON - 1 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

(1.6)

14X (0.6)

14X (0.3)

SYMM

1

14

2X

(1.85)

12X (0.65)

SYMM

15

(4.2)

(0.69)

TYP

(

0.2) VIA

TYP

8

7

(R0.05) TYP

(0.55) TYP

(2.8)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

0.07 MAX

ALL AROUND

0.07 MIN

ALL AROUND

EXPOSED METAL

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL

METAL UNDER

SOLDER MASK

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4225087/B 01/2021

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

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EXAMPLE STENCIL DESIGN

DMT0014B

VSON - 1 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

(1.47)

15

14X (0.6)

1

14

14X (0.3)

(1.18)

12X (0.65)

SYMM

(1.38)

(R0.05) TYP

METAL

TYP

8

7

SYMM

(2.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD 15

77.4% PRINTED SOLDER COVERAGE BY AREA

SCALE:20X

4225087/B 01/2021

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

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邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	PTCAN1463DYYRQ1
厂家：	TEXAS INSTRUMENTS
描述：	具有 INH 和 WAKE 引脚的低功耗信号改进 CAN FD 收发器 \| DYY \| 14 \| -40 to 150
文件：	总58页 (文件大小：2746K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PTCAN1463DYYRQ1 [TI]

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