PTD08D210WACT [TI]

10A、4.75V 至 14V、双路非隔离式数字电源传动模块 | EFS | 22 | -40 to 85;
PTD08D210WACT
型号: PTD08D210WACT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

10A、4.75V 至 14V、双路非隔离式数字电源传动模块 | EFS | 22 | -40 to 85

光电二极管 电源电路
文件: 总19页 (文件大小:485K)
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PTD08D210W  
www.ti.com  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
DUAL 10-A OUTPUTS, 4.75-V to 14-V INPUT, NON-ISOLATED,  
DIGITAL POWERTRAIN™ MODULE  
Check for Samples: PTD08D210W  
1
FEATURES  
DESCRIPTION  
2
Dual 10-A Outputs  
The PTD08D210W is a high-performance dual 10-A  
output, non-isolated digital PowerTrain module. This  
module is the power conversion section of a digital  
power system which incorporates TI's UCD7242  
MOSFET/driver IC. The PTD08D210W must be used  
in conjunction with a digital power controller such as  
the UCD9240, UCD9220 or UCD9110 family. The  
PTD08D210W receives control signals from the  
digital controller and provides parametric and status  
information back to the digital controller. Together,  
PowerTrain modules and a digital power controller  
form a sophisticated, robust, and easily configured  
power management solution.  
4.75-V to 14-V Input Voltage  
Programmable Wide-Output Voltage  
(0.7 V to 3.6 V)  
Efficiencies up to 96%  
Digital I/O  
PWM signal  
Fault Flag (FF)  
Sychronous Rectifier Enable (SRE)  
Analog I/O  
Temperature  
Output currrent  
Operating from an input voltage range of 4.75 V to  
14 V, the PTD08D210W provides step-down power  
conversion to a wide range of output voltages from,  
0.7 V to 3.6 V. The wide input voltage range makes  
the PTD08D210W particularly suitable for advanced  
computing and server applications that utilize a  
loosely regulated 8-V, 9.6-V or 12-V intermediate  
distribution bus. Additionally, the wide input voltage  
range increases design flexibility by supporting  
operation with tightly regulated 5-V or 12-V  
intermediate bus architectures.  
Safety Agency Approvals: (Pending)  
UL/IEC/CSA-C22.2 60950-1  
Operating Temperature: –40°C to 85°C  
APPLICATIONS  
Digital Power Systems  
using UCD9XXX Digital Controllers  
The module incorporates output over-current and  
temperature monitoring which protects against most  
load faults. Output current and module temperature  
signals are provided for the digital controller to permit  
user defined over-current and over-temperature  
warning and fault scerarios.  
The module uses single-sided, pin-less surface  
mount construction to provide a low profile and  
compact footprint. The package is lead (Pb) - free  
and RoHS compatible.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
POWERTRAIN is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2010, Texas Instruments Incorporated  
PTD08D210W  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
www.ti.com  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.  
Standard PTD08D210W Application  
Digital  
Lines  
to/from  
Digital  
Controller  
18  
4
17  
5
15  
7
V
OA  
21  
22  
V
V
OA  
C
C
OA2  
330 mF  
+
OA1  
47 mF  
(Required)  
OA  
(Recommended)  
V
I
PGND 20  
PGND 19  
1
2
PTD08D210W  
V
V
GND  
I
I
V
OB  
10  
11  
V
V
OB  
+
OB  
C
C
I2  
22 mF  
C
C
I1  
330 mF  
(Recommended)  
OA2  
330 mF  
(Recommended)  
OB1  
47 mF  
(Required)  
+
3
16  
14  
6
12 13  
8
9
(Required)  
GND  
GND  
Analog  
Lines  
to  
Digital  
Controller  
UDG-09155  
2
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Copyright © 2009–2010, Texas Instruments Incorporated  
Product Folder Link(s): PTD08D210W  
PTD08D210W  
www.ti.com  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
ORDERING INFORMATION  
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see  
the TI website at www.ti.com.  
DATASHEET TABLE OF CONTENTS  
DATASHEET SECTION  
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS  
ELECTRICAL CHARACTERISTICS TABLE  
TERMINAL FUNCTIONS  
PAGE NUMBER  
3
4
5
TYPICAL CHARACTERISTICS (VI = 12V)  
TYPICAL CHARACTERISTICS (VI = 5V)  
TYPICAL APPLICATION SCHEMATIC  
6
8
10  
11  
12  
GRAPHICAL USER INTERFACE VALUES  
TAPE & REEL AND TRAY DRAWINGS  
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS  
(Voltages are with respect to GND)  
UNIT  
VI  
Input voltage  
16  
–40 to 85  
260(1)  
–55 to 125(2)  
275  
V
TA  
Operating temperature range Over VI range  
Treflow Solder reflow temperature  
Surface temperature of module body  
°C  
Tstg  
Storage temperature  
Mechanical shock  
Mechanical vibration  
Weight  
Per Mil-STD-883D, Method 2002.3, 1 msec, 1/2 sine, mounted  
Mil-STD-883D, Method 2007.2, 20-2000 Hz  
G
10  
3.9  
grams  
106 Hr  
MTBF Reliability  
Flammability  
Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign  
Meets UL94V-O  
13.3  
(1) During reflow do not elevate peak temperature of the module or internal components above the stated maximum.  
(2) The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65°C.  
Copyright © 2009–2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Link(s): PTD08D210W  
PTD08D210W  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
www.ti.com  
ELECTRICAL CHARACTERISTICS  
PTD08D210W  
TA= 25°C, FSW= 750kHz, VI= 12 V, VO= 1.2 V, CI1= 330 µF, CI2= 22 µF ceramic, CO1= 47 µF ceramic, CO2= 330 µF, IO= IO(max)  
single output (unless otherwise stated)  
,
PARAMETER  
TEST CONDITIONS  
PTD08D210W  
UNIT  
MIN  
TYP  
MAX  
10  
IO  
Output current  
Over VO range  
Over IO range  
Over IO range  
25°C, natural convection  
0
4.75  
0.7  
A
V
V
VI  
Input voltage range  
14  
3.6(1)  
VOADJ  
Output voltage adjust range  
VO = 3.3 V  
VO = 2.5 V  
VO = 1.8 V  
VO = 1.5 V  
VO = 1.2 V  
VO = 1.0 V  
92.8%  
91.4%  
89.1%  
87.7%  
85.6%  
84.0%  
11  
IO = 10 A,  
fs = 750 kHz  
h
Efficiency  
VOPP  
IB  
VO Ripple (peak-to-peak)  
Bias current  
20-MHz bandwidth  
mVPP  
mA  
PWM & SRE to AGND  
Standby  
6
VIH  
VIL  
High-level input voltage  
Low-level input voltage  
2.0  
5.5  
0.8  
SRE & PWM input levels  
V
Frequency range  
500(1)  
20  
1000  
kHz  
ns  
PWM input  
Pulse width limits  
Range  
-40  
-5  
125  
5
°C  
Accuracy, -40°C TA 85°C  
Slope  
°C  
TEMP output  
10  
720  
3.3  
mV/°C  
mV  
Offset, TA = 25°C  
VOH  
VOL  
ILIM  
High-level output voltage, IFAULT = 4mA  
Low-level output voltage, IFAULT = 4mA  
Overcurrent threshold; Reset, followed by auto-recovery  
Range  
2.7  
V
FAULT output  
IOUT output  
0
15(2)  
0.6  
A
V
0.15  
188  
0
3.5  
212  
Gain, 3A IO 10A  
200  
0.3  
10  
mV/A  
V
Offset, IO = 0A, VO = 1.2V  
Output Impedance  
0.76  
kΩ  
(3)  
Nonceramic  
Ceramic  
330  
CI  
External input capacitance  
External output capacitance  
µF  
(3)  
22  
(4)  
Nonceramic  
Ceramic  
330  
5000(5)  
Capacitance Value  
µF  
(4)  
CO  
47  
Equivalent series resistance (non-ceramic)  
1(6)  
mΩ  
(1) When operating at 12V input and 500kHz, VO is limited to 2.0V.  
(2) The current limit threshold is the sum of IO and the peak inductor ripple current.  
(3) A 22 µF ceramic input capacitor is required for proper operation. An additional 330 µF bulk capacitor rated for a minimum of 500mA rms  
of ripple current is recommended. When operating at frequencies > 500kHz the 22 µF ceramic capacitor is only recommended. Refer to  
the UCD9240 controller datasheet and user interface for application specific capacitor specifications.  
(4) A 47 µF ceramic output capacitor is required for basic operation. An additional 330 µF bulk capacitor is recommended for improved  
transient response. Refer to the UCD9240 controller datasheet and user interface for application specific capacitor specifications.  
(5) 5,000 µF is the calculated maximum output capacitance given a 1V/msec output voltage rise time. Additional capacitance or increasing  
the output voltage rise rate may trigger the overcurrent threshold at start-up. Refer to the UCD9240 controller datasheet and user  
interface for application specific capacitor specifications.  
(6) This is the minimum ESR for all non-ceramic output capacitance. Refer to the UCD9240 controller datasheet and user interface for  
application specific capacitor specifications.  
4
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Copyright © 2009–2010, Texas Instruments Incorporated  
Product Folder Link(s): PTD08D210W  
PTD08D210W  
www.ti.com  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
TERMINAL FUNCTIONS  
TERMINAL  
DESCRIPTION  
NAME  
NO.  
VI  
1, 2  
The positive input voltage power node to the module, which is referenced to common GND.  
The common ground connection for the VI and VO power connections.  
3, 8, 9, 19,  
20  
PGND  
VOA  
21, 22  
10, 11  
14  
The regulated positive power A output with respect to GND.  
VOB  
The regulated positive power B output with respect to GND.  
ISENSE-A  
ISENSE-B  
Current sense A output. The voltage level on this pin represents the average output current of the module.  
Current sense B output. The voltage level on this pin represents the average output current of the module.  
6
This is the PWM A input pin. It is a high impedance digital input that accepts 3.3-V or 5-V logic level signals up to  
1 MHz.  
PWM-A  
PWM-B  
18  
4
This is the PWM B input pin. It is a high impedance digital input that accepts 3.3-V or 5-V logic level signals up to  
1 MHz.  
Current limit fault flag A. The Fault signal is a 3.3-V digital output which is latched high after an over-current  
condition. The Fault is reset after a complete PWM cycle without an over-current condition (falling edge of the  
PWM).  
FF-A  
15  
7
Current limit fault flag A. The Fault signal is a 3.3-V digital output which is latched high after an over-current  
condition. The Fault is reset after a complete PWM cycle without an over-current condition (falling edge of the  
PWM).  
FF-B  
Synchronous Rectifier Enable A. This pin is a high impedance digital input. A 3.3 V or 5 V logic level signals is used  
to enable the synchronous rectifier switch. When this signal is high, the module will source and sink output current.  
When this signal is low, the module will only source current.  
SRE-A  
SRE-B  
17  
5
Synchronous Rectifier Enable B. This pin is a high impedance digital input. A 3.3 V or 5 V logic level signals is used  
to enable the synchronous rectifier switch. When this signal is high, the module will source and sink output current.  
When this signal is low, the module will only source current.  
AGND  
TSENSE  
12, 13  
16  
Analog ground return. It is the 0 Vdc reference for the control inputs.  
Temperature sense output. The voltage level on this pin represents the temperature of the module.  
This pad is electrically connected to PGND and is the primary thermal conduction cooling path for the module. This  
pad should be soldered to a grounded copper pad on the host board. For optimum cooling performance, the  
grounded copper pad should also be tied with multiple vias to the host board internal ground plane. See the Land  
Pattern drawing for package EFS for recommended pad dimensions.  
Thermal  
Pad  
XX  
XX  
TOP VIEW  
BOTTOM VIEW  
22  
21  
V
V
V
V
22  
I
I
O-A  
O-A  
2
2
21  
20  
19  
PGND  
3
4
5
6
7
8
9
3
4
5
6
7
8
9
PGND  
PGND  
PWM-A  
SRE-A  
20  
19  
PWM-B  
SRE-B  
18  
17  
16  
18  
17  
16  
I
-B  
SENSE  
T
FF-B  
PGND  
PGND  
SENSE  
FF-A  
15  
15  
Thermal  
Pad  
I
-A  
14  
13  
12  
SENSE  
AGND  
AGND  
14  
13  
V
10  
11  
10  
11  
O-B  
V
12  
O-B  
Copyright © 2009–2010, Texas Instruments Incorporated  
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5
Product Folder Link(s): PTD08D210W  
PTD08D210W  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
www.ti.com  
TYPICAL CHARACTERISTICS (VI = 12 V)  
(1)(2)  
.
100  
100  
90  
100  
V
= 3.3 V  
V
= 3.3 V  
V = 2.5 V  
O
O
V
= 2.5 V  
O
V
= 1.8 V  
O
O
90  
90  
80  
70  
80  
70  
80  
70  
V
= 1.8 V  
V
= 1.2 V  
O
O
V
= 1.8 V  
V
= 1.2 V  
V
O
O
V
= 1.2 V  
V
= 0.8 V  
O
O
= 0.8 V  
O
V
O
= 0.8 V  
60  
50  
40  
60  
50  
40  
60  
50  
40  
V
= 12 V  
V
I
= 12 V  
V = 12 V  
I
I
f
= 500 kHz  
f
= 750 kHz  
f
= 1 MHz  
SW  
SW  
SW  
0
2
4
6
8
10  
0
2
4
6
8
10  
0
2
4
6
8
10  
I
– Output Current – A  
I
– Output Current – A  
O
I – Output Current – A  
O
O
Figure 1. Efficiency  
Figure 2. Efficiency  
Figure 3. Efficiency  
3.0  
2.5  
3.0  
3.0  
2.5  
V = 12 V  
I
V
= 12 V  
V
= 12 V  
I
I
f
= 1 MHz  
f
= 500 kHz  
f
= 750 kHz  
SW  
SW  
SW  
2.5  
V
= 1.8 V  
O
V
= 1.8 V  
2.0  
1.5  
2.0  
1.5  
2.0  
1.5  
O
V
= 2.5 V  
V
O
= 2.5 V  
O
V
= 1.8 V  
V
O
= 3.3 V  
O
V
= 3.3 V  
O
1.0  
0.5  
0
1.0  
0.5  
0
1.0  
0.5  
0
V
= 1.2 V  
V
= 1.2 V  
O
O
V
= 1.2 V  
O
V
= 0.8 V  
6
V
= 0.8 V  
O
V
= 0.8 V  
6
O
O
0
2
4
8
10  
0
2
4
8
10  
0
2
4
6
8
10  
I
– Output Current – A  
O
I
– Output Current – A  
I – Output Current – A  
O
O
Figure 4. Power Dissipation  
Figure 5. Power Dissipation  
Figure 6. Power Dissipation  
90  
80  
70  
60  
50  
90  
80  
70  
60  
50  
90  
80  
70  
60  
50  
400 LFM  
400 LFM  
400 LFM  
200 LFM  
200 LFM  
200 LFM  
100 LFM  
100 LFM  
100 LFM  
Natural Convection  
40  
30  
20  
40  
30  
20  
40  
30  
20  
Natural Convection  
Natural Convection  
V = 12 V  
V = 12 V  
I
V = 12 V  
I
I
f
= 750 kHz  
f
= 1 MHz  
f
= 500 kHz  
P
+P  
1
P
+P  
1
P
+P  
1
SW  
SW  
SW  
D(VOA)  
D(VOB)  
D(VOA)  
D(VOB)  
D(VOA)  
D(VOB)  
0
2
3
4
5
0
2
3
4
5
0
2
3
4 5  
P
– Total Power Dissipation – W  
D
P
– Total Power Dissipation – W  
P – Total Power Dissipation – W  
D
D
Figure 7. Safe Operating Area  
Figure 8. Safe Operating Area  
Figure 9. Safe Operating Area  
(1) The electrical characteristic data (Figure 1 through Figure 6) has been developed from actual products tested at 25°C. This data is  
considered typical for the converter.  
(2) The temperature derating curves (Figure 7 through Figure 9) represent the conditions at which internal components are at or below the  
manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm,  
double-sided PCB with 2-oz. copper. See the Safe Operating Area application section of this datasheet.  
6
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Copyright © 2009–2010, Texas Instruments Incorporated  
Product Folder Link(s): PTD08D210W  
 
 
 
PTD08D210W  
www.ti.com  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
TYPICAL CHARACTERISTICS (VI = 5 V)  
(1)(2)  
.
100  
100  
90  
100  
V
= 3.3 V  
V
= 2.5 V  
V = 2.5 V  
O
V
= 2.5 V  
V
= 3.3 V  
V = 3.3 V  
O
O
O
O
O
90  
90  
80  
70  
80  
70  
80  
70  
V
= 1.8 V  
V
= 0.8 V  
V
O
= 1.8 V  
V = 1.8 V  
O
O
O
V
= 0.8 V  
V = 0.8 V  
O
O
V
= 1.2 V  
V
= 1.2 V  
V
= 1.2 V  
O
O
O
60  
50  
40  
60  
50  
60  
50  
40  
V
= 5 V  
V
= 5 V  
V = 5 V  
I
I
I
f
= 500 kHz  
f
= 750 kHz  
f
= 1 MHz  
SW  
SW  
SW  
40  
0
2
4
6
8
10  
0
0
0
2
4
6
8
10  
0
2
4
6
8 10  
I
– Output Current – A  
I
– Output Current – A  
I – Output Current – A  
O
O
O
Figure 10. Efficiency  
Figure 11. Efficiency  
Figure 12. Efficiency  
3.0  
3.0  
2.5  
3.0  
2.5  
V
I
= 5 V  
V = 5 V  
I
V
= 5 V  
I
f
= 750 kHz  
f
= 500 kHz  
f
= 1 MHz  
SW  
SW  
SW  
2.5  
V
= 3.3 V  
= 2.5 V  
V
= 3.3 V  
= 2.5 V  
O
O
O
V
= 3.3 V  
= 2.5 V  
O
V
V
O
V
O
2.0  
1.5  
2.0  
1.5  
2.0  
1.5  
1.0  
0.5  
0
1.0  
0.5  
0
1.0  
0.5  
0
V = 1.8 V  
O
V
= 1.8 V  
V
= 1.8 V  
O
O
V
= 1.2 V  
V
= 1.2 V  
O
O
V
= 1.2 V  
O
V
= 0.8 V  
V
= 0.8 V  
6
O
V
= 0.8 V  
O
O
0
2
4
6
8
10  
0
2
4
6
8
10  
2
4
8
10  
I
– Output Current – A  
I
– Output Current – A  
I – Output Current – A  
O
O
O
Figure 13. Power Dissipation  
Figure 14. Power Dissipation  
Figure 15. Power Dissipation  
90  
80  
70  
60  
50  
90  
80  
70  
60  
50  
90  
80  
70  
60  
50  
400 LFM  
400 LFM  
400 LFM  
200 LFM  
200 LFM  
100 LFM  
200 LFM  
100 LFM  
100 LFM  
40  
30  
20  
40  
30  
20  
40  
30  
20  
Natural Convection  
Natural Convection  
Natural Convection  
V
= 5 V  
I
V = 5 V  
I
V = 5 V  
I
f
= 750 kHz  
P
+P  
1
SW  
f
SW  
= 1 MHz  
f
= 500 kHz  
P
+P  
1
P
+P  
1
D(VOA)  
D(VOB)  
SW  
D(VOA)  
D(VOB)  
D(VOA)  
D(VOB)  
0
2
3
4
5
2
3
4
5
0
2
3
4
5
P
– Total Power Dissipation – W  
D
P
– Total Power Dissipation – W  
D
P
– Total Power Dissipation – W  
D
Figure 16. Safe Operating Area  
Figure 17. Safe Operating Area  
Figure 18. Safe Operating Area  
(1) The electrical characteristic data (Figure 10 through Figure 15) has been developed from actual products tested at 25°C. This data is  
considered typical for the converter.  
(2) The temperature derating curves (Figure 16 through Figure 18) represent the conditions at which internal components are at or below  
the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm,  
double-sided PCB with 2-oz. copper. See the Safe Operating Area application section of this datasheet.  
Copyright © 2009–2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
7
Product Folder Link(s): PTD08D210W  
 
 
 
PTD08D210W  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
www.ti.com  
TYPICAL CHARACTERISTICS  
CURRENT SENSE OUTPUT  
vs  
CURRENT SENSE OUTPUT  
vs  
TEMPERATURE SENSE  
vs  
OUTPUT CURRENT  
OUTPUT CURRENT  
JUNCTION TEMPERATURE  
2.0  
1.8  
1.6  
1.4  
2.0  
1.8  
1.6  
1.4  
2.0  
1.8  
1.6  
1.4  
V
= 12 V  
V = 5 V  
I
I
1.2  
1.0  
0.8  
1.2  
1.0  
0.8  
1.2  
1.0  
0.8  
0.6  
0.4  
0.6  
0.4  
0.6  
0.4  
0.2  
0
0.2  
0
0.2  
0
–50 –25  
0
25  
50  
75  
100 125 150  
0
2
4
6
8
10  
0
2
4
6
8
10  
T
– Junction Temperature – °C  
I
– Output Current – A  
I
– Output Current – A  
J
O
O
Figure 19.  
Figure 20.  
Figure 21.  
8
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Product Folder Link(s): PTD08D210W  
PTD08D210W  
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SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
APPLICATION INFORMATION  
Determining the Safe Operating Area  
3.0  
The Safe Operating Area (SOA) curves for the  
PTD08D210W are determined by the total power  
dissipation of the module, the maximum ambient  
temperature, and the minimum available airflow of the  
application. Operation below the application airflow  
curve is considered a thermally safe design. For a  
given SOA, refer to the Power Dissipation curves for  
the same input voltage and switching frequency to  
determine each output's power dissipation. Add the  
power dissipation of VOA and VOB to get the total power  
dissipation. The total power dissipation can then be  
used to determine the safe operating area for the  
application.  
V = 12 V  
I
f
= 750 kHz  
SW  
2.5  
V
= 1.8 V  
O
2.0  
1.5  
V
O
= 2.5 V  
V
= 3.3 V  
O
1.0  
0.5  
0
V
= 1.2 V  
O
For example, consider an application operating from a  
12-V input and a 750-kHz switching frequency,  
requiring 1.2 V @ 10 A and 3.3 V @ 6 A outputs. In  
order to determine the safe operating area the power  
dissipation for each of the outputs must first be  
determined. Using the VI = 12 V, fSW = 750 kHz Power  
Dissipation graph, the power dissipation for the 1.2 V  
@ 10 A output is 2 W and the power dissipation for the  
3.3 V @ 6 A output is 1.5 W. Adding the power  
dissipation for both outputs results in a total power  
dissipation of 3.5 W. The safe operating area can then  
be determined using the VI = 12V, fSW = 750 kHz SOA  
graph, the amount of airflow of the application and the  
3.5-W total power dissipation. At 3.5 W and 400 LFM,  
the application can operate up to 85°C, but when no  
airflow is available the maximum ambient temperature  
is limited to less than 71°C.  
V
= 0.8 V  
O
0
2
4
6
8
10  
I
– Output Current – A  
O
90  
80  
70  
60  
50  
400 LFM  
200 LFM  
100 LFM  
40  
30  
20  
Natural Convection  
V = 12 V  
I
f
= 750 kHz  
P
+P  
1
SW  
D(VOA)  
D(VOB)  
0
2
3
3.5  
4
5
P
– Total Power Dissipation – W  
D
NOTE  
Graphs above have been replicated from the Typical Characteristics section for this example  
The maximum output current for either output must not exceed 10 A.  
Copyright © 2009–2010, Texas Instruments Incorporated  
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SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
www.ti.com  
Digital Power  
Figure 22 shows the UCD9220 power supply controller working with a single PTD08D210W, dual-output module  
regulating two independent power supplies. The loop for each power supply is created by the respective voltage  
outputs feeding into the Error ADC differential inputs, and completed by DPWM outputs feeding the  
PTD08D210W module.  
V
IN  
+3.3 V  
1
2
V
V
IN  
IN  
22  
21  
V
V
OA  
3
PGND  
V
OUT-A  
OA  
15 FF-A  
4
5
6
12  
9
Vin/Iin  
PGND 20  
PGND 19  
FLT-1A  
DPWM-1A  
SRE-1A  
18 PWM-A  
17 SRE-A  
14 Isense-A  
RESET  
42  
CS-1A  
PTD08D210W  
7
13  
18  
2
FAULT-1B  
DPWM-1B  
SRE-1B  
11  
10  
V
7
4
5
6
FF-B  
OB  
10  
11  
19  
20  
V
PMBus-CLK  
PMBus-Data  
PMBus-Alert  
PMBus-CNTL  
OUT-B  
V
PWM-B  
OB  
CS-1B  
SRE-B  
PGND  
PGND  
8
9
8
14  
15  
3
FAULT-2A  
DPWM-2A  
SRE-2A  
21  
GPIO-1  
GPIO-2  
Isense-B  
AGND AGND  
22  
23  
UCD9220  
Tsense  
16  
TMUX-0  
TMUX-1  
CS-2A  
24  
12  
13  
25  
16  
17  
1
26  
27  
28  
29  
30  
31  
FAULT-3A  
DPWM-3A  
SRE-3A  
PowerGood  
TCK  
TDO/SYNC-OUT  
TDI/SYNC-IN  
TMS  
CS-3A  
46  
Temp  
EAP1  
37  
TRST  
43  
44  
45  
ADDR-0  
ADDR-1  
Vtrack  
38  
39  
EAN1  
EAP2  
48  
ADCref  
40  
EAN2  
UDG-09173  
Figure 22. Typical Dual-Output Application Schematic  
Note: A low dropout linear regulator such as the TI TPS715A33 can provide the 3.3-V bias power to the UCD9220.  
10  
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SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
Figure 23 shows the UCD9220 power supply controller working with a single PTD08D210W power module. The  
dual outputs of the PTD08D210W have been paralleled, allowing up to 20A of output current. When operating  
the PTD08D210W in parallel configuration the dual inputs must be tied together and driven from a single output  
of the digital power controller. Multiple PTD08D210W modules must not be paralleled.  
V
IN  
+3.3 V  
1
2
V
V
IN  
IN  
22  
21  
V
V
OA  
3
PGND  
V
OUT  
OA  
15 FF-A  
6
4
5
FLT-1A  
Vin/Iin  
PGND 20  
PGND 19  
18 PWM-A  
17 SRE-A  
14 Isense-A  
12  
9
DPWM-1A  
SRE-1A  
RESET  
42  
CS-1A  
PTD08D210W  
7
13  
18  
2
FAULT-1B  
DPWM-1B  
SRE-1B  
11  
10  
V
7
4
5
6
FF-B  
OB  
10  
11  
19  
20  
PMBus-CLK  
PMBus-Data  
PMBus-Alert  
PMBus-CNTL  
V
PWM-B  
OB  
CS-1B  
SRE-B  
PGND  
PGND  
9
8
8
14  
15  
3
FAULT-2A  
DPWM-2A  
SRE-2A  
21  
GPIO-1  
GPIO-2  
Isense-B  
AGND AGND  
22  
23  
UCD9220  
Tsense  
16  
TMUX-0  
TMUX-1  
CS-2A  
24  
12  
13  
25  
16  
17  
1
26  
27  
28  
29  
30  
31  
FAULT-3A  
DPWM-3A  
SRE-3A  
PowerGood  
TCK  
TDO/SYNC-OUT  
TDI/SYNC-IN  
TMS  
CS-3A  
46  
Temp  
EAP1  
37  
TRST  
43  
44  
45  
ADDR-0  
ADDR-1  
Vtrack  
38  
39  
EAN1  
EAP2  
48  
ADCref  
40  
EAN2  
UDG-01001  
Figure 23. Typical Paralleled-Output Application Schematic  
Note 1: A low dropout linear regulator such as the TI TPS715A33 can provide the 3.3-V bias power to the UCD9220.  
Note 2: An OR-gate such as the TI 74LVC1G32 should be used to sense a fault signal on either FF-A or FF-B.  
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UCD9240 Graphical User Interface (GUI)  
When using the UCD92x0 digital controller along with digital PowerTrain modules to design a digital power  
system, several internal parameters of the modules are required to run the Fusion Digital Power Designer GUI.  
See the plant parameters below for the PTD08D210W digital PowerTrain modules.  
Table 1. PTD08D210W Plant Parameters  
PTD08D210W Plant Parameters  
L (µH)  
DCR (m)  
RDS(on)-high (m)  
RDS(on)-low (m)  
0.47  
2.6  
15.5  
6.5  
Internal output capacitance is present on the digital PowerTrain modules themselves. When using the GUI  
interface this capacitance information must be included along with any additional external capacitance. See the  
capacitor parameters below for the PTD08D210W digital PowerTrain modules.  
Table 2. PTD08D210W Capacitor Parameters  
PTD08D210W Capacitor Parameters  
C (µF)  
ESR (m)  
ESL (nH)  
Quantity  
47  
1.5  
2.5  
1
12  
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SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
TAPE & REEL  
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PTD08D210W  
SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
www.ti.com  
TRAY  
14  
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SLTS295B DECEMBER 2009REVISED DECEMBER 2010  
REVISION HISTORY  
Changes from Revision A (FEBRUARY 2010) to Revision B  
Page  
Added Caution regarding paralleling multiple modules. ..................................................................................................... 11  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
18-Dec-2010  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
Request Free Samples  
Purchase Samples  
PTD08D210WAC  
PTD08D210WACT  
ACTIVE DIP MODULE  
ACTIVE DIP MODULE  
EFS  
22  
22  
36  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
Call TI  
Call TI  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
EFS  
250  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
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