REF3433-EP [TI]
增强型产品 3.3V 低温漂、低功耗、小型串联电压基准;
| 型号： | REF3433-EP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 增强型产品 3.3V 低温漂、低功耗、小型串联电压基准 |
| 文件： | 总28页 (文件大小：1990K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
REF34xx-EP 低温漂、低功耗、小型封装系列电压基准
1 特性
3 说明
1
•
初始精度：±0.05%（最大值）
温度系数：10ppm/°C（最大值）
REF34xx-EP 器件是一款低温漂
•
•
•
•
•
•
•
•
(10ppm/°C)、低功耗、高精度 CMOS 电压基准，具有
±0.05% 初始精度、低工作电流且功耗小于 95µA。该
器件还提供 3.8µVp-p/V 的极低输出噪声，这使得它在
用于噪声关键型系统中的高分辨率数据转换器时能够保
持较高的信号完整性。REF34xx-EP 采用小型 SOT-23
封装，具有更高的规格参数并且能够以引脚对引脚方式
替代 MAX607x 和 ADR34xx。REF34xx-EP 系列与大
多数 ADC 和 DAC 兼容。
输出电流：±10mA
低静态电流：95µA（最大值）
宽输入电压：12V
输出 1/f 噪声（0.1Hz 至 10Hz）：3.8µVPP/V
小型 6 引脚 SOT-23 封装
出色的长期稳定性（25ppm/1000 小时）
支持国防、航天和医疗 应用的 AEC-Q100：
–
–
–
–
–
–
–
受控基线
该器件的低输出电压迟滞和低长期输出电压漂移可进一
步提高稳定性和系统可靠性。器件的小尺寸和低工作电
流 (95µA) 特性使其非常适合便携式和电池供电 应用。
一个组装/测试基地
一个制造基地
具有扩展工作温度范围（–55°C 至 125°C）
延长了产品生命周期
延长了产品变更通知
产品可追溯性
REF34xx-EP 具有 –55°C 至 125°C 的宽额定工作温度
范围。有关其他电压选项，请联系 TI 销售代表。
器件信息(1)
部件名称
REF3425-EP
REF3430-EP
REF3433-EP
REF3440-EP
封装
封装尺寸（标称值）
2 应用
•
•
•
•
•
•
精密数据采集系统
SOT-23 (6)
2.90mm × 1.60mm
PLC 模拟 I/O 模块
现场发送器
工业仪表
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
测试设备
电源监控
简化原理图
不同温度条件下压降与电流负载间的关系
10 ꢀ
10 ꢀ
0.4
0.36
124 ꢀ
+125°C
0.32
œ
ADS1287
REF
Input Signal
1 nF
+
0.28
+25°C
0.24
VIN
-40°C
0.2
0.16
0.12
0.08
0.04
0
CIN
1 µF
COUT
10 µF
REF34xx-EP
Copyright © 2017, Texas Instruments Incorporated
0
5
10
Load Current (mA)
D001
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBAS942
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
目录
9.2 Functional Block Diagram ....................................... 13
9.3 Feature Description................................................. 13
9.4 Device Functional Modes........................................ 14
10 Application and Implementation........................ 15
10.1 Application Information.......................................... 15
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Typical Characteristics.............................................. 7
Parameter Measurement Information ................ 10
8.1 Solder Heat Shift..................................................... 10
8.2 Long-Term Stability................................................. 11
8.3 Power Dissipation ................................................... 11
8.4 Noise Performance ................................................. 12
Detailed Description ............................................ 13
9.1 Overview ................................................................. 13
10.2 Typical Application: Basic Voltage Reference
Connection............................................................... 15
11 Power Supply Recommendations ..................... 17
12 Layout................................................................... 18
12.1 Layout Guidelines ................................................. 18
12.2 Layout Example .................................................... 18
13 器件和文档支持 ..................................................... 19
13.1 文档支持................................................................ 19
13.2 相关链接................................................................ 19
13.3 接收文档更新通知 ................................................. 19
13.4 社区资源................................................................ 19
13.5 商标....................................................................... 19
13.6 静电放电警告......................................................... 19
13.7 术语表 ................................................................... 19
14 机械、封装和可订购信息....................................... 20
8
9
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision A (March 2019) to Revision B
Page
•
•
•
已添加 在整个数据表中添加了有关长期稳定性的信息............................................................................................................ 1
Added long-term stability in Electrical Characteristics table................................................................................................... 5
Added Long-Term Stability section in Parameter Measurement Information section .......................................................... 11
Changes from Original (December 2018) to Revision A
Page
•
已添加 向数据表添加了新器件................................................................................................................................................ 1
2
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
5 Device Comparison Table
PRODUCT
VOUT
2.5 V
3 V
REF3425-EP
REF3430-EP
REF3433-EP
REF3440-EP
3.3 V
4.096 V
6 Pin Configuration and Functions
DBV Package
6-Pin SOT-23
Top View
1
6
GND_F
OUT_F
OUT_S
5
2
GND_S
3
4
ENABLE
IN
Not to scale
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
1
NAME
GND_F
GND_S
ENABLE
IN
Ground
Ground
Input
Ground force connection.
Ground sense connection.
2
3
Enable connection. Enables or disables the device.
Input supply voltage connection.
4
Power
Output
Output
5
OUT_S
OUT_F
Reference voltage output sense connection.
Reference voltage output force connection.
6
Copyright © 2018–2019, Texas Instruments Incorporated
3
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
VREF + 0.05
–0.3
MAX
13
UNIT
IN
Input voltage
EN
V
IN + 0.3
5.5
Output voltage
VREF
–0.3
V
Output short circuit current
20
mA
Operating, Tj(2)
Storage, Tstg
–55
–65
150
Temperature
°C
170
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) By design, the device is specified functional over the operating temperature of –55°C to 150°C.
7.2 ESD Ratings
VALUE
±2500
±1500
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
12
UNIT
V
(1)
IN
EN
IL
Supply input voltage (IL = 0 mA, TA = 25°C)
Enable voltage
VREF + VDO
0
–10
–55
IN
V
Output current
10
mA
°C
Tj
Operating temperature
25
125
(1) Dropout voltage.
7.4 Thermal Information
REF34xx-EP
DBV (SOT-23)
6 PINS
185
THERMAL METRIC(1)
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
156
29.6
Junction-to-top characterization parameter
Junction-to-board characterization parameter
33.8
ψJB
29.1
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
7.5 Electrical Characteristics
At TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage
TA = 25°C
–0.05%
0.05%
10
accuracy
Output voltage
temperature
–55°C ≤ TA ≤ 125°C
2.5
ppm/°C
ppm/V
coefficient(1)
LINE AND LOAD REGULATION
VIN = 2.55 V to 12 V, TA = 25°C
2
ΔV(OΔVIN) Line regulation(2)
VIN = VREF + VDO to 12 V, –55°C ≤ TA ≤ 125°C
15
30
IL = 0 mA to 10 mA, VIN = 3
Sourcing
20
V, TA = 25°C
IL = 0 mA to 10 mA, VIN = 3
Sourcing
V, –55°C ≤ TA ≤ 125°C
REF3425-EP
40
43
48
60
REF3430-EP
REF3440-EP
REF3440-EP
REF3425-EP
REF3430-EP
REF3433-EP
REF3440-EP
IL = 0 mA to –10 mA, VIN
VREF + VDO, TA = 25°C
=
Sinking
Sinking
ΔV(OΔIL)
Load regulation(2)
ppm/mA
70
75
84
98
IL = 0 mA to –10 mA, VIN
=
VREF + VDO, –55°C ≤ TA
≤
125°C
Short-circuit
ISC
current (output
shorted to ground)
VREF = 0, TA = 25°C
18
22
mA
NOISE
ƒ = 0.1 Hz to 10 Hz
5
3.8
µV p-p/V
µV rms
Output voltage
noise(3)
en p-p
ƒ = 0.1 Hz to 10 Hz (REF3440-EP)
ƒ = 10 Hz to 10 kHz
24
ƒ = 1 kHz
0.25
0.2
Output voltage
noise density
en
ppm/√Hz
ƒ = 1 kHz (REF3440-EP)
LONG-TERM STABILITY
0 - 1000 hours at 35°C
25
10
Long-term
stability(4)
ppm
1000 - 2000 hours at 35°C
TURNON
tON
CAPACITIVE LOAD
Stable output
capacitor value
Turnon time
0.1% of output voltage settling, CL = 10 µF
2.5
ms
µF
CL
–55°C ≤ TA ≤ 125°C
0.1
10
(1) Temperature drift is specified according to the box method. See the Feature Description section for more details.
(2) The ppm/V and ppm/mA in line and load regulation can be also expressed as µV/V and µV/mA.
(3) The peak-to-peak noise measurement procedure is explained in more detail in the Noise Performance section.
(4) Long-term stability measurement procedure is explained in more in detail in the Long-Term Stability section.
Copyright © 2018–2019, Texas Instruments Incorporated
5
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
Electrical Characteristics (continued)
At TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT VOLTAGE
REF3425-EP
REF3430-EP
REF3433-EP
REF3440-EP
2.5
3
VREF
Output voltage
V
3.3
4.096
POWER SUPPLY
VIN
Input voltage
VREF + VDO
12
V
VIN = VREF + VDO to 12 V
VIN = VREF + VDO to 12 V
–55°C ≤ TA ≤ 125°C
Sourcing
10
Output current
capacity
IL
mA
Sinking
–10
Active mode
Shutdown mode
72
2.5
50
95
3
IQ
Quiescent current
Dropout voltage
µA
–55°C ≤ TA ≤ 125°C
IL = 0 mA, TA = 25°C
VDO
IL = 0 mA, –55°C ≤ TA ≤ 125°C
100
500
mV
IL = 10 mA, –55°C ≤ TA ≤ 125°C
Voltage reference in active mode (EN = 1)
Voltage reference in shutdown mode (EN = 0)
1.6
ENABLE pin
voltage
VEN
IEN
V
0.5
2
ENABLE pin
leakage current
VEN = VIN = 12 V, –55°C ≤ TA ≤ 125°C
1
µA
6
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
7.6 Typical Characteristics
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
81
80
79
78
77
76
75
74
73
72
79.5
79
2.6 V
3.3 V
5 V
12 V
78.5
78
77.5
77
76.5
76
-55
-35
-15
5
25
45
65
85
105 125
-55
-35
-15
5
25
45
65
85
105 125
Temperature (èC)
D004
Temperature (èC)
D003
Figure 1. VIN vs IQ Over Temperature
Figure 2. Quiescent Current vs Temperature
-20
800
720
640
560
480
400
320
240
160
80
CL = 1uF
CL = 10uF
-40
-60
-80
-100
-120
0
10
100
1k
10k
100k
10
100
1k
10k
100k
Frequency (Hz)
Frequency(Hz)
D005
D009
Figure 3. Power-Supply Rejection Ratio vs Frequency
Figure 4. Noise Performance 10 Hz to 10 kHz
ILOAD
ILOAD
+1mA
+1mA
+1mA
+1mA
-1mA
-1mA
1mA/div
4mV/div
1mA/div
4mV/div
VOUT
VOUT
250µs/div
250µs/div
(CL = 10µF, IOUT = 1mA)
(CL = 1µF, IOUT = 1mA)
D010
D010
Figure 6. Load Transient
Figure 5. Load Transient
Copyright © 2018–2019, Texas Instruments Incorporated
7
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
ILOAD
ILOAD
-10mA
+10mA
+10mA
+10mA
10mA/div
20mV/div
10mA/div
-10mA
+10mA
VOUT
VOUT
100mV/div
250µs/div
250µs/div
(CL = 1µF, IOUT = 10mA)
(CL = 10µF, IOUT = 10mA)
D010
D010
Figure 7. Load Transient
Figure 8. Load Transient
VIN
VIN
4V/div
4V/div
VOUT
VOUT
15mV/div
5mV/div
250µs/div
(CL = 1µF)
250µs/div
D011
D011
(CL = 10µF)
Figure 9. Line Transient
Figure 10. Line Transient
2.55
2.5
50%
40%
30%
20%
10%
0
2.45
2.4
2.35
2.3
2.25
2.2
2.15
2.1
-55
-35
-15
5
25
45
65
85
105 125
D017
Temperature (èC)
Solder Heat Shift (%)
D013
Refer to Solder Heat Shift for more information
Figure 11. Quiescent Current Shutdown Mode
Figure 12. Solder Heat Shift Distribution
8
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
En
1V/div
VOUT
Time 1s/div
0.5ms/div
D08_
D018
Figure 13. Turnon Time (Enable)
Figure 14. 0.1-Hz to 10-Hz Noise (VREF)
Copyright © 2018–2019, Texas Instruments Incorporated
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REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
8 Parameter Measurement Information
8.1 Solder Heat Shift
The materials used in the manufacture of the REF34xx-EP have differing coefficients of thermal expansion,
resulting in stress on the device die when the part is heated. Mechanical and thermal stress on the device die
can cause the output voltages to shift, degrading the initial accuracy specifications of the product. Reflow
soldering is a common cause of this error.
In order to illustrate this effect, a total of 32 devices were soldered on four printed circuit boards [16 devices on
each printed circuit board (PCB)] using lead-free solder paste and the paste manufacturer suggested reflow
profile. The reflow profile is as shown in Figure 15. The printed circuit board is comprised of FR4 material. The
board thickness is 1.65 mm and the area is 114 mm × 152 mm.
300
250
200
150
100
50
0
0
50
100
150
200
250
300
350
400
Time (seconds)
C01
Figure 15. Reflow Profile
The reference output voltage is measured before and after the reflow process; the typical shift is displayed in
Figure 16. Although all tested units exhibit very low shifts (< 0.01%), higher shifts are also possible depending on
the size, thickness, and material of the printed circuit board. An important note is that the histograms display the
typical shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on PCBs with
surface-mount components on both sides, causes additional shifts in the output bias voltage. If the PCB is
exposed to multiple reflows, the device must be soldered in the second pass to minimize its exposure to thermal
stress.
50%
40%
30%
20%
10%
0
D017
Solder Heat Shift (%)
Figure 16. Solder Heat Shift Distribution, VREF (%)
10
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
8.2 Long-Term Stability
One of the key parameters of the REF34xx-EP references is long-term stability. Figure 17 shows the typical drift
value for the REF34xx-EP is 25 ppm from 0 to 1000 hours. This parameter is characterized by measuring 32
units at regular intervals for a period of 1000 hours. It is important to understand that long-term stability is not
ensured by design and that the output from the device may shift beyond the typical 25 ppm specification at any
time. For systems that require highly stable output voltages over long periods of time, the designer should
consider burning in the devices prior to use to minimize the amount of output drift exhibited by the reference over
time.
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40
0
100 200 300 400 500 600 700 800 900 1000
Hours
D022
Figure 17. Long Term Stability - 1000 hours (VREF
)
8.3 Power Dissipation
The REF34xx-EP voltage references are capable of source and sink up to 10 mA of load current across the rated
input voltage range. However, when used in applications subject to high ambient temperatures, the input voltage
and load current must be carefully monitored to ensure that the device does not exceeded its maximum power
dissipation rating. The maximum power dissipation of the device can be calculated with Equation 1:
TJ = TA +P ì RqJA
D
where
•
•
•
•
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
(1)
Because of this relationship, acceptable load current in high temperature conditions may be less than the
maximum current-sourcing capability of the device. In no case should the device be operated outside of its
maximum power rating because doing so can result in premature failure or permanent damage to the device.
Copyright © 2018–2019, Texas Instruments Incorporated
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REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
8.4 Noise Performance
Typical 0.1-Hz to 10-Hz voltage noise can be seen in Figure 18. Device noise increases with output voltage and
operating temperature. Additional filtering can be used to improve output noise levels, although care must be
taken to ensure the output impedance does not degrade ac performance. Peak-to-peak noise measurement
setup is shown in Figure 18.
Time 1s/div
D08_
Figure 18. 0.1-Hz to 10-Hz Noise (VREF
)
12
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
9 Detailed Description
9.1 Overview
The REF34xx-EP is family of low-noise, precision bandgap voltage references that are specifically designed for
excellent initial voltage accuracy and drift. The Functional Block Diagram is a simplified block diagram of the
REF34xx-EP showing basic band-gap topology.
9.2 Functional Block Diagram
Enable
Blocks
GNDF
GNDS
EN
OUTF
OUTS
IN
Vdd
Digital
Inrush
Current
Limit
Bandgap
core
Buffer
9.3 Feature Description
9.3.1 Supply Voltage
The REF34xx-EP family of references features an extremely low dropout voltage. For loaded conditions, a typical
dropout voltage versus load is shown on the front page. The REF34xx-EP features a low quiescent current that
is extremely stable over changes in both temperature and supply. The typical room temperature quiescent
current is 72 µA, and the maximum quiescent current over temperature is just 95 µA. Supply voltages below the
specified levels can cause the REF34xx-EP to momentarily draw currents greater than the typical quiescent
current. Use a power supply with a fast rising edge and low output impedance to easily prevent this issue.
9.3.2 Low Temperature Drift
The REF34xx-EP is designed for minimal drift error, which is defined as the change in output voltage over
temperature. The drift is calculated using the box method, as described by Equation 2:
VREF(MAX) - VREF(MIN)
≈
∆
«
’
÷
◊
Drift =
ì 106
VREF ì Temperature Range
(2)
9.3.3 Load Current
The REF34xx-EP family is specified to deliver a current load of ±10 mA per output. The VREF output of the device
are protected from short circuits by limiting the output short-circuit current to 18 mA. The device temperature
increases according to Equation 3:
TJ = TA +P ì RqJA
D
where
•
•
•
•
TJ = junction temperature (°C),
TA = ambient temperature (°C),
PD = power dissipated (W), and
RθJA = junction-to-ambient thermal resistance (°C/W)
(3)
13
The REF34xx-EP maximum junction temperature must not exceed the absolute maximum rating of 150°C.
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
9.4 Device Functional Modes
9.4.1 EN Pin
When the EN pin of the REF34xx-EP is pulled high, the device is in active mode. The device must be in active
mode for normal operation. The REF34xx-EP can be placed in a low-power mode by pulling the ENABLE pin
low. When in shutdown mode, the output of the device becomes high impedance and the quiescent current of
the device reduces to 2 µA in shutdown mode. The EN pin must not be pulled higher than VIN supply voltage.
See the Thermal Information for logic high and logic low voltage levels.
9.4.2 Negative Reference Voltage
For applications requiring a negative and positive reference voltage, the REF34xx-EP and OPA735 can be used
to provide a dual-supply reference from a 5-V supply. Figure 19 shows the REF3425-EP used to provide a 2.5-V
supply reference voltage. The low drift performance of the REF34xx-EP complements the low offset voltage and
zero drift of the OPA735 to provide an accurate solution for split-supply applications. Take care to match the
temperature coefficients of R1 and R2.
+5 V
3
4
5
6
REF3425-EP
+2.5 V
2
1
R1
10 kΩ
R2
10 kΩ
+5 V
–2.5 V
OPA735
–5 V
Copyright © 2017, Texas Instruments Incorporated
Figure 19. REF3425-EP and OPA735 Create Positive and Negative Reference Voltages
14
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
As this device has many applications and setups, there are many situations that this data sheet can not
characterize in detail. Basic applications includes positive/negative voltage reference and data acquisition
systems. The table below shows the typical application of REF34xx-EP and its companion ADC/DAC.
Table 1. Typical Applications and Companion ADC/DAC
Applications
ADC/DAC
DAC8881, ADS8332, ADS8568, ADS8317,
ADS8588S, ADS1287
PLC - DCS
Display Test Equipment
ADS8332
ADUCM360
ADS7279
ADS1112
Field Transmitters - Pressure
Video Surveillance - Thermal Cameras
Medical Blood Glucose Meter
10.2 Typical Application: Basic Voltage Reference Connection
The circuit shown in Figure 20 shows the basic configuration for the REF34xx-EP references. Connect bypass
capacitors according to the guidelines in Input and Output Capacitors section.
10 ꢀ
10 ꢀ
124 ꢀ
œ
ADS1287
REF
Input Signal
1 nF
+
VIN
CIN
1 µF
COUT
10 µF
REF34xx-EP
Copyright © 2017, Texas Instruments Incorporated
Figure 20. Basic Reference Connection
10.2.1 Design Requirements
A detailed design procedure is described based on a design example. For this design example, use the
parameters listed in Table 2 as the input parameters.
Table 2. Design Example Parameters
DESIGN PARAMETER
Input voltage VIN
VALUE
5 V
Output voltage VOUT
2.5 V
1 µF
REF34xx-EP input capacitor
REF34xx-EP output capacitor
10 µF
Copyright © 2018–2019, Texas Instruments Incorporated
15
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
10.2.2 Detailed Design Procedure
10.2.2.1 Input and Output Capacitors
A 1-µF to 10-µF electrolytic or ceramic capacitor can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate. Connect an additional 0.1-µF ceramic capacitor in parallel to
reduce high frequency supply noise.
A ceramic capacitor of at least a 0.1 µF must be connected to the output to improve stability and help filter out
high frequency noise. An additional 1-µF to 10-µF electrolytic or ceramic capacitor can be added in parallel to
improve transient performance in response to sudden changes in load current; however, keep in mind that doing
so increases the turnon time of the device.
Best performance and stability is attained with low-ESR, low-inductance ceramic chip-type output capacitors
(X5R, X7R, or similar). If using an electrolytic capacitor on the output, place a 0.1-µF ceramic capacitor in parallel
to reduce overall ESR on the output.
10.2.2.2 4-Wire Kelvin Connections
Current flowing through a PCB trace produces an IR voltage drop, and with longer traces, this drop can reach
several millivolts or more, introducing a considerable error into the output voltage of the reference. A 1-in long, 5-
mm wide trace of 1-oz copper has a resistance of approximately 100 mΩ at room temperature; at a load current
of 10 mA, this can introduce a full millivolt of error. In an ideal board layout, the reference must be mounted as
close as possible to the load to minimize the length of the output traces, and, therefore, the error introduced by
voltage drop. However, in applications where this is not possible or convenient, force and sense connections
(sometimes referred to as Kelvin sensing connections) are provided as a means of minimizing the IR drop and
improving accuracy.
Kelvin connections work by providing a set of high impedance voltage-sensing lines to the output and ground
nodes. Because very little current flows through these connections, the IR drop across their traces is negligible,
and the output and ground voltage information can be obtain with minimum IR drop error.
It is always advantageous to use Kelvin connections whenever possible. However, in applications where the IR
drop is negligible or an extra set of traces cannot be routed to the load, the force and sense pins for both VOUT
and GND can simply be tied together, and the device can be used in the same fashion as a normal 3-terminal
reference (as shown in Figure 19).
10.2.2.3 VIN Slew Rate Considerations
In applications with slow-rising input voltage signals, the reference exhibits overshoot or other transient
anomalies that appear on the output. These phenomena also appear during shutdown as the internal circuitry
loses power.
To avoid such conditions, ensure that the input voltage waveform has both a rising and falling slew rate close to
6 V/ms.
10.2.2.4 Shutdown/Enable Feature
The REF34xx-EP references can be switched to a low power shutdown mode when a voltage of 0.5 V or lower is
input to the ENABLE pin. Likewise, the reference becomes operational for ENABLE voltages of 1.6 V or higher.
During shutdown, the supply current drops to less than 2 µA, useful in applications that are sensitive to power
consumption.
If using the shutdown feature, ensure that the ENABLE pin voltage does not fall between 0.5 V and 1.6 V
because this causes a large increase in the supply current of the device and may keep the reference from
starting up correctly. If not using the shutdown feature, however, the ENABLE pin can simply be tied to the IN
pin, and the reference remains operational continuously.
16
Copyright © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
10.2.3 Application Curves
2.55
2.5
79.5
79
2.45
2.4
78.5
78
2.35
2.3
77.5
77
2.25
2.2
2.15
2.1
76.5
76
-55
-35
-15
5
25
45
65
85
105 125
Temperature (èC)
D013
-55
-35
-15
5
25
45
65
85
105 125
Temperature (èC)
D004
Figure 22. Quiescent Current Shutdown Mode
Figure 21. Quiescent Current vs Temperature
11 Power Supply Recommendations
The REF34xx-EP family of references feature an extremely low-dropout voltage. These references can be
operated with a supply of only 50 mV above the output voltage. TI recommends a supply bypass capacitor
ranging between 0.1 µF to 10 µF.
Copyright © 2018–2019, Texas Instruments Incorporated
17
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
12 Layout
12.1 Layout Guidelines
Figure 23 illustrates an example of a PCB layout for a data acquisition system using the REF34xx-EP. Some key
considerations are:
•
•
•
•
Connect low-ESR, 0.1-µF ceramic bypass capacitors at VIN, VREF of the REF34xx-EP.
Decouple other active devices in the system per the device specifications.
Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.
Place the external components as close to the device as possible. This configuration prevents parasitic errors
(such as the Seebeck effect) from occurring.
•
Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when absolutely necessary.
12.2 Layout Example
C
GND_F 1
GND_S 2
6 OUT_F
5 OUT_S
REF34xx-EP
EN 3
4 IN
Figure 23. Layout Example
18
版权 © 2018–2019, Texas Instruments Incorporated
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com.cn
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
13 器件和文档支持
13.1 文档支持
13.1.1 相关文档
如需相关文档，请参阅：
•
•
《INA21x 电压输出、低侧或高侧测量、双向、零漂移系列分流监控器》，SBOS437
《低温漂双向单电源低侧电流检测参考设计》，TIDU357
13.2 相关链接
下表列出了快速访问链接。类别包括技术文档、支持和社区资源、工具和软件，以及立即订购快速访问。
表 3. 相关链接
器件
产品文件夹
单击此处
单击此处
单击此处
单击此处
立即订购
单击此处
单击此处
单击此处
单击此处
技术文档
单击此处
单击此处
单击此处
单击此处
工具与软件
单击此处
单击此处
单击此处
单击此处
支持和社区
单击此处
单击此处
单击此处
单击此处
REF3425-EP
REF3430-EP
REF3433-EP
REF3440-EP
13.3 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
13.4 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.5 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.7 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
版权 © 2018–2019, Texas Instruments Incorporated
19
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
ZHCSJ86B –DECEMBER 2018–REVISED APRIL 2019
www.ti.com.cn
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
20
版权 © 2018–2019, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
REF3425MDBVTEP
REF3430MDBVTEP
REF3433MDBVTEP
REF3440MDBVTEP
V62/18622-01XE
V62/18622-02XE
V62/18622-03XE
V62/18622-04XE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
6
6
6
250
250
250
250
250
250
250
250
RoHS & Green
RoHS & Green
RoHS & Green
RoHS & Green
RoHS & Green
RoHS & Green
RoHS & Green
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
1RWC
NIPDAUAG
NIPDAUAG
NIPDAUAG
NIPDAUAG
NIPDAUAG
NIPDAUAG
NIPDAUAG
1SVC
1SWC
1SXC
1RWC
1SXC
1SVC
1SWC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Apr-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
REF3425MDBVTEP
REF3430MDBVTEP
REF3433MDBVTEP
REF3440MDBVTEP
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
6
6
6
6
250
250
250
250
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
3.23
3.23
3.23
3.23
3.17
3.17
3.17
3.17
1.37
1.37
1.37
1.37
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Apr-2019
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
REF3425MDBVTEP
REF3430MDBVTEP
REF3433MDBVTEP
REF3440MDBVTEP
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
6
6
6
6
250
250
250
250
213.0
213.0
213.0
213.0
191.0
191.0
191.0
191.0
35.0
35.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/C 06/2021
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
重要声明和免责声明
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