REF5030AQDRQ1 [TI]
汽车类低噪声、极低温漂、精密 3V 串联电压基准 | D | 8 | -40 to 125;
| 型号： | REF5030AQDRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类低噪声、极低温漂、精密 3V 串联电压基准 | D | 8 | -40 to 125 |
| 文件： | 总26页 (文件大小：876K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
REF50xxA-Q1 Low-Noise, Very Low Drift, Precision Voltage Reference
1 Features
3 Description
The REF50xxA-Q1 family of devices is low-noise,
low-drift, very-high precision-voltage reference. These
reference devices are capable of both sinking and
sourcing, and are very robust with regard to line and
load changes.
1
•
Qualified for Automotive Applications
Low Temperature Drift
•
•
–
Standard Grade: 8 ppm/°C (max)
High Accuracy
Standard Grade: 0.1% (max)
–
Excellent temperature drift (3 ppm/°C) and high
accuracy (0.05%) are achieved using proprietary
design techniques. These features combined with
very low noise make the REF50xxA-Q1 family of
devices ideal for use in high-precision data
acquisition systems.
•
•
Low Noise: 3 μVPP/V
Excellent Long-Term Stability:
–
5 ppm/1000 hr (typ) after 1000 hours
•
•
High Output Current: ±10 mA
Temperature Range: –40°C to 125°C
Each reference voltage is available in a standard-
grade versions. The devices are offered in SO-8
packages and are specified from –40°C to 125°C.
2 Applications
•
•
•
•
•
•
16-Bit Data Acquisition Systems
ATE Equipment
Device Information(1)
PART NUMBER
REF5020A-Q1
REF5025A-Q1
REF5030A-Q1
REF5040A-Q1
REF5045A-Q1
REF5050A-Q1
PACKAGE
OUTPUT VOLTAGE
Industrial Process Control
Medical Instrumentation
Optical Control Systems
Precision Instrumentation
2.048 V
2.5 V
3 V
SOIC (8)
4.096 V
4.5 V
5 V
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
5 V
5 V
Input
Signal
0 V to 4 V
R1
50 ꢀꢀ
VDD
+IN
OPA365
ADS8326
C1
1.2 nF
±IN
REF
GND
REF5040A-Q1
VOUT
VIN
5 V
CBYPASS
1 µF
C2
22 µF
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
www.ti.com
Table of Contents
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 12
Application and Implementation ........................ 13
9.1 Application Information............................................ 13
9.2 Typical Applications ................................................ 13
1
2
3
4
5
6
7
Features.................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Simplified Schematic............................................. 1
Revision History..................................................... 2
Pin Configuration and Functions......................... 4
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ..................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information.................................................. 5
7.5 Electrical Characteristics: Per Device....................... 5
7.6 Electrical Characteristics: All Devices....................... 6
7.7 Typical Characteristics.............................................. 7
Detailed Description ............................................ 11
8.1 Overview ................................................................. 11
8.2 Functional Block Diagram ....................................... 11
9
10 Power Supply Recommendations ..................... 16
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 16
12 Device and Documentation Support ................. 17
12.1 Documentation Support ........................................ 17
12.2 Related Links ........................................................ 17
12.3 Trademarks........................................................... 17
12.4 Electrostatic Discharge Caution............................ 17
12.5 Glossary................................................................ 17
8
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (October 2013) to Revision H
Page
•
Added the Pin Configuration and Functions section, Recommended Operating Conditions table, Thermal
Information table, Feature Description section, Device Functional Modes section, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
Added A-Q1 to the end of the device numbers ..................................................................................................................... 1
Changed the MIN and MAX values for the REF5040 initial accuracy parameter in the Electrical Characteristics table ...... 5
•
•
Changes from Revision F (September 2011) to Revision G
Page
•
•
•
Deleted reference to high grade throughout the document.................................................................................................... 1
Deleted Package/Ordering Information table from datasheet ................................................................................................ 4
Deleted references to the MSOP-8 package and High-Grade from the THERMAL HYSTERESIS section of the
ELECTRICAL CHARACTERISTICS: ALL DEVICES table .................................................................................................... 6
•
•
Deleted references to the MSOP-8 package from the LONG-TERM STABILITY section of the ELECTRICAL
CHARACTERISTICS: ALL DEVICES table............................................................................................................................ 6
Deleted graphs for MSOP-8 package from TYPICAL CHARACTERISTICS section............................................................. 9
Changes from Revision E (August 2011) to Revision F
Page
•
Added REF5045AQDRQ1 HBM ESD rating of 1000 V.......................................................................................................... 4
2
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REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
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SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
Changes from Revision D (October, 2010) to Revision E
Page
•
•
•
•
•
Added Thermal Hysteresis parameters and specifications .................................................................................................... 6
Added Long-Term Stability parameters and specifications .................................................................................................... 6
Added Figure 22 through Figure 24 ....................................................................................................................................... 9
Added Thermal Hysteresis section....................................................................................................................................... 13
Revised Noise Performance section; added paragraph with links to applications articles .................................................. 14
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REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
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6 Pin Configuration and Functions
D Package
8-Pin SOIC
Top View
DNC
NC
DNC
1
2
3
4
8
7
6
5
V
IN
TEMP
GND
V
OUT
TRIM/NR
DNC = Do not connect
NC = No internal connection
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
1
DNC
—
Do not connect. Do not use.
8
GND
NC
4
7
3
5
2
6
—
—
O
I
Ground
No internal connection. Do not use.
TEMP
TRIM/NR
VIN
Temperature-dependent voltage output
Trim and noise reduction for ±15-mV output adjustment
Input supply voltage
I
VOUT
O
Reference voltage output
7 Specifications
7.1 Absolute Maximum Ratings(1)
MIN
MAX
18
UNIT
V
Input voltage
Output short-circuit
30
mA
°C
Operating temperature
Junction temperature (TJ max)
–40
–65
125
150
150
°C
Storage temperature (Tstg
)
°C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
7.2 ESD Ratings
VALUE
UNIT
REF5020A-Q1, REF5040A-Q1, AND REF5050A-Q1
Human-body model (HBM), per AEC Q100-002(1)
±500
±1000
200
V(ESD)
Electrostatic discharge
Charged-device model (CDM), per AEC Q100-011
Machine Model (MM)
V
REF5030A-Q1 AND REF5045A-Q1
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
Machine Model (MM)
±1000
±1000
200
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
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SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VIN
Supply input voltage
VOUT + 0.2(1)
18
V
(1) For VOUT ≤ 2.5 V, the minimum supply voltage is 2.7 V.
7.4 Thermal Information
D (SOIC)
8 PINS
107.1
48.8
THERMAL METRIC(1)
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
48.3
°C/W
Junction-to-top characterization parameter
Junction-to-board characterization parameter
6.8
ψJB
47.6
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
7.5 Electrical Characteristics: Per Device
TA = 25°C, ILOAD = 0, CL = 1 μF, VIN = (VOUT + 0.2 V) to 18 V (unless otherwise noted).
PARAMETER
REF5020 (VOUT = 2.048 V)(1)
TEST CONDITIONS
MIN
TYP
2.048
6
MAX
UNIT
V
VOUT
Output voltage
2.7 V < VIN < 18 V
Initial accuracy, standard grade
Output voltage noise
–0.1%
0.1%
f = 0.1 Hz to 10 Hz
f = 0.1 Hz to 10 Hz
f = 0.1 Hz to 10 Hz
f = 0.1 Hz to 10 Hz
f = 0.1 Hz to 10 Hz
f = 0.1 Hz to 10 Hz
μVPP
V
REF5025 (VOUT = 2.5 V)
VOUT Output voltage
2.5
7.5
3
Initial accuracy, standard grade
Output Voltage Noise
–0.1%
–0.1%
–0.1%
–0.1%
–0.1%
0.1%
0.1%
0.1%
0.1%
0.1%
μVPP
V
REF5030 (VOUT = 3 V)
VOUT Output voltage
Initial accuracy, standard grade
Output voltage noise
9
μVPP
V
REF5040 (VOUT = 4.096 V)
VOUT Output voltage
4.096
12
Initial accuracy, standard grade
Output voltage noise
μVPP
V
REF5045 (VOUT = 4.5 V)
VOUT Output voltage
4.5
13.5
5
Initial accuracy, standard grade
Output voltage noise
μVPP
V
REF5050 (VOUT = 5 V)
VOUT Output voltage
Initial accuracy, standard grade
Output voltage noise
15
μVPP
(1) For VOUT ≤ 2.5 V, the minimum supply voltage is 2.7 V.
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REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
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7.6 Electrical Characteristics: All Devices
Boldface limits apply over the specified temperature range, TA = –40°C to 125°C.
TA = 25°C, ILOAD = 0, CL = 1 μF, VIN = (VOUT + 0.2 V) to 18 V (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
3
MAX
UNIT
ppm/°C
ppm/V
ppm/V
ppm/V
ppm/mA
dVOUT/dT
Output voltage temperature drift, standard grade
REF5020 only(1)
Over temperature
8
1
VIN = 2.7 V to 18 V
0.1
0.1
0.2
20
dVOUT/dVIN
Line regulation
All other devices
All devices
VIN = VOUT + 0.2 V
1
Over temperature
1
REF5020 only
–10 mA < ILOAD < +10 mA, VIN = 3 V
30
–10 mA < ILOAD < +10 mA,
VIN = VOUT + 0.75 V
All other devices
All devices
20
30
50
ppm/mA
ppm/mA
dVOUT/dILOAD Load regulation
Over temperature,
–10 mA < ILOAD < +10 mA
ISC
Short-circuit current
VOUT = 0 V
25
10
mA
ppm
Cycle 1
Thermal hysteresis, (2) standard grade
Cycle 2
5
ppm
0 to 1000 hours
1000 to 2000 hours
At TA = 25°C
90
ppm/1000 hr
ppm/1000 hr
mV
Long-Term Stability
10
Voltage output, TEMP pin
Temperature sensitivity , TEMP pin
Turn-on settling time
575
2.64
200
Over temperature
To 0.1% with CL = 1 μF
mV/°C
μs
VOUT
+
(1)
VS
Power supply voltage
See Note
18
V
0.2(1)
0.8
1
mA
mA
Power supply, quiescent current
Over temperature
1.2
TEMPERATURE RANGE
Specified range
–40
–55
125
125
°C
°C
Operating range
Thermal resistance
150
°C/W
(1) For VOUT ≤ 2.5 V, the minimal supply voltage is 2.7 V.
(2) The Thermal Hysteresis section explains the thermal hysteresis procedure in detail.
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REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
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SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
7.7 Typical Characteristics
TA = 25°C, ILOAD = 0, VS = VOUT + 0.2 V (unless otherwise noted). For VOUT ≤ 2.5 V, the minimum supply voltage is 2.7 V.
Drift (ppm/°C)
Drift (ppm/°C)
Figure 1. Temperature Drift (0°C to 85°C)
Figure 2. Temperature Drift (–40°C to 125°C)
0.05
0.04
0.03
0.02
0.01
0
-0.01
-0.02
-0.03
-0.04
-0.05
-50
-25
0
25
50
75
100
125
Temperature (°C)
Output Initial Accuracy (%)
Figure 4. Output Voltage Accuracy vs Temperature
Figure 3. Output Voltage Initial Accuracy
160
140
120
100
80
0.8
+125°C
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
+25°C
-40°C
60
40
20
0
10
100
1k
10k
100k
-15
-10
-5
0
5
10
15
Frequency (Hz)
Load Current (mA)
Figure 5. Power-Supply Rejection Ratio vs Frequency
Figure 6. Dropout Voltage vs Load Current
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REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
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Typical Characteristics (continued)
TA = 25°C, ILOAD = 0, VS = VOUT + 0.2 V (unless otherwise noted). For VOUT ≤ 2.5 V, the minimum supply voltage is 2.7 V.
2.50125
2.50100
2.50075
2.50050
2.50025
2.50000
2.49975
2.49950
2.49925
2.49900
2.49875
0.9
0.8
0.7
0.6
0.5
0.4
0.3
+25°C
-40°C
+125°C
-10
-5
0
5
10
-50
-25
0
25
50
75
100
125
Load Current (mA)
Temperature (°C)
Figure 7. REF5025A-Q1 Output Voltage vs Load Current
Figure 8. TEMP Pin Output Voltage vs Temperature
1050
1000
+125°C
1000
950
900
850
800
750
700
650
600
950
900
850
800
750
700
650
600
+25°C
-40°C
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18
-50
-25
0
25
50
75
100
125
Temperature (°C)
VIN (V)
Figure 9. Quiescent Current vs Temperature
Figure 10. Quiescent Current vs Input Voltage
0.5
0.4
35
30
25
20
15
10
5
Sourcing
0.3
0.2
0.1
0
Sinking
-0.1
-0.2
-0.3
-0.4
-0.5
0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 11. Line Regulation vs Temperature
Figure 12. Short-Circuit Current vs Temperature
8
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Typical Characteristics (continued)
TA = 25°C, ILOAD = 0, VS = VOUT + 0.2 V (unless otherwise noted). For VOUT ≤ 2.5 V, the minimum supply voltage is 2.7 V.
VIN
2V/div
VOUT
1V/div
1s/div
40ms/div
Figure 13. Noise
Figure 14. Startup (REF5025A-Q1, CL = 1 μF)
+1mA
VIN
ILOAD
5V/div
-1mA
-1mA
1mA/div
5mV/div
VOUT
VOUT
1V/div
400ms/div
20ms/div
Figure 15. Startup (REF5025A-Q1, CL = 10 μF)
Figure 16. Load Transient (CL = 1 μF, IOUT = 1 mA)
ILOAD
+1mA
+10mA
+10mA
10mA/div
ILOAD
-1mA
-1mA
1mA/div
5mV/div
-10mA
VOUT
VOUT
2mV/div
20ms/div
100ms/div
Figure 17. Load Transient (CL = 1 μF, IOUT = 10 mA)
Figure 18. Load Transient (CL = 10 μF, IOUT = 1 mA)
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Typical Characteristics (continued)
TA = 25°C, ILOAD = 0, VS = VOUT + 0.2 V (unless otherwise noted). For VOUT ≤ 2.5 V, the minimum supply voltage is 2.7 V.
ILOAD
+10mA
-10mA
-10mA
10mA/div
2mV/div
VIN
500mV/div
5mV/div
VOUT
VOUT
100ms/div
20ms/div
Figure 19. Load Transient (CL = 10 μF, IOUT = 10 mA)
Figure 20. Line Transient (CL = 1 μF)
250
200
150
100
50
96 Units
SO-8 Package
VIN
500mV/div
VOUT
5mV/div
0
-50
100ms/div
0
100 200 300 400 500 600 700 800 900 1000
Hours
Figure 21. Line Transient (CL = 10 μF)
Figure 22. REF50xxA-Q1 Long-Term Stability (First 1000
Hours)
80
60
250
96 Units
SO-8 Package
96 Units
SO-8 Package
200
40
150
100
50
20
0
-20
-40
0
-50
1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000
Hours
0
200 400 600 800 1000 1200 1400 1600 1800 2000
Hours
Figure 23. REF50xxA-Q1 Long-Term Stability (Second 1000
Hours)
Figure 24. REF50xxA-Q1 Long-Term Stability (2000 Hours)
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8 Detailed Description
8.1 Overview
The REF50xxA-Q1 family of devices is a low-noise, precision-bandgap voltage reference that is specifically
designed for excellent initial voltage accuracy and drift. See the Functional Block Diagram section for a simplified
block diagram of the REF50xxA-Q1 family of devices.
8.2 Functional Block Diagram
VIN
REF50xxA-Q1
R2
R1
αT
(10 µA
at 25°C)
VOUT
R4
TEMP
αT
10 kΩ
1.2 V
R3
TRIM/NR
1 kΩ
R5
60 kΩ
GND
8.3 Feature Description
8.3.1 Supply Voltage
The REF50xxA-Q1 family of voltage references features extremely low dropout voltage. With the exception of the
REF5020A-Q1 device, which has a minimum supply requirement of 2.7 V, these references can operate with a
supply of 200 mV above the output voltage in an unloaded condition. For loaded conditions, Figure 6 in the
Typical Characteristics section shows a typical dropout voltage versus load plot.
8.3.2 Using the TRIM/NR Pin
The REF50xxA-Q1 family of devices provides a very accurate voltage output. However, VOUT can be adjusted to
reduce noise and shift the output voltage from the nominal value by configuring the trim and noise reduction pin
(TRIM/NR, pin 5). The TRIM/NR pin provides a ±15-mV adjustment of the device bandgap, which produces a
±15-mV change on the VOUT pin. Figure 25 shows a typical circuit using the TRIM/NR pin to adjust VOUT. When
using this technique, the temperature coefficients of the resistors can degrade the temperature drift at the output.
+VSUPPLY
REF50xxA-Q1
DNC
VIN
DNC
NC
VOUT
TEMP
GND TRIM/NR
10 kΩ
1 kΩ
470 Ω
Figure 25. VOUT Adjustment Using TRIM/NR Pin
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Feature Description (continued)
The REF50xxA-Q1 family of devices allows access to the bandgap through the TRIM/NR pin. Placing a capacitor
from the TRIM/NR pin to GND (as shown in Figure 26) in combination with the internal 1-kΩ resistor creates a
low-pass filter that lowers the overall noise measured on the VOUT pin. A capacitance of 1 μF is suggested for a
low-pass filter with a corner frequency of 14.5 Hz. Higher capacitance results in a lower cutoff frequency.
+VSUPPLY
REF50xxA-Q1
DNC
VIN
DNC
NC
VOUT
TEMP
GND TRIM/NR
C1
1 µF
Figure 26. Noise Reduction Using TRIM/NR Pin
8.3.3 Temperature Drift
The REF50xxA-Q1 family of devices is designed for minimal drift error, which is defined as the change in output
voltage over temperature. The drift is calculated using the box method. Use Equation 1 to calculate the drift.
VOUTMAX * VOUTMIN
6
Drift + ǒ
Ǔ
10 (ppm)
VOUT Temp Range
(1)
The REF50xxA-Q1 family of devices features a maximum drift coefficient of 8 ppm/°C for the standard-grade.
8.3.4 Temperature Monitoring
The temperature output pin (TEMP, pin 3) provides a temperature-dependent voltage output with approximately
60-kΩ source impedance. As shown in Figure 8, the output voltage follows the nominal relationship:
VTEMP PIN = 509 mV + 2.64 × T(°C)
(2)
This pin indicates general chip temperature, accurate to approximately ±15°C. Although this pin is not generally
suitable for accurate temperature measurements, it can be used to indicate temperature changes or for
temperature compensation of analog circuitry. A temperature change of 30°C corresponds to an approximate 79-
mV change in voltage at the TEMP pin.
The TEMP pin has high output impedance (see the Functional Block Diagram section). Loading this pin with a
low-impedance circuit induces a measurement error; however, it does not have any effect on VOUT accuracy.
To avoid errors caused by low-impedance loading, buffer the TEMP pin output with a suitable low-temperature
drift op amp, such as the OPA333, OPA335, or OPA376, as shown in Figure 27.
+V
REF50xxA-Q1
DNC
VIN
DNC
VTEMP
NC
OPA(1)
2.6 mV/°C
VOUT
TEMP
GND TRIM/NR
(1) Low drift op amp, such as the OPA333, OPA335, or OPA376 device.
Figure 27. Buffering the TEMP Pin Output
8.4 Device Functional Modes
The REF50xxA-Q1 family of devices can only operate in an on or off mode. As long as a sufficient input supply
voltage is made available to device, the device performs in standard operation. The device cannot be placed in a
low power or shutdown mode.
12
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Product Folder Links: REF5020A-Q1 REF5025A-Q1 REF5030A-Q1 REF5040A-Q1 REF5045A-Q1 REF5050A-Q1
REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
www.ti.com
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 Thermal Hysteresis
Thermal hysteresis for the REF50xxA-Q1 family of devices is defined as the change in output voltage after
operating the device at 25°C, cycling the device through the specified temperature range, and returning to 25°C.
Use Equation 3 to calculate the thermal hysteresis.
æ
ö
VPRE - VPOST
VHYST
=
× 106 (ppm)
ç
÷
ç
÷
VNOM
è
ø
where
•
•
•
•
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pretemperature cycling
VPOST = output voltage measured after the device has been cycled from 25°C through the specified
temperature range of –40°C to +125°C and returned to 25°C
(3)
9.2 Typical Applications
9.2.1 Standalone Applications
Figure 28 shows the typical connections for the REF50xxA-Q1 family of devices.
+VSUPPLY
REF50xxA-Q1
DNC
VIN
DNC
NC
CBYPASS
VOUT
VOUT
TEMP
1 mF to 10 mF
CL
1 mF to 50 mF
GND TRIM/NR
Figure 28. Basic Connections
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13
Product Folder Links: REF5020A-Q1 REF5025A-Q1 REF5030A-Q1 REF5040A-Q1 REF5045A-Q1 REF5050A-Q1
REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
www.ti.com
Typical Applications (continued)
9.2.1.1 Design Requirements
A supply bypass capacitor with a value between 1 μF to 10 μF is recommended. A 1-μF to 50-μF, low-ESR
output capacitor (CL) must be connected from VOUT to GND. The ESR value should be less than or equal to 1.5
Ω. The ESR minimizes gain peaking of the internal 1.2-V reference and thus reduces noise at the VOUT pin.
9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Power Dissipation
The REF50xxA-Q1 family of devices is specified to deliver current loads of ±10 mA over the specified input
voltage range. The temperature of the device increases according Equation 4.
TJ = TA + PD × RθJA
where
•
•
•
•
TJ = Junction temperature (°C)
TA = Ambient temperature (°C)
PD = Power dissipated (W)
RθJA = Junction-to-ambient thermal resistance (°C/W)
(4)
The junction temperature of the REF50xxA-Q1 family of devices must not exceed the absolute maximum rating
of 150°C.
9.2.1.2.2 Noise Performance
The Electrical Characteristics: Per Device section specifies the typical voltage noise at 0.1 Hz to 10 Hz for each
member of the REF50xxA-Q1 family of devices. The noise voltage increases with output voltage and operating
temperature. Additional filtering can be used to improve output noise levels, although care should be taken to
ensure the output impedance does not degrade performance.
For additional information about how to minimize noise and maximize performance in mixed-signal applications,
such as data converters, refer to the series of Analog Applications Journal articles entitled, How a Voltage
Reference Affects ADC Performance. See the Related Documentation section for a list of these articles.
9.2.1.3 Application Curves
1000
500
4.0987
4.0981
4.0975
4.0969
4.0963
V OUT(1) = ꢀ40qC
V OUT(2) = 42.5qC
V OUT(3) = 125qC
0
4.0997
4.0977
4.0957
0
125
250
375
500
-10
-5
0
5
10
Time (s)
D002
Input Current (mA)
D001
Figure 29. Transient Behavior of VOUT
Figure 30. DC Analysis of VOUT Across Various
Temperatures and the Full Output-Current Range
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REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
www.ti.com
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
Typical Applications (continued)
9.2.2 Negative-Reference Voltage Applications
For applications requiring a negative and positive reference voltage, the REF50xxA-Q1 family of devices and the
OPA735 device can be used to provide a dual-supply reference from a 5-V supply. Figure 31 shows the
REF5025A-Q1 used to provide a 2.5-V supply reference voltage. The low drift performance of the REF50xxA-Q1
family of devices complements the low offset voltage and zero drift of the OPA735 device to provide an accurate
solution for split-supply applications. Care must be taken to match the temperature coefficients of R1 and R2.
5 V
REF5025A-Q1
DNC
VIN
DNC
NC
VOUT
2.5 V
TEMP
1 mF
GND TRIM/NR
R1
10kW
R2
10 kW
5 V
-2.5 V
OPA735
-5 V
NOTE: Bypass capacitors not shown.
Figure 31. The REF5025A-Q1 and OPA735 Create Positive and Negative Reference Voltages
9.2.3 Data-Acquisition Applications
Data acquisition systems often require stable voltage references to maintain accuracy. The REF50xxA-Q1 family
of devices features low noise, very low drift, and high initial accuracy for high-performance data converters.
Figure 32 shows the REF5040A-Q1 in a basic data acquisition system.
5 V
5 V
Input
Signal
0 V to 4 V
R1
50 ꢀꢀ
VDD
OPA365
+IN
ADS8326
REF
C1
1.2 nF
±IN
GND
REF5040A-Q1
VOUT
VIN
5 V
CBYPASS
1 µF
C2
22 µF
GND
Figure 32. Basic Data Acquisition System
Copyright © 2008–2015, Texas Instruments Incorporated
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15
Product Folder Links: REF5020A-Q1 REF5025A-Q1 REF5030A-Q1 REF5040A-Q1 REF5045A-Q1 REF5050A-Q1
REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
www.ti.com
10 Power Supply Recommendations
The REF50xxA-Q1 family of voltage references features extremely low dropout voltage. With the exception of the
REF5020A-Q1 device, which has a minimum supply requirement of 2.7 V, these references can operate with a
supply of 200 mV above the output voltage in an unloaded condition. A supply bypass capacitor with a value
ranging between 0.1 µF and 10 µF is recommended.
11 Layout
11.1 Layout Guidelines
Refer to Figure 33 and use the following guidelines for proper layout design:
•
•
•
•
Connect low-ESR, 0.1-μF ceramic bypass capacitors at the VIN and VOUT pins.
Decouple other active devices in the system per the device specifications.
Use a solid ground plane to help distribute heat and reduce electromagnetic-interference (EMI) noise pickup.
Place the external components as close to the device as possible. This configuration prevents parasitic errors
(such as the Seebeck effect) from occurring.
•
•
Minimize trace length between the reference and bias connections to the end device to reduce noise pickup.
Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible and only make perpendicular crossings when absolutely necessary.
11.2 Layout Example
V
IN
DNC
NC
DNC
High-Frequency
Bypass Capacitor
Input
Power
V
OUT
V
Low-ESR
Capacitor
IN
REF50xx-Q1
OPA333
±IN
+IN
V±
TEMP
GND
REF
V
ADC
OUT
TRIM/NR
Low-Pass
Noise Filter
Capacitor
V+
OUT
Input
Power
Buffered
TEMP
Via to Power Ground Plane
Figure 33. REF50xxA-Q1 Layout Example
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Product Folder Links: REF5020A-Q1 REF5025A-Q1 REF5030A-Q1 REF5040A-Q1 REF5045A-Q1 REF5050A-Q1
REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
www.ti.com
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
•
ADS8326 16-Bit, High-Speed, 2.7V to 5.5V microPower Sampling ANALOG-TO-DIGITAL CONVERTER,
SBAS343
•
Analog Applications Journal—How a Voltage Reference Affects ADC Performance:
–
–
–
Part 1, SLYT331
Part 2, SLYT339
Part 3, SLYT355
•
•
•
OPA333 1.8-V, microPower, CMOS Operational Amplifiers, Zero-Drift Series, SBOS351
OPA333-Q1 1.8-V MICROPOWER CMOS OPERATIONAL AMPLIFIER ZERO-DRIFT SERIES, SBOS522
OPA335 0.05μV/°C max, SINGLE-SUPPLY CMOS OPERATIONAL AMPLIFIERS Zerø-Drift Series,
SBOS245
•
•
OPA365 50MHz, Low-Distortion, High CMRR, RRI/O, Single-Supply OPERATIONAL AMPLIFIER, SBOS365
OPA365-Q1 50-MHz Low-Distortion High-CMRR Rail-to-Rail I/O, Single-Supply Operational Amplifier,
SBOS512
•
•
•
OPA376 Low-Noise, Low Quiescent Current, Precision Operational Amplifier e-trim™ Series, SBOS406
OPA376-Q1 Low-Noise, Low Quiescent Current, Precision Operational Amplifier e-trim™ Series, SBOS549
OPA735 0.05μV/°C max, SINGLE-SUPPLY CMOS OPERATIONAL AMPLIFIERS Zerø-Drift Series,
SBOS282
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
PARTS
PRODUCT FOLDER
SAMPLE & BUY
REF5020A-Q1
REF5025A-Q1
REF5030A-Q1
REF5040A-Q1
REF5045A-Q1
REF5050A-Q1
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
12.3 Trademarks
All trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
Copyright © 2008–2015, Texas Instruments Incorporated
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Product Folder Links: REF5020A-Q1 REF5025A-Q1 REF5030A-Q1 REF5040A-Q1 REF5045A-Q1 REF5050A-Q1
REF5020A-Q1, REF5025A-Q1, REF5030A-Q1
REF5040A-Q1, REF5045A-Q1, REF5050A-Q1
SBOS456H –SEPTEMBER 2008–REVISED FEBRUARY 2015
www.ti.com
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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Product Folder Links: REF5020A-Q1 REF5025A-Q1 REF5030A-Q1 REF5040A-Q1 REF5045A-Q1 REF5050A-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
REF5020AQDRQ1
REF5025AQDRQ1
REF5030AQDRQ1
REF5040AQDRQ1
REF5045AQDRQ1
REF5050AQDRQ1
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
8
8
8
8
8
8
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
RFQ
5020
A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
D
D
D
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
RFQ
5025
A
RFQ
5030
A
RFQ
5040
A
RFQ
5045
A
RFQ
5050
A
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
REF5020AQDRQ1
REF5025AQDRQ1
REF5030AQDRQ1
REF5040AQDRQ1
REF5045AQDRQ1
REF5050AQDRQ1
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
8
8
8
8
8
8
2500
2500
2500
2500
2500
2500
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
6.4
6.4
6.4
6.4
6.4
6.4
5.2
5.2
5.2
5.2
5.2
5.2
2.1
2.1
2.1
2.1
2.1
2.1
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
REF5020AQDRQ1
REF5025AQDRQ1
REF5030AQDRQ1
REF5040AQDRQ1
REF5045AQDRQ1
REF5050AQDRQ1
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
8
8
8
8
8
8
2500
2500
2500
2500
2500
2500
367.0
367.0
367.0
367.0
367.0
356.0
367.0
367.0
367.0
367.0
367.0
356.0
35.0
35.0
35.0
35.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
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