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SM72480SDX-120/NOPB [TI]

1.6V，LLP-6 出厂预设温度开关和温度传感器 | NGF | 6 | -50 to 150;
SM72480SDX-120/NOPB
型号： SM72480SDX-120/NOPB
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

1.6V，LLP-6 出厂预设温度开关和温度传感器 | NGF | 6 | -50 to 150

开关 温度传感 传感器 温度传感器
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SM72480  
www.ti.com  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
SM72480 SolarMagic 1.6V, WSON-6 Factory Preset Temperature Switch and Temperature  
Sensor  
Check for Samples: SM72480  
1
FEATURES  
DESCRIPTION  
The SM72480 is a low-voltage, precision, dual-output,  
low-power temperature switch and temperature  
sensor. The temperature trip point (TTRIP) is set at the  
factory to be 120°C. Built-in temperature hysteresis  
(THYST) keeps the output stable in an environment of  
temperature instability.  
2
•
Renewable Energy Grade  
Low 1.6V Operation  
•
•
Latching Function: Device Can Latch the Over  
Temperature Condition  
•
•
Push-pull and Open-Drain Temperature Switch  
Outputs  
In normal operation the SM72480 temperature switch  
outputs assert when the die temperature exceeds  
TTRIP. The temperature switch outputs will reset when  
the temperature falls below a temperature equal to  
(TTRIP − THYST). The OVERTEMP digital output, is  
active-high with a push-pull structure, while the  
OVERTEMP digital output, is active-low with an open-  
drain structure.  
Very Linear Analog VTEMP Temperature Sensor  
Output  
•
•
•
VTEMP Output Short-circuit Protected  
2.2 mm by 2.5 mm (typ) WSON-6 Package  
Excellent Power Supply Noise Rejection  
APPLICATIONS  
The analog output, VTEMP, delivers an analog output  
voltage with Negative Temperature Coefficient —  
NTC.  
•
•
•
•
•
PV Power Optimizers  
Wireless Transceivers  
Battery Management  
Automotive  
Driving the TRIP TEST input high: (1) causes the  
digital outputs to be asserted for in-situ verification  
and, (2) causes the threshold voltage to appear at the  
VTEMP output pin, which could be used to verify the  
temperature trip point.  
Disk Drives  
KEY SPECIFICATIONS  
The SM72480's low minimum supply voltage makes it  
ideal for 1.8 volt system designs. Its wide operating  
range, low supply current , and excellent accuracy  
provide a temperature switch solution for a wide  
range of commercial and industrial applications.  
•
•
•
Supply Voltage 1.6V to 5.5V  
Supply Current 8 μA (typ)  
Accuracy, Trip Point Temperature 0°C to 150°C  
±2.2°C  
•
•
•
•
Accuracy, VTEMP 0°C to 150°C ±2.3°C  
VTEMP Output Drive ±100 μA  
Operating Temperature −50°C to 150°C  
Hysteresis Temperature 4.5°C to 5.5°C  
Connection Diagram  
TRIP  
TEST  
1
2
3
6
5
4
V
TEMP  
GND  
DAP  
OVERTEMP  
V
DD  
OVERTEMP  
Figure 1. WSON-6 - Top View  
See Package Number NGF0006A  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2010–2013, Texas Instruments Incorporated  
SM72480  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
www.ti.com  
Typical Transfer Characteristic  
Figure 2. VTEMP Analog Voltage vs Die Temperature  
3500  
3000  
2500  
120oC œ 125oC Trip  
105oC Trip  
2000  
1500  
1000  
500  
0
-50  
0
50  
100  
150  
DIE TEMPERATURE (oC)  
Block Diagram  
V
DD  
4
TRIP TEST = 0  
(Default)  
SM72480  
6
3
V
TEMP  
TRIP TEST = 1  
OVERTEMP  
V
V
TRIP  
TS  
V
DD  
TEMP  
SENSOR  
TEMP  
5
THRESHOLD  
OVERTEMP  
1
2
GND  
TRIP  
TEST  
PIN DESCRIPTIONS  
Pin  
Name  
No.  
Type  
Equivalent Circuit  
Description  
V
DD  
TRIP TEST pin. Active High input.  
If TRIP TEST = 0 (Default) then:  
VTEMP = VTS, Temperature Sensor Output Voltage  
If TRIP TEST = 1 then:  
OVERTEMP and OVERTEMP outputs are asserted and  
VTEMP = VTRIP, Temperature Trip Voltage.  
This pin may be left open if not used.  
TRIP  
TEST  
Digital  
Input  
1
1 mA  
GND  
2
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Product Folder Links: SM72480  
SM72480  
www.ti.com  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
PIN DESCRIPTIONS (continued)  
Pin  
No.  
Name  
Type  
Equivalent Circuit  
Description  
V
DD  
Over Temperature Switch output  
Active High, Push-Pull  
Asserted when the measured temperature exceeds the Trip Point  
Temperature or if TRIP TEST = 1  
Digital  
Output  
5
OVERTEMP  
This pin may be left open if not used.  
GND  
Over Temperature Switch output  
Active Low, Open-drain (See OVERTEMP OPEN-DRAIN DIGITAL  
OUTPUT regarding required pull-up resistor.)  
Asserted when the measured temperature exceeds the Trip Point  
Temperature or if TRIP TEST = 1  
Digital  
Output  
3
OVERTEMP  
This pin may be left open if not used.  
GND  
V
DD  
V
SENSE  
VTEMP Analog Voltage Output  
If TRIP TEST = 0 then  
Analog  
Output  
VTEMP = VTS, Temperature Sensor Output Voltage  
If TRIP TEST = 1 then  
6
VTEMP  
VTEMP = VTRIP, Temperature Trip Voltage  
This pin may be left open if not used.  
GND  
4
2
VDD  
Power  
Positive Supply Voltage  
Power Supply Ground  
GND  
Ground  
The best thermal conductivity between the device and the PCB is achieved  
by soldering the DAP of the package to the thermal pad on the PCB. The  
thermal pad can be a floating node. However, for improved noise immunity  
the thermal pad should be connected to the circuit GND node, preferably  
directly to pin 2 (GND) of the device.  
DAP  
Die Attach Pad  
Typical Application  
V
V
Supply  
DD  
DD  
Analog  
(+1.6V to +5.5V)  
V
ADC Input  
TEMP  
Example: 2 to 3  
Battery Cells  
SM72480  
Microcontroller  
OVERTEMP  
OVERTEMP  
TRIP TEST  
GND  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Copyright © 2010–2013, Texas Instruments Incorporated  
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SM72480  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
www.ti.com  
Absolute Maximum Ratings(1)  
Supply Voltage  
−0.3V to +6.0V  
−0.3V to +6.0V  
−0.3V to (VDD + 0.5V)  
−0.3V to (VDD + 0.5V)  
±7 mA  
Voltage at OVERTEMP pin  
Voltage at OVERTEMP and VTEMP pins  
TRIP TEST Input Voltage  
Output Current, any output pin  
Input Current at any pin(2)  
Storage Temperature  
5 mA  
−65°C to +150°C  
+155°C  
Maximum Junction Temperature  
ESD Susceptibility(3)  
TJ(MAX)  
Human Body Model  
Machine Model  
Charged Device Model  
4500V  
300V  
1000V  
For soldering specifications: see www.ti.com/lit/SNOA549  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the  
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may  
degrade when the device is not operated under the listed test conditions.  
(2) When the input voltage (VI) at any pin exceeds power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5 mA.  
(3) The Human Body Model (HBM) is a 100 pF capacitor charged to the specified voltage then discharged through a 1.5 kΩ resistor into  
each pin. The Machine Model (MM) is a 200 pF capacitor charged to the specified voltage then discharged directly into each pin. The  
Charged Device Model (CDM) is a specified circuit characterizing an ESD event that occurs when a device acquires charge through  
some triboelectric (frictional) or electrostatic induction processes and then abruptly touches a grounded object or surface.  
Operating Ratings(1)  
Specified Temperature Range  
TMIN ≤ TA ≤ TMAX  
SM72480  
−50°C ≤ TA ≤ +150°C  
+1.6 V to +5.5 V  
152 °C/W  
Supply Voltage Range (VDD  
)
(2)(3)  
Thermal Resistance (θJA  
)
WSON-6 (Package SDB06A)  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the  
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may  
degrade when the device is not operated under the listed test conditions.  
(2) The junction to ambient temperature resistance (θJA) is specified without a heat sink in still air.  
(3) Changes in output due to self heating can be computed by multiplying the internal dissipation by the temperature resistance.  
Accuracy Characteristics Trip Point Accuracy  
Units  
(Limit)  
Parameter  
Conditions  
0°C − 150°C  
Limits(1)  
±2.2  
Trip Point Accuracy(2)  
VDD = 5.0 V  
°C (max)  
(1) Limits are ensured to AOQL (Average Outgoing Quality Level).  
(2) Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the  
specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the  
specified conditions. Accuracy limits do not include load regulation; they assume no DC load.  
4
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Product Folder Links: SM72480  
SM72480  
www.ti.com  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
Accuracy Characteristics VTEMP Analog Temperature Sensor Output Accuracy  
The limits do not include DC load regulation. The stated accuracy limits are with reference to the values in the SM72480  
Conversion Table.  
Units  
(Limit)  
Parameter  
Conditions  
Limits(1)  
TA = 20°C to 40°C  
TA = 0°C to 70°C  
TA = 0°C to 90°C  
TA = 0°C to 120°C  
TA = 0°C to 150°C  
TA = –50°C to 0°C  
TA = 20°C to 40°C  
TA = 0°C to 70°C  
TA = 0°C to 90°C  
TA = 0°C to 120°C  
TA = 0°C to 150°C  
TA = −50°C to 0°C  
VDD = 2.3 to 5.5 V  
VDD = 2.5 to 5.5 V  
VDD = 2.5 to 5.5 V  
VDD = 2.5 to 5.5 V  
VDD = 2.5 to 5.5 V  
VDD = 3.0 to 5.5 V  
VDD = 1.8 to 5.5 V  
VDD = 1.9 to 5.5 V  
VDD = 1.9 to 5.5 V  
VDD = 1.9 to 5.5 V  
VDD = 1.9 to 5.5 V  
VDD = 2.3 to 5.5 V  
±1.8  
±2.0  
±2.1  
±2.2  
±2.3  
±1.7  
±1.8  
±2.0  
±2.1  
±2.2  
±2.3  
±1.7  
VTEMP Temperature  
Accuracy(2)  
Trip Point  
125°C or 120°C  
°C  
(max)(2)  
VTEMP Temperature  
Accuracy  
Trip Point  
105°C  
°C (max)  
(1) Limits are ensured to AOQL (Average Outgoing Quality Level).  
(2) Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the  
specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the  
specified conditions. Accuracy limits do not include load regulation; they assume no DC load.  
Electrical Characteristics  
Unless otherwise noted, these specifications apply for +VDD = +1.6V to +5.5V. Boldface limits apply for TA = TJ = TMIN to  
TMAX ; all other limits TA = TJ = 25°C.  
Units  
(Limit)  
Symbol  
Parameter  
Conditions  
Typical(1)  
Limits(2)  
GENERAL SPECIFICATIONS  
IS Quiescent Power Supply  
8
5
16  
μA (max)  
Current  
5.5  
4.5  
°C (max)  
°C (Min)  
Hysteresis  
OVERTEMP DIGITAL OUTPUT  
ACTIVE HIGH, PUSH-PULL  
VDD ≥ 1.6V  
VDD ≥ 2.0V  
VDD ≥ 3.3V  
VDD ≥ 1.6V  
VDD ≥ 2.0V  
VDD ≥ 3.3V  
Source ≤ 340 μA  
Source ≤ 498 μA  
Source ≤ 780 μA  
Source ≤ 600 μA  
Source ≤ 980 μA  
Source ≤ 1.6 mA  
V
DD − 0.2V  
V (min)  
V (min)  
VOH  
Logic "1" Output Voltage  
VDD − 0.45V  
BOTH OVERTEMP and OVERTEMP DIGITAL OUTPUTS  
VDD ≥ 1.6V  
VDD ≥ 2.0V  
VDD ≥ 3.3V  
VDD ≥ 1.6V  
VDD ≥ 2.0V  
VDD ≥ 3.3V  
Sink ≤ 385 μA  
Sink ≤ 500 μA  
Sink ≤ 730 μA  
Sink ≤ 690 μA  
Sink ≤ 1.05 mA  
Sink ≤ 1.62 mA  
0.2  
VOL  
Logic "0" Output Voltage  
V (max)  
0.45  
(1) Typicals are at TJ = TA = 25°C and represent most likely parametric norm.  
(2) Limits are ensured to AOQL (Average Outgoing Quality Level).  
Copyright © 2010–2013, Texas Instruments Incorporated  
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SM72480  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
www.ti.com  
Electrical Characteristics (continued)  
Unless otherwise noted, these specifications apply for +VDD = +1.6V to +5.5V. Boldface limits apply for TA = TJ = TMIN to  
TMAX ; all other limits TA = TJ = 25°C.  
Units  
(Limit)  
Symbol  
Parameter  
Conditions  
Typical(1)  
Limits(2)  
OVERTEMP DIGITAL OUTPUT  
Logic "1" Output Leakage  
ACTIVE LOW, OPEN DRAIN  
TA = 30 °C  
0.001  
0.025  
IOH  
1
μA (max)  
Current(3)  
TA = 150 °C  
VTEMP ANALOG TEMPERATURE SENSOR OUTPUT  
VTEMP Sensor Gain  
Trip Point = 105°C  
Trip Point = 125°C or 120°C  
Source ≤ 90 μA  
-7.7  
mV/°C  
mV/°C  
−10.3  
−0.1  
0.1  
−1  
1
mV (max)  
mV (max)  
mV (max)  
mV (max)  
(VDD − VTEMP) ≥ 200 mV  
1.6V ≤ VDD < 1.8V  
Sink ≤ 100 μA  
VTEMP ≥ 260 mV  
VTEMP Load Regulation(4)  
Source ≤ 120 μA  
−0.1  
0.1  
−1  
1
(VDD − VTEMP) ≥ 200 mV  
VDD ≥ 1.8V  
Sink ≤ 200 μA  
VTEMP ≥ 260 mV  
Source or Sink = 100 μA  
1
Ohm  
mV  
0.29  
74  
VDD Supply- to-VTEMP  
DC Line Regulation(5)  
VDD = +1.6V to +5.5V  
μV/V  
dB  
−82  
VTEMP Output Load  
Capacitance  
CL  
Without series resistor. See CAPACITIVE LOADS.  
1100  
pF (max)  
TRIP TEST DIGITAL INPUT  
VIH  
VIL  
Logic "1" Threshold Voltage  
V
DD− 0.5  
V (min)  
V (max)  
μA (max)  
μA (max)  
Logic "0" Threshold Voltage  
0.5  
IIH  
Logic "1" Input Current  
Logic "0" Input Current(3)  
1.5  
2.5  
IIL  
0.001  
1
TIMING  
Time from Power On to Digital  
Output Enabled. See definition  
below.  
tEN  
1.1  
1.0  
2.3  
2.9  
ms (max)  
ms (max)  
Time from Power On to Analog VTEMP CL = 0 pF to 1100 pF  
Temperature Valid. See  
tV  
definition below.  
(3) The 1 µA limit is based on a testing limitation and does not reflect the actual performance of the part. Expect to see a doubling of the  
current for every 15°C increase in temperature. For example, the 1 nA typical current at 25°C would increase to 16 nA at 85°C.  
(4) Source currents are flowing out of the SM72480. Sink currents are flowing into the SM72480.  
(5) Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest  
supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in VOLTAGE SHIFT.  
6
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Copyright © 2010–2013, Texas Instruments Incorporated  
Product Folder Links: SM72480  
SM72480  
www.ti.com  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
Definitions of tEN and tV  
V
DD  
V
DD  
1.3V  
t
EN  
t
VTEMP  
Valid  
OVERTEMP  
OVERTEMP  
Enabled  
Enabled  
V
TEMP  
The curves shown represent typical performance under worst-case conditions. Performance improves with larger  
overhead (VDD − VTEMP), larger VDD, and lower temperatures.  
The curves shown represent typical performance under worst-case conditions. Performance improves with larger  
VTEMP, larger VDD and lower temperatures.  
Copyright © 2010–2013, Texas Instruments Incorporated  
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SM72480  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
www.ti.com  
Typical Performance Characteristics  
VTEMP Output Temperature Error  
Minimum Operating Temperature  
vs.  
vs.  
Temperature  
Supply Voltage  
120°or 125°C Trip  
105°C Trip  
0
Figure 3.  
Figure 4.  
Supply Current  
vs.  
Temperature  
Supply Current  
vs.  
Supply Voltage  
Figure 5.  
Figure 6.  
Line Regulation  
VTEMP  
vs.  
VTEMP Supply-Noise Rejection  
Supply Voltage  
Trip Points  
120°C  
vs.  
Frequency  
Figure 7.  
Figure 8.  
8
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SM72480  
www.ti.com  
SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
SM72480 VTEMP VS DIE TEMPERATURE CONVERSION TABLE  
The SM72480 has a factory-set gain, which is dependent on the Temperature Trip Point. The VTEMP temperature  
sensor voltage, in millivolts, at each discrete die temperature over the complete operating range is shown in the  
conversion table below.  
Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1)  
VTEMP, Analog Output Voltage, mV  
TTRIP = 125 or 120°C  
Die Temp.,  
°C  
TTRIP = 105°C  
1967  
1960  
1952  
1945  
1937  
1930  
1922  
1915  
1908  
1900  
1893  
1885  
1878  
1870  
1863  
1855  
1848  
1840  
1833  
1825  
1818  
1810  
1803  
1795  
1788  
1780  
1773  
1765  
1757  
1750  
1742  
1735  
1727  
1720  
1712  
1705  
1697  
1690  
1682  
−50  
−49  
−48  
−47  
−46  
−45  
−44  
−43  
−42  
−41  
−40  
−39  
−38  
−37  
−36  
−35  
−34  
−33  
−32  
−31  
−30  
−29  
−28  
−27  
−26  
−25  
−24  
−23  
−22  
−21  
−20  
−19  
−18  
−17  
−16  
−15  
−14  
−13  
−12  
2623  
2613  
2603  
2593  
2583  
2573  
2563  
2553  
2543  
2533  
2523  
2513  
2503  
2493  
2483  
2473  
2463  
2453  
2443  
2433  
2423  
2413  
2403  
2393  
2383  
2373  
2363  
2353  
2343  
2333  
2323  
2313  
2303  
2293  
2283  
2272  
2262  
2252  
2242  
(1) The VTEMP temperature sensor output voltage, in mV, vs Die Temperature, in °C for the gain corresponding to the temperature trip point.  
VDD = 5.0V.  
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SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)  
VTEMP, Analog Output Voltage, mV  
TTRIP = 125 or 120°C  
Die Temp.,  
°C  
TTRIP = 105°C  
1674  
1667  
1659  
1652  
1644  
1637  
1629  
1621  
1614  
1606  
1599  
1591  
1583  
1576  
1568  
1561  
1553  
1545  
1538  
1530  
1522  
1515  
1507  
1499  
1492  
1484  
1477  
1469  
1461  
1454  
1446  
1438  
1431  
1423  
1415  
1407  
1400  
1392  
1384  
1377  
1369  
1361  
1354  
1346  
1338  
1331  
−11  
−10  
−9  
−8  
−7  
−6  
−5  
−4  
−3  
−2  
−1  
0
2232  
2222  
2212  
2202  
2192  
2182  
2171  
2161  
2151  
2141  
2131  
2121  
2111  
2101  
2090  
2080  
2070  
2060  
2050  
2040  
2029  
2019  
2009  
1999  
1989  
1978  
1968  
1958  
1948  
1938  
1927  
1917  
1907  
1897  
1886  
1876  
1866  
1856  
1845  
1835  
1825  
1815  
1804  
1794  
1784  
1774  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
10  
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SM72480  
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SNIS156C –NOVEMBER 2010–REVISED APRIL 2013  
Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)  
VTEMP, Analog Output Voltage, mV  
TTRIP = 125 or 120°C  
Die Temp.,  
°C  
TTRIP = 105°C  
1323  
1315  
1307  
1300  
1292  
1284  
1276  
1269  
1261  
1253  
1245  
1238  
1230  
1222  
1214  
1207  
1199  
1191  
1183  
1176  
1168  
1160  
1152  
1144  
1137  
1129  
1121  
1113  
1105  
1098  
1090  
1082  
1074  
1066  
1059  
1051  
1043  
1035  
1027  
1019  
1012  
1004  
996  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
1763  
1753  
1743  
1732  
1722  
1712  
1701  
1691  
1681  
1670  
1660  
1650  
1639  
1629  
1619  
1608  
1598  
1588  
1577  
1567  
1557  
1546  
1536  
1525  
1515  
1505  
1494  
1484  
1473  
1463  
1453  
1442  
1432  
1421  
1411  
1400  
1390  
1380  
1369  
1359  
1348  
1338  
1327  
1317  
1306  
1296  
988  
980  
972  
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)  
VTEMP, Analog Output Voltage, mV  
TTRIP = 125 or 120°C  
Die Temp.,  
°C  
TTRIP = 105°C  
964  
957  
949  
941  
933  
925  
917  
909  
901  
894  
886  
878  
870  
862  
854  
846  
838  
830  
822  
814  
807  
799  
791  
783  
775  
767  
759  
751  
743  
735  
727  
719  
711  
703  
695  
687  
679  
671  
663  
655  
647  
639  
631  
623  
615  
607  
81  
82  
1285  
1275  
1264  
1254  
1243  
1233  
1222  
1212  
1201  
1191  
1180  
1170  
1159  
1149  
1138  
1128  
1117  
1106  
1096  
1085  
1075  
1064  
1054  
1043  
1032  
1022  
1011  
1001  
990  
83  
84  
85  
86  
87  
88  
89  
90  
91  
92  
93  
94  
95  
96  
97  
98  
99  
100  
101  
102  
103  
104  
105  
106  
107  
108  
109  
110  
111  
112  
113  
114  
115  
116  
117  
118  
119  
120  
121  
122  
123  
124  
125  
126  
979  
969  
958  
948  
937  
926  
916  
905  
894  
884  
873  
862  
852  
841  
831  
820  
809  
12  
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)  
VTEMP, Analog Output Voltage, mV  
TTRIP = 125 or 120°C  
Die Temp.,  
°C  
TTRIP = 105°C  
599  
127  
128  
129  
130  
131  
132  
133  
134  
135  
136  
137  
138  
139  
140  
141  
142  
143  
144  
145  
146  
147  
148  
149  
150  
798  
788  
777  
766  
756  
745  
734  
724  
713  
702  
691  
681  
670  
659  
649  
638  
627  
616  
606  
595  
584  
573  
562  
552  
591  
583  
575  
567  
559  
551  
543  
535  
527  
519  
511  
503  
495  
487  
479  
471  
463  
455  
447  
438  
430  
422  
414  
VTEMP vs DIE TEMPERATURE APPROXIMATIONS  
The SM72480's VTEMP analog temperature output is very linear. The Conversion Table above and the equation in  
The Second-Order Equation (Parabolic) represent the most accurate typical performance of the VTEMP voltage  
output vs Temperature.  
The Second-Order Equation (Parabolic)  
The data from the Conversion Table, or the equation below, when plotted, has an umbrella-shaped parabolic  
curve. VTEMP is in mV.  
V(TEMP=120 or 125) = 1814.6 - 10.270 x (TDIE - 30°C) - 2.12e-3 x (T DIE - 30°C) 2  
V(TEMP=105) = 1361.4 œ 7.701 x (TDIE - 30°C) œ 1.60e-3 x (TDIE - 30°C) 2  
(1)  
The First-Order Approximation (Linear)  
For a quicker approximation, although less accurate than the second-order, over the full operating temperature  
range the linear formula below can be used. Using this formula, with the constant and slope in the following set  
of equations, the best-fit VTEMP vs Die Temperature performance can be calculated with an approximation error  
less than 18 mV. VTEMP is in mV.  
V(TEMP=120 or 125) = 2119 - 10.36 x TDIE  
V(TEMP=105) = 1590 œ 7.77 x TDIE  
(2)  
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First-Order Approximation (Linear) over Small Temperature Range  
For a linear approximation, a line can easily be calculated over the desired temperature range from the  
Conversion Table using the two-point equation:  
V2 - V1  
’
◊
’
ì
V - V1 =  
(T - T1)  
T2 - T1  
(3)  
Where V is in mV, T is in °C, T1 and V1 are the coordinates of the lowest temperature, T2 and V2 are the  
coordinates of the highest temperature.  
x
(-12.8 mV/°C) (T - 20°C)  
V - 2396 mV =  
(4)  
(5)  
x
(-12.8 mV/°C) (T-20°C) + 2396 mV  
V =  
Using this method of linear approximation, the transfer function can be approximated for one or more  
temperature ranges of interest.  
OVERTEMP and OVERTEMP Digital Outputs  
The OVERTEMP Active High, Push-Pull Output and the OVERTEMP Active Low, Open-Drain Output both assert  
at the same time whenever the Die Temperature reaches the factory preset Temperature Trip Point. They also  
assert simultaneously whenever the TRIP TEST pin is set high. Both outputs de-assert when the die temperature  
goes below the Temperature Trip Point - Hysteresis. These two types of digital outputs enable the user the  
flexibility to choose the type of output that is most suitable for his design.  
Either the OVERTEMP or the OVERTEMP Digital Output pins can be left open if not used.  
OVERTEMP OPEN-DRAIN DIGITAL OUTPUT  
The OVERTEMP Active Low, Open-Drain Digital Output, if used, requires a pull-up resistor between this pin and  
VDD. The following section shows how to determine the pull-up resistor value.  
Figure 9. Determining the Pull-up Resistor Value  
V
DD  
i
T
R
Pull-Up  
V
OUT  
OVERTEMP  
Digital Input  
i
L
i
sink  
The Pull-up resistor value is calculated at the condition of maximum total current, iT, through the resistor. The  
total current is:  
iT = iL + isink  
where  
•
•
•
•
iT is the maximum total current through the Pull-up Resistor at VOL  
.
iL is the load current, which is very low for typical digital inputs.  
VOUT is the Voltage at the OVERTEMP pin. Use VOL for calculating the Pull-up resistor.  
VDD(Max) is the maximum power supply voltage to be used in the customer's system.  
(6)  
(7)  
The pull-up resistor maximum value can be found by using the following formula:  
Rpull-up = VDD (Max) œ VOL  
iT  
EXAMPLE CALCULATION  
Suppose we have, for our example, a VDD of 3.3 V ± 0.3V, a CMOS digital input as a load, a VOL of 0.2 V.  
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1. We see that for VOL of 0.2 V the electrical specification for OVERTEMP shows a maximim isink of 385 µA.  
2. Let iL= 1 µA, then iT is about 386 µA max. If we select 35 µA as the current limit then iT for the calculation  
becomes 35 µA  
3. We notice that VDD(Max) is 3.3V + 0.3V = 3.6V and then calculate the pull-up resistor as RPull-up = (3.6 −  
0.2)/35 µA = 97k  
4. Based on this calculated value, we select the closest resistor value in the tolerance family we are using.  
In our example, if we are using 5% resistor values, then the next closest value is 100 kΩ.  
NOISE IMMUNITY  
The SM72480 is virtually immune from false triggers on the OVERTEMP and OVERTEMP digital outputs due to  
noise on the power supply. Test have been conducted showing that, with the die temperature within 0.5°C of the  
temperature trip point, and the severe test of a 3 Vpp square wave "noise" signal injected on the VDD line, over  
the VDD range of 2V to 5V, there were no false triggers.  
TRIP TEST Digital Input  
The TRIP TEST pin simply provides a means to test the OVERTEMP and OVERTEMP digital outputs  
electronically by causing them to assert, at any operating temperature, as a result of forcing the TRIP TEST pin  
high.  
When the TRIP TEST pin is pulled high the VTEMP pin will be at the VTRIP voltage.  
If not used, the TRIP TEST pin may either be left open or grounded.  
VTEMP Analog Temperature Sensor Output  
The VTEMP push-pull output provides the ability to sink and source significant current. This is beneficial when, for  
example, driving dynamic loads like an input stage on an analog-to-digital converter (ADC). In these applications  
the source current is required to quickly charge the input capacitor of the ADC. See the Applications Circuits  
section for more discussion of this topic. The SM72480 is ideal for this and other applications which require  
strong source or sink current.  
NOISE CONSIDERATIONS  
The SM72480's supply-noise rejection (the ratio of the AC signal on VTEMP to the AC signal on VDD) was  
measured during bench tests. It's typical attenuation is shown in the Typical Performance Characteristics section.  
A load capacitor on the output can help to filter noise.  
For operation in very noisy environments, some bypass capacitance should be present on the supply within  
approximately 2 inches of the SM72480.  
CAPACITIVE LOADS  
The VTEMP Output handles capacitive loading well. In an extremely noisy environment, or when driving a switched  
sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any  
precautions, the VTEMP can drive a capacitive load less than or equal to 1100 pF as shown in Figure 10. For  
capacitive loads greater than 1100 pF, a series resistor is required on the output, as shown in Figure 11, to  
maintain stable conditions.  
V
DD  
V
TEMP  
SM72480  
OPTIONAL  
BYPASS  
CAPACITANCE  
GND  
C
LOAD  
Ç 1100 pF  
Figure 10. SM72480 No Decoupling Required for Capacitive Loads Less than 1100 pF.  
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V
DD  
R
S
V
TEMP  
SM72480  
OPTIONAL  
BYPASS  
CAPACITANCE  
C
>
GND  
LOAD  
1100 pF  
Figure 11.  
CLOAD  
Minimum RS  
3 kΩ  
1.1 nF to 99 nF  
100 nF to 999 nF  
1 μF  
1.5 kΩ  
800 Ω  
VOLTAGE SHIFT  
The SM72480 is very linear over temperature and supply voltage range. Due to the intrinsic behavior of an  
NMOS/PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped over the  
operating range of the device. The location of the shift is determined by the relative levels of VDD and VTEMP. The  
shift typically occurs when VDD − VTEMP = 1.0V.  
This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VTEMP. Since  
the shift takes place over a wide temperature change of 5°C to 20°C, VTEMP is always monotonic. The accuracy  
specifications in the Electrical Characteristics table already includes this possible shift.  
Mounting and Temperature Conductivity  
The SM72480 can be applied easily in the same way as other integrated-circuit temperature sensors. It can be  
glued or cemented to a surface.  
The best thermal conductivity between the device and the PCB is achieved by soldering the DAP of the package  
to the thermal pad on the PCB. The temperatures of the lands and traces to the other leads of the SM72480 will  
also affect the temperature reading.  
Alternatively, the SM72480 can be mounted inside a sealed-end metal tube, and can then be dipped into a bath  
or screwed into a threaded hole in a tank. As with any IC, the SM72480 and accompanying wiring and circuits  
must be kept insulated and dry, to avoid leakage and corrosion. This is especially true if the circuit may operate  
at cold temperatures where condensation can occur. If moisture creates a short circuit from the VTEMP output to  
ground or VDD, the VTEMP output from the SM72480 will not be correct. Printed-circuit coatings are often used to  
ensure that moisture cannot corrode the leads or circuit traces.  
The thermal resistance junction-to-ambient (θJA) is the parameter used to calculate the rise of a device junction  
temperature due to its power dissipation. The equation used to calculate the rise in the SM72480's die  
temperature is  
TJ = TA + qJA (VDDIQ) + (VDD - VTEMP) IL  
[
]
(8)  
where TA is the ambient temperature, IQ is the quiescent current, IL is the load current on the output, and VO is  
the output voltage. For example, in an application where TA = 30 °C, VDD = 5 V, IDD = 9 μA, Gain 4, VTEMP = 2231  
mV, and IL = 2 μA, the junction temperature would be 30.021 °C, showing a self-heating error of only 0.021°C.  
Since the SM72480's junction temperature is the actual temperature being measured, care should be taken to  
minimize the load current that the VTEMP output is required to drive. If The OVERTEMP output is used with a 100  
k pull-up resistor, and this output is asserted (low), then for this example the additional contribution is [(152°  
C/W)x(5V)2/100k] = 0.038°C for a total self-heating error of 0.059°C. Table 2 shows the thermal resistance of the  
SM72480.  
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Table 2. SM72480 Thermal Resistance  
Package  
Number  
Thermal  
Resistance (θJA  
Device Number  
)
SM72480SD  
SDB06A  
152° C/W  
Applications Circuits  
V
DD  
4
1
5
6
3
OVERTEMP  
NC  
Asserts when T  
> T  
TRIP  
DIE  
SM72480  
NC  
See text.  
NC  
2
GND  
Figure 12. Temperature Switch Using Push-Pull Output  
V
DD  
4
100k  
OVERTEMP  
1
3
6
NC  
Asserts when T  
> T  
TRIP  
DIE  
SM72480  
NC  
See text.  
5
NC  
2
GND  
Figure 13. Temperature Switch Using Open-Drain Output  
SAR Analog-to-Digital Converter  
Reset  
+1.6V to +5.5V  
Input  
Pin  
SM72480  
Sample  
R
IN  
4
6
5
V
V
DD  
TEMP  
C
BP  
C
PIN  
C
C
TRIP  
TEST  
FILTER  
1
2
SAMPLE  
OT  
3
OT  
GND  
Figure 14. Suggested Connection to a Sampling Analog-to-Digital Converter Input Stage  
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Most CMOS ADCs found in microcontrollers and ASICs have a sampled data comparator input structure. When  
the ADC charges the sampling cap, it requires instantaneous charge from the output of the analog source such  
as the SM72480 temperature sensor and many op amps. This requirement is easily accommodated by the  
addition of a capacitor (CFILTER). The size of CFILTER depends on the size of the sampling capacitor and the  
sampling frequency. Since not all ADCs have identical input stages, the charge requirements will vary. This  
general ADC application is shown as an example only.  
V
TEMP  
V+  
R3  
V
V
T1  
R4  
T2  
R1  
V
T
(High = overtemp alarm)  
4.1V  
U3  
+
V
OUT  
V
OUT  
U1  
LM4040  
0.1 mF  
-
R2  
(4.1)R2  
V
V
=
=
T1  
R1 + R2||R3  
V
TEMP  
SM72480  
V
DD  
(4.1)R2  
T2  
U2  
R2 + R1||R3  
Figure 15. Celsius Temperature Switch  
V
DD  
100k  
4
3
6
TRIP TEST  
1
OVERTEMP  
SM72480  
NC  
OVERTEMP  
5
2
GND  
Figure 16. TRIP TEST Digital Output Test Circuit  
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V
DD  
100k  
4
TRIP TEST  
1
5
6
OVERTEMP  
SM72480  
NC  
RESET  
Momentary  
OVERTEMP  
3
2
GND  
Figure 17. Latch Circuit using OVERTEMP Output  
The TRIP TEST pin, normally used to check the operation of the OVERTEMP and OVERTEMP pins, may be  
used to latch the outputs whenever the temperature exceeds the programmed limit and causes the digital outputs  
to assert. As shown in the figure, when OVERTEMP goes high the TRIP TEST input is also pulled high and  
causes OVERTEMP output to latch high and the OVERTEMP output to latch low. The latch can be released by  
either momentarily pulling the TRIP TEST pin low (GND), or by toggling the power supply to the device. The  
resistor limits the current out of the OVERTEMP output pin.  
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REVISION HISTORY  
Changes from Revision B (April 2013) to Revision C  
Page  
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 19  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
SM72480SD-105/NOPB  
SM72480SD-120/NOPB  
SM72480SD-125/NOPB  
ACTIVE  
ACTIVE  
ACTIVE  
WSON  
WSON  
WSON  
NGF  
NGF  
NGF  
6
6
6
1000 RoHS & Green  
1000 RoHS & Green  
1000 RoHS & Green  
SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-50 to 150  
-50 to 150  
-50 to 150  
701  
S80  
299  
SN  
SN  
SM72480SDE-105/NOPB  
SM72480SDE-120/NOPB  
SM72480SDE-125/NOPB  
SM72480SDX-105/NOPB  
SM72480SDX-120/NOPB  
SM72480SDX-125/NOPB  
NRND  
NRND  
NRND  
NRND  
NRND  
NRND  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
6
6
6
6
6
6
250  
250  
250  
RoHS & Green  
RoHS & Green  
RoHS & Green  
SN  
SN  
SN  
SN  
SN  
SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-50 to 150  
-50 to 150  
-50 to 150  
-50 to 150  
-50 to 150  
-50 to 150  
701  
S80  
299  
701  
S80  
299  
4500 RoHS & Green  
4500 RoHS & Green  
4500 RoHS & Green  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
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9-Aug-2022  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SM72480SD-105/NOPB WSON  
SM72480SD-120/NOPB WSON  
SM72480SD-125/NOPB WSON  
SM72480SDE-105/NOPB WSON  
SM72480SDE-120/NOPB WSON  
SM72480SDE-125/NOPB WSON  
SM72480SDX-105/NOPB WSON  
SM72480SDX-120/NOPB WSON  
SM72480SDX-125/NOPB WSON  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
6
6
6
6
6
6
6
6
6
1000  
1000  
1000  
250  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
330.0  
330.0  
330.0  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
2.8  
2.8  
2.8  
2.8  
2.8  
2.8  
2.8  
2.8  
2.8  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
250  
250  
4500  
4500  
4500  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Aug-2022  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SM72480SD-105/NOPB  
SM72480SD-120/NOPB  
SM72480SD-125/NOPB  
SM72480SDE-105/NOPB  
SM72480SDE-120/NOPB  
SM72480SDE-125/NOPB  
SM72480SDX-105/NOPB  
SM72480SDX-120/NOPB  
SM72480SDX-125/NOPB  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
NGF  
6
6
6
6
6
6
6
6
6
1000  
1000  
1000  
250  
208.0  
208.0  
208.0  
208.0  
208.0  
208.0  
367.0  
367.0  
367.0  
191.0  
191.0  
191.0  
191.0  
191.0  
191.0  
367.0  
367.0  
367.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
250  
250  
4500  
4500  
4500  
Pack Materials-Page 2  
MECHANICAL DATA  
NGF0006A  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license  
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you  
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these  
resources.  
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for  
TI products.  
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2022, Texas Instruments Incorporated  

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