SM73307MM/NOPB [TI]

Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifier;
SM73307MM/NOPB
型号: SM73307MM/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifier

放大器 信息通信管理 光电二极管
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SM73307  
www.ti.com  
SNOSB88B JUNE 2011REVISED APRIL 2013  
Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifier  
Check for Samples: SM73307  
1
FEATURES  
DESCRIPTION  
The SM73307 is a dual, low noise, low offset, CMOS  
input, rail-to-rail output precision amplifier with a high  
gain bandwidth product. The SM73307 is ideal for a  
variety of instrumentation applications including solar  
photovoltaic.  
2
Unless Otherwise Noted, Typical Values at VS  
= 5V.  
Renewable Energy Grade  
Input Offset Voltage ±150 μV (max)  
Input Bias Current 100 fA  
Utilizing a CMOS input stage, the SM73307 achieves  
an input bias current of 100 fA, an input referred  
voltage noise of 5.8 nV/Hz, and an input offset  
voltage of less than ±150 μV. These features make  
Input Voltage Noise 5.8 nV/Hz  
Gain Bandwidth Product 17 MHz  
Supply Current 1.30 mA  
the SM73307  
applications.  
a
superior choice for precision  
Supply Voltage Range 1.8V to 5.5V  
THD+N @ f = 1 kHz 0.001%  
Consuming only 1.30 mA of supply current per  
channel, the SM73307 offers a high gain bandwidth  
product of 17 MHz, enabling accurate amplification at  
high closed loop gains.  
Operating Temperature Range 40°C to 125°C  
Rail-to-rail Output Swing  
8-Pin VSSOP Package  
The SM73307 has a supply voltage range of 1.8V to  
5.5V, which makes it an ideal choice for portable low  
power applications with low supply voltage  
requirements.  
APPLICATIONS  
Photovoltaic Electronics  
Active Filters and Buffers  
Sensor Interface Applications  
Transimpedance Amplifiers  
Automotive  
The SM73307 is built with TI’s advanced VIP50  
process technology and is offered in an 8-pin VSSOP  
package.  
The SM73307 incorporates enhanced manufacturing  
and support processes for the photovoltaic and  
automotive market, including defect detection  
methodologies. Reliability qualification is compliant  
with the requirements and temperature grades  
defined in the Renewable Energy Grade and AEC-  
Q100 standards.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2011–2013, Texas Instruments Incorporated  
SM73307  
SNOSB88B JUNE 2011REVISED APRIL 2013  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Absolute Maximum Ratings(1)(2)  
ESD Tolerance(3)  
Human Body Model  
Machine Model  
2000V  
200V  
Charge-Device Model  
1000V  
VIN Differential  
±0.3V  
Supply Voltage (VS = V+ – V)  
Voltage on Input/Output Pins  
Storage Temperature Range  
Junction Temperature(4)  
Soldering Information  
6.0V  
V+ +0.3V, V0.3V  
65°C to 150°C  
+150°C  
Infrared or Convection (20 sec)  
235°C  
Wave Soldering Lead Temp. (10 sec)  
260°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional. For specifications and the test conditions, see the Electrical Characteristics Tables.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of  
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).  
(4) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is  
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.  
Operating Ratings(1)  
Temperature Range(2)  
Supply Voltage (VS = V+ – V)  
40°C to 125°C  
1.8V to 5.5V  
2.0V to 5.5V  
236°C/W  
0°C TA 125°C  
40°C TA 125°C  
8-Pin VSSOP  
(2)  
Package Thermal Resistance (θJA  
)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional. For specifications and the test conditions, see the Electrical Characteristics Tables.  
(2) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is  
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.  
2.5V Electrical Characteristics  
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 2.5V, V= 0V ,VO = VCM = V+/2. Boldface limits apply  
at the temperature extremes.  
Symbol  
Parameter  
Conditions  
20°C TA 85°C  
Min(1)  
Typ(2)  
Max(1)  
Units  
±180  
±330  
±20  
VOS  
Input Offset Voltage  
μV  
±180  
±430  
40°C TA 125°C  
±20  
–1.75  
0.05  
0.05  
Input Offset Voltage Temperature  
Drift(3)(4)  
TC VOS  
±4  
μV/°C  
1
25  
40°C TA 85°C  
40°C TA 125°C  
IB  
Input Bias Current  
VCM = 1.0V(5)(4)  
pA  
1
100  
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the  
Statistical Quality Control (SQC) method.  
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary  
over time and will also depend on the application and configuration.  
(3) Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.  
(4) This parameter is specified by design and/or characterization and is not tested in production.  
(5) Positive current corresponds to current flowing into the device.  
2
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SNOSB88B JUNE 2011REVISED APRIL 2013  
2.5V Electrical Characteristics (continued)  
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 2.5V, V= 0V ,VO = VCM = V+/2. Boldface limits apply  
at the temperature extremes.  
Symbol  
Parameter  
Conditions  
Min(1)  
Typ(2)  
Max(1)  
Units  
0.5  
50  
IOS  
Input Offset Current  
VCM = 1V(4)  
0.006  
pA  
83  
80  
CMRR Common Mode Rejection Ratio  
0V VCM 1.4V  
100  
100  
98  
dB  
dB  
V
2.0V V+ 5.5V  
85  
80  
V= 0V, VCM = 0  
PSRR  
Power Supply Rejection Ratio  
1.8V V+ 5.5V  
85  
V= 0V, VCM = 0  
CMRR 80 dB  
CMRR 78 dB  
0.3  
–0.3  
1.5  
1.5  
CMVR Common Mode Voltage Range  
VO = 0.15 to 2.2V  
84  
80  
92  
95  
RL = 2 kto V+/2  
AVOL  
Open Loop Voltage Gain  
dB  
VO = 0.15 to 2.2V  
90  
86  
RL = 10 kto V+/2  
70  
77  
RL = 2 kto V+/2  
RL = 10 kto V+/2  
RL = 2 kto V+/2  
RL = 10 kto V+/2  
25  
Output Voltage Swing  
High  
60  
66  
20  
mV from  
either rail  
VOUT  
70  
73  
30  
Output Voltage Swing  
Low  
60  
62  
15  
Sourcing to V−  
VIN = 200 mV(6)  
36  
30  
52  
IOUT  
Output Current  
Supply Current  
mA  
mA  
Sinking to V+  
7.5  
5.0  
15  
VIN = 200 mV(6)  
1.50  
1.85  
IS  
Per Channel  
1.10  
AV = +1, Rising (10% to 90%)  
AV = +1, Falling (90% to 10%)  
8.3  
10.3  
14  
SR  
GBW  
en  
Slew Rate  
V/μs  
MHz  
Gain Bandwidth  
f = 400 Hz  
f = 1 kHz  
f = 1 kHz  
6.8  
Input Referred Voltage Noise Density  
Input Referred Current Noise Density  
nV/Hz  
pA/Hz  
5.8  
in  
0.01  
f = 1 kHz, AV = 1, RL = 100 kΩ  
VO = 0.9 VPP  
0.003  
0.004  
THD+N Total Harmonic Distortion + Noise  
%
f = 1 kHz, AV = 1, RL = 600Ω  
VO = 0.9 VPP  
(6) The short circuit test is a momentary open loop test.  
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5V Electrical Characteristics  
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 5V, V= 0V, VCM = V+/2. Boldface limits apply at the  
temperature extremes.  
Symbol  
Parameter  
Conditions  
20°C TA 85°C  
Min(1)  
Typ(2)  
Max(1)  
Units  
±150  
±300  
±10  
VOS  
Input Offset Voltage  
μV  
±150  
±400  
40°C TA 125°C  
±10  
–1.75  
0.1  
Input Offset Voltage Temperature  
Drift(3)(4)  
TC VOS  
±4  
μV/°C  
1
25  
40°C TA 85°C  
40°C TA 125°C  
IB  
Input Bias Current  
Input Offset Current  
VCM = 2.0V(5)(4)  
pA  
1
100  
0.1  
0.5  
50  
IOS  
VCM = 2.0V(4)  
0.01  
100  
100  
98  
pA  
dB  
85  
82  
CMRR Common Mode Rejection Ratio  
0V VCM 3.7V  
2.0V V+ 5.5V  
85  
80  
V= 0V, VCM = 0  
PSRR  
Power Supply Rejection Ratio  
dB  
V
1.8V V+ 5.5V  
85  
V= 0V, VCM = 0  
CMRR 80 dB  
CMRR 78 dB  
0.3  
–0.3  
4
4
CMVR Common Mode Voltage Range  
VO = 0.3 to 4.7V  
84  
80  
90  
95  
RL = 2 kto V+/2  
AVOL  
Open Loop Voltage Gain  
dB  
VO = 0.3 to 4.7V  
90  
86  
RL = 10 kto V+/2  
70  
77  
RL = 2 kto V+/2  
RL = 10 kto V+/2  
RL = 2 kto V+/2  
RL = 10 kto V+/2  
32  
Output Voltage Swing  
High  
60  
66  
22  
mV from  
either rail  
VOUT  
75  
78  
45  
Output Voltage Swing  
Low  
60  
62  
20  
Sourcing to V−  
VIN = 200 mV(6)  
46  
38  
66  
IOUT  
Output Current  
Supply Current  
mA  
mA  
Sinking to V+  
10.5  
6.5  
23  
VIN = 200 mV(6)  
1.70  
2.05  
IS  
(per channel)  
1.30  
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the  
Statistical Quality Control (SQC) method.  
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary  
over time and will also depend on the application and configuration.  
(3) Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.  
(4) This parameter is specified by design and/or characterization and is not tested in production.  
(5) Positive current corresponds to current flowing into the device.  
(6) The short circuit test is a momentary open loop test.  
4
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Copyright © 2011–2013, Texas Instruments Incorporated  
Product Folder Links: SM73307  
SM73307  
www.ti.com  
SNOSB88B JUNE 2011REVISED APRIL 2013  
5V Electrical Characteristics (continued)  
Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 5V, V= 0V, VCM = V+/2. Boldface limits apply at the  
temperature extremes.  
Symbol  
Parameter  
Conditions  
AV = +1, Rising (10% to 90%)  
AV = +1, Falling (90% to 10%)  
Min(1)  
6.0  
Typ(2)  
9.5  
Max(1)  
Units  
V/μs  
SR  
Slew Rate  
7.5  
11.5  
17  
GBW  
en  
Gain Bandwidth  
MHz  
f = 400 Hz  
f = 1 kHz  
f = 1 kHz  
7.0  
Input Referred Voltage Noise Density  
Input Referred Current Noise Density  
nV/Hz  
pA/Hz  
5.8  
in  
0.01  
f = 1 kHz, AV = 1, RL = 100 kΩ  
VO = 4 VPP  
0.001  
0.004  
THD+N Total Harmonic Distortion + Noise  
%
f = 1 kHz, AV = 1, RL = 600Ω  
VO = 4 VPP  
Connection Diagram  
1
2
3
4
8
7
6
5
+
OUT A  
-IN A  
V
-
OUT B  
-IN B  
+
+IN A  
-
+
-
+IN B  
V
Figure 1. 8-Pin VSSOP – Top View  
See Package Number DGK  
Copyright © 2011–2013, Texas Instruments Incorporated  
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Typical Performance Characteristics  
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.  
Offset Voltage Distribution  
Input Referred Voltage Noise  
25  
100  
V
V
= 5V  
S
V
= 5.5V  
S
= V /2  
S
CM  
20 UNITS TESTED: 10,000  
V
= 2.5V  
S
15  
10  
5
10  
0
-200  
1
1k  
1
10  
100  
10k  
100k  
-100  
0
100  
200  
FREQUENCY (Hz)  
OFFSET VOLTAGE (mV)  
Figure 2.  
Figure 3.  
Offset Voltage Distribution  
Offset Voltage Distribution  
25  
25  
20  
V
V
= 2.5V  
V
V
= 5V  
S
S
= V /2  
S
= V /2  
S
CM  
CM  
UNITS TESTED:10,000  
20 UNITS TESTED: 10,000  
15  
10  
5
15  
10  
5
0
-200  
0
-200  
-100  
0
100  
200  
-100  
0
100  
200  
OFFSET VOLTAGE (mV)  
OFFSET VOLTAGE (mV)  
Figure 4.  
Figure 5.  
Offset Voltage  
vs.  
VCM  
TCVOS Distribution  
25  
20  
200  
150  
100  
50  
-40°C Ç T Ç 125°C  
A
V
S
= 1.8V  
V
= 2.5V, 5V  
S
-40°C  
V
= V /2  
S
CM  
UNITS TESTED:  
10,000  
15  
10  
5
25°C  
0
-50  
125°C  
-100  
-150  
-200  
0
-0.3  
0
0.3  
0.9  
1.2  
1.5  
0.6  
(V)  
-4  
-3  
-2  
(mV/°C)  
-1  
0
TCV  
V
OS  
CM  
Figure 6.  
Figure 7.  
6
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Typical Performance Characteristics (continued)  
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.  
Offset Voltage  
Offset Voltage  
vs.  
vs.  
VCM  
VCM  
200  
200  
150  
100  
V
S
= 2.5V  
V = 5V  
S
150  
100  
50  
-40°C  
25°C  
-40°C  
25°C  
50  
0
0
125°C  
125°C  
-50  
-50  
-100  
-150  
-200  
-100  
-150  
-200  
-0.3  
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1  
(V)  
-0.3  
0.7  
1.7  
2.7  
(V)  
3.7  
4.7  
V
CM  
V
CM  
Figure 8.  
Figure 9.  
Offset Voltage  
vs.  
Supply Voltage  
CMRR  
vs.  
Frequency  
120  
100  
200  
150  
100  
50  
V
S
= 2.5V  
-40°C  
80  
60  
25°C  
V
= 5V  
S
0
125°C  
-50  
40  
20  
-100  
-150  
-200  
0
10k  
100k  
10  
100  
1k  
1M  
1.5  
2.5  
3.5  
4.5  
5.5  
6
FREQUENCY (Hz)  
V
S
(V)  
Figure 10.  
Figure 11.  
Input Bias Current  
Input Bias Current  
vs.  
vs.  
VCM  
VCM  
1000  
500  
50  
40  
30  
V
S
= 5V  
V
S
= 5V  
25°C  
0
20  
10  
125°C  
-500  
-1000  
-1500  
-2000  
-2500  
-3000  
-40°C  
0
-10  
-20  
85°C  
-30  
-40  
-50  
0
1
2
3
4
0
1
2
3
4
V
(V)  
V
CM  
(V)  
CM  
Figure 12.  
Figure 13.  
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Typical Performance Characteristics (continued)  
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.  
Supply Current  
vs.  
Supply Voltage  
Crosstalk Rejection Ratio  
2
160  
140  
125°C  
1.6  
120  
100  
80  
60  
40  
20  
0
25°C  
1.2  
-40°C  
0.8  
0.4  
0
1M  
10M  
1k  
1.5  
0
10k  
100k  
100M  
5.5  
5
1.5  
2.5  
3.5  
(V)  
4.5  
5.5  
5.5  
5
FREQUENCY (Hz)  
V
S
Figure 14.  
Figure 15.  
Sourcing Current  
vs.  
Supply Voltage  
Sinking Current  
vs.  
Supply Voltage  
35  
30  
25  
20  
15  
80  
125°C  
70  
125°C  
60  
50  
25°C  
-40°C  
25°C  
40  
30  
10  
5
-40°C  
20  
10  
0
0
2.5  
3.5  
(V)  
4.5  
1.5  
2.5  
3.5  
(V)  
4.5  
V
V
S
S
Figure 16.  
Figure 17.  
Sourcing Current  
vs.  
Output Voltage  
Sinking Current  
vs.  
Output Voltage  
70  
30  
25  
125°C  
125°C  
60  
50  
40  
30  
20  
20  
15  
10  
-40°C  
25°C  
25°C  
-40°C  
5
0
10  
0
0
1
2
3
4
1
2
3
4
V
(V)  
OUT  
V
(V)  
OUT  
Figure 18.  
Figure 19.  
8
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Typical Performance Characteristics (continued)  
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.  
Output Swing High  
Output Swing Low  
vs.  
vs.  
Supply Voltage  
50  
Supply Voltage  
50  
40  
30  
R
L
= 10 kW  
R =10 kW  
L
40  
30  
25°C  
125°C  
-40°C  
20  
10  
0
20  
10  
0
125°C  
-40°C  
25°C  
1.5  
1.5  
1.5  
2.5  
3.5  
(V)  
4.5  
5.5  
1.5  
2.5  
3.5  
(V)  
4.5  
5.5  
V
V
S
S
Figure 20.  
Figure 21.  
Output Swing High  
vs.  
Supply Voltage  
Output Swing Low  
vs.  
Supply Voltage  
50  
40  
30  
50  
40  
30  
R
L
= 2 kW  
-40°C  
125°C  
25°C  
125°C  
25°C  
20  
10  
0
20  
10  
0
-40°C  
R
= 2 kW  
L
2.5  
3.5  
(V)  
4.5  
5.5  
1.5  
2.5  
3.5  
(V)  
4.5  
5.5  
V
V
S
S
Figure 22.  
Figure 23.  
Output Swing High  
vs.  
Supply Voltage  
Output Swing Low  
vs.  
Supply Voltage  
150  
120  
90  
150  
R = 600W  
L
R
= 600W  
L
120  
90  
25°C  
125°C  
125°C  
25°C  
-40°C  
60  
30  
0
60  
30  
0
-40°C  
2.5  
3.5  
(V)  
4.5  
5.5  
1.5  
2.5  
3.5  
(V)  
4.5  
5.5  
V
V
S
S
Figure 24.  
Figure 25.  
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Typical Performance Characteristics (continued)  
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.  
Open Loop Frequency Response  
Open Loop Frequency Response  
120  
120  
100  
80  
120  
120  
100  
80  
PHASE  
PHASE  
100  
100  
C
L
= 20 pF  
80  
60  
80  
60  
C
L
= 50 pF  
60  
60  
GAIN  
C
L
= 100 pF  
40  
20  
0
40  
20  
0
40  
40  
20  
0
GAIN  
20  
0
C
= 20 pF  
= 50 pF  
L
-20  
-40  
-20  
-40  
-60  
-20  
-40  
-20  
-40  
C
L
C
= 100 pF  
L
R
= 600W, 10 kW, 10 MW  
L
-60  
-60  
100M  
-60  
10k  
100k  
1M  
10M  
1k  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 26.  
Figure 27.  
Phase Margin  
vs.  
Capacitive Load  
Phase Margin  
vs.  
Capacitive Load  
50  
40  
50  
R
= 600W  
L
40  
30  
R
= 600W  
L
R
L
= 10 kW  
30  
20  
R
L
= 10 kW  
R
= 10 MW  
L
20  
10  
0
R
L
= 10 MW  
10  
0
V
= 2.5V  
V = 5V  
S
S
10  
100  
1000  
10  
100  
1000  
CAPACITIVE LOAD (pF)  
CAPACITIVE LOAD (pF)  
Figure 28.  
Figure 29.  
Overshoot and Undershoot  
vs.  
Slew Rate  
vs.  
Supply Voltage  
Capacitive Load  
12  
70  
UNDERSHOOT%  
OVERSHOOT %  
FALLING EDGE  
60  
50  
11  
10  
40  
30  
20  
9
8
7
RISING EDGE  
10  
0
0
20  
40  
80  
100 120  
60  
1.5  
2.5  
3.5  
4.5  
5.5  
6
CAPACITIVE LOAD (pF)  
V
(V)  
S
Figure 30.  
Figure 31.  
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Typical Performance Characteristics (continued)  
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.  
Small Signal Step Response  
Large Signal Step Response  
V
= 20 mV  
PP  
V
= 1 V  
IN  
IN  
PP  
f = 1 MHz, A = +1  
f = 200 kHz, A = +1  
V
V
V
= 2.5V, C = 10 pF  
L
V
= 2.5V, C = 10 pF  
L
S
S
200 ns/DIV  
800 ns/DIV  
Figure 32.  
Figure 33.  
Small Signal Step Response  
Large Signal Step Response  
V
= 20 mV  
PP  
IN  
V
= 1 V  
PP  
IN  
f = 200 kHz, A = +1  
f = 1 MHz, A = +1  
V
V
V
= 5V, C = 10 pF  
L
V
= 5V, C = 10 pF  
S
S
L
200 ns/DIV  
800 ns/DIV  
Figure 34.  
Figure 35.  
THD+N  
vs.  
Output Voltage  
THD+N  
vs.  
Output Voltage  
0
0
V
= 1.8V  
V
= 5.5V  
S
S
f = 1 kHz  
f = 1 kHz  
-20  
-40  
-20  
-40  
A
= +2  
A
= +2  
V
V
-60  
-80  
R
L
= 600W  
-60  
-80  
R
= 600W  
L
-100  
-120  
-140  
-100  
R
L
= 100 kW  
R
= 100 kW  
L
-120  
0.01  
0.1  
1
10  
0.01  
0.1  
1
10  
OUTPUT AMPLITUDE (V  
)
PP  
OUTPUT AMPLITUDE (V  
)
PP  
Figure 36.  
Figure 37.  
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Typical Performance Characteristics (continued)  
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.  
THD+N  
vs.  
Frequency  
THD+N  
vs.  
Frequency  
0.006  
0.006  
0.005  
0.004  
0.003  
0.002  
0.001  
0
V
V
A
= 1.8V  
= 0.9 V  
= +2  
V
V
A
= 5V  
= 4 V  
= +2  
S
O
V
S
O
V
PP  
PP  
0.005  
0.004  
0.003  
0.002  
0.001  
0
R
= 600W  
L
R
= 600W  
L
R
= 100 kW  
L
R
= 100 kW  
L
10  
100  
1k  
10k  
100k  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 38.  
Figure 39.  
PSRR  
vs.  
Frequency  
Input Referred Voltage Noise  
vs.  
Frequency  
100  
120  
100  
V
= 5.5V, -PSRR  
V = 5.5V  
S
S
V
= 1.8V, -PSRR  
S
V
= 2.5V  
S
80  
60  
40  
20  
V
= 5.5V, +PSRR  
S
10  
V
= 1.8V, +PSRR  
S
1
0
1k  
1
10  
100  
10k  
100k  
10k  
1M  
10  
100  
1k  
100k  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 40.  
Figure 41.  
Time Domain Voltage Noise  
Closed Loop Frequency Response  
5
4
3
2
225  
V
V
= ±2.5V  
= 0.0V  
V
= 5V  
S
S
180  
135  
90  
R
= 2 kW  
= 20 pF  
CM  
L
C
L
V
A
= 2 V  
= +1  
O
V
PP  
1
0
45  
0
-45  
-90  
-135  
-1  
-2  
-3  
-4  
-5  
PHASE  
GAIN  
-180  
-225  
1 s/DIV  
100 k  
10k  
FREQUENCY (Hz)  
1M  
100  
1k  
10M  
Figure 42.  
Figure 43.  
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Typical Performance Characteristics (continued)  
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.  
Closed Loop Output Impedance  
vs.  
Frequency  
100  
10  
1
0.1  
0.01  
100M  
10 100 1k 10k 100k 1M 10M  
FREQUENCY (Hz)  
Figure 44.  
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APPLICATION INFORMATION  
The SM73307 is a dual, low noise, low offset, rail-to-rail output precision amplifier with a wide gain bandwidth  
product of 17 MHz and low supply current. The wide bandwidth makes the SM73307 an ideal choice for wide-  
band amplification in photovoltaic and portable applications.  
The SM73307 is superior for sensor applications. The very low input referred voltage noise of only 5.8 nV/Hz at  
1 kHz and very low input referred current noise of only 10 fA/Hz mean more signal fidelity and higher signal-to-  
noise ratio.  
The SM73307 has a supply voltage range of 1.8V to 5.5V over a wide temperature range of 0°C to 125°C. This  
is optimal for low voltage commercial applications. For applications where the ambient temperature might be less  
than 0°C, the SM73307 is fully operational at supply voltages of 2.0V to 5.5V over the temperature range of  
40°C to 125°C.  
The outputs of the SM73307 swing within 25 mV of either rail providing maximum dynamic range in applications  
requiring low supply voltage. The input common mode range of the SM73307 extends to 300 mV below ground.  
This feature enables users to utilize this device in single supply applications.  
The use of a very innovative feedback topology has enhanced the current drive capability of the SM73307,  
resulting in sourcing currents of as much as 47 mA with a supply voltage of only 1.8V.  
The SM73307 is offered in an 8-pin VSSOP package. This small package is an ideal solution for applications  
requiring minimum PC board footprint.  
CAPACITIVE LOAD  
The unity gain follower is the most sensitive configuration to capacitive loading. The combination of a capacitive  
load placed directly on the output of an amplifier along with the output impedance of the amplifier creates a  
phase lag which in turn reduces the phase margin of the amplifier. If phase margin is significantly reduced, the  
response will be either under-damped or the amplifier will oscillate.  
The SM73307 can directly drive capacitive loads of up to 120 pF without oscillating. To drive heavier capacitive  
loads, an isolation resistor, RISO as shown in Figure 45, should be used. This resistor and CL form a pole and  
hence delay the phase lag or increase the phase margin of the overall system. The larger the value of RISO, the  
more stable the output voltage will be. However, larger values of RISO result in reduced output swing and  
reduced output current drive.  
Figure 45. Isolating Capacitive Load  
INPUT CAPACITANCE  
CMOS input stages inherently have low input bias current and higher input referred voltage noise. The SM73307  
enhances this performance by having the low input bias current of only 50 fA, as well as, a very low input  
referred voltage noise of 5.8 nV/ . In order to achieve this a larger input stage has been used. This larger input  
stage increases the input capacitance of the SM73307. Figure 46 shows typical input common mode capacitance  
of the SM73307.  
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25  
20  
V
S
= 5V  
15  
10  
5
0
0
1
2
3
4
V
CM  
(V)  
Figure 46. Input Common Mode Capacitance  
This input capacitance will interact with other impedances, such as gain and feedback resistors which are seen  
on the inputs of the amplifier, to form a pole. This pole will have little or no effect on the output of the amplifier at  
low frequencies and under DC conditions, but will play a bigger role as the frequency increases. At higher  
frequencies, the presence of this pole will decrease phase margin and also cause gain peaking. In order to  
compensate for the input capacitance, care must be taken in choosing feedback resistors. In addition to being  
selective in picking values for the feedback resistor, a capacitor can be added to the feedback path to increase  
stability.  
The DC gain of the circuit shown in Figure 47 is simply R2/R1.  
C
F
R
2
R
1
-
+
C
IN  
V
+
-
IN  
+
V
OUT  
-
R2  
R1  
VOUT  
VIN  
-
AV  
=
-
=
Figure 47. Compensating for Input Capacitance  
For the time being, ignore CF. The AC gain of the circuit in Figure 47 can be calculated as follows:  
VOUT  
-R2/R1  
(s) =  
VIN  
s2  
s
«
«
1 +  
+
A0 R1  
A0  
«
«
R1 + R2  
CIN R2  
(1)  
(2)  
This equation is rearranged to find the location of the two poles:  
2
«
4 A0CIN  
R2  
1
1
-1  
1
1
-
P1,2  
=
+
ê
+
«
R1  
R2  
R
R2  
2CIN  
1
As shown in Equation 2, as the values of R1 and R2 are increased, the magnitude of the poles are reduced,  
which in turn decreases the bandwidth of the amplifier. Figure 48 shows the frequency response with different  
value resistors for R1 and R2. Whenever possible, it is best to choose smaller feedback resistors.  
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15  
10  
5
A
= -1  
V
0
-5  
R
1,  
R
= 30 kW  
2
-10  
-15  
-20  
-25  
R
R
= 10 kW  
2
1,  
R
1,  
R
= 1 kW  
2
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
Figure 48. Closed Loop Frequency Response  
As mentioned before, adding a capacitor to the feedback path will decrease the peaking. This is because CF will  
form yet another pole in the system and will prevent pairs of poles, or complex conjugates from forming. It is the  
presence of pairs of poles that cause the peaking of gain. Figure 49 shows the frequency response of the  
schematic presented in Figure 47 with different values of CF. As can be seen, using a small value capacitor  
significantly reduces or eliminates the peaking.  
20  
R , R = 30 kW  
1
2
C
F
= 0 pF  
A
= -1  
V
10  
0
C
= 5 pF  
F
-10  
-20  
-30  
-40  
C
F
= 2 pF  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
Figure 49. Closed Loop Frequency Response  
TRANSIMPEDANCE AMPLIFIER  
In many applications the signal of interest is a very small amount of current that needs to be detected. Current  
that is transmitted through a photodiode is a good example. Barcode scanners, light meters, fiber optic receivers,  
and industrial sensors are some typical applications utilizing photodiodes for current detection. This current  
needs to be amplified before it can be further processed. This amplification is performed using a current-to-  
voltage converter configuration or transimpedance amplifier. The signal of interest is fed to the inverting input of  
an op amp with a feedback resistor in the current path. The voltage at the output of this amplifier will be equal to  
the negative of the input current times the value of the feedback resistor. Figure 50 shows a transimpedance  
amplifier configuration. CD represents the photodiode parasitic capacitance and CCM denotes the common-mode  
capacitance of the amplifier. The presence of all of these capacitances at higher frequencies might lead to less  
stable topologies at higher frequencies. Care must be taken when designing a transimpedance amplifier to  
prevent the circuit from oscillating.  
With a wide gain bandwidth product, low input bias current and low input voltage and current noise, the SM73307  
is ideal for wideband transimpedance applications.  
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C
F
R
F
I
IN  
C
-
CM  
+
-
+
V
OUT  
C
D
V
B
CIN = CD + CCM  
VOUT  
- R  
=
F
IIN  
Figure 50. Transimpedance Amplifier  
A feedback capacitance CF is usually added in parallel with RF to maintain circuit stability and to control the  
frequency response. To achieve a maximally flat, 2nd order response, RF and CF should be chosen by using  
Equation 3:  
CIN  
CF =  
GBWP * 2 p RF  
(3)  
Calculating CF from Equation 3 can sometimes result in capacitor values which are less than 2 pF. This is  
especially the case for high speed applications. In these instances, it is often more practical to use the circuit  
shown in Figure 51 in order to allow more sensible choices for CF. The new feedback capacitor, CF, is (1+  
RB/RA) CF. This relationship holds as long as RA << RF.  
R
A
R
B
C
F
R
F
-
+
IF RA < < RF  
«
RB  
1 +  
C Å =  
F
CF  
RA  
«
Figure 51. Modified Transimpedance Amplifier  
SENSOR INTERFACE  
The SM73307 has a low input bias current and low input referred noise, which makes it an ideal choice for  
sensor interfaces such as thermopiles, Infra Red (IR) thermometry, thermocouple amplifiers, and pH electrode  
buffers.  
Thermopiles generate voltage in response to receiving radiation. These voltages are often only a few microvolts.  
As a result, the operational amplifier used for this application needs to have low offset voltage, low input voltage  
noise, and low input bias current. Figure 52 shows a thermopile application where the sensor detects radiation  
from a distance and generates a voltage that is proportional to the intensity of the radiation. The two resistors, RA  
and RB, are selected to provide high gain to amplify this signal, while CF removes the high frequency noise.  
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THERMOPILE  
+
-
+
V
-
+
= KI  
IN  
R
B
V
OUT  
-
IR RADIATION  
INTENSITY, I  
R
A
C
F
V
R
A
OUT  
I =  
K(R  
R )  
B
A +  
Figure 52. Thermopile Sensor Interface  
PRECISION RECTIFIER  
Rectifiers are electrical circuits used for converting AC signals to DC signals. Figure 53 shows a full-wave  
precision rectifier. Each operational amplifier used in this circuit has a diode on its output. This means for the  
diodes to conduct, the output of the amplifier needs to be positive with respect to ground. If VIN is in its positive  
half cycle then only the output of the bottom amplifier will be positive. As a result, the diode on the output of the  
bottom amplifier will conduct and the signal will show at the output of the circuit. If VIN is in its negative half cycle  
then the output of the top amplifier will be positive, resulting in the diode on the output of the top amplifier  
conducting and delivering the signal from the amplifier's output to the circuit's output.  
For R2/ R1 2, the resistor values can be found by using the equation shown in Figure 53. If R2/ R1 = 1, then R3  
should be left open, no resistor needed, and R4 should simply be shorted.  
R
2
V
IN  
R
1
+
V
V
OUT  
-
-
-
V
R
R
3
4
R
R
R
R
2
1
4
3
= 1 +  
+
V
-
10 kW  
V
Figure 53. Precision Rectifier  
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REVISION HISTORY  
Changes from Revision A (April 2013) to Revision B  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 18  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
PACKAGING INFORMATION  
Orderable Device  
SM73307MM/NOPB  
SM73307MME/NOPB  
SM73307MMX/NOPB  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 125  
Top-Side Markings  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4)  
ACTIVE  
VSSOP  
VSSOP  
VSSOP  
DGK  
8
8
8
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
S307  
ACTIVE  
ACTIVE  
DGK  
DGK  
250  
Green (RoHS  
& no Sb/Br)  
-40 to 125  
S307  
S307  
3500  
Green (RoHS  
& no Sb/Br)  
-40 to 125  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4)  
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a  
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SM73307MM/NOPB  
SM73307MME/NOPB  
SM73307MMX/NOPB  
VSSOP  
VSSOP  
VSSOP  
DGK  
DGK  
DGK  
8
8
8
1000  
250  
178.0  
178.0  
330.0  
12.4  
12.4  
12.4  
5.3  
5.3  
5.3  
3.4  
3.4  
3.4  
1.4  
1.4  
1.4  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
3500  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SM73307MM/NOPB  
SM73307MME/NOPB  
SM73307MMX/NOPB  
VSSOP  
VSSOP  
VSSOP  
DGK  
DGK  
DGK  
8
8
8
1000  
250  
210.0  
210.0  
367.0  
185.0  
185.0  
367.0  
35.0  
35.0  
35.0  
3500  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
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